rockchip: rk3399: Add Rockpro64 board support

Add initial support for Rockpro64 board. Specification - Rockchip RK3399 - 2/4GB Dual-Channel LPDDR3 - SD card slot - eMMC socket - 128Mb SPI Flash - Gigabit ethernet - PCIe 4X slot - WiFI/BT module socket - HDMI In/Out, DP, MIPI DSI/CSI, eDP - USB 3.0, 2.0 - USB Type C power and data - GPIO expansion ports - DC 12V/2A Commit details of rk3399-rockpro64.dts sync from Linux 5.1-rc2: "arm64: dts: rockchip: rockpro64 dts add usb regulator" (sha1: 6db644c79c8d45d73b56bc389aebd85fc3679beb) 'Akash' has sent an initial patch before, so I keep him as board maintainer and I'm co-maintainer based on our conversation. Signed-off-by: Akash Gajjar <akash@openedev.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>

rockchip: rk3399: Add Rockpro64 board support
Add initial support for Rockpro64 board. Specification - Rockchip RK3399 - 2/4GB Dual-Channel LPDDR3 - SD card slot - eMMC socket - 128Mb SPI Flash - Gigabit ethernet - PCIe 4X slot - WiFI/BT module socket - HDMI In/Out, DP, MIPI DSI/CSI, eDP - USB 3.0, 2.0 - USB Type C power and data - GPIO expansion ports - DC 12V/2A Commit details of rk3399-rockpro64.dts sync from Linux 5.1-rc2: "arm64: dts: rockchip: rockpro64 dts add usb regulator" (sha1: 6db644c79c8d45d73b56bc389aebd85fc3679beb) 'Akash' has sent an initial patch before, so I keep him as board maintainer and I'm co-maintainer based on our conversation. Signed-off-by: Akash Gajjar <akash@openedev.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Jagan Teki · Kever Yang
1 parent 48b5c25f99
Showing 5 changed files with 786 additions and 0 deletions Side-by-side Diff
arch/arm/dts/Makefile
arch/arm/dts/rk3399-rockpro64-u-boot.dtsi
arch/arm/dts/rk3399-rockpro64.dts
board/rockchip/evb_rk3399/MAINTAINERS
configs/rockpro64-rk3399_defconfig
@@ -114,6 +114,7 @@
 	rk3399-puma-ddr1600.dtb \
 	rk3399-puma-ddr1866.dtb \
 	rk3399-rock960.dtb \
+	rk3399-rockpro64.dtb
  
 dtb-$(CONFIG_ROCKCHIP_RV1108) += \
 	rv1108-elgin-r1.dtb \
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2019 Jagan Teki <jagan@amarulasolutions.com>
+ */
+
+#include "rk3399-u-boot.dtsi"
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd.
+ * Copyright (c) 2018 Akash Gajjar <Akash_Gajjar@mentor.com>
+ */
+
+/dts-v1/;
+#include <dt-bindings/input/linux-event-codes.h>
+#include <dt-bindings/pwm/pwm.h>
+#include "rk3399.dtsi"
+#include "rk3399-opp.dtsi"
+
+/ {
+	model = "Pine64 RockPro64";
+	compatible = "pine64,rockpro64", "rockchip,rk3399";
+
+	chosen {
+		stdout-path = "serial2:1500000n8";
+	};
+
+	clkin_gmac: external-gmac-clock {
+		compatible = "fixed-clock";
+		clock-frequency = <125000000>;
+		clock-output-names = "clkin_gmac";
+		#clock-cells = <0>;
+	};
+
+	gpio-keys {
+		compatible = "gpio-keys";
+		autorepeat;
+		pinctrl-names = "default";
+		pinctrl-0 = <&pwrbtn>;
+
+		power {
+			debounce-interval = <100>;
+			gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>;
+			label = "GPIO Key Power";
+			linux,code = <KEY_POWER>;
+			wakeup-source;
+		};
+	};
+
+	leds {
+		compatible = "gpio-leds";
+		pinctrl-names = "default";
+		pinctrl-0 = <&work_led_gpio>, <&diy_led_gpio>;
+
+		work-led {
+			label = "work";
+			default-state = "on";
+			gpios = <&gpio0 RK_PB3 GPIO_ACTIVE_HIGH>;
+		};
+
+		diy-led {
+			label = "diy";
+			default-state = "off";
+			gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_HIGH>;
+		};
+	};
+
+	sdio_pwrseq: sdio-pwrseq {
+		compatible = "mmc-pwrseq-simple";
+		clocks = <&rk808 1>;
+		clock-names = "ext_clock";
+		pinctrl-names = "default";
+		pinctrl-0 = <&wifi_enable_h>;
+
+		/*
+		 * On the module itself this is one of these (depending
+		 * on the actual card populated):
+		 * - SDIO_RESET_L_WL_REG_ON
+		 * - PDN (power down when low)
+		 */
+		reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>;
+	};
+
+	vcc12v_dcin: vcc12v-dcin {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc12v_dcin";
+		regulator-always-on;
+		regulator-boot-on;
+		regulator-min-microvolt = <12000000>;
+		regulator-max-microvolt = <12000000>;
+	};
+
+	/* switched by pmic_sleep */
+	vcc1v8_s3: vcca1v8_s3: vcc1v8-s3 {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc1v8_s3";
+		regulator-always-on;
+		regulator-boot-on;
+		regulator-min-microvolt = <1800000>;
+		regulator-max-microvolt = <1800000>;
+		vin-supply = <&vcc_1v8>;
+	};
+
+	vcc3v3_pcie: vcc3v3-pcie-regulator {
+		compatible = "regulator-fixed";
+		enable-active-high;
+		gpio = <&gpio1 RK_PD0 GPIO_ACTIVE_HIGH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&pcie_pwr_en>;
+		regulator-name = "vcc3v3_pcie";
+		regulator-always-on;
+		regulator-boot-on;
+		vin-supply = <&vcc12v_dcin>;
+	};
+
+	vcc3v3_sys: vcc3v3-sys {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc3v3_sys";
+		regulator-always-on;
+		regulator-boot-on;
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		vin-supply = <&vcc5v0_sys>;
+	};
+
+	/* Actually 3 regulators (host0, 1, 2) controlled by the same gpio */
+	vcc5v0_host: vcc5v0-host-regulator {
+		compatible = "regulator-fixed";
+		enable-active-high;
+		gpio = <&gpio4 RK_PD2 GPIO_ACTIVE_HIGH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&vcc5v0_host_en>;
+		regulator-name = "vcc5v0_host";
+		regulator-always-on;
+		vin-supply = <&vcc5v0_usb>;
+	};
+
+	vcc5v0_typec: vcc5v0-typec-regulator {
+		compatible = "regulator-fixed";
+		enable-active-high;
+		gpio = <&gpio1 RK_PA3 GPIO_ACTIVE_HIGH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&vcc5v0_typec_en>;
+		regulator-name = "vcc5v0_typec";
+		regulator-always-on;
+		vin-supply = <&vcc5v0_usb>;
+	};
+
+	vcc5v0_sys: vcc5v0-sys {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc5v0_sys";
+		regulator-always-on;
+		regulator-boot-on;
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		vin-supply = <&vcc12v_dcin>;
+	};
+
+	vcc5v0_usb: vcc5v0-usb {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc5v0_usb";
+		regulator-always-on;
+		regulator-boot-on;
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		vin-supply = <&vcc12v_dcin>;
+	};
+
+	vdd_log: vdd-log {
+		compatible = "pwm-regulator";
+		pwms = <&pwm2 0 25000 1>;
+		regulator-name = "vdd_log";
+		regulator-always-on;
+		regulator-boot-on;
+		regulator-min-microvolt = <800000>;
+		regulator-max-microvolt = <1400000>;
+		vin-supply = <&vcc5v0_sys>;
+	};
+};
+
+&cpu_l0 {
+	cpu-supply = <&vdd_cpu_l>;
+};
+
+&cpu_l1 {
+	cpu-supply = <&vdd_cpu_l>;
+};
+
+&cpu_l2 {
+	cpu-supply = <&vdd_cpu_l>;
+};
+
+&cpu_l3 {
+	cpu-supply = <&vdd_cpu_l>;
+};
+
+&cpu_b0 {
+	cpu-supply = <&vdd_cpu_b>;
+};
+
+&cpu_b1 {
+	cpu-supply = <&vdd_cpu_b>;
+};
+
+&emmc_phy {
+	status = "okay";
+};
+
+&gmac {
+	assigned-clocks = <&cru SCLK_RMII_SRC>;
+	assigned-clock-parents = <&clkin_gmac>;
+	clock_in_out = "input";
+	phy-supply = <&vcc_lan>;
+	phy-mode = "rgmii";
+	pinctrl-names = "default";
+	pinctrl-0 = <&rgmii_pins>;
+	snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
+	snps,reset-active-low;
+	snps,reset-delays-us = <0 10000 50000>;
+	tx_delay = <0x28>;
+	rx_delay = <0x11>;
+	status = "okay";
+};
+
+&hdmi {
+	ddc-i2c-bus = <&i2c3>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&hdmi_cec>;
+	status = "okay";
+};
+
+&gpu {
+	mali-supply = <&vdd_gpu>;
+	status = "okay";
+};
+
+&i2c0 {
+	clock-frequency = <400000>;
+	i2c-scl-rising-time-ns = <168>;
+	i2c-scl-falling-time-ns = <4>;
+	status = "okay";
+
+	rk808: pmic@1b {
+		compatible = "rockchip,rk808";
+		reg = <0x1b>;
+		interrupt-parent = <&gpio1>;
+		interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
+		#clock-cells = <1>;
+		clock-output-names = "xin32k", "rk808-clkout2";
+		pinctrl-names = "default";
+		pinctrl-0 = <&pmic_int_l>;
+		rockchip,system-power-controller;
+		wakeup-source;
+
+		vcc1-supply = <&vcc5v0_sys>;
+		vcc2-supply = <&vcc5v0_sys>;
+		vcc3-supply = <&vcc5v0_sys>;
+		vcc4-supply = <&vcc5v0_sys>;
+		vcc6-supply = <&vcc5v0_sys>;
+		vcc7-supply = <&vcc5v0_sys>;
+		vcc8-supply = <&vcc3v3_sys>;
+		vcc9-supply = <&vcc5v0_sys>;
+		vcc10-supply = <&vcc5v0_sys>;
+		vcc11-supply = <&vcc5v0_sys>;
+		vcc12-supply = <&vcc3v3_sys>;
+		vddio-supply = <&vcca_1v8>;
+
+		regulators {
+			vdd_center: DCDC_REG1 {
+				regulator-name = "vdd_center";
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <750000>;
+				regulator-max-microvolt = <1350000>;
+				regulator-ramp-delay = <6001>;
+				regulator-state-mem {
+					regulator-off-in-suspend;
+				};
+			};
+
+			vdd_cpu_l: DCDC_REG2 {
+				regulator-name = "vdd_cpu_l";
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <750000>;
+				regulator-max-microvolt = <1350000>;
+				regulator-ramp-delay = <6001>;
+				regulator-state-mem {
+					regulator-off-in-suspend;
+				};
+			};
+
+			vcc_ddr: DCDC_REG3 {
+				regulator-name = "vcc_ddr";
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-state-mem {
+					regulator-on-in-suspend;
+				};
+			};
+
+			vcc_1v8: DCDC_REG4 {
+				regulator-name = "vcc_1v8";
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <1800000>;
+				};
+			};
+
+			vcc1v8_dvp: LDO_REG1 {
+				regulator-name = "vcc1v8_dvp";
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+				regulator-state-mem {
+					regulator-off-in-suspend;
+				};
+			};
+
+			vcc3v0_touch: LDO_REG2 {
+				regulator-name = "vcc3v0_touch";
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <3000000>;
+				regulator-max-microvolt = <3000000>;
+				regulator-state-mem {
+					regulator-off-in-suspend;
+				};
+			};
+
+			vcca_1v8: LDO_REG3 {
+				regulator-name = "vcca_1v8";
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <1800000>;
+				};
+			};
+
+			vcc_sdio: LDO_REG4 {
+				regulator-name = "vcc_sdio";
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <3000000>;
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <3000000>;
+				};
+			};
+
+			vcca3v0_codec: LDO_REG5 {
+				regulator-name = "vcca3v0_codec";
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <3000000>;
+				regulator-max-microvolt = <3000000>;
+				regulator-state-mem {
+					regulator-off-in-suspend;
+				};
+			};
+
+			vcc_1v5: LDO_REG6 {
+				regulator-name = "vcc_1v5";
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <1500000>;
+				regulator-max-microvolt = <1500000>;
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <1500000>;
+				};
+			};
+
+			vcca1v8_codec: LDO_REG7 {
+				regulator-name = "vcca1v8_codec";
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+				regulator-state-mem {
+					regulator-off-in-suspend;
+				};
+			};
+
+			vcc_3v0: LDO_REG8 {
+				regulator-name = "vcc_3v0";
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <3000000>;
+				regulator-max-microvolt = <3000000>;
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <3000000>;
+				};
+			};
+
+			vcc3v3_s3: vcc_lan: SWITCH_REG1 {
+				regulator-name = "vcc3v3_s3";
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-state-mem {
+					regulator-off-in-suspend;
+				};
+			};
+
+			vcc3v3_s0: SWITCH_REG2 {
+				regulator-name = "vcc3v3_s0";
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-state-mem {
+					regulator-off-in-suspend;
+				};
+			};
+		};
+	};
+
+	vdd_cpu_b: regulator@40 {
+		compatible = "silergy,syr827";
+		reg = <0x40>;
+		fcs,suspend-voltage-selector = <1>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&vsel1_gpio>;
+		regulator-name = "vdd_cpu_b";
+		regulator-min-microvolt = <712500>;
+		regulator-max-microvolt = <1500000>;
+		regulator-ramp-delay = <1000>;
+		regulator-always-on;
+		regulator-boot-on;
+		vin-supply = <&vcc5v0_sys>;
+
+		regulator-state-mem {
+			regulator-off-in-suspend;
+		};
+	};
+
+	vdd_gpu: regulator@41 {
+		compatible = "silergy,syr828";
+		reg = <0x41>;
+		fcs,suspend-voltage-selector = <1>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&vsel2_gpio>;
+		regulator-name = "vdd_gpu";
+		regulator-min-microvolt = <712500>;
+		regulator-max-microvolt = <1500000>;
+		regulator-ramp-delay = <1000>;
+		regulator-always-on;
+		regulator-boot-on;
+		vin-supply = <&vcc5v0_sys>;
+
+		regulator-state-mem {
+			regulator-off-in-suspend;
+		};
+	};
+};
+
+&i2c1 {
+	i2c-scl-rising-time-ns = <300>;
+	i2c-scl-falling-time-ns = <15>;
+	status = "okay";
+};
+
+&i2c3 {
+	i2c-scl-rising-time-ns = <450>;
+	i2c-scl-falling-time-ns = <15>;
+	status = "okay";
+};
+
+&i2c4 {
+	i2c-scl-rising-time-ns = <600>;
+	i2c-scl-falling-time-ns = <20>;
+	status = "okay";
+
+	fusb0: typec-portc@22 {
+		compatible = "fcs,fusb302";
+		reg = <0x22>;
+		interrupt-parent = <&gpio1>;
+		interrupts = <RK_PA2 IRQ_TYPE_LEVEL_LOW>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&fusb0_int>;
+		vbus-supply = <&vcc5v0_typec>;
+		status = "okay";
+	};
+};
+
+&i2s0 {
+	rockchip,playback-channels = <8>;
+	rockchip,capture-channels = <8>;
+	status = "okay";
+};
+
+&i2s1 {
+	rockchip,playback-channels = <2>;
+	rockchip,capture-channels = <2>;
+	status = "okay";
+};
+
+&i2s2 {
+	status = "okay";
+};
+
+&io_domains {
+	status = "okay";
+
+	bt656-supply = <&vcc1v8_dvp>;
+	audio-supply = <&vcca1v8_codec>;
+	sdmmc-supply = <&vcc_sdio>;
+	gpio1830-supply = <&vcc_3v0>;
+};
+
+&pmu_io_domains {
+	pmu1830-supply = <&vcc_3v0>;
+	status = "okay";
+};
+
+&pinctrl {
+	buttons {
+		pwrbtn: pwrbtn {
+			rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>;
+		};
+	};
+
+	fusb302x {
+		fusb0_int: fusb0-int {
+			rockchip,pins = <1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>;
+		};
+	};
+
+	leds {
+		work_led_gpio: work_led-gpio {
+			rockchip,pins = <0 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+
+		diy_led_gpio: diy_led-gpio {
+			rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+	};
+
+	pcie {
+		pcie_pwr_en: pcie-pwr-en {
+			rockchip,pins = <1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+	};
+
+	pmic {
+		pmic_int_l: pmic-int-l {
+			rockchip,pins = <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>;
+		};
+
+		vsel1_gpio: vsel1-gpio {
+			rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>;
+		};
+
+		vsel2_gpio: vsel2-gpio {
+			rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>;
+		};
+	};
+
+	sdio-pwrseq {
+		wifi_enable_h: wifi-enable-h {
+			rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+	};
+
+	usb-typec {
+		vcc5v0_typec_en: vcc5v0_typec_en {
+			rockchip,pins = <1 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
+		};
+	};
+
+	usb2 {
+		vcc5v0_host_en: vcc5v0-host-en {
+			rockchip,pins = <4 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+	};
+};
+
+&pwm0 {
+	status = "okay";
+};
+
+&pwm2 {
+	status = "okay";
+};
+
+&saradc {
+	vref-supply = <&vcca1v8_s3>;
+	status = "okay";
+};
+
+&sdmmc {
+	bus-width = <4>;
+	cap-mmc-highspeed;
+	cap-sd-highspeed;
+	cd-gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
+	disable-wp;
+	max-frequency = <150000000>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_bus4>;
+	status = "okay";
+};
+
+&sdhci {
+	bus-width = <8>;
+	mmc-hs400-1_8v;
+	mmc-hs400-enhanced-strobe;
+	non-removable;
+	status = "okay";
+};
+
+&tcphy0 {
+	status = "okay";
+};
+
+&tcphy1 {
+	status = "okay";
+};
+
+&tsadc {
+	/* tshut mode 0:CRU 1:GPIO */
+	rockchip,hw-tshut-mode = <1>;
+	/* tshut polarity 0:LOW 1:HIGH */
+	rockchip,hw-tshut-polarity = <1>;
+	status = "okay";
+};
+
+&u2phy0 {
+	status = "okay";
+
+	u2phy0_otg: otg-port {
+		status = "okay";
+	};
+
+	u2phy0_host: host-port {
+		phy-supply = <&vcc5v0_host>;
+		status = "okay";
+	};
+};
+
+&u2phy1 {
+	status = "okay";
+
+	u2phy1_otg: otg-port {
+		status = "okay";
+	};
+
+	u2phy1_host: host-port {
+		phy-supply = <&vcc5v0_host>;
+		status = "okay";
+	};
+};
+
+&uart0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&uart0_xfer &uart0_cts>;
+	status = "okay";
+};
+
+&uart2 {
+	status = "okay";
+};
+
+&usb_host0_ehci {
+	status = "okay";
+};
+
+&usb_host0_ohci {
+	status = "okay";
+};
+
+&usb_host1_ehci {
+	status = "okay";
+};
+
+&usb_host1_ohci {
+	status = "okay";
+};
+
+&usbdrd3_0 {
+	status = "okay";
+};
+
+&usbdrd_dwc3_0 {
+	status = "okay";
+	dr_mode = "otg";
+};
+
+&usbdrd3_1 {
+	status = "okay";
+};
+
+&usbdrd_dwc3_1 {
+	status = "okay";
+	dr_mode = "host";
+};
+
+&vopb {
+	status = "okay";
+};
+
+&vopb_mmu {
+	status = "okay";
+};
+
+&vopl {
+	status = "okay";
+};
+
+&vopl_mmu {
+	status = "okay";
+};
@@ -30,4 +30,11 @@
 F:	configs/orangepi-rk3399_defconfig
 F:	arch/arm/dts/rk3399-u-boot.dtsi
 F:	arch/arm/dts/rk3399-orangepi-u-boot.dtsi
+
+ROCKPRO64
+M:	Akash Gajjar <akash@openedev.com>
+M:	Jagan Teki <jagan@amarulasolutions.com>
+S:	Maintained
+F:	configs/rockpro64-rk3399_defconfig
+F:	arch/arm/dts/rk3399-rockpro64-u-boot.dtsi
+CONFIG_ARM=y
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SYS_TEXT_BASE=0x00200000
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SYS_MALLOC_F_LEN=0x4000
+CONFIG_ROCKCHIP_RK3399=y
+CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x50000
+CONFIG_DEBUG_UART_BASE=0xFF1A0000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_SPL_STACK_R_ADDR=0x80000
+CONFIG_DEBUG_UART=y
+CONFIG_NR_DRAM_BANKS=1
+CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-rockpro64.dtb"
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_DISPLAY_BOARDINFO_LATE=y
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000
+CONFIG_CMD_BOOTZ=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_USB=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_TIME=y
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_DEFAULT_DEVICE_TREE="rk3399-rockpro64"
+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_TPL=y
+CONFIG_ENV_IS_IN_MMC=y
+CONFIG_ROCKCHIP_GPIO=y
+CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_ROCKCHIP=y
+CONFIG_DM_ETH=y
+CONFIG_ETH_DESIGNWARE=y
+CONFIG_GMAC_ROCKCHIP=y
+CONFIG_PMIC_RK8XX=y
+CONFIG_REGULATOR_PWM=y
+CONFIG_REGULATOR_RK8XX=y
+CONFIG_PWM_ROCKCHIP=y
+CONFIG_BAUDRATE=1500000
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYSRESET=y
+CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_HOST_ETHER=y
+CONFIG_USB_ETHER_ASIX=y
+CONFIG_USB_ETHER_ASIX88179=y
+CONFIG_USB_ETHER_MCS7830=y
+CONFIG_USB_ETHER_RTL8152=y
+CONFIG_USB_ETHER_SMSC95XX=y
+CONFIG_USE_TINY_PRINTF=y
+CONFIG_SPL_TINY_MEMSET=y
+CONFIG_ERRNO_STR=y
...	...	@@ -114,6 +114,7 @@
114	114	rk3399-puma-ddr1600.dtb \
115	115	rk3399-puma-ddr1866.dtb \
116	116	rk3399-rock960.dtb \
	117	+ rk3399-rockpro64.dtb
117	118
118	119	dtb-$(CONFIG_ROCKCHIP_RV1108) += \
119	120	rv1108-elgin-r1.dtb \
	1	+// SPDX-License-Identifier: GPL-2.0+
	2	+/*
	3	+ * Copyright (C) 2019 Jagan Teki <jagan@amarulasolutions.com>
	4	+ */
	5	+
	6	+#include "rk3399-u-boot.dtsi"
	1	+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
	2	+/*
	3	+ * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd.
	4	+ * Copyright (c) 2018 Akash Gajjar <Akash_Gajjar@mentor.com>
	5	+ */
	6	+
	7	+/dts-v1/;
	8	+#include <dt-bindings/input/linux-event-codes.h>
	9	+#include <dt-bindings/pwm/pwm.h>
	10	+#include "rk3399.dtsi"
	11	+#include "rk3399-opp.dtsi"
	12	+
	13	+/ {
	14	+ model = "Pine64 RockPro64";
	15	+ compatible = "pine64,rockpro64", "rockchip,rk3399";
	16	+
	17	+ chosen {
	18	+ stdout-path = "serial2:1500000n8";
	19	+ };
	20	+
	21	+ clkin_gmac: external-gmac-clock {
	22	+ compatible = "fixed-clock";
	23	+ clock-frequency = <125000000>;
	24	+ clock-output-names = "clkin_gmac";
	25	+ #clock-cells = <0>;
	26	+ };
	27	+
	28	+ gpio-keys {
	29	+ compatible = "gpio-keys";
	30	+ autorepeat;
	31	+ pinctrl-names = "default";
	32	+ pinctrl-0 = <&pwrbtn>;
	33	+
	34	+ power {
	35	+ debounce-interval = <100>;
	36	+ gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>;
	37	+ label = "GPIO Key Power";
	38	+ linux,code = <KEY_POWER>;
	39	+ wakeup-source;
	40	+ };
	41	+ };
	42	+
	43	+ leds {
	44	+ compatible = "gpio-leds";
	45	+ pinctrl-names = "default";
	46	+ pinctrl-0 = <&work_led_gpio>, <&diy_led_gpio>;
	47	+
	48	+ work-led {
	49	+ label = "work";
	50	+ default-state = "on";
	51	+ gpios = <&gpio0 RK_PB3 GPIO_ACTIVE_HIGH>;
	52	+ };
	53	+
	54	+ diy-led {
	55	+ label = "diy";
	56	+ default-state = "off";
	57	+ gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_HIGH>;
	58	+ };
	59	+ };
	60	+
	61	+ sdio_pwrseq: sdio-pwrseq {
	62	+ compatible = "mmc-pwrseq-simple";
	63	+ clocks = <&rk808 1>;
	64	+ clock-names = "ext_clock";
	65	+ pinctrl-names = "default";
	66	+ pinctrl-0 = <&wifi_enable_h>;
	67	+
	68	+ /*
	69	+ * On the module itself this is one of these (depending
	70	+ * on the actual card populated):
	71	+ * - SDIO_RESET_L_WL_REG_ON
	72	+ * - PDN (power down when low)
	73	+ */
	74	+ reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>;
	75	+ };
	76	+
	77	+ vcc12v_dcin: vcc12v-dcin {
	78	+ compatible = "regulator-fixed";
	79	+ regulator-name = "vcc12v_dcin";
	80	+ regulator-always-on;
	81	+ regulator-boot-on;
	82	+ regulator-min-microvolt = <12000000>;
	83	+ regulator-max-microvolt = <12000000>;
	84	+ };
	85	+
	86	+ /* switched by pmic_sleep */
	87	+ vcc1v8_s3: vcca1v8_s3: vcc1v8-s3 {
	88	+ compatible = "regulator-fixed";
	89	+ regulator-name = "vcc1v8_s3";
	90	+ regulator-always-on;
	91	+ regulator-boot-on;
	92	+ regulator-min-microvolt = <1800000>;
	93	+ regulator-max-microvolt = <1800000>;
	94	+ vin-supply = <&vcc_1v8>;
	95	+ };
	96	+
	97	+ vcc3v3_pcie: vcc3v3-pcie-regulator {
	98	+ compatible = "regulator-fixed";
	99	+ enable-active-high;
	100	+ gpio = <&gpio1 RK_PD0 GPIO_ACTIVE_HIGH>;
	101	+ pinctrl-names = "default";
	102	+ pinctrl-0 = <&pcie_pwr_en>;
	103	+ regulator-name = "vcc3v3_pcie";
	104	+ regulator-always-on;
	105	+ regulator-boot-on;
	106	+ vin-supply = <&vcc12v_dcin>;
	107	+ };
	108	+
	109	+ vcc3v3_sys: vcc3v3-sys {
	110	+ compatible = "regulator-fixed";
	111	+ regulator-name = "vcc3v3_sys";
	112	+ regulator-always-on;
	113	+ regulator-boot-on;
	114	+ regulator-min-microvolt = <3300000>;
	115	+ regulator-max-microvolt = <3300000>;
	116	+ vin-supply = <&vcc5v0_sys>;
	117	+ };
	118	+
	119	+ /* Actually 3 regulators (host0, 1, 2) controlled by the same gpio */
	120	+ vcc5v0_host: vcc5v0-host-regulator {
	121	+ compatible = "regulator-fixed";
	122	+ enable-active-high;
	123	+ gpio = <&gpio4 RK_PD2 GPIO_ACTIVE_HIGH>;
	124	+ pinctrl-names = "default";
	125	+ pinctrl-0 = <&vcc5v0_host_en>;
	126	+ regulator-name = "vcc5v0_host";
	127	+ regulator-always-on;
	128	+ vin-supply = <&vcc5v0_usb>;
	129	+ };
	130	+
	131	+ vcc5v0_typec: vcc5v0-typec-regulator {
	132	+ compatible = "regulator-fixed";
	133	+ enable-active-high;
	134	+ gpio = <&gpio1 RK_PA3 GPIO_ACTIVE_HIGH>;
	135	+ pinctrl-names = "default";
	136	+ pinctrl-0 = <&vcc5v0_typec_en>;
	137	+ regulator-name = "vcc5v0_typec";
	138	+ regulator-always-on;
	139	+ vin-supply = <&vcc5v0_usb>;
	140	+ };
	141	+
	142	+ vcc5v0_sys: vcc5v0-sys {
	143	+ compatible = "regulator-fixed";
	144	+ regulator-name = "vcc5v0_sys";
	145	+ regulator-always-on;
	146	+ regulator-boot-on;
	147	+ regulator-min-microvolt = <5000000>;
	148	+ regulator-max-microvolt = <5000000>;
	149	+ vin-supply = <&vcc12v_dcin>;
	150	+ };
	151	+
	152	+ vcc5v0_usb: vcc5v0-usb {
	153	+ compatible = "regulator-fixed";
	154	+ regulator-name = "vcc5v0_usb";
	155	+ regulator-always-on;
	156	+ regulator-boot-on;
	157	+ regulator-min-microvolt = <5000000>;
	158	+ regulator-max-microvolt = <5000000>;
	159	+ vin-supply = <&vcc12v_dcin>;
	160	+ };
	161	+
	162	+ vdd_log: vdd-log {
	163	+ compatible = "pwm-regulator";
	164	+ pwms = <&pwm2 0 25000 1>;
	165	+ regulator-name = "vdd_log";
	166	+ regulator-always-on;
	167	+ regulator-boot-on;
	168	+ regulator-min-microvolt = <800000>;
	169	+ regulator-max-microvolt = <1400000>;
	170	+ vin-supply = <&vcc5v0_sys>;
	171	+ };
	172	+};
	173	+
	174	+&cpu_l0 {
	175	+ cpu-supply = <&vdd_cpu_l>;
	176	+};
	177	+
	178	+&cpu_l1 {
	179	+ cpu-supply = <&vdd_cpu_l>;
	180	+};
	181	+
	182	+&cpu_l2 {
	183	+ cpu-supply = <&vdd_cpu_l>;
	184	+};
	185	+
	186	+&cpu_l3 {
	187	+ cpu-supply = <&vdd_cpu_l>;
	188	+};
	189	+
	190	+&cpu_b0 {
	191	+ cpu-supply = <&vdd_cpu_b>;
	192	+};
	193	+
	194	+&cpu_b1 {
	195	+ cpu-supply = <&vdd_cpu_b>;
	196	+};
	197	+
	198	+&emmc_phy {
	199	+ status = "okay";
	200	+};
	201	+
	202	+&gmac {
	203	+ assigned-clocks = <&cru SCLK_RMII_SRC>;
	204	+ assigned-clock-parents = <&clkin_gmac>;
	205	+ clock_in_out = "input";
	206	+ phy-supply = <&vcc_lan>;
	207	+ phy-mode = "rgmii";
	208	+ pinctrl-names = "default";
	209	+ pinctrl-0 = <&rgmii_pins>;
	210	+ snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
	211	+ snps,reset-active-low;
	212	+ snps,reset-delays-us = <0 10000 50000>;
	213	+ tx_delay = <0x28>;
	214	+ rx_delay = <0x11>;
	215	+ status = "okay";
	216	+};
	217	+
	218	+&hdmi {
	219	+ ddc-i2c-bus = <&i2c3>;
	220	+ pinctrl-names = "default";
	221	+ pinctrl-0 = <&hdmi_cec>;
	222	+ status = "okay";
	223	+};
	224	+
	225	+&gpu {
	226	+ mali-supply = <&vdd_gpu>;
	227	+ status = "okay";
	228	+};
	229	+
	230	+&i2c0 {
	231	+ clock-frequency = <400000>;
	232	+ i2c-scl-rising-time-ns = <168>;
	233	+ i2c-scl-falling-time-ns = <4>;
	234	+ status = "okay";
	235	+
	236	+ rk808: pmic@1b {
	237	+ compatible = "rockchip,rk808";
	238	+ reg = <0x1b>;
	239	+ interrupt-parent = <&gpio1>;
	240	+ interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
	241	+ #clock-cells = <1>;
	242	+ clock-output-names = "xin32k", "rk808-clkout2";
	243	+ pinctrl-names = "default";
	244	+ pinctrl-0 = <&pmic_int_l>;
	245	+ rockchip,system-power-controller;
	246	+ wakeup-source;
	247	+
	248	+ vcc1-supply = <&vcc5v0_sys>;
	249	+ vcc2-supply = <&vcc5v0_sys>;
	250	+ vcc3-supply = <&vcc5v0_sys>;
	251	+ vcc4-supply = <&vcc5v0_sys>;
	252	+ vcc6-supply = <&vcc5v0_sys>;
	253	+ vcc7-supply = <&vcc5v0_sys>;
	254	+ vcc8-supply = <&vcc3v3_sys>;
	255	+ vcc9-supply = <&vcc5v0_sys>;
	256	+ vcc10-supply = <&vcc5v0_sys>;
	257	+ vcc11-supply = <&vcc5v0_sys>;
	258	+ vcc12-supply = <&vcc3v3_sys>;
	259	+ vddio-supply = <&vcca_1v8>;
	260	+
	261	+ regulators {
	262	+ vdd_center: DCDC_REG1 {
	263	+ regulator-name = "vdd_center";
	264	+ regulator-always-on;
	265	+ regulator-boot-on;
	266	+ regulator-min-microvolt = <750000>;
	267	+ regulator-max-microvolt = <1350000>;
	268	+ regulator-ramp-delay = <6001>;
	269	+ regulator-state-mem {
	270	+ regulator-off-in-suspend;
	271	+ };
	272	+ };
	273	+
	274	+ vdd_cpu_l: DCDC_REG2 {
	275	+ regulator-name = "vdd_cpu_l";
	276	+ regulator-always-on;
	277	+ regulator-boot-on;
	278	+ regulator-min-microvolt = <750000>;
	279	+ regulator-max-microvolt = <1350000>;
	280	+ regulator-ramp-delay = <6001>;
	281	+ regulator-state-mem {
	282	+ regulator-off-in-suspend;
	283	+ };
	284	+ };
	285	+
	286	+ vcc_ddr: DCDC_REG3 {
	287	+ regulator-name = "vcc_ddr";
	288	+ regulator-always-on;
	289	+ regulator-boot-on;
	290	+ regulator-state-mem {
	291	+ regulator-on-in-suspend;
	292	+ };
	293	+ };
	294	+
	295	+ vcc_1v8: DCDC_REG4 {
	296	+ regulator-name = "vcc_1v8";
	297	+ regulator-always-on;
	298	+ regulator-boot-on;
	299	+ regulator-min-microvolt = <1800000>;
	300	+ regulator-max-microvolt = <1800000>;
	301	+ regulator-state-mem {
	302	+ regulator-on-in-suspend;
	303	+ regulator-suspend-microvolt = <1800000>;
	304	+ };
	305	+ };
	306	+
	307	+ vcc1v8_dvp: LDO_REG1 {
	308	+ regulator-name = "vcc1v8_dvp";
	309	+ regulator-always-on;
	310	+ regulator-boot-on;
	311	+ regulator-min-microvolt = <1800000>;
	312	+ regulator-max-microvolt = <1800000>;
	313	+ regulator-state-mem {
	314	+ regulator-off-in-suspend;
	315	+ };
	316	+ };
	317	+
	318	+ vcc3v0_touch: LDO_REG2 {
	319	+ regulator-name = "vcc3v0_touch";
	320	+ regulator-always-on;
	321	+ regulator-boot-on;
	322	+ regulator-min-microvolt = <3000000>;
	323	+ regulator-max-microvolt = <3000000>;
	324	+ regulator-state-mem {
	325	+ regulator-off-in-suspend;
	326	+ };
	327	+ };
	328	+
	329	+ vcca_1v8: LDO_REG3 {
	330	+ regulator-name = "vcca_1v8";
	331	+ regulator-always-on;
	332	+ regulator-boot-on;
	333	+ regulator-min-microvolt = <1800000>;
	334	+ regulator-max-microvolt = <1800000>;
	335	+ regulator-state-mem {
	336	+ regulator-on-in-suspend;
	337	+ regulator-suspend-microvolt = <1800000>;
	338	+ };
	339	+ };
	340	+
	341	+ vcc_sdio: LDO_REG4 {
	342	+ regulator-name = "vcc_sdio";
	343	+ regulator-always-on;
	344	+ regulator-boot-on;
	345	+ regulator-min-microvolt = <1800000>;
	346	+ regulator-max-microvolt = <3000000>;
	347	+ regulator-state-mem {
	348	+ regulator-on-in-suspend;
	349	+ regulator-suspend-microvolt = <3000000>;
	350	+ };
	351	+ };
	352	+
	353	+ vcca3v0_codec: LDO_REG5 {
	354	+ regulator-name = "vcca3v0_codec";
	355	+ regulator-always-on;
	356	+ regulator-boot-on;
	357	+ regulator-min-microvolt = <3000000>;
	358	+ regulator-max-microvolt = <3000000>;
	359	+ regulator-state-mem {
	360	+ regulator-off-in-suspend;
	361	+ };
	362	+ };
	363	+
	364	+ vcc_1v5: LDO_REG6 {
	365	+ regulator-name = "vcc_1v5";
	366	+ regulator-always-on;
	367	+ regulator-boot-on;
	368	+ regulator-min-microvolt = <1500000>;
	369	+ regulator-max-microvolt = <1500000>;
	370	+ regulator-state-mem {
	371	+ regulator-on-in-suspend;
	372	+ regulator-suspend-microvolt = <1500000>;
	373	+ };
	374	+ };
	375	+
	376	+ vcca1v8_codec: LDO_REG7 {
	377	+ regulator-name = "vcca1v8_codec";
	378	+ regulator-always-on;
	379	+ regulator-boot-on;
	380	+ regulator-min-microvolt = <1800000>;
	381	+ regulator-max-microvolt = <1800000>;
	382	+ regulator-state-mem {
	383	+ regulator-off-in-suspend;
	384	+ };
	385	+ };
	386	+
	387	+ vcc_3v0: LDO_REG8 {
	388	+ regulator-name = "vcc_3v0";
	389	+ regulator-always-on;
	390	+ regulator-boot-on;
	391	+ regulator-min-microvolt = <3000000>;
	392	+ regulator-max-microvolt = <3000000>;
	393	+ regulator-state-mem {
	394	+ regulator-on-in-suspend;
	395	+ regulator-suspend-microvolt = <3000000>;
	396	+ };
	397	+ };
	398	+
	399	+ vcc3v3_s3: vcc_lan: SWITCH_REG1 {
	400	+ regulator-name = "vcc3v3_s3";
	401	+ regulator-always-on;
	402	+ regulator-boot-on;
	403	+ regulator-state-mem {
	404	+ regulator-off-in-suspend;
	405	+ };
	406	+ };
	407	+
	408	+ vcc3v3_s0: SWITCH_REG2 {
	409	+ regulator-name = "vcc3v3_s0";
	410	+ regulator-always-on;
	411	+ regulator-boot-on;
	412	+ regulator-state-mem {
	413	+ regulator-off-in-suspend;
	414	+ };
	415	+ };
	416	+ };
	417	+ };
	418	+
	419	+ vdd_cpu_b: regulator@40 {
	420	+ compatible = "silergy,syr827";
	421	+ reg = <0x40>;
	422	+ fcs,suspend-voltage-selector = <1>;
	423	+ pinctrl-names = "default";
	424	+ pinctrl-0 = <&vsel1_gpio>;
	425	+ regulator-name = "vdd_cpu_b";
	426	+ regulator-min-microvolt = <712500>;
	427	+ regulator-max-microvolt = <1500000>;
	428	+ regulator-ramp-delay = <1000>;
	429	+ regulator-always-on;
	430	+ regulator-boot-on;
	431	+ vin-supply = <&vcc5v0_sys>;
	432	+
	433	+ regulator-state-mem {
	434	+ regulator-off-in-suspend;
	435	+ };
	436	+ };
	437	+
	438	+ vdd_gpu: regulator@41 {
	439	+ compatible = "silergy,syr828";
	440	+ reg = <0x41>;
	441	+ fcs,suspend-voltage-selector = <1>;
	442	+ pinctrl-names = "default";
	443	+ pinctrl-0 = <&vsel2_gpio>;
	444	+ regulator-name = "vdd_gpu";
	445	+ regulator-min-microvolt = <712500>;
	446	+ regulator-max-microvolt = <1500000>;
	447	+ regulator-ramp-delay = <1000>;
	448	+ regulator-always-on;
	449	+ regulator-boot-on;
	450	+ vin-supply = <&vcc5v0_sys>;
	451	+
	452	+ regulator-state-mem {
	453	+ regulator-off-in-suspend;
	454	+ };
	455	+ };
	456	+};
	457	+
	458	+&i2c1 {
	459	+ i2c-scl-rising-time-ns = <300>;
	460	+ i2c-scl-falling-time-ns = <15>;
	461	+ status = "okay";
	462	+};
	463	+
	464	+&i2c3 {
	465	+ i2c-scl-rising-time-ns = <450>;
	466	+ i2c-scl-falling-time-ns = <15>;
	467	+ status = "okay";
	468	+};
	469	+
	470	+&i2c4 {
	471	+ i2c-scl-rising-time-ns = <600>;
	472	+ i2c-scl-falling-time-ns = <20>;
	473	+ status = "okay";
	474	+
	475	+ fusb0: typec-portc@22 {
	476	+ compatible = "fcs,fusb302";
	477	+ reg = <0x22>;
	478	+ interrupt-parent = <&gpio1>;
	479	+ interrupts = <RK_PA2 IRQ_TYPE_LEVEL_LOW>;
	480	+ pinctrl-names = "default";
	481	+ pinctrl-0 = <&fusb0_int>;
	482	+ vbus-supply = <&vcc5v0_typec>;
	483	+ status = "okay";
	484	+ };
	485	+};
	486	+
	487	+&i2s0 {
	488	+ rockchip,playback-channels = <8>;
	489	+ rockchip,capture-channels = <8>;
	490	+ status = "okay";
	491	+};
	492	+
	493	+&i2s1 {
	494	+ rockchip,playback-channels = <2>;
	495	+ rockchip,capture-channels = <2>;
	496	+ status = "okay";
	497	+};
	498	+
	499	+&i2s2 {
	500	+ status = "okay";
	501	+};
	502	+
	503	+&io_domains {
	504	+ status = "okay";
	505	+
	506	+ bt656-supply = <&vcc1v8_dvp>;
	507	+ audio-supply = <&vcca1v8_codec>;
	508	+ sdmmc-supply = <&vcc_sdio>;
	509	+ gpio1830-supply = <&vcc_3v0>;
	510	+};
	511	+
	512	+&pmu_io_domains {
	513	+ pmu1830-supply = <&vcc_3v0>;
	514	+ status = "okay";
	515	+};
	516	+
	517	+&pinctrl {
	518	+ buttons {
	519	+ pwrbtn: pwrbtn {
	520	+ rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>;
	521	+ };
	522	+ };
	523	+
	524	+ fusb302x {
	525	+ fusb0_int: fusb0-int {
	526	+ rockchip,pins = <1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>;
	527	+ };
	528	+ };
	529	+
	530	+ leds {
	531	+ work_led_gpio: work_led-gpio {
	532	+ rockchip,pins = <0 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
	533	+ };
	534	+
	535	+ diy_led_gpio: diy_led-gpio {
	536	+ rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
	537	+ };
	538	+ };
	539	+
	540	+ pcie {
	541	+ pcie_pwr_en: pcie-pwr-en {
	542	+ rockchip,pins = <1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>;
	543	+ };
	544	+ };
	545	+
	546	+ pmic {
	547	+ pmic_int_l: pmic-int-l {
	548	+ rockchip,pins = <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>;
	549	+ };
	550	+
	551	+ vsel1_gpio: vsel1-gpio {
	552	+ rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>;
	553	+ };
	554	+
	555	+ vsel2_gpio: vsel2-gpio {
	556	+ rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>;
	557	+ };
	558	+ };
	559	+
	560	+ sdio-pwrseq {
	561	+ wifi_enable_h: wifi-enable-h {
	562	+ rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
	563	+ };
	564	+ };
	565	+
	566	+ usb-typec {
	567	+ vcc5v0_typec_en: vcc5v0_typec_en {
	568	+ rockchip,pins = <1 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
	569	+ };
	570	+ };
	571	+
	572	+ usb2 {
	573	+ vcc5v0_host_en: vcc5v0-host-en {
	574	+ rockchip,pins = <4 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
	575	+ };
	576	+ };
	577	+};
	578	+
	579	+&pwm0 {
	580	+ status = "okay";
	581	+};
	582	+
	583	+&pwm2 {
	584	+ status = "okay";
	585	+};
	586	+
	587	+&saradc {
	588	+ vref-supply = <&vcca1v8_s3>;
	589	+ status = "okay";
	590	+};
	591	+
	592	+&sdmmc {
	593	+ bus-width = <4>;
	594	+ cap-mmc-highspeed;
	595	+ cap-sd-highspeed;
	596	+ cd-gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
	597	+ disable-wp;
	598	+ max-frequency = <150000000>;
	599	+ pinctrl-names = "default";
	600	+ pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_bus4>;
	601	+ status = "okay";
	602	+};
	603	+
	604	+&sdhci {
	605	+ bus-width = <8>;
	606	+ mmc-hs400-1_8v;
	607	+ mmc-hs400-enhanced-strobe;
	608	+ non-removable;
	609	+ status = "okay";
	610	+};
	611	+
	612	+&tcphy0 {
	613	+ status = "okay";
	614	+};
	615	+
	616	+&tcphy1 {
	617	+ status = "okay";
	618	+};
	619	+
	620	+&tsadc {
	621	+ /* tshut mode 0:CRU 1:GPIO */
	622	+ rockchip,hw-tshut-mode = <1>;
	623	+ /* tshut polarity 0:LOW 1:HIGH */
	624	+ rockchip,hw-tshut-polarity = <1>;
	625	+ status = "okay";
	626	+};
	627	+
	628	+&u2phy0 {
	629	+ status = "okay";
	630	+
	631	+ u2phy0_otg: otg-port {
	632	+ status = "okay";
	633	+ };
	634	+
	635	+ u2phy0_host: host-port {
	636	+ phy-supply = <&vcc5v0_host>;
	637	+ status = "okay";
	638	+ };
	639	+};
	640	+
	641	+&u2phy1 {
	642	+ status = "okay";
	643	+
	644	+ u2phy1_otg: otg-port {
	645	+ status = "okay";
	646	+ };
	647	+
	648	+ u2phy1_host: host-port {
	649	+ phy-supply = <&vcc5v0_host>;
	650	+ status = "okay";
	651	+ };
	652	+};
	653	+
	654	+&uart0 {
	655	+ pinctrl-names = "default";
	656	+ pinctrl-0 = <&uart0_xfer &uart0_cts>;
	657	+ status = "okay";
	658	+};
	659	+
	660	+&uart2 {
	661	+ status = "okay";
	662	+};
	663	+
	664	+&usb_host0_ehci {
	665	+ status = "okay";
	666	+};
	667	+
	668	+&usb_host0_ohci {
	669	+ status = "okay";
	670	+};
	671	+
	672	+&usb_host1_ehci {
	673	+ status = "okay";
	674	+};
	675	+
	676	+&usb_host1_ohci {
	677	+ status = "okay";
	678	+};
	679	+
	680	+&usbdrd3_0 {
	681	+ status = "okay";
	682	+};
	683	+
	684	+&usbdrd_dwc3_0 {
	685	+ status = "okay";
	686	+ dr_mode = "otg";
	687	+};
	688	+
	689	+&usbdrd3_1 {
	690	+ status = "okay";
	691	+};
	692	+
	693	+&usbdrd_dwc3_1 {
	694	+ status = "okay";
	695	+ dr_mode = "host";
	696	+};
	697	+
	698	+&vopb {
	699	+ status = "okay";
	700	+};
	701	+
	702	+&vopb_mmu {
	703	+ status = "okay";
	704	+};
	705	+
	706	+&vopl {
	707	+ status = "okay";
	708	+};
	709	+
	710	+&vopl_mmu {
	711	+ status = "okay";
	712	+};
...	...	@@ -30,4 +30,11 @@
30	30	F: configs/orangepi-rk3399_defconfig
31	31	F: arch/arm/dts/rk3399-u-boot.dtsi
32	32	F: arch/arm/dts/rk3399-orangepi-u-boot.dtsi
	33	+
	34	+ROCKPRO64
	35	+M: Akash Gajjar <akash@openedev.com>
	36	+M: Jagan Teki <jagan@amarulasolutions.com>
	37	+S: Maintained
	38	+F: configs/rockpro64-rk3399_defconfig
	39	+F: arch/arm/dts/rk3399-rockpro64-u-boot.dtsi
	1	+CONFIG_ARM=y
	2	+CONFIG_ARCH_ROCKCHIP=y
	3	+CONFIG_SYS_TEXT_BASE=0x00200000
	4	+CONFIG_SPL_LIBCOMMON_SUPPORT=y
	5	+CONFIG_SPL_LIBGENERIC_SUPPORT=y
	6	+CONFIG_SYS_MALLOC_F_LEN=0x4000
	7	+CONFIG_ROCKCHIP_RK3399=y
	8	+CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x50000
	9	+CONFIG_DEBUG_UART_BASE=0xFF1A0000
	10	+CONFIG_DEBUG_UART_CLOCK=24000000
	11	+CONFIG_SPL_STACK_R_ADDR=0x80000
	12	+CONFIG_DEBUG_UART=y
	13	+CONFIG_NR_DRAM_BANKS=1
	14	+CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-rockpro64.dtb"
	15	+# CONFIG_DISPLAY_CPUINFO is not set
	16	+CONFIG_DISPLAY_BOARDINFO_LATE=y
	17	+CONFIG_SPL_STACK_R=y
	18	+CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000
	19	+CONFIG_CMD_BOOTZ=y
	20	+CONFIG_CMD_GPT=y
	21	+CONFIG_CMD_MMC=y
	22	+CONFIG_CMD_SF=y
	23	+CONFIG_CMD_USB=y
	24	+# CONFIG_CMD_SETEXPR is not set
	25	+CONFIG_CMD_TIME=y
	26	+CONFIG_SPL_OF_CONTROL=y
	27	+CONFIG_DEFAULT_DEVICE_TREE="rk3399-rockpro64"
	28	+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
	29	+CONFIG_TPL=y
	30	+CONFIG_ENV_IS_IN_MMC=y
	31	+CONFIG_ROCKCHIP_GPIO=y
	32	+CONFIG_SYS_I2C_ROCKCHIP=y
	33	+CONFIG_MMC_DW=y
	34	+CONFIG_MMC_DW_ROCKCHIP=y
	35	+CONFIG_MMC_SDHCI=y
	36	+CONFIG_MMC_SDHCI_ROCKCHIP=y
	37	+CONFIG_DM_ETH=y
	38	+CONFIG_ETH_DESIGNWARE=y
	39	+CONFIG_GMAC_ROCKCHIP=y
	40	+CONFIG_PMIC_RK8XX=y
	41	+CONFIG_REGULATOR_PWM=y
	42	+CONFIG_REGULATOR_RK8XX=y
	43	+CONFIG_PWM_ROCKCHIP=y
	44	+CONFIG_BAUDRATE=1500000
	45	+CONFIG_DEBUG_UART_SHIFT=2
	46	+CONFIG_SYSRESET=y
	47	+CONFIG_USB=y
	48	+CONFIG_USB_XHCI_HCD=y
	49	+CONFIG_USB_XHCI_DWC3=y
	50	+CONFIG_USB_EHCI_HCD=y
	51	+CONFIG_USB_EHCI_GENERIC=y
	52	+CONFIG_USB_HOST_ETHER=y
	53	+CONFIG_USB_ETHER_ASIX=y
	54	+CONFIG_USB_ETHER_ASIX88179=y
	55	+CONFIG_USB_ETHER_MCS7830=y
	56	+CONFIG_USB_ETHER_RTL8152=y
	57	+CONFIG_USB_ETHER_SMSC95XX=y
	58	+CONFIG_USE_TINY_PRINTF=y
	59	+CONFIG_SPL_TINY_MEMSET=y
	60	+CONFIG_ERRNO_STR=y