Eric Lee / smarc-uboot

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Commit 007056f495c9fc5c544f71762f874a19a9b004a3

Authored by Atish Patra
Committed by Andes
1 parent ee0633ef8b
Exists in smarc_8mq_lf_v2020.04 and in 11 other branches 8qm-imx_v2020.04_5.4.70_2.3.0, emb_lf_v2022.04, pitx_8mp_lf_v2020.04, smarc-8m-android-10.0.0_2.6.0, smarc-8m-android-11.0.0_2.0.0, smarc-8mp-android-11.0.0_2.0.0, smarc_8m-imx_v2019.04_4.19.35_1.1.0, smarc_8mm-imx_v2019.04_4.19.35_1.1.0, smarc_8mm-imx_v2020.04_5.4.24_2.1.0, smarc_8mp_lf_v2020.04, smarc_8mq-imx_v2020.04_5.4.24_2.1.0

cpu: Bind timer driver for boot hart 

Currently, timer driver is bound only for hart0.

There is no mandatory requirement that hart0 should always
come up. In fact, HiFive Unleashed SoC hart0 doesn't boot
in S-mode because it only has M-mode.

The timer driver should be bound for boot hart.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Alexander Graf <agraf@suse.de>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

Showing 1 changed file with 4 additions and 3 deletions Side-by-side Diff

drivers/cpu/riscv_cpu.c
Diff comments   View file @ 007056f
... ... @@ -10,6 +10,8 @@
10 10 #include <dm/device-internal.h>
11 11 #include <dm/lists.h>
12 12  
  13 +DECLARE_GLOBAL_DATA_PTR;
  14 +
13 15 static int riscv_cpu_get_desc(struct udevice *dev, char *buf, int size)
14 16 {
15 17 const char *isa;
... ... @@ -62,7 +64,6 @@
62 64  
63 65 /* save the hart id */
64 66 plat->cpu_id = dev_read_addr(dev);
65   -
66 67 /* first examine the property in current cpu node */
67 68 ret = dev_read_u32(dev, "timebase-frequency", &plat->timebase_freq);
68 69 /* if not found, then look at the parent /cpus node */
... ... @@ -71,7 +72,7 @@
71 72 &plat->timebase_freq);
72 73  
73 74 /*
74   - * Bind riscv-timer driver on hart 0
  75 + * Bind riscv-timer driver on boot hart.
75 76 *
76 77 * We only instantiate one timer device which is enough for U-Boot.
77 78 * Pass the "timebase-frequency" value as the driver data for the
... ... @@ -80,7 +81,7 @@
80 81 * Return value is not checked since it's possible that the timer
81 82 * driver is not included.
82 83 */
83   - if (!plat->cpu_id && plat->timebase_freq) {
  84 + if (plat->cpu_id == gd->arch.boot_hart && plat->timebase_freq) {
84 85 drv = lists_driver_lookup_name("riscv_timer");
85 86 if (!drv) {
86 87 debug("Cannot find the timer driver, not included?\n");