Commit 00bdd95278e189131f9b5858045c540bf0cce530

Authored by Simon Glass
1 parent 8b4d659f4b

x86: Add some documentation on how to port U-Boot on x86

Some information has been gleaned on tools and procedures for porting
U-Boot to different x86 platforms. Add a few notes to start things off.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

Showing 1 changed file with 64 additions and 0 deletions Side-by-side Diff

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164 164 mode to use. U-Boot sets up some reasonable values but you can
165 165 adjust then with this command.
166 166  
  167 +Development Flow
  168 +----------------
  169 +
  170 +These notes are for those who want to port U-Boot to a new x86 platform.
  171 +
  172 +Since x86 CPUs boot from SPI flash, a SPI flash emulator is a good investment.
  173 +The Dediprog em100 can be used on Linux. The em100 tool is available here:
  174 +
  175 + http://review.coreboot.org/p/em100.git
  176 +
  177 +On Minnowboard Max the following command line can be used:
  178 +
  179 + sudo em100 -s -p LOW -d u-boot.rom -c W25Q64DW -r
  180 +
  181 +A suitable clip for connecting over the SPI flash chip is here:
  182 +
  183 + http://www.dediprog.com/pd/programmer-accessories/EM-TC-8
  184 +
  185 +This allows you to override the SPI flash contents for development purposes.
  186 +Typically you can write to the em100 in around 1200ms, considerably faster
  187 +than programming the real flash device each time. The only important
  188 +limitation of the em100 is that it only supports SPI bus speeds up to 20MHz.
  189 +This means that images must be set to boot with that speed. This is an
  190 +Intel-specific feature - e.g. tools/ifttool has an option to set the SPI
  191 +speed in the SPI descriptor region.
  192 +
  193 +If your chip/board uses an Intel Firmware Support Package (FSP) it is fairly
  194 +easy to fit it in. You can follow the Minnowboard Max implementation, for
  195 +example. Hopefully you will just need to create new files similar to those
  196 +in arch/x86/cpu/baytrail which provide Bay Trail support.
  197 +
  198 +If you are not using an FSP you have more freedom and more responsibility.
  199 +The ivybridge support works this way, although it still uses a ROM for
  200 +graphics and still has binary blobs containing Intel code. You should aim to
  201 +support all important peripherals on your platform including video and storage.
  202 +Use the device tree for configuration where possible.
  203 +
  204 +For the microcode you can create a suitable device tree file using the
  205 +microcode tool:
  206 +
  207 + ./tools/microcode-tool -d microcode.dat create <model>
  208 +
  209 +or if you only have header files and not the full Intel microcode.dat database:
  210 +
  211 + ./tools/microcode-tool -H BAY_TRAIL_FSP_KIT/Microcode/M0130673322.h \
  212 + -H BAY_TRAIL_FSP_KIT/Microcode/M0130679901.h \
  213 + create all
  214 +
  215 +These are written to arch/x86/dts/microcode/ by default.
  216 +
  217 +Note that it is possible to just add the micrcode for your CPU if you know its
  218 +model. U-Boot prints this information when it starts
  219 +
  220 + CPU: x86_64, vendor Intel, device 30673h
  221 +
  222 +so here we can use the M0130673322 file.
  223 +
  224 +If you platform can display POST codes on two little 7-segment displays on
  225 +the board, then you can use post_code() calls from C or assembler to monitor
  226 +boot progress. This can be good for debugging.
  227 +
  228 +If not, you can try to get serial working as early as possible. The early
  229 +debug serial port may be useful here. See setup_early_uart() for an example.
  230 +
167 231 TODO List
168 232 ---------
169 233 - Audio