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Commit 00d10eb0410d2459727307d5eea562247959db2f

Authored by Macpaul Lin
Committed by Albert ARIBAUD
1 parent 5656b40bb3
Exists in master and in 54 other branches 8qm-imx_v2020.04_5.4.70_2.3.0, emb_lf_v2022.04, imx_v2015.04_4.1.15_1.0.0_ga, pitx_8mp_lf_v2020.04, smarc-8m-android-10.0.0_2.6.0, smarc-8m-android-11.0.0_2.0.0, smarc-8mp-android-11.0.0_2.0.0, smarc-emmc-imx_v2014.04_3.10.53_1.1.0_ga, smarc-emmc-imx_v2014.04_3.14.28_1.0.0_ga, smarc-imx-l5.0.0_1.0.0-ga, smarc-imx6_v2018.03_4.14.98_2.0.0_ga, smarc-imx7_v2017.03_4.9.11_1.0.0_ga, smarc-imx7_v2018.03_4.14.98_2.0.0_ga, smarc-imx_v2014.04_3.14.28_1.0.0_ga, smarc-imx_v2015.04_4.1.15_1.0.0_ga, smarc-imx_v2017.03_4.9.11_1.0.0_ga, smarc-imx_v2017.03_4.9.88_2.0.0_ga, smarc-imx_v2017.03_o8.1.0_1.3.0_8m, smarc-imx_v2018.03_4.14.78_1.0.0_ga, smarc-m6.0.1_2.1.0-ga, smarc-n7.1.2_2.0.0-ga, smarc-rel_imx_4.1.15_2.0.0_ga, smarc_8m-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8m-imx_v2019.04_4.19.35_1.1.0, smarc_8m_00d0-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2019.04_4.19.35_1.1.0, smarc_8mm-imx_v2020.04_5.4.24_2.1.0, smarc_8mp_lf_v2020.04, smarc_8mq-imx_v2020.04_5.4.24_2.1.0, smarc_8mq_lf_v2020.04, ti-u-boot-2015.07, u-boot-2013.01.y, v2013.10, v2013.10-smarct33, v2013.10-smartmen, v2014.01, v2014.04, v2014.04-smarct33, v2014.04-smarct33-emmc, v2014.04-smartmen, v2014.07, v2014.07-smarct33, v2014.07-smartmen, v2015.07-smarct33, v2015.07-smarct33-emmc, v2015.07-smarct4x, v2016.05-dlt, v2016.05-smarct3x, v2016.05-smarct3x-emmc, v2016.05-smarct4x, v2017.01-smarct3x, v2017.01-smarct3x-emmc, v2017.01-smarct4x

ftsmc020: move ftsmc020 static mem controller to driver/mtd 

Move the header file and definitions of ftsmc020
static memory control unit from a320 SoC folder to
"drivers/mtd" folder.

This change will let other SoC which also use ftsmc020
could share the same header file.

Signed-off-by: Macpaul Lin <macpaul@andestech.com>

Showing 8 changed files with 135 additions and 133 deletions Side-by-side Diff

arch/arm/cpu/arm920t/a320/Makefile
Diff comments   View file @ 00d10eb
... ... @@ -27,7 +27,6 @@
27 27  
28 28 SOBJS += reset.o
29 29 COBJS += timer.o
30   -COBJS += ftsmc020.o
31 30  
32 31 SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
33 32 OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
arch/arm/cpu/arm920t/a320/ftsmc020.c
View file @ 00d10eb
1   -/*
2   - * (C) Copyright 2009 Faraday Technology
3   - * Po-Yu Chuang <ratbert@faraday-tech.com>
4   - *
5   - * This program is free software; you can redistribute it and/or modify
6   - * it under the terms of the GNU General Public License as published by
7   - * the Free Software Foundation; either version 2 of the License, or
8   - * (at your option) any later version.
9   - *
10   - * This program is distributed in the hope that it will be useful,
11   - * but WITHOUT ANY WARRANTY; without even the implied warranty of
12   - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13   - * GNU General Public License for more details.
14   - *
15   - * You should have received a copy of the GNU General Public License
16   - * along with this program; if not, write to the Free Software
17   - * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
18   - */
19   -
20   -#include <config.h>
21   -#include <common.h>
22   -#include <asm/io.h>
23   -#include <asm/arch/ftsmc020.h>
24   -
25   -struct ftsmc020_config {
26   - unsigned int config;
27   - unsigned int timing;
28   -};
29   -
30   -static struct ftsmc020_config config[] = CONFIG_SYS_FTSMC020_CONFIGS;
31   -
32   -static struct ftsmc020 *smc = (struct ftsmc020 *)CONFIG_FTSMC020_BASE;
33   -
34   -static void ftsmc020_setup_bank(unsigned int bank, struct ftsmc020_config *cfg)
35   -{
36   - if (bank > 3) {
37   - printf("bank # %u invalid\n", bank);
38   - return;
39   - }
40   -
41   - writel(cfg->config, &smc->bank[bank].cr);
42   - writel(cfg->timing, &smc->bank[bank].tpr);
43   -}
44   -
45   -void ftsmc020_init(void)
46   -{
47   - int i;
48   -
49   - for (i = 0; i < ARRAY_SIZE(config); i++)
50   - ftsmc020_setup_bank(i, &config[i]);
51   -}
arch/arm/include/asm/arch-a320/ftsmc020.h
View file @ 00d10eb
1   -/*
2   - * (C) Copyright 2009 Faraday Technology
3   - * Po-Yu Chuang <ratbert@faraday-tech.com>
4   - *
5   - * This program is free software; you can redistribute it and/or modify
6   - * it under the terms of the GNU General Public License as published by
7   - * the Free Software Foundation; either version 2 of the License, or
8   - * (at your option) any later version.
9   - *
10   - * This program is distributed in the hope that it will be useful,
11   - * but WITHOUT ANY WARRANTY; without even the implied warranty of
12   - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13   - * GNU General Public License for more details.
14   - *
15   - * You should have received a copy of the GNU General Public License
16   - * along with this program; if not, write to the Free Software
17   - * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
18   - */
19   -
20   -/*
21   - * Static Memory Controller
22   - */
23   -#ifndef __FTSMC020_H
24   -#define __FTSMC020_H
25   -
26   -#ifndef __ASSEMBLY__
27   -
28   -struct ftsmc020 {
29   - struct {
30   - unsigned int cr; /* 0x00, 0x08, 0x10, 0x18 */
31   - unsigned int tpr; /* 0x04, 0x0c, 0x14, 0x1c */
32   - } bank[4];
33   - unsigned int pad[8]; /* 0x20 - 0x3c */
34   - unsigned int ssr; /* 0x40 */
35   -};
36   -
37   -void ftsmc020_init(void);
38   -
39   -#endif /* __ASSEMBLY__ */
40   -
41   -/*
42   - * Memory Bank Configuration Register
43   - */
44   -#define FTSMC020_BANK_ENABLE (1 << 28)
45   -#define FTSMC020_BANK_BASE(x) ((x) & 0x0fff1000)
46   -
47   -#define FTSMC020_BANK_WPROT (1 << 11)
48   -
49   -#define FTSMC020_BANK_SIZE_32K (0xb << 4)
50   -#define FTSMC020_BANK_SIZE_64K (0xc << 4)
51   -#define FTSMC020_BANK_SIZE_128K (0xd << 4)
52   -#define FTSMC020_BANK_SIZE_256K (0xe << 4)
53   -#define FTSMC020_BANK_SIZE_512K (0xf << 4)
54   -#define FTSMC020_BANK_SIZE_1M (0x0 << 4)
55   -#define FTSMC020_BANK_SIZE_2M (0x1 << 4)
56   -#define FTSMC020_BANK_SIZE_4M (0x2 << 4)
57   -#define FTSMC020_BANK_SIZE_8M (0x3 << 4)
58   -#define FTSMC020_BANK_SIZE_16M (0x4 << 4)
59   -#define FTSMC020_BANK_SIZE_32M (0x5 << 4)
60   -
61   -#define FTSMC020_BANK_MBW_8 (0x0 << 0)
62   -#define FTSMC020_BANK_MBW_16 (0x1 << 0)
63   -#define FTSMC020_BANK_MBW_32 (0x2 << 0)
64   -
65   -/*
66   - * Memory Bank Timing Parameter Register
67   - */
68   -#define FTSMC020_TPR_ETRNA(x) (((x) & 0xf) << 28)
69   -#define FTSMC020_TPR_EATI(x) (((x) & 0xf) << 24)
70   -#define FTSMC020_TPR_RBE (1 << 20)
71   -#define FTSMC020_TPR_AST(x) (((x) & 0x3) << 18)
72   -#define FTSMC020_TPR_CTW(x) (((x) & 0x3) << 16)
73   -#define FTSMC020_TPR_ATI(x) (((x) & 0xf) << 12)
74   -#define FTSMC020_TPR_AT2(x) (((x) & 0x3) << 8)
75   -#define FTSMC020_TPR_WTC(x) (((x) & 0x3) << 6)
76   -#define FTSMC020_TPR_AHT(x) (((x) & 0x3) << 4)
77   -#define FTSMC020_TPR_TRNA(x) (((x) & 0xf) << 0)
78   -
79   -#endif /* __FTSMC020_H */
board/faraday/a320evb/a320evb.c
Diff comments   View file @ 00d10eb
... ... @@ -21,7 +21,7 @@
21 21 #include <netdev.h>
22 22 #include <asm/io.h>
23 23  
24   -#include <asm/arch/ftsmc020.h>
  24 +#include <faraday/ftsmc020.h>
25 25  
26 26 DECLARE_GLOBAL_DATA_PTR;
27 27  
drivers/mtd/Makefile
Diff comments   View file @ 00d10eb
... ... @@ -32,6 +32,7 @@
32 32 COBJS-$(CONFIG_FLASH_CFI_DRIVER) += cfi_flash.o
33 33 COBJS-$(CONFIG_FLASH_CFI_MTD) += cfi_mtd.o
34 34 COBJS-$(CONFIG_HAS_DATAFLASH) += dataflash.o
  35 +COBJS-$(CONFIG_FTSMC020) += ftsmc020.o
35 36 COBJS-$(CONFIG_FLASH_CFI_LEGACY) += jedec_flash.o
36 37 COBJS-$(CONFIG_MW_EEPROM) += mw_eeprom.o
37 38 COBJS-$(CONFIG_SPEARSMI) += spr_smi.o
drivers/mtd/ftsmc020.c
Diff comments   View file @ 00d10eb
  1 +/*
  2 + * (C) Copyright 2009 Faraday Technology
  3 + * Po-Yu Chuang <ratbert@faraday-tech.com>
  4 + *
  5 + * This program is free software; you can redistribute it and/or modify
  6 + * it under the terms of the GNU General Public License as published by
  7 + * the Free Software Foundation; either version 2 of the License, or
  8 + * (at your option) any later version.
  9 + *
  10 + * This program is distributed in the hope that it will be useful,
  11 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13 + * GNU General Public License for more details.
  14 + *
  15 + * You should have received a copy of the GNU General Public License
  16 + * along with this program; if not, write to the Free Software
  17 + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  18 + */
  19 +
  20 +#include <config.h>
  21 +#include <common.h>
  22 +#include <asm/io.h>
  23 +#include <faraday/ftsmc020.h>
  24 +
  25 +struct ftsmc020_config {
  26 + unsigned int config;
  27 + unsigned int timing;
  28 +};
  29 +
  30 +static struct ftsmc020_config config[] = CONFIG_SYS_FTSMC020_CONFIGS;
  31 +
  32 +static struct ftsmc020 *smc = (struct ftsmc020 *)CONFIG_FTSMC020_BASE;
  33 +
  34 +static void ftsmc020_setup_bank(unsigned int bank, struct ftsmc020_config *cfg)
  35 +{
  36 + if (bank > 3) {
  37 + printf("bank # %u invalid\n", bank);
  38 + return;
  39 + }
  40 +
  41 + writel(cfg->config, &smc->bank[bank].cr);
  42 + writel(cfg->timing, &smc->bank[bank].tpr);
  43 +}
  44 +
  45 +void ftsmc020_init(void)
  46 +{
  47 + int i;
  48 +
  49 + for (i = 0; i < ARRAY_SIZE(config); i++)
  50 + ftsmc020_setup_bank(i, &config[i]);
  51 +}
include/configs/a320evb.h
Diff comments   View file @ 00d10eb
... ... @@ -163,7 +163,8 @@
163 163 * Static memory controller configuration
164 164 */
165 165  
166   -#include <asm/arch/ftsmc020.h>
  166 +#define CONFIG_FTSMC020
  167 +#include <faraday/ftsmc020.h>
167 168  
168 169 #define FTSMC020_BANK0_CONFIG (FTSMC020_BANK_ENABLE | \
169 170 FTSMC020_BANK_BASE(PHYS_FLASH_1) | \
... ... @@ -196,6 +197,7 @@
196 197 { FTSMC020_BANK0_CONFIG, FTSMC020_BANK0_TIMING, }, \
197 198 { FTSMC020_BANK1_CONFIG, FTSMC020_BANK1_TIMING, }, \
198 199 }
  200 +#endif /* CONFIG_FTSMC020 */
199 201  
200 202 /*-----------------------------------------------------------------------
201 203 * FLASH and environment organization
include/faraday/ftsmc020.h
Diff comments   View file @ 00d10eb
  1 +/*
  2 + * (C) Copyright 2009 Faraday Technology
  3 + * Po-Yu Chuang <ratbert@faraday-tech.com>
  4 + *
  5 + * This program is free software; you can redistribute it and/or modify
  6 + * it under the terms of the GNU General Public License as published by
  7 + * the Free Software Foundation; either version 2 of the License, or
  8 + * (at your option) any later version.
  9 + *
  10 + * This program is distributed in the hope that it will be useful,
  11 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13 + * GNU General Public License for more details.
  14 + *
  15 + * You should have received a copy of the GNU General Public License
  16 + * along with this program; if not, write to the Free Software
  17 + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  18 + */
  19 +
  20 +/*
  21 + * Static Memory Controller
  22 + */
  23 +#ifndef __FTSMC020_H
  24 +#define __FTSMC020_H
  25 +
  26 +#ifndef __ASSEMBLY__
  27 +
  28 +struct ftsmc020 {
  29 + struct {
  30 + unsigned int cr; /* 0x00, 0x08, 0x10, 0x18 */
  31 + unsigned int tpr; /* 0x04, 0x0c, 0x14, 0x1c */
  32 + } bank[4];
  33 + unsigned int pad[8]; /* 0x20 - 0x3c */
  34 + unsigned int ssr; /* 0x40 */
  35 +};
  36 +
  37 +void ftsmc020_init(void);
  38 +
  39 +#endif /* __ASSEMBLY__ */
  40 +
  41 +/*
  42 + * Memory Bank Configuration Register
  43 + */
  44 +#define FTSMC020_BANK_ENABLE (1 << 28)
  45 +#define FTSMC020_BANK_BASE(x) ((x) & 0x0fff1000)
  46 +
  47 +#define FTSMC020_BANK_WPROT (1 << 11)
  48 +
  49 +#define FTSMC020_BANK_SIZE_32K (0xb << 4)
  50 +#define FTSMC020_BANK_SIZE_64K (0xc << 4)
  51 +#define FTSMC020_BANK_SIZE_128K (0xd << 4)
  52 +#define FTSMC020_BANK_SIZE_256K (0xe << 4)
  53 +#define FTSMC020_BANK_SIZE_512K (0xf << 4)
  54 +#define FTSMC020_BANK_SIZE_1M (0x0 << 4)
  55 +#define FTSMC020_BANK_SIZE_2M (0x1 << 4)
  56 +#define FTSMC020_BANK_SIZE_4M (0x2 << 4)
  57 +#define FTSMC020_BANK_SIZE_8M (0x3 << 4)
  58 +#define FTSMC020_BANK_SIZE_16M (0x4 << 4)
  59 +#define FTSMC020_BANK_SIZE_32M (0x5 << 4)
  60 +
  61 +#define FTSMC020_BANK_MBW_8 (0x0 << 0)
  62 +#define FTSMC020_BANK_MBW_16 (0x1 << 0)
  63 +#define FTSMC020_BANK_MBW_32 (0x2 << 0)
  64 +
  65 +/*
  66 + * Memory Bank Timing Parameter Register
  67 + */
  68 +#define FTSMC020_TPR_ETRNA(x) (((x) & 0xf) << 28)
  69 +#define FTSMC020_TPR_EATI(x) (((x) & 0xf) << 24)
  70 +#define FTSMC020_TPR_RBE (1 << 20)
  71 +#define FTSMC020_TPR_AST(x) (((x) & 0x3) << 18)
  72 +#define FTSMC020_TPR_CTW(x) (((x) & 0x3) << 16)
  73 +#define FTSMC020_TPR_ATI(x) (((x) & 0xf) << 12)
  74 +#define FTSMC020_TPR_AT2(x) (((x) & 0x3) << 8)
  75 +#define FTSMC020_TPR_WTC(x) (((x) & 0x3) << 6)
  76 +#define FTSMC020_TPR_AHT(x) (((x) & 0x3) << 4)
  77 +#define FTSMC020_TPR_TRNA(x) (((x) & 0xf) << 0)
  78 +
  79 +#endif /* __FTSMC020_H */