Commit 0181937fa371aa482d99f17ab2bc219bfcbb21b2

Authored by Ruchika Gupta
Committed by York Sun
1 parent d8f527578e

crypto/fsl: Add fixup for crypto node

Era property is added in the crypto node in device tree.
Move the code to do so from arch/powerpc/mpc8xxx/fdt.c to
drivers/sec/sec.c so that it can be used across arm and
powerpc platforms having crypto node.

Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com>
[York Sun: Fix commit message indentation]
Reviewed-by: York Sun <yorksun@freescale.com>

Showing 5 changed files with 203 additions and 170 deletions Side-by-side Diff

arch/arm/cpu/armv7/ls102xa/fdt.c
... ... @@ -15,6 +15,8 @@
15 15 #include <fsl_esdhc.h>
16 16 #endif
17 17 #include <tsec.h>
  18 +#include <asm/arch/immap_ls102xa.h>
  19 +#include <fsl_sec.h>
18 20  
19 21 DECLARE_GLOBAL_DATA_PTR;
20 22  
21 23  
... ... @@ -77,8 +79,23 @@
77 79 int off;
78 80 int val;
79 81 const char *sysclk_path;
  82 + struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR);
  83 + unsigned int svr;
  84 + svr = in_be32(&gur->svr);
80 85  
81 86 unsigned long busclk = get_bus_freq(0);
  87 +
  88 + /* delete crypto node if not on an E-processor */
  89 + if (!IS_E_PROCESSOR(svr))
  90 + fdt_fixup_crypto_node(blob, 0);
  91 +#if CONFIG_SYS_FSL_SEC_COMPAT >= 4
  92 + else {
  93 + ccsr_sec_t __iomem *sec;
  94 +
  95 + sec = (void __iomem *)CONFIG_SYS_FSL_SEC_ADDR;
  96 + fdt_fixup_crypto_node(blob, sec_in32(&sec->secvid_ms));
  97 + }
  98 +#endif
82 99  
83 100 fdt_fixup_ethernet(blob);
84 101  
arch/powerpc/cpu/mpc8xxx/fdt.c
... ... @@ -73,176 +73,6 @@
73 73 }
74 74 #endif /* defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx) */
75 75  
76   -/*
77   - * update crypto node properties to a specified revision of the SEC
78   - * called with sec_rev == 0 if not on an E processor
79   - */
80   -#if CONFIG_SYS_FSL_SEC_COMPAT == 2 /* SEC 2.x/3.x */
81   -void fdt_fixup_crypto_node(void *blob, int sec_rev)
82   -{
83   - static const struct sec_rev_prop {
84   - u32 sec_rev;
85   - u32 num_channels;
86   - u32 channel_fifo_len;
87   - u32 exec_units_mask;
88   - u32 descriptor_types_mask;
89   - } sec_rev_prop_list [] = {
90   - { 0x0200, 4, 24, 0x07e, 0x01010ebf }, /* SEC 2.0 */
91   - { 0x0201, 4, 24, 0x0fe, 0x012b0ebf }, /* SEC 2.1 */
92   - { 0x0202, 1, 24, 0x04c, 0x0122003f }, /* SEC 2.2 */
93   - { 0x0204, 4, 24, 0x07e, 0x012b0ebf }, /* SEC 2.4 */
94   - { 0x0300, 4, 24, 0x9fe, 0x03ab0ebf }, /* SEC 3.0 */
95   - { 0x0301, 4, 24, 0xbfe, 0x03ab0ebf }, /* SEC 3.1 */
96   - { 0x0303, 4, 24, 0x97c, 0x03a30abf }, /* SEC 3.3 */
97   - };
98   - static char compat_strlist[ARRAY_SIZE(sec_rev_prop_list) *
99   - sizeof("fsl,secX.Y")];
100   - int crypto_node, sec_idx, err;
101   - char *p;
102   - u32 val;
103   -
104   - /* locate crypto node based on lowest common compatible */
105   - crypto_node = fdt_node_offset_by_compatible(blob, -1, "fsl,sec2.0");
106   - if (crypto_node == -FDT_ERR_NOTFOUND)
107   - return;
108   -
109   - /* delete it if not on an E-processor */
110   - if (crypto_node > 0 && !sec_rev) {
111   - fdt_del_node(blob, crypto_node);
112   - return;
113   - }
114   -
115   - /* else we got called for possible uprev */
116   - for (sec_idx = 0; sec_idx < ARRAY_SIZE(sec_rev_prop_list); sec_idx++)
117   - if (sec_rev_prop_list[sec_idx].sec_rev == sec_rev)
118   - break;
119   -
120   - if (sec_idx == ARRAY_SIZE(sec_rev_prop_list)) {
121   - puts("warning: unknown SEC revision number\n");
122   - return;
123   - }
124   -
125   - val = cpu_to_fdt32(sec_rev_prop_list[sec_idx].num_channels);
126   - err = fdt_setprop(blob, crypto_node, "fsl,num-channels", &val, 4);
127   - if (err < 0)
128   - printf("WARNING: could not set crypto property: %s\n",
129   - fdt_strerror(err));
130   -
131   - val = cpu_to_fdt32(sec_rev_prop_list[sec_idx].descriptor_types_mask);
132   - err = fdt_setprop(blob, crypto_node, "fsl,descriptor-types-mask", &val, 4);
133   - if (err < 0)
134   - printf("WARNING: could not set crypto property: %s\n",
135   - fdt_strerror(err));
136   -
137   - val = cpu_to_fdt32(sec_rev_prop_list[sec_idx].exec_units_mask);
138   - err = fdt_setprop(blob, crypto_node, "fsl,exec-units-mask", &val, 4);
139   - if (err < 0)
140   - printf("WARNING: could not set crypto property: %s\n",
141   - fdt_strerror(err));
142   -
143   - val = cpu_to_fdt32(sec_rev_prop_list[sec_idx].channel_fifo_len);
144   - err = fdt_setprop(blob, crypto_node, "fsl,channel-fifo-len", &val, 4);
145   - if (err < 0)
146   - printf("WARNING: could not set crypto property: %s\n",
147   - fdt_strerror(err));
148   -
149   - val = 0;
150   - while (sec_idx >= 0) {
151   - p = compat_strlist + val;
152   - val += sprintf(p, "fsl,sec%d.%d",
153   - (sec_rev_prop_list[sec_idx].sec_rev & 0xff00) >> 8,
154   - sec_rev_prop_list[sec_idx].sec_rev & 0x00ff) + 1;
155   - sec_idx--;
156   - }
157   - err = fdt_setprop(blob, crypto_node, "compatible", &compat_strlist, val);
158   - if (err < 0)
159   - printf("WARNING: could not set crypto property: %s\n",
160   - fdt_strerror(err));
161   -}
162   -#elif CONFIG_SYS_FSL_SEC_COMPAT >= 4 /* SEC4 */
163   -static u8 caam_get_era(void)
164   -{
165   - static const struct {
166   - u16 ip_id;
167   - u8 maj_rev;
168   - u8 era;
169   - } caam_eras[] = {
170   - {0x0A10, 1, 1},
171   - {0x0A10, 2, 2},
172   - {0x0A12, 1, 3},
173   - {0x0A14, 1, 3},
174   - {0x0A14, 2, 4},
175   - {0x0A16, 1, 4},
176   - {0x0A10, 3, 4},
177   - {0x0A11, 1, 4},
178   - {0x0A18, 1, 4},
179   - {0x0A11, 2, 5},
180   - {0x0A12, 2, 5},
181   - {0x0A13, 1, 5},
182   - {0x0A1C, 1, 5}
183   - };
184   -
185   - ccsr_sec_t __iomem *sec = (void __iomem *)CONFIG_SYS_FSL_SEC_ADDR;
186   - u32 secvid_ms = sec_in32(&sec->secvid_ms);
187   - u32 ccbvid = sec_in32(&sec->ccbvid);
188   - u16 ip_id = (secvid_ms & SEC_SECVID_MS_IPID_MASK) >>
189   - SEC_SECVID_MS_IPID_SHIFT;
190   - u8 maj_rev = (secvid_ms & SEC_SECVID_MS_MAJ_REV_MASK) >>
191   - SEC_SECVID_MS_MAJ_REV_SHIFT;
192   - u8 era = (ccbvid & SEC_CCBVID_ERA_MASK) >> SEC_CCBVID_ERA_SHIFT;
193   -
194   - int i;
195   -
196   - if (era) /* This is '0' prior to CAAM ERA-6 */
197   - return era;
198   -
199   - for (i = 0; i < ARRAY_SIZE(caam_eras); i++)
200   - if (caam_eras[i].ip_id == ip_id &&
201   - caam_eras[i].maj_rev == maj_rev)
202   - return caam_eras[i].era;
203   -
204   - return 0;
205   -}
206   -
207   -static void fdt_fixup_crypto_era(void *blob, u32 era)
208   -{
209   - int err;
210   - int crypto_node;
211   -
212   - crypto_node = fdt_path_offset(blob, "crypto");
213   - if (crypto_node < 0) {
214   - printf("WARNING: Missing crypto node\n");
215   - return;
216   - }
217   -
218   - err = fdt_setprop(blob, crypto_node, "fsl,sec-era", &era,
219   - sizeof(era));
220   - if (err < 0) {
221   - printf("ERROR: could not set fsl,sec-era property: %s\n",
222   - fdt_strerror(err));
223   - }
224   -}
225   -
226   -void fdt_fixup_crypto_node(void *blob, int sec_rev)
227   -{
228   - u8 era;
229   -
230   - if (!sec_rev) {
231   - fdt_del_node_and_alias(blob, "crypto");
232   - return;
233   - }
234   -
235   - /* Add SEC ERA information in compatible */
236   - era = caam_get_era();
237   - if (era) {
238   - fdt_fixup_crypto_era(blob, era);
239   - } else {
240   - printf("WARNING: Unable to get ERA for CAAM rev: %d\n",
241   - sec_rev);
242   - }
243   -}
244   -#endif
245   -
246 76 int fdt_fixup_phy_connection(void *blob, int offset, phy_interface_t phyc)
247 77 {
248 78 return fdt_setprop_string(blob, offset, "phy-connection-type",
arch/powerpc/include/asm/config.h
... ... @@ -75,6 +75,7 @@
75 75 * SEC (crypto unit) major compatible version determination
76 76 */
77 77 #if defined(CONFIG_MPC83xx)
  78 +#define CONFIG_SYS_FSL_SEC_BE
78 79 #define CONFIG_SYS_FSL_SEC_COMPAT 2
79 80 #endif
80 81  
drivers/crypto/fsl/Makefile
... ... @@ -6,6 +6,7 @@
6 6 # Version 2 as published by the Free Software Foundation.
7 7 #
8 8  
  9 +obj-y += sec.o
9 10 obj-$(CONFIG_FSL_CAAM) += jr.o fsl_hash.o jobdesc.o error.o
10 11 obj-$(CONFIG_CMD_BLOB) += fsl_blob.o
drivers/crypto/fsl/sec.c
  1 +/*
  2 + * Copyright 2014 Freescale Semiconductor, Inc.
  3 + *
  4 + * SPDX-License-Identifier: GPL-2.0+
  5 + */
  6 +
  7 +#include <common.h>
  8 +#include <libfdt.h>
  9 +#include <fdt_support.h>
  10 +#if CONFIG_SYS_FSL_SEC_COMPAT == 2 || CONFIG_SYS_FSL_SEC_COMPAT >= 4
  11 +#include <fsl_sec.h>
  12 +#endif
  13 +
  14 +/*
  15 + * update crypto node properties to a specified revision of the SEC
  16 + * called with sec_rev == 0 if not on an E processor
  17 + */
  18 +#if CONFIG_SYS_FSL_SEC_COMPAT == 2 /* SEC 2.x/3.x */
  19 +void fdt_fixup_crypto_node(void *blob, int sec_rev)
  20 +{
  21 + static const struct sec_rev_prop {
  22 + u32 sec_rev;
  23 + u32 num_channels;
  24 + u32 channel_fifo_len;
  25 + u32 exec_units_mask;
  26 + u32 descriptor_types_mask;
  27 + } sec_rev_prop_list[] = {
  28 + { 0x0200, 4, 24, 0x07e, 0x01010ebf }, /* SEC 2.0 */
  29 + { 0x0201, 4, 24, 0x0fe, 0x012b0ebf }, /* SEC 2.1 */
  30 + { 0x0202, 1, 24, 0x04c, 0x0122003f }, /* SEC 2.2 */
  31 + { 0x0204, 4, 24, 0x07e, 0x012b0ebf }, /* SEC 2.4 */
  32 + { 0x0300, 4, 24, 0x9fe, 0x03ab0ebf }, /* SEC 3.0 */
  33 + { 0x0301, 4, 24, 0xbfe, 0x03ab0ebf }, /* SEC 3.1 */
  34 + { 0x0303, 4, 24, 0x97c, 0x03a30abf }, /* SEC 3.3 */
  35 + };
  36 + static char compat_strlist[ARRAY_SIZE(sec_rev_prop_list) *
  37 + sizeof("fsl,secX.Y")];
  38 + int crypto_node, sec_idx, err;
  39 + char *p;
  40 + u32 val;
  41 +
  42 + /* locate crypto node based on lowest common compatible */
  43 + crypto_node = fdt_node_offset_by_compatible(blob, -1, "fsl,sec2.0");
  44 + if (crypto_node == -FDT_ERR_NOTFOUND)
  45 + return;
  46 +
  47 + /* delete it if not on an E-processor */
  48 + if (crypto_node > 0 && !sec_rev) {
  49 + fdt_del_node(blob, crypto_node);
  50 + return;
  51 + }
  52 +
  53 + /* else we got called for possible uprev */
  54 + for (sec_idx = 0; sec_idx < ARRAY_SIZE(sec_rev_prop_list); sec_idx++)
  55 + if (sec_rev_prop_list[sec_idx].sec_rev == sec_rev)
  56 + break;
  57 +
  58 + if (sec_idx == ARRAY_SIZE(sec_rev_prop_list)) {
  59 + puts("warning: unknown SEC revision number\n");
  60 + return;
  61 + }
  62 +
  63 + val = cpu_to_fdt32(sec_rev_prop_list[sec_idx].num_channels);
  64 + err = fdt_setprop(blob, crypto_node, "fsl,num-channels", &val, 4);
  65 + if (err < 0)
  66 + printf("WARNING: could not set crypto property: %s\n",
  67 + fdt_strerror(err));
  68 +
  69 + val = cpu_to_fdt32(sec_rev_prop_list[sec_idx].descriptor_types_mask);
  70 + err = fdt_setprop(blob, crypto_node, "fsl,descriptor-types-mask",
  71 + &val, 4);
  72 + if (err < 0)
  73 + printf("WARNING: could not set crypto property: %s\n",
  74 + fdt_strerror(err));
  75 +
  76 + val = cpu_to_fdt32(sec_rev_prop_list[sec_idx].exec_units_mask);
  77 + err = fdt_setprop(blob, crypto_node, "fsl,exec-units-mask", &val, 4);
  78 + if (err < 0)
  79 + printf("WARNING: could not set crypto property: %s\n",
  80 + fdt_strerror(err));
  81 +
  82 + val = cpu_to_fdt32(sec_rev_prop_list[sec_idx].channel_fifo_len);
  83 + err = fdt_setprop(blob, crypto_node, "fsl,channel-fifo-len", &val, 4);
  84 + if (err < 0)
  85 + printf("WARNING: could not set crypto property: %s\n",
  86 + fdt_strerror(err));
  87 +
  88 + val = 0;
  89 + while (sec_idx >= 0) {
  90 + p = compat_strlist + val;
  91 + val += sprintf(p, "fsl,sec%d.%d",
  92 + (sec_rev_prop_list[sec_idx].sec_rev & 0xff00) >> 8,
  93 + sec_rev_prop_list[sec_idx].sec_rev & 0x00ff) + 1;
  94 + sec_idx--;
  95 + }
  96 + err = fdt_setprop(blob, crypto_node, "compatible", &compat_strlist,
  97 + val);
  98 + if (err < 0)
  99 + printf("WARNING: could not set crypto property: %s\n",
  100 + fdt_strerror(err));
  101 +}
  102 +#elif CONFIG_SYS_FSL_SEC_COMPAT >= 4 /* SEC4 */
  103 +static u8 caam_get_era(void)
  104 +{
  105 + static const struct {
  106 + u16 ip_id;
  107 + u8 maj_rev;
  108 + u8 era;
  109 + } caam_eras[] = {
  110 + {0x0A10, 1, 1},
  111 + {0x0A10, 2, 2},
  112 + {0x0A12, 1, 3},
  113 + {0x0A14, 1, 3},
  114 + {0x0A14, 2, 4},
  115 + {0x0A16, 1, 4},
  116 + {0x0A10, 3, 4},
  117 + {0x0A11, 1, 4},
  118 + {0x0A18, 1, 4},
  119 + {0x0A11, 2, 5},
  120 + {0x0A12, 2, 5},
  121 + {0x0A13, 1, 5},
  122 + {0x0A1C, 1, 5}
  123 + };
  124 +
  125 + ccsr_sec_t __iomem *sec = (void __iomem *)CONFIG_SYS_FSL_SEC_ADDR;
  126 + u32 secvid_ms = sec_in32(&sec->secvid_ms);
  127 + u32 ccbvid = sec_in32(&sec->ccbvid);
  128 + u16 ip_id = (secvid_ms & SEC_SECVID_MS_IPID_MASK) >>
  129 + SEC_SECVID_MS_IPID_SHIFT;
  130 + u8 maj_rev = (secvid_ms & SEC_SECVID_MS_MAJ_REV_MASK) >>
  131 + SEC_SECVID_MS_MAJ_REV_SHIFT;
  132 + u8 era = (ccbvid & SEC_CCBVID_ERA_MASK) >> SEC_CCBVID_ERA_SHIFT;
  133 +
  134 + int i;
  135 +
  136 + if (era) /* This is '0' prior to CAAM ERA-6 */
  137 + return era;
  138 +
  139 + for (i = 0; i < ARRAY_SIZE(caam_eras); i++)
  140 + if (caam_eras[i].ip_id == ip_id &&
  141 + caam_eras[i].maj_rev == maj_rev)
  142 + return caam_eras[i].era;
  143 +
  144 + return 0;
  145 +}
  146 +
  147 +static void fdt_fixup_crypto_era(void *blob, u32 era)
  148 +{
  149 + int err;
  150 + int crypto_node;
  151 +
  152 + crypto_node = fdt_path_offset(blob, "crypto");
  153 + if (crypto_node < 0) {
  154 + printf("WARNING: Missing crypto node\n");
  155 + return;
  156 + }
  157 +
  158 + err = fdt_setprop(blob, crypto_node, "fsl,sec-era", &era,
  159 + sizeof(era));
  160 + if (err < 0) {
  161 + printf("ERROR: could not set fsl,sec-era property: %s\n",
  162 + fdt_strerror(err));
  163 + }
  164 +}
  165 +
  166 +void fdt_fixup_crypto_node(void *blob, int sec_rev)
  167 +{
  168 + u8 era;
  169 +
  170 + if (!sec_rev) {
  171 + fdt_del_node_and_alias(blob, "crypto");
  172 + return;
  173 + }
  174 +
  175 + /* Add SEC ERA information in compatible */
  176 + era = caam_get_era();
  177 + if (era) {
  178 + fdt_fixup_crypto_era(blob, era);
  179 + } else {
  180 + printf("WARNING: Unable to get ERA for CAAM rev: %d\n",
  181 + sec_rev);
  182 + }
  183 +}
  184 +#endif