Commit 0241c3131dd4c19a1116c863d622358eb2680462
1 parent
385a08a60f
Exists in
v2017.01-smarct4x
and in
37 other branches
board: axs10x - support v3 mother-board
There're 2 versions of motherboards that could be used in ARC SDP. The only important difference for U-Boot is different NAND IC in use: [1] v2 board (we used to support up until now) sports MT29F4G08ABADAWP while [2] v3 board sports MT29F4G16ABADAWP They are almost the same except data bus width 8-bit in [1] and 16-bit in [2]. And for proper support of 16-bit data bus we have to pass NAND_BUSWIDTH_16 option to NAND driver core - which we do now knowing board type we're running on. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Showing 4 changed files with 43 additions and 0 deletions Side-by-side Diff
board/synopsys/axs101/axs101.c
... | ... | @@ -9,6 +9,7 @@ |
9 | 9 | #include <malloc.h> |
10 | 10 | #include <netdev.h> |
11 | 11 | #include <phy.h> |
12 | +#include "axs10x.h" | |
12 | 13 | |
13 | 14 | DECLARE_GLOBAL_DATA_PTR; |
14 | 15 | |
... | ... | @@ -39,6 +40,19 @@ |
39 | 40 | if (designware_initialize(ARC_DWGMAC_BASE, |
40 | 41 | PHY_INTERFACE_MODE_RGMII) >= 0) |
41 | 42 | return 1; |
43 | + | |
44 | + return 0; | |
45 | +} | |
46 | + | |
47 | + | |
48 | +#define AXS_MB_CREG 0xE0011000 | |
49 | + | |
50 | +int board_early_init_f(void) | |
51 | +{ | |
52 | + if (readl((void __iomem *)AXS_MB_CREG + 0x234) & (1 << 28)) | |
53 | + gd->board_type = AXS_MB_V3; | |
54 | + else | |
55 | + gd->board_type = AXS_MB_V2; | |
42 | 56 | |
43 | 57 | return 0; |
44 | 58 | } |
board/synopsys/axs101/axs10x.h
board/synopsys/axs101/nand.c
... | ... | @@ -9,7 +9,10 @@ |
9 | 9 | #include <malloc.h> |
10 | 10 | #include <nand.h> |
11 | 11 | #include <asm/io.h> |
12 | +#include "axs10x.h" | |
12 | 13 | |
14 | +DECLARE_GLOBAL_DATA_PTR; | |
15 | + | |
13 | 16 | #define BUS_WIDTH 8 /* AXI data bus width in bytes */ |
14 | 17 | |
15 | 18 | /* DMA buffer descriptor bits & masks */ |
... | ... | @@ -231,6 +234,10 @@ |
231 | 234 | nand->read_word = axs101_nand_read_word; |
232 | 235 | nand->write_buf = axs101_nand_write_buf; |
233 | 236 | nand->read_buf = axs101_nand_read_buf; |
237 | + | |
238 | + /* MBv3 has NAND IC with 16-bit data bus */ | |
239 | + if (gd->board_type == AXS_MB_V3) | |
240 | + nand->options |= NAND_BUSWIDTH_16; | |
234 | 241 | |
235 | 242 | return 0; |
236 | 243 | } |
include/configs/axs101.h
... | ... | @@ -34,6 +34,12 @@ |
34 | 34 | #define CONFIG_SYS_LOAD_ADDR 0x82000000 |
35 | 35 | |
36 | 36 | /* |
37 | + * This board might be of different versions so handle it | |
38 | + */ | |
39 | +#define CONFIG_BOARD_TYPES | |
40 | +#define CONFIG_BOARD_EARLY_INIT_F | |
41 | + | |
42 | +/* | |
37 | 43 | * NAND Flash configuration |
38 | 44 | */ |
39 | 45 | #define CONFIG_SYS_NO_FLASH |