Commit 02ee7a4aa57b37d6003263b69b1852c4cda5975e
Committed by
Stefano Babic
1 parent
d1d78db1db
Exists in
smarc_8mq_lf_v2020.04
and in
9 other branches
mx6sabresd: Convert ethernet to driver model
Convert imx6sabresd ethernet to driver model to fix the following warning: ===================== WARNING ====================== This board does not use CONFIG_DM_ETH (Driver Model for Ethernet drivers). Please update the board to use CONFIG_DM_ETH before the v2020.07 release. Failure to update by the deadline may result in board removal. See doc/driver-model/migration.rst for more info. ==================================================== Signed-off-by: Alifer Moraes <alifer.wsdm@gmail.com> Reviewed-by: Fabio Estevam <festevam@gmail.com>
Showing 3 changed files with 5 additions and 45 deletions Side-by-side Diff
board/freescale/mx6sabresd/mx6sabresd.c
... | ... | @@ -21,7 +21,6 @@ |
21 | 21 | #include <mmc.h> |
22 | 22 | #include <fsl_esdhc_imx.h> |
23 | 23 | #include <miiphy.h> |
24 | -#include <netdev.h> | |
25 | 24 | #include <asm/arch/mxc_hdmi.h> |
26 | 25 | #include <asm/arch/crm_regs.h> |
27 | 26 | #include <asm/io.h> |
... | ... | @@ -44,9 +43,6 @@ |
44 | 43 | PAD_CTL_SPEED_LOW | PAD_CTL_DSE_80ohm | \ |
45 | 44 | PAD_CTL_SRE_FAST | PAD_CTL_HYS) |
46 | 45 | |
47 | -#define ENET_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ | |
48 | - PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS) | |
49 | - | |
50 | 46 | #define SPI_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_SPEED_MED | \ |
51 | 47 | PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST) |
52 | 48 | |
... | ... | @@ -73,31 +69,6 @@ |
73 | 69 | IOMUX_PADS(PAD_CSI0_DAT11__UART1_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL)), |
74 | 70 | }; |
75 | 71 | |
76 | -static iomux_v3_cfg_t const enet_pads[] = { | |
77 | - IOMUX_PADS(PAD_ENET_MDIO__ENET_MDIO | MUX_PAD_CTRL(ENET_PAD_CTRL)), | |
78 | - IOMUX_PADS(PAD_ENET_MDC__ENET_MDC | MUX_PAD_CTRL(ENET_PAD_CTRL)), | |
79 | - IOMUX_PADS(PAD_RGMII_TXC__RGMII_TXC | MUX_PAD_CTRL(ENET_PAD_CTRL)), | |
80 | - IOMUX_PADS(PAD_RGMII_TD0__RGMII_TD0 | MUX_PAD_CTRL(ENET_PAD_CTRL)), | |
81 | - IOMUX_PADS(PAD_RGMII_TD1__RGMII_TD1 | MUX_PAD_CTRL(ENET_PAD_CTRL)), | |
82 | - IOMUX_PADS(PAD_RGMII_TD2__RGMII_TD2 | MUX_PAD_CTRL(ENET_PAD_CTRL)), | |
83 | - IOMUX_PADS(PAD_RGMII_TD3__RGMII_TD3 | MUX_PAD_CTRL(ENET_PAD_CTRL)), | |
84 | - IOMUX_PADS(PAD_RGMII_TX_CTL__RGMII_TX_CTL | MUX_PAD_CTRL(ENET_PAD_CTRL)), | |
85 | - IOMUX_PADS(PAD_ENET_REF_CLK__ENET_TX_CLK | MUX_PAD_CTRL(ENET_PAD_CTRL)), | |
86 | - IOMUX_PADS(PAD_RGMII_RXC__RGMII_RXC | MUX_PAD_CTRL(ENET_PAD_CTRL)), | |
87 | - IOMUX_PADS(PAD_RGMII_RD0__RGMII_RD0 | MUX_PAD_CTRL(ENET_PAD_CTRL)), | |
88 | - IOMUX_PADS(PAD_RGMII_RD1__RGMII_RD1 | MUX_PAD_CTRL(ENET_PAD_CTRL)), | |
89 | - IOMUX_PADS(PAD_RGMII_RD2__RGMII_RD2 | MUX_PAD_CTRL(ENET_PAD_CTRL)), | |
90 | - IOMUX_PADS(PAD_RGMII_RD3__RGMII_RD3 | MUX_PAD_CTRL(ENET_PAD_CTRL)), | |
91 | - IOMUX_PADS(PAD_RGMII_RX_CTL__RGMII_RX_CTL | MUX_PAD_CTRL(ENET_PAD_CTRL)), | |
92 | - /* AR8031 PHY Reset */ | |
93 | - IOMUX_PADS(PAD_ENET_CRS_DV__GPIO1_IO25 | MUX_PAD_CTRL(NO_PAD_CTRL)), | |
94 | -}; | |
95 | - | |
96 | -static void setup_iomux_enet(void) | |
97 | -{ | |
98 | - SETUP_IOMUX_PADS(enet_pads); | |
99 | -} | |
100 | - | |
101 | 72 | static iomux_v3_cfg_t const usdhc2_pads[] = { |
102 | 73 | IOMUX_PADS(PAD_SD2_CLK__SD2_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL)), |
103 | 74 | IOMUX_PADS(PAD_SD2_CMD__SD2_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL)), |
... | ... | @@ -493,13 +464,6 @@ |
493 | 464 | int overwrite_console(void) |
494 | 465 | { |
495 | 466 | return 1; |
496 | -} | |
497 | - | |
498 | -int board_eth_init(bd_t *bis) | |
499 | -{ | |
500 | - setup_iomux_enet(); | |
501 | - | |
502 | - return cpu_eth_init(bis); | |
503 | 467 | } |
504 | 468 | |
505 | 469 | #ifdef CONFIG_USB_EHCI_MX6 |
configs/mx6sabresd_defconfig
include/configs/mx6sabresd.h
... | ... | @@ -62,14 +62,5 @@ |
62 | 62 | #define CONFIG_USB_MAX_CONTROLLER_COUNT 1 /* Enabled USB controller number */ |
63 | 63 | #endif |
64 | 64 | |
65 | -#define CONFIG_FEC_MXC | |
66 | -#define IMX_FEC_BASE ENET_BASE_ADDR | |
67 | -#define CONFIG_FEC_XCV_TYPE RGMII | |
68 | -#define CONFIG_ETHPRIME "FEC" | |
69 | -#define CONFIG_FEC_MXC_PHYADDR 1 | |
70 | - | |
71 | -#define CONFIG_PHY_ATHEROS | |
72 | - | |
73 | - | |
74 | 65 | #endif /* __MX6SABRESD_CONFIG_H */ |