tegra2: Change CONFIG_SYS_TEXT_BASE to 0x00108000.

NVIDIA's flashing tools assume that the bootloader is loaded at address 0x00108000. Instead of requiring non-standard builds of those tools which allow a load address of 0x00E08000, this commit just switches all Tegra2 boards to use the standard load address. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Tested-by: Simon Glass <sjg@chromium.org> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>

tegra2: Change CONFIG_SYS_TEXT_BASE to 0x00108000.
NVIDIA's flashing tools assume that the bootloader is loaded at address 0x00108000. Instead of requiring non-standard builds of those tools which allow a load address of 0x00E08000, this commit just switches all Tegra2 boards to use the standard load address. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Tested-by: Simon Glass <sjg@chromium.org> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
Thierry Reding · Albert ARIBAUD
1 parent 09743ba635
Showing 1 changed file with 1 additions and 1 deletions Side-by-side Diff
include/configs/tegra2-common.h
@@ -151,7 +151,7 @@
 #define PHYS_SDRAM_1		TEGRA2_SDRC_CS0
 #define PHYS_SDRAM_1_SIZE	0x20000000	/* 512M */
  
-#define CONFIG_SYS_TEXT_BASE	0x00E08000
+#define CONFIG_SYS_TEXT_BASE	0x00108000
 #define CONFIG_SYS_SDRAM_BASE	PHYS_SDRAM_1
  
 #define CONFIG_SYS_INIT_RAM_ADDR	CONFIG_STACKBASE
...	...	@@ -151,7 +151,7 @@
151	151	#define PHYS_SDRAM_1 TEGRA2_SDRC_CS0
152	152	#define PHYS_SDRAM_1_SIZE 0x20000000 /* 512M */
153	153
154		-#define CONFIG_SYS_TEXT_BASE 0x00E08000
	154	+#define CONFIG_SYS_TEXT_BASE 0x00108000
155	155	#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
156	156
157	157	#define CONFIG_SYS_INIT_RAM_ADDR CONFIG_STACKBASE