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Commit 04e2a13336f0e507ef416bbede3be92b79c46594

Authored by Alexander Kochetkov
Committed by Tom Rini
1 parent af55e35d33
Exists in v2017.01-smarct4x and in 37 other branches 8qm-imx_v2020.04_5.4.70_2.3.0, emb_lf_v2022.04, imx_v2015.04_4.1.15_1.0.0_ga, pitx_8mp_lf_v2020.04, smarc-8m-android-10.0.0_2.6.0, smarc-8m-android-11.0.0_2.0.0, smarc-8mp-android-11.0.0_2.0.0, smarc-imx6_v2018.03_4.14.98_2.0.0_ga, smarc-imx7_v2017.03_4.9.11_1.0.0_ga, smarc-imx7_v2018.03_4.14.98_2.0.0_ga, smarc-imx_v2015.04_4.1.15_1.0.0_ga, smarc-imx_v2017.03_4.9.11_1.0.0_ga, smarc-imx_v2017.03_4.9.88_2.0.0_ga, smarc-imx_v2017.03_o8.1.0_1.3.0_8m, smarc-imx_v2018.03_4.14.78_1.0.0_ga, smarc-m6.0.1_2.1.0-ga, smarc-n7.1.2_2.0.0-ga, smarc-rel_imx_4.1.15_2.0.0_ga, smarc_8m-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8m-imx_v2019.04_4.19.35_1.1.0, smarc_8m_00d0-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2019.04_4.19.35_1.1.0, smarc_8mm-imx_v2020.04_5.4.24_2.1.0, smarc_8mp_lf_v2020.04, smarc_8mq-imx_v2020.04_5.4.24_2.1.0, smarc_8mq_lf_v2020.04, ti-u-boot-2015.07, v2015.07-smarct33, v2015.07-smarct33-emmc, v2015.07-smarct4x, v2016.05-dlt, v2016.05-smarct3x, v2016.05-smarct3x-emmc, v2016.05-smarct4x, v2017.01-smarct3x, v2017.01-smarct3x-emmc

beagleboard: Remove side effects of i2c2 pullup resisters initialization code 

Fix typo of commit d4e53f063dd25e071444b87303573e7440deeb89.

i2c2 pullup resisters are controlled by bit 0 of CONTROL_PROG_IO1.
It's value after reset is 0x00100001.

In order to clear bit 0, original code write 0xfffffffe to
CONTROL_PROG_IO1 and toggle almost all default values.

Original code affect following:
* disable i2c1 pullup resisters
* increase far end load setting for many modules
* setup invalid SC/LB combination

Signed-off-by: Alexander Kochetkov <al.kochet@gmail.com>
CC: Tom Rini <trini@ti.com>
CC: Steve Kipisz <s-kipisz2@ti.com>

Showing 1 changed file with 4 additions and 1 deletions Inline Diff

board/ti/beagle/beagle.c
Diff comments   View file @ 04e2a13
1 /* 1 /*
2 * (C) Copyright 2004-2011 2 * (C) Copyright 2004-2011
3 * Texas Instruments, <www.ti.com> 3 * Texas Instruments, <www.ti.com>
4 * 4 *
5 * Author : 5 * Author :
6 * Sunil Kumar <sunilsaini05@gmail.com> 6 * Sunil Kumar <sunilsaini05@gmail.com>
7 * Shashi Ranjan <shashiranjanmca05@gmail.com> 7 * Shashi Ranjan <shashiranjanmca05@gmail.com>
8 * 8 *
9 * Derived from Beagle Board and 3430 SDP code by 9 * Derived from Beagle Board and 3430 SDP code by
10 * Richard Woodruff <r-woodruff2@ti.com> 10 * Richard Woodruff <r-woodruff2@ti.com>
11 * Syed Mohammed Khasim <khasim@ti.com> 11 * Syed Mohammed Khasim <khasim@ti.com>
12 * 12 *
13 * 13 *
14 * SPDX-License-Identifier: GPL-2.0+ 14 * SPDX-License-Identifier: GPL-2.0+
15 */ 15 */
16 #include <common.h> 16 #include <common.h>
17 #ifdef CONFIG_STATUS_LED 17 #ifdef CONFIG_STATUS_LED
18 #include <status_led.h> 18 #include <status_led.h>
19 #endif 19 #endif
20 #include <twl4030.h> 20 #include <twl4030.h>
21 #include <linux/mtd/nand.h> 21 #include <linux/mtd/nand.h>
22 #include <asm/io.h> 22 #include <asm/io.h>
23 #include <asm/arch/mmc_host_def.h> 23 #include <asm/arch/mmc_host_def.h>
24 #include <asm/arch/mux.h> 24 #include <asm/arch/mux.h>
25 #include <asm/arch/mem.h> 25 #include <asm/arch/mem.h>
26 #include <asm/arch/sys_proto.h> 26 #include <asm/arch/sys_proto.h>
27 #include <asm/gpio.h> 27 #include <asm/gpio.h>
28 #include <asm/mach-types.h> 28 #include <asm/mach-types.h>
29 #include <asm/omap_musb.h> 29 #include <asm/omap_musb.h>
30 #include <asm/errno.h> 30 #include <asm/errno.h>
31 #include <linux/usb/ch9.h> 31 #include <linux/usb/ch9.h>
32 #include <linux/usb/gadget.h> 32 #include <linux/usb/gadget.h>
33 #include <linux/usb/musb.h> 33 #include <linux/usb/musb.h>
34 #include "beagle.h" 34 #include "beagle.h"
35 #include <command.h> 35 #include <command.h>
36 36
37 #ifdef CONFIG_USB_EHCI 37 #ifdef CONFIG_USB_EHCI
38 #include <usb.h> 38 #include <usb.h>
39 #include <asm/ehci-omap.h> 39 #include <asm/ehci-omap.h>
40 #endif 40 #endif
41 41
42 #define TWL4030_I2C_BUS 0 42 #define TWL4030_I2C_BUS 0
43 #define EXPANSION_EEPROM_I2C_BUS 1 43 #define EXPANSION_EEPROM_I2C_BUS 1
44 #define EXPANSION_EEPROM_I2C_ADDRESS 0x50 44 #define EXPANSION_EEPROM_I2C_ADDRESS 0x50
45 45
46 #define TINCANTOOLS_ZIPPY 0x01000100 46 #define TINCANTOOLS_ZIPPY 0x01000100
47 #define TINCANTOOLS_ZIPPY2 0x02000100 47 #define TINCANTOOLS_ZIPPY2 0x02000100
48 #define TINCANTOOLS_TRAINER 0x04000100 48 #define TINCANTOOLS_TRAINER 0x04000100
49 #define TINCANTOOLS_SHOWDOG 0x03000100 49 #define TINCANTOOLS_SHOWDOG 0x03000100
50 #define KBADC_BEAGLEFPGA 0x01000600 50 #define KBADC_BEAGLEFPGA 0x01000600
51 #define LW_BEAGLETOUCH 0x01000700 51 #define LW_BEAGLETOUCH 0x01000700
52 #define BRAINMUX_LCDOG 0x01000800 52 #define BRAINMUX_LCDOG 0x01000800
53 #define BRAINMUX_LCDOGTOUCH 0x02000800 53 #define BRAINMUX_LCDOGTOUCH 0x02000800
54 #define BBTOYS_WIFI 0x01000B00 54 #define BBTOYS_WIFI 0x01000B00
55 #define BBTOYS_VGA 0x02000B00 55 #define BBTOYS_VGA 0x02000B00
56 #define BBTOYS_LCD 0x03000B00 56 #define BBTOYS_LCD 0x03000B00
57 #define BCT_BRETTL3 0x01000F00 57 #define BCT_BRETTL3 0x01000F00
58 #define BCT_BRETTL4 0x02000F00 58 #define BCT_BRETTL4 0x02000F00
59 #define LSR_COM6L_ADPT 0x01001300 59 #define LSR_COM6L_ADPT 0x01001300
60 #define BEAGLE_NO_EEPROM 0xffffffff 60 #define BEAGLE_NO_EEPROM 0xffffffff
61 61
62 DECLARE_GLOBAL_DATA_PTR; 62 DECLARE_GLOBAL_DATA_PTR;
63 63
64 static struct { 64 static struct {
65 unsigned int device_vendor; 65 unsigned int device_vendor;
66 unsigned char revision; 66 unsigned char revision;
67 unsigned char content; 67 unsigned char content;
68 char fab_revision[8]; 68 char fab_revision[8];
69 char env_var[16]; 69 char env_var[16];
70 char env_setting[64]; 70 char env_setting[64];
71 } expansion_config; 71 } expansion_config;
72 72
73 /* 73 /*
74 * Routine: board_init 74 * Routine: board_init
75 * Description: Early hardware init. 75 * Description: Early hardware init.
76 */ 76 */
77 int board_init(void) 77 int board_init(void)
78 { 78 {
79 gpmc_init(); /* in SRAM or SDRAM, finish GPMC */ 79 gpmc_init(); /* in SRAM or SDRAM, finish GPMC */
80 /* board id for Linux */ 80 /* board id for Linux */
81 gd->bd->bi_arch_number = MACH_TYPE_OMAP3_BEAGLE; 81 gd->bd->bi_arch_number = MACH_TYPE_OMAP3_BEAGLE;
82 /* boot param addr */ 82 /* boot param addr */
83 gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100); 83 gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100);
84 84
85 #if defined(CONFIG_STATUS_LED) && defined(STATUS_LED_BOOT) 85 #if defined(CONFIG_STATUS_LED) && defined(STATUS_LED_BOOT)
86 status_led_set (STATUS_LED_BOOT, STATUS_LED_ON); 86 status_led_set (STATUS_LED_BOOT, STATUS_LED_ON);
87 #endif 87 #endif
88 88
89 return 0; 89 return 0;
90 } 90 }
91 91
92 /* 92 /*
93 * Routine: get_board_revision 93 * Routine: get_board_revision
94 * Description: Detect if we are running on a Beagle revision Ax/Bx, 94 * Description: Detect if we are running on a Beagle revision Ax/Bx,
95 * C1/2/3, C4, xM Ax/Bx or xM Cx. This can be done by reading 95 * C1/2/3, C4, xM Ax/Bx or xM Cx. This can be done by reading
96 * the level of GPIO173, GPIO172 and GPIO171. This should 96 * the level of GPIO173, GPIO172 and GPIO171. This should
97 * result in 97 * result in
98 * GPIO173, GPIO172, GPIO171: 1 1 1 => Ax/Bx 98 * GPIO173, GPIO172, GPIO171: 1 1 1 => Ax/Bx
99 * GPIO173, GPIO172, GPIO171: 1 1 0 => C1/2/3 99 * GPIO173, GPIO172, GPIO171: 1 1 0 => C1/2/3
100 * GPIO173, GPIO172, GPIO171: 1 0 1 => C4 100 * GPIO173, GPIO172, GPIO171: 1 0 1 => C4
101 * GPIO173, GPIO172, GPIO171: 0 1 0 => xM Cx 101 * GPIO173, GPIO172, GPIO171: 0 1 0 => xM Cx
102 * GPIO173, GPIO172, GPIO171: 0 0 0 => xM Ax/Bx 102 * GPIO173, GPIO172, GPIO171: 0 0 0 => xM Ax/Bx
103 */ 103 */
104 static int get_board_revision(void) 104 static int get_board_revision(void)
105 { 105 {
106 int revision; 106 int revision;
107 107
108 if (!gpio_request(171, "") && 108 if (!gpio_request(171, "") &&
109 !gpio_request(172, "") && 109 !gpio_request(172, "") &&
110 !gpio_request(173, "")) { 110 !gpio_request(173, "")) {
111 111
112 gpio_direction_input(171); 112 gpio_direction_input(171);
113 gpio_direction_input(172); 113 gpio_direction_input(172);
114 gpio_direction_input(173); 114 gpio_direction_input(173);
115 115
116 revision = gpio_get_value(173) << 2 | 116 revision = gpio_get_value(173) << 2 |
117 gpio_get_value(172) << 1 | 117 gpio_get_value(172) << 1 |
118 gpio_get_value(171); 118 gpio_get_value(171);
119 } else { 119 } else {
120 printf("Error: unable to acquire board revision GPIOs\n"); 120 printf("Error: unable to acquire board revision GPIOs\n");
121 revision = -1; 121 revision = -1;
122 } 122 }
123 123
124 return revision; 124 return revision;
125 } 125 }
126 126
127 #ifdef CONFIG_SPL_BUILD 127 #ifdef CONFIG_SPL_BUILD
128 /* 128 /*
129 * Routine: get_board_mem_timings 129 * Routine: get_board_mem_timings
130 * Description: If we use SPL then there is no x-loader nor config header 130 * Description: If we use SPL then there is no x-loader nor config header
131 * so we have to setup the DDR timings ourself on both banks. 131 * so we have to setup the DDR timings ourself on both banks.
132 */ 132 */
133 void get_board_mem_timings(struct board_sdrc_timings *timings) 133 void get_board_mem_timings(struct board_sdrc_timings *timings)
134 { 134 {
135 int pop_mfr, pop_id; 135 int pop_mfr, pop_id;
136 136
137 /* 137 /*
138 * We need to identify what PoP memory is on the board so that 138 * We need to identify what PoP memory is on the board so that
139 * we know what timings to use. If we can't identify it then 139 * we know what timings to use. If we can't identify it then
140 * we know it's an xM. To map the ID values please see nand_ids.c 140 * we know it's an xM. To map the ID values please see nand_ids.c
141 */ 141 */
142 identify_nand_chip(&pop_mfr, &pop_id); 142 identify_nand_chip(&pop_mfr, &pop_id);
143 143
144 timings->mr = MICRON_V_MR_165; 144 timings->mr = MICRON_V_MR_165;
145 switch (get_board_revision()) { 145 switch (get_board_revision()) {
146 case REVISION_C4: 146 case REVISION_C4:
147 if (pop_mfr == NAND_MFR_STMICRO && pop_id == 0xba) { 147 if (pop_mfr == NAND_MFR_STMICRO && pop_id == 0xba) {
148 /* 512MB DDR */ 148 /* 512MB DDR */
149 timings->mcfg = NUMONYX_V_MCFG_165(512 << 20); 149 timings->mcfg = NUMONYX_V_MCFG_165(512 << 20);
150 timings->ctrla = NUMONYX_V_ACTIMA_165; 150 timings->ctrla = NUMONYX_V_ACTIMA_165;
151 timings->ctrlb = NUMONYX_V_ACTIMB_165; 151 timings->ctrlb = NUMONYX_V_ACTIMB_165;
152 timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz; 152 timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz;
153 break; 153 break;
154 } else if (pop_mfr == NAND_MFR_MICRON && pop_id == 0xba) { 154 } else if (pop_mfr == NAND_MFR_MICRON && pop_id == 0xba) {
155 /* Beagleboard Rev C4, 512MB Nand/256MB DDR*/ 155 /* Beagleboard Rev C4, 512MB Nand/256MB DDR*/
156 timings->mcfg = MICRON_V_MCFG_165(128 << 20); 156 timings->mcfg = MICRON_V_MCFG_165(128 << 20);
157 timings->ctrla = MICRON_V_ACTIMA_165; 157 timings->ctrla = MICRON_V_ACTIMA_165;
158 timings->ctrlb = MICRON_V_ACTIMB_165; 158 timings->ctrlb = MICRON_V_ACTIMB_165;
159 timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz; 159 timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz;
160 break; 160 break;
161 } else if (pop_mfr == NAND_MFR_MICRON && pop_id == 0xbc) { 161 } else if (pop_mfr == NAND_MFR_MICRON && pop_id == 0xbc) {
162 /* Beagleboard Rev C5, 256MB DDR */ 162 /* Beagleboard Rev C5, 256MB DDR */
163 timings->mcfg = MICRON_V_MCFG_200(256 << 20); 163 timings->mcfg = MICRON_V_MCFG_200(256 << 20);
164 timings->ctrla = MICRON_V_ACTIMA_200; 164 timings->ctrla = MICRON_V_ACTIMA_200;
165 timings->ctrlb = MICRON_V_ACTIMB_200; 165 timings->ctrlb = MICRON_V_ACTIMB_200;
166 timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_200MHz; 166 timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_200MHz;
167 break; 167 break;
168 } 168 }
169 case REVISION_XM_AB: 169 case REVISION_XM_AB:
170 case REVISION_XM_C: 170 case REVISION_XM_C:
171 if (pop_mfr == 0) { 171 if (pop_mfr == 0) {
172 /* 256MB DDR */ 172 /* 256MB DDR */
173 timings->mcfg = MICRON_V_MCFG_200(256 << 20); 173 timings->mcfg = MICRON_V_MCFG_200(256 << 20);
174 timings->ctrla = MICRON_V_ACTIMA_200; 174 timings->ctrla = MICRON_V_ACTIMA_200;
175 timings->ctrlb = MICRON_V_ACTIMB_200; 175 timings->ctrlb = MICRON_V_ACTIMB_200;
176 timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_200MHz; 176 timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_200MHz;
177 } else { 177 } else {
178 /* 512MB DDR */ 178 /* 512MB DDR */
179 timings->mcfg = NUMONYX_V_MCFG_165(512 << 20); 179 timings->mcfg = NUMONYX_V_MCFG_165(512 << 20);
180 timings->ctrla = NUMONYX_V_ACTIMA_165; 180 timings->ctrla = NUMONYX_V_ACTIMA_165;
181 timings->ctrlb = NUMONYX_V_ACTIMB_165; 181 timings->ctrlb = NUMONYX_V_ACTIMB_165;
182 timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz; 182 timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz;
183 } 183 }
184 break; 184 break;
185 default: 185 default:
186 /* Assume 128MB and Micron/165MHz timings to be safe */ 186 /* Assume 128MB and Micron/165MHz timings to be safe */
187 timings->mcfg = MICRON_V_MCFG_165(128 << 20); 187 timings->mcfg = MICRON_V_MCFG_165(128 << 20);
188 timings->ctrla = MICRON_V_ACTIMA_165; 188 timings->ctrla = MICRON_V_ACTIMA_165;
189 timings->ctrlb = MICRON_V_ACTIMB_165; 189 timings->ctrlb = MICRON_V_ACTIMB_165;
190 timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz; 190 timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz;
191 } 191 }
192 } 192 }
193 #endif 193 #endif
194 194
195 /* 195 /*
196 * Routine: get_expansion_id 196 * Routine: get_expansion_id
197 * Description: This function checks for expansion board by checking I2C 197 * Description: This function checks for expansion board by checking I2C
198 * bus 1 for the availability of an AT24C01B serial EEPROM. 198 * bus 1 for the availability of an AT24C01B serial EEPROM.
199 * returns the device_vendor field from the EEPROM 199 * returns the device_vendor field from the EEPROM
200 */ 200 */
201 static unsigned int get_expansion_id(void) 201 static unsigned int get_expansion_id(void)
202 { 202 {
203 i2c_set_bus_num(EXPANSION_EEPROM_I2C_BUS); 203 i2c_set_bus_num(EXPANSION_EEPROM_I2C_BUS);
204 204
205 /* return BEAGLE_NO_EEPROM if eeprom doesn't respond */ 205 /* return BEAGLE_NO_EEPROM if eeprom doesn't respond */
206 if (i2c_probe(EXPANSION_EEPROM_I2C_ADDRESS) == 1) { 206 if (i2c_probe(EXPANSION_EEPROM_I2C_ADDRESS) == 1) {
207 i2c_set_bus_num(TWL4030_I2C_BUS); 207 i2c_set_bus_num(TWL4030_I2C_BUS);
208 return BEAGLE_NO_EEPROM; 208 return BEAGLE_NO_EEPROM;
209 } 209 }
210 210
211 /* read configuration data */ 211 /* read configuration data */
212 i2c_read(EXPANSION_EEPROM_I2C_ADDRESS, 0, 1, (u8 *)&expansion_config, 212 i2c_read(EXPANSION_EEPROM_I2C_ADDRESS, 0, 1, (u8 *)&expansion_config,
213 sizeof(expansion_config)); 213 sizeof(expansion_config));
214 214
215 /* retry reading configuration data with 16bit addressing */ 215 /* retry reading configuration data with 16bit addressing */
216 if ((expansion_config.device_vendor == 0xFFFFFF00) || 216 if ((expansion_config.device_vendor == 0xFFFFFF00) ||
217 (expansion_config.device_vendor == 0xFFFFFFFF)) { 217 (expansion_config.device_vendor == 0xFFFFFFFF)) {
218 printf("EEPROM is blank or 8bit addressing failed: retrying with 16bit:\n"); 218 printf("EEPROM is blank or 8bit addressing failed: retrying with 16bit:\n");
219 i2c_read(EXPANSION_EEPROM_I2C_ADDRESS, 0, 2, (u8 *)&expansion_config, 219 i2c_read(EXPANSION_EEPROM_I2C_ADDRESS, 0, 2, (u8 *)&expansion_config,
220 sizeof(expansion_config)); 220 sizeof(expansion_config));
221 } 221 }
222 222
223 i2c_set_bus_num(TWL4030_I2C_BUS); 223 i2c_set_bus_num(TWL4030_I2C_BUS);
224 224
225 return expansion_config.device_vendor; 225 return expansion_config.device_vendor;
226 } 226 }
227 227
228 #ifdef CONFIG_VIDEO_OMAP3 228 #ifdef CONFIG_VIDEO_OMAP3
229 /* 229 /*
230 * Configure DSS to display background color on DVID 230 * Configure DSS to display background color on DVID
231 * Configure VENC to display color bar on S-Video 231 * Configure VENC to display color bar on S-Video
232 */ 232 */
233 static void beagle_display_init(void) 233 static void beagle_display_init(void)
234 { 234 {
235 omap3_dss_venc_config(&venc_config_std_tv, VENC_HEIGHT, VENC_WIDTH); 235 omap3_dss_venc_config(&venc_config_std_tv, VENC_HEIGHT, VENC_WIDTH);
236 switch (get_board_revision()) { 236 switch (get_board_revision()) {
237 case REVISION_AXBX: 237 case REVISION_AXBX:
238 case REVISION_CX: 238 case REVISION_CX:
239 case REVISION_C4: 239 case REVISION_C4:
240 omap3_dss_panel_config(&dvid_cfg); 240 omap3_dss_panel_config(&dvid_cfg);
241 break; 241 break;
242 case REVISION_XM_AB: 242 case REVISION_XM_AB:
243 case REVISION_XM_C: 243 case REVISION_XM_C:
244 default: 244 default:
245 omap3_dss_panel_config(&dvid_cfg_xm); 245 omap3_dss_panel_config(&dvid_cfg_xm);
246 break; 246 break;
247 } 247 }
248 } 248 }
249 249
250 /* 250 /*
251 * Enable DVI power 251 * Enable DVI power
252 */ 252 */
253 static void beagle_dvi_pup(void) 253 static void beagle_dvi_pup(void)
254 { 254 {
255 uchar val; 255 uchar val;
256 256
257 switch (get_board_revision()) { 257 switch (get_board_revision()) {
258 case REVISION_AXBX: 258 case REVISION_AXBX:
259 case REVISION_CX: 259 case REVISION_CX:
260 case REVISION_C4: 260 case REVISION_C4:
261 gpio_request(170, ""); 261 gpio_request(170, "");
262 gpio_direction_output(170, 0); 262 gpio_direction_output(170, 0);
263 gpio_set_value(170, 1); 263 gpio_set_value(170, 1);
264 break; 264 break;
265 case REVISION_XM_AB: 265 case REVISION_XM_AB:
266 case REVISION_XM_C: 266 case REVISION_XM_C:
267 default: 267 default:
268 #define GPIODATADIR1 (TWL4030_BASEADD_GPIO+3) 268 #define GPIODATADIR1 (TWL4030_BASEADD_GPIO+3)
269 #define GPIODATAOUT1 (TWL4030_BASEADD_GPIO+6) 269 #define GPIODATAOUT1 (TWL4030_BASEADD_GPIO+6)
270 270
271 i2c_read(TWL4030_CHIP_GPIO, GPIODATADIR1, 1, &val, 1); 271 i2c_read(TWL4030_CHIP_GPIO, GPIODATADIR1, 1, &val, 1);
272 val |= 4; 272 val |= 4;
273 i2c_write(TWL4030_CHIP_GPIO, GPIODATADIR1, 1, &val, 1); 273 i2c_write(TWL4030_CHIP_GPIO, GPIODATADIR1, 1, &val, 1);
274 274
275 i2c_read(TWL4030_CHIP_GPIO, GPIODATAOUT1, 1, &val, 1); 275 i2c_read(TWL4030_CHIP_GPIO, GPIODATAOUT1, 1, &val, 1);
276 val |= 4; 276 val |= 4;
277 i2c_write(TWL4030_CHIP_GPIO, GPIODATAOUT1, 1, &val, 1); 277 i2c_write(TWL4030_CHIP_GPIO, GPIODATAOUT1, 1, &val, 1);
278 break; 278 break;
279 } 279 }
280 } 280 }
281 #endif 281 #endif
282 282
283 #ifdef CONFIG_USB_MUSB_OMAP2PLUS 283 #ifdef CONFIG_USB_MUSB_OMAP2PLUS
284 static struct musb_hdrc_config musb_config = { 284 static struct musb_hdrc_config musb_config = {
285 .multipoint = 1, 285 .multipoint = 1,
286 .dyn_fifo = 1, 286 .dyn_fifo = 1,
287 .num_eps = 16, 287 .num_eps = 16,
288 .ram_bits = 12, 288 .ram_bits = 12,
289 }; 289 };
290 290
291 static struct omap_musb_board_data musb_board_data = { 291 static struct omap_musb_board_data musb_board_data = {
292 .interface_type = MUSB_INTERFACE_ULPI, 292 .interface_type = MUSB_INTERFACE_ULPI,
293 }; 293 };
294 294
295 static struct musb_hdrc_platform_data musb_plat = { 295 static struct musb_hdrc_platform_data musb_plat = {
296 #if defined(CONFIG_MUSB_HOST) 296 #if defined(CONFIG_MUSB_HOST)
297 .mode = MUSB_HOST, 297 .mode = MUSB_HOST,
298 #elif defined(CONFIG_MUSB_GADGET) 298 #elif defined(CONFIG_MUSB_GADGET)
299 .mode = MUSB_PERIPHERAL, 299 .mode = MUSB_PERIPHERAL,
300 #else 300 #else
301 #error "Please define either CONFIG_MUSB_HOST or CONFIG_MUSB_GADGET" 301 #error "Please define either CONFIG_MUSB_HOST or CONFIG_MUSB_GADGET"
302 #endif 302 #endif
303 .config = &musb_config, 303 .config = &musb_config,
304 .power = 100, 304 .power = 100,
305 .platform_ops = &omap2430_ops, 305 .platform_ops = &omap2430_ops,
306 .board_data = &musb_board_data, 306 .board_data = &musb_board_data,
307 }; 307 };
308 #endif 308 #endif
309 309
310 /* 310 /*
311 * Routine: misc_init_r 311 * Routine: misc_init_r
312 * Description: Configure board specific parts 312 * Description: Configure board specific parts
313 */ 313 */
314 int misc_init_r(void) 314 int misc_init_r(void)
315 { 315 {
316 struct gpio *gpio5_base = (struct gpio *)OMAP34XX_GPIO5_BASE; 316 struct gpio *gpio5_base = (struct gpio *)OMAP34XX_GPIO5_BASE;
317 struct gpio *gpio6_base = (struct gpio *)OMAP34XX_GPIO6_BASE; 317 struct gpio *gpio6_base = (struct gpio *)OMAP34XX_GPIO6_BASE;
318 struct control_prog_io *prog_io_base = (struct control_prog_io *)OMAP34XX_CTRL_BASE; 318 struct control_prog_io *prog_io_base = (struct control_prog_io *)OMAP34XX_CTRL_BASE;
319 bool generate_fake_mac = false; 319 bool generate_fake_mac = false;
320 u32 value;
320 321
321 /* Enable i2c2 pullup resisters */ 322 /* Enable i2c2 pullup resisters */
322 writel(~(PRG_I2C2_PULLUPRESX), &prog_io_base->io1); 323 value = readl(&prog_io_base->io1);
324 value &= ~(PRG_I2C2_PULLUPRESX);
325 writel(value, &prog_io_base->io1);
323 326
324 switch (get_board_revision()) { 327 switch (get_board_revision()) {
325 case REVISION_AXBX: 328 case REVISION_AXBX:
326 printf("Beagle Rev Ax/Bx\n"); 329 printf("Beagle Rev Ax/Bx\n");
327 setenv("beaglerev", "AxBx"); 330 setenv("beaglerev", "AxBx");
328 break; 331 break;
329 case REVISION_CX: 332 case REVISION_CX:
330 printf("Beagle Rev C1/C2/C3\n"); 333 printf("Beagle Rev C1/C2/C3\n");
331 setenv("beaglerev", "Cx"); 334 setenv("beaglerev", "Cx");
332 MUX_BEAGLE_C(); 335 MUX_BEAGLE_C();
333 break; 336 break;
334 case REVISION_C4: 337 case REVISION_C4:
335 printf("Beagle Rev C4\n"); 338 printf("Beagle Rev C4\n");
336 setenv("beaglerev", "C4"); 339 setenv("beaglerev", "C4");
337 MUX_BEAGLE_C(); 340 MUX_BEAGLE_C();
338 /* Set VAUX2 to 1.8V for EHCI PHY */ 341 /* Set VAUX2 to 1.8V for EHCI PHY */
339 twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VAUX2_DEDICATED, 342 twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VAUX2_DEDICATED,
340 TWL4030_PM_RECEIVER_VAUX2_VSEL_18, 343 TWL4030_PM_RECEIVER_VAUX2_VSEL_18,
341 TWL4030_PM_RECEIVER_VAUX2_DEV_GRP, 344 TWL4030_PM_RECEIVER_VAUX2_DEV_GRP,
342 TWL4030_PM_RECEIVER_DEV_GRP_P1); 345 TWL4030_PM_RECEIVER_DEV_GRP_P1);
343 break; 346 break;
344 case REVISION_XM_AB: 347 case REVISION_XM_AB:
345 printf("Beagle xM Rev A/B\n"); 348 printf("Beagle xM Rev A/B\n");
346 setenv("beaglerev", "xMAB"); 349 setenv("beaglerev", "xMAB");
347 MUX_BEAGLE_XM(); 350 MUX_BEAGLE_XM();
348 /* Set VAUX2 to 1.8V for EHCI PHY */ 351 /* Set VAUX2 to 1.8V for EHCI PHY */
349 twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VAUX2_DEDICATED, 352 twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VAUX2_DEDICATED,
350 TWL4030_PM_RECEIVER_VAUX2_VSEL_18, 353 TWL4030_PM_RECEIVER_VAUX2_VSEL_18,
351 TWL4030_PM_RECEIVER_VAUX2_DEV_GRP, 354 TWL4030_PM_RECEIVER_VAUX2_DEV_GRP,
352 TWL4030_PM_RECEIVER_DEV_GRP_P1); 355 TWL4030_PM_RECEIVER_DEV_GRP_P1);
353 generate_fake_mac = true; 356 generate_fake_mac = true;
354 break; 357 break;
355 case REVISION_XM_C: 358 case REVISION_XM_C:
356 printf("Beagle xM Rev C\n"); 359 printf("Beagle xM Rev C\n");
357 setenv("beaglerev", "xMC"); 360 setenv("beaglerev", "xMC");
358 MUX_BEAGLE_XM(); 361 MUX_BEAGLE_XM();
359 /* Set VAUX2 to 1.8V for EHCI PHY */ 362 /* Set VAUX2 to 1.8V for EHCI PHY */
360 twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VAUX2_DEDICATED, 363 twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VAUX2_DEDICATED,
361 TWL4030_PM_RECEIVER_VAUX2_VSEL_18, 364 TWL4030_PM_RECEIVER_VAUX2_VSEL_18,
362 TWL4030_PM_RECEIVER_VAUX2_DEV_GRP, 365 TWL4030_PM_RECEIVER_VAUX2_DEV_GRP,
363 TWL4030_PM_RECEIVER_DEV_GRP_P1); 366 TWL4030_PM_RECEIVER_DEV_GRP_P1);
364 generate_fake_mac = true; 367 generate_fake_mac = true;
365 break; 368 break;
366 default: 369 default:
367 printf("Beagle unknown 0x%02x\n", get_board_revision()); 370 printf("Beagle unknown 0x%02x\n", get_board_revision());
368 MUX_BEAGLE_XM(); 371 MUX_BEAGLE_XM();
369 /* Set VAUX2 to 1.8V for EHCI PHY */ 372 /* Set VAUX2 to 1.8V for EHCI PHY */
370 twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VAUX2_DEDICATED, 373 twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VAUX2_DEDICATED,
371 TWL4030_PM_RECEIVER_VAUX2_VSEL_18, 374 TWL4030_PM_RECEIVER_VAUX2_VSEL_18,
372 TWL4030_PM_RECEIVER_VAUX2_DEV_GRP, 375 TWL4030_PM_RECEIVER_VAUX2_DEV_GRP,
373 TWL4030_PM_RECEIVER_DEV_GRP_P1); 376 TWL4030_PM_RECEIVER_DEV_GRP_P1);
374 generate_fake_mac = true; 377 generate_fake_mac = true;
375 } 378 }
376 379
377 switch (get_expansion_id()) { 380 switch (get_expansion_id()) {
378 case TINCANTOOLS_ZIPPY: 381 case TINCANTOOLS_ZIPPY:
379 printf("Recognized Tincantools Zippy board (rev %d %s)\n", 382 printf("Recognized Tincantools Zippy board (rev %d %s)\n",
380 expansion_config.revision, 383 expansion_config.revision,
381 expansion_config.fab_revision); 384 expansion_config.fab_revision);
382 MUX_TINCANTOOLS_ZIPPY(); 385 MUX_TINCANTOOLS_ZIPPY();
383 setenv("buddy", "zippy"); 386 setenv("buddy", "zippy");
384 break; 387 break;
385 case TINCANTOOLS_ZIPPY2: 388 case TINCANTOOLS_ZIPPY2:
386 printf("Recognized Tincantools Zippy2 board (rev %d %s)\n", 389 printf("Recognized Tincantools Zippy2 board (rev %d %s)\n",
387 expansion_config.revision, 390 expansion_config.revision,
388 expansion_config.fab_revision); 391 expansion_config.fab_revision);
389 MUX_TINCANTOOLS_ZIPPY(); 392 MUX_TINCANTOOLS_ZIPPY();
390 setenv("buddy", "zippy2"); 393 setenv("buddy", "zippy2");
391 break; 394 break;
392 case TINCANTOOLS_TRAINER: 395 case TINCANTOOLS_TRAINER:
393 printf("Recognized Tincantools Trainer board (rev %d %s)\n", 396 printf("Recognized Tincantools Trainer board (rev %d %s)\n",
394 expansion_config.revision, 397 expansion_config.revision,
395 expansion_config.fab_revision); 398 expansion_config.fab_revision);
396 MUX_TINCANTOOLS_ZIPPY(); 399 MUX_TINCANTOOLS_ZIPPY();
397 MUX_TINCANTOOLS_TRAINER(); 400 MUX_TINCANTOOLS_TRAINER();
398 setenv("buddy", "trainer"); 401 setenv("buddy", "trainer");
399 break; 402 break;
400 case TINCANTOOLS_SHOWDOG: 403 case TINCANTOOLS_SHOWDOG:
401 printf("Recognized Tincantools Showdow board (rev %d %s)\n", 404 printf("Recognized Tincantools Showdow board (rev %d %s)\n",
402 expansion_config.revision, 405 expansion_config.revision,
403 expansion_config.fab_revision); 406 expansion_config.fab_revision);
404 /* Place holder for DSS2 definition for showdog lcd */ 407 /* Place holder for DSS2 definition for showdog lcd */
405 setenv("defaultdisplay", "showdoglcd"); 408 setenv("defaultdisplay", "showdoglcd");
406 setenv("buddy", "showdog"); 409 setenv("buddy", "showdog");
407 break; 410 break;
408 case KBADC_BEAGLEFPGA: 411 case KBADC_BEAGLEFPGA:
409 printf("Recognized KBADC Beagle FPGA board\n"); 412 printf("Recognized KBADC Beagle FPGA board\n");
410 MUX_KBADC_BEAGLEFPGA(); 413 MUX_KBADC_BEAGLEFPGA();
411 setenv("buddy", "beaglefpga"); 414 setenv("buddy", "beaglefpga");
412 break; 415 break;
413 case LW_BEAGLETOUCH: 416 case LW_BEAGLETOUCH:
414 printf("Recognized Liquidware BeagleTouch board\n"); 417 printf("Recognized Liquidware BeagleTouch board\n");
415 setenv("buddy", "beagletouch"); 418 setenv("buddy", "beagletouch");
416 break; 419 break;
417 case BRAINMUX_LCDOG: 420 case BRAINMUX_LCDOG:
418 printf("Recognized Brainmux LCDog board\n"); 421 printf("Recognized Brainmux LCDog board\n");
419 setenv("buddy", "lcdog"); 422 setenv("buddy", "lcdog");
420 break; 423 break;
421 case BRAINMUX_LCDOGTOUCH: 424 case BRAINMUX_LCDOGTOUCH:
422 printf("Recognized Brainmux LCDog Touch board\n"); 425 printf("Recognized Brainmux LCDog Touch board\n");
423 setenv("buddy", "lcdogtouch"); 426 setenv("buddy", "lcdogtouch");
424 break; 427 break;
425 case BBTOYS_WIFI: 428 case BBTOYS_WIFI:
426 printf("Recognized BeagleBoardToys WiFi board\n"); 429 printf("Recognized BeagleBoardToys WiFi board\n");
427 MUX_BBTOYS_WIFI() 430 MUX_BBTOYS_WIFI()
428 setenv("buddy", "bbtoys-wifi"); 431 setenv("buddy", "bbtoys-wifi");
429 break;; 432 break;;
430 case BBTOYS_VGA: 433 case BBTOYS_VGA:
431 printf("Recognized BeagleBoardToys VGA board\n"); 434 printf("Recognized BeagleBoardToys VGA board\n");
432 break;; 435 break;;
433 case BBTOYS_LCD: 436 case BBTOYS_LCD:
434 printf("Recognized BeagleBoardToys LCD board\n"); 437 printf("Recognized BeagleBoardToys LCD board\n");
435 break;; 438 break;;
436 case BCT_BRETTL3: 439 case BCT_BRETTL3:
437 printf("Recognized bct electronic GmbH brettl3 board\n"); 440 printf("Recognized bct electronic GmbH brettl3 board\n");
438 break; 441 break;
439 case BCT_BRETTL4: 442 case BCT_BRETTL4:
440 printf("Recognized bct electronic GmbH brettl4 board\n"); 443 printf("Recognized bct electronic GmbH brettl4 board\n");
441 break; 444 break;
442 case LSR_COM6L_ADPT: 445 case LSR_COM6L_ADPT:
443 printf("Recognized LSR COM6L Adapter Board\n"); 446 printf("Recognized LSR COM6L Adapter Board\n");
444 MUX_BBTOYS_WIFI() 447 MUX_BBTOYS_WIFI()
445 setenv("buddy", "lsr-com6l-adpt"); 448 setenv("buddy", "lsr-com6l-adpt");
446 break; 449 break;
447 case BEAGLE_NO_EEPROM: 450 case BEAGLE_NO_EEPROM:
448 printf("No EEPROM on expansion board\n"); 451 printf("No EEPROM on expansion board\n");
449 setenv("buddy", "none"); 452 setenv("buddy", "none");
450 break; 453 break;
451 default: 454 default:
452 printf("Unrecognized expansion board: %x\n", 455 printf("Unrecognized expansion board: %x\n",
453 expansion_config.device_vendor); 456 expansion_config.device_vendor);
454 setenv("buddy", "unknown"); 457 setenv("buddy", "unknown");
455 } 458 }
456 459
457 if (expansion_config.content == 1) 460 if (expansion_config.content == 1)
458 setenv(expansion_config.env_var, expansion_config.env_setting); 461 setenv(expansion_config.env_var, expansion_config.env_setting);
459 462
460 twl4030_power_init(); 463 twl4030_power_init();
461 switch (get_board_revision()) { 464 switch (get_board_revision()) {
462 case REVISION_XM_AB: 465 case REVISION_XM_AB:
463 twl4030_led_init(TWL4030_LED_LEDEN_LEDBON); 466 twl4030_led_init(TWL4030_LED_LEDEN_LEDBON);
464 break; 467 break;
465 default: 468 default:
466 twl4030_led_init(TWL4030_LED_LEDEN_LEDAON | TWL4030_LED_LEDEN_LEDBON); 469 twl4030_led_init(TWL4030_LED_LEDEN_LEDAON | TWL4030_LED_LEDEN_LEDBON);
467 break; 470 break;
468 } 471 }
469 472
470 /* Set GPIO states before they are made outputs */ 473 /* Set GPIO states before they are made outputs */
471 writel(GPIO23 | GPIO10 | GPIO8 | GPIO2 | GPIO1, 474 writel(GPIO23 | GPIO10 | GPIO8 | GPIO2 | GPIO1,
472 &gpio6_base->setdataout); 475 &gpio6_base->setdataout);
473 writel(GPIO31 | GPIO30 | GPIO29 | GPIO28 | GPIO22 | GPIO21 | 476 writel(GPIO31 | GPIO30 | GPIO29 | GPIO28 | GPIO22 | GPIO21 |
474 GPIO15 | GPIO14 | GPIO13 | GPIO12, &gpio5_base->setdataout); 477 GPIO15 | GPIO14 | GPIO13 | GPIO12, &gpio5_base->setdataout);
475 478
476 /* Configure GPIOs to output */ 479 /* Configure GPIOs to output */
477 writel(~(GPIO23 | GPIO10 | GPIO8 | GPIO2 | GPIO1), &gpio6_base->oe); 480 writel(~(GPIO23 | GPIO10 | GPIO8 | GPIO2 | GPIO1), &gpio6_base->oe);
478 writel(~(GPIO31 | GPIO30 | GPIO29 | GPIO28 | GPIO22 | GPIO21 | 481 writel(~(GPIO31 | GPIO30 | GPIO29 | GPIO28 | GPIO22 | GPIO21 |
479 GPIO15 | GPIO14 | GPIO13 | GPIO12), &gpio5_base->oe); 482 GPIO15 | GPIO14 | GPIO13 | GPIO12), &gpio5_base->oe);
480 483
481 dieid_num_r(); 484 dieid_num_r();
482 485
483 #ifdef CONFIG_VIDEO_OMAP3 486 #ifdef CONFIG_VIDEO_OMAP3
484 beagle_dvi_pup(); 487 beagle_dvi_pup();
485 beagle_display_init(); 488 beagle_display_init();
486 omap3_dss_enable(); 489 omap3_dss_enable();
487 #endif 490 #endif
488 491
489 #ifdef CONFIG_USB_MUSB_OMAP2PLUS 492 #ifdef CONFIG_USB_MUSB_OMAP2PLUS
490 musb_register(&musb_plat, &musb_board_data, (void *)MUSB_BASE); 493 musb_register(&musb_plat, &musb_board_data, (void *)MUSB_BASE);
491 #endif 494 #endif
492 495
493 if (generate_fake_mac) { 496 if (generate_fake_mac) {
494 u32 id[4]; 497 u32 id[4];
495 498
496 get_dieid(id); 499 get_dieid(id);
497 usb_fake_mac_from_die_id(id); 500 usb_fake_mac_from_die_id(id);
498 } 501 }
499 502
500 return 0; 503 return 0;
501 } 504 }
502 505
503 /* 506 /*
504 * Routine: set_muxconf_regs 507 * Routine: set_muxconf_regs
505 * Description: Setting up the configuration Mux registers specific to the 508 * Description: Setting up the configuration Mux registers specific to the
506 * hardware. Many pins need to be moved from protect to primary 509 * hardware. Many pins need to be moved from protect to primary
507 * mode. 510 * mode.
508 */ 511 */
509 void set_muxconf_regs(void) 512 void set_muxconf_regs(void)
510 { 513 {
511 MUX_BEAGLE(); 514 MUX_BEAGLE();
512 } 515 }
513 516
514 #if defined(CONFIG_GENERIC_MMC) && !defined(CONFIG_SPL_BUILD) 517 #if defined(CONFIG_GENERIC_MMC) && !defined(CONFIG_SPL_BUILD)
515 int board_mmc_init(bd_t *bis) 518 int board_mmc_init(bd_t *bis)
516 { 519 {
517 return omap_mmc_init(0, 0, 0, -1, -1); 520 return omap_mmc_init(0, 0, 0, -1, -1);
518 } 521 }
519 #endif 522 #endif
520 523
521 #if defined(CONFIG_USB_EHCI) && !defined(CONFIG_SPL_BUILD) 524 #if defined(CONFIG_USB_EHCI) && !defined(CONFIG_SPL_BUILD)
522 /* Call usb_stop() before starting the kernel */ 525 /* Call usb_stop() before starting the kernel */
523 void show_boot_progress(int val) 526 void show_boot_progress(int val)
524 { 527 {
525 if (val == BOOTSTAGE_ID_RUN_OS) 528 if (val == BOOTSTAGE_ID_RUN_OS)
526 usb_stop(); 529 usb_stop();
527 } 530 }
528 531
529 static struct omap_usbhs_board_data usbhs_bdata = { 532 static struct omap_usbhs_board_data usbhs_bdata = {
530 .port_mode[0] = OMAP_EHCI_PORT_MODE_PHY, 533 .port_mode[0] = OMAP_EHCI_PORT_MODE_PHY,
531 .port_mode[1] = OMAP_EHCI_PORT_MODE_PHY, 534 .port_mode[1] = OMAP_EHCI_PORT_MODE_PHY,
532 .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED 535 .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED
533 }; 536 };
534 537
535 int ehci_hcd_init(int index, enum usb_init_type init, 538 int ehci_hcd_init(int index, enum usb_init_type init,
536 struct ehci_hccr **hccr, struct ehci_hcor **hcor) 539 struct ehci_hccr **hccr, struct ehci_hcor **hcor)
537 { 540 {
538 return omap_ehci_hcd_init(index, &usbhs_bdata, hccr, hcor); 541 return omap_ehci_hcd_init(index, &usbhs_bdata, hccr, hcor);
539 } 542 }
540 543
541 int ehci_hcd_stop(int index) 544 int ehci_hcd_stop(int index)
542 { 545 {
543 return omap_ehci_hcd_stop(); 546 return omap_ehci_hcd_stop();
544 } 547 }
545 548
546 #endif /* CONFIG_USB_EHCI */ 549 #endif /* CONFIG_USB_EHCI */
547 550
548 #if defined(CONFIG_USB_ETHER) && defined(CONFIG_MUSB_GADGET) 551 #if defined(CONFIG_USB_ETHER) && defined(CONFIG_MUSB_GADGET)
549 int board_eth_init(bd_t *bis) 552 int board_eth_init(bd_t *bis)
550 { 553 {
551 return usb_eth_initialize(bis); 554 return usb_eth_initialize(bis);
552 } 555 }
553 #endif 556 #endif
554 557