clk: clk_stm32: Add .set_rate callback

Since 'commit f4fcba5c5baa ("clk: implement clk_set_defaults()")' STM32F4 family board can't boot. Above patch calls clk_set_rate() for all nodes with assigned-clock-rates property. Clock driver for STM32F family doesn't implement .set_rate callback which make clk_set_defaults() exit on error and prevent board to boot. Fixes: f4fcba5c5baa ("clk: implement clk_set_defaults()") Signed-off-by: Patrice Chotard <patrice.chotard@st.com>

clk: clk_stm32: Add .set_rate callback
Since 'commit f4fcba5c5baa ("clk: implement clk_set_defaults()")' STM32F4 family board can't boot. Above patch calls clk_set_rate() for all nodes with assigned-clock-rates property. Clock driver for STM32F family doesn't implement .set_rate callback which make clk_set_defaults() exit on error and prevent board to boot. Fixes: f4fcba5c5baa ("clk: implement clk_set_defaults()") Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Patrice Chotard · Tom Rini
1 parent a70c05f10a
Showing 1 changed file with 6 additions and 0 deletions Side-by-side Diff
drivers/clk/clk_stm32f.c
@@ -337,6 +337,11 @@
 	}
 }
  
+static ulong stm32_set_rate(struct clk *clk, ulong rate)
+{
+	return 0;
+}
+
 static int stm32_clk_enable(struct clk *clk)
 {
 	struct stm32_clk *priv = dev_get_priv(clk->dev);
@@ -464,6 +469,7 @@
 	.of_xlate	= stm32_clk_of_xlate,
 	.enable		= stm32_clk_enable,
 	.get_rate	= stm32_clk_get_rate,
+	.set_rate	= stm32_set_rate,
 };
  
 U_BOOT_DRIVER(stm32fx_clk) = {
...	...	@@ -337,6 +337,11 @@
337	337	}
338	338	}
339	339
	340	+static ulong stm32_set_rate(struct clk *clk, ulong rate)
	341	+{
	342	+ return 0;
	343	+}
	344	+
340	345	static int stm32_clk_enable(struct clk *clk)
341	346	{
342	347	struct stm32_clk *priv = dev_get_priv(clk->dev);
...	...	@@ -464,6 +469,7 @@
464	469	.of_xlate = stm32_clk_of_xlate,
465	470	.enable = stm32_clk_enable,
466	471	.get_rate = stm32_clk_get_rate,
	472	+ .set_rate = stm32_set_rate,
467	473	};
468	474
469	475	U_BOOT_DRIVER(stm32fx_clk) = {