Eric Lee / smarc-uboot

Download as
Browse Code ยป

Commit 062c8597d35bc684b86bf791626770c426535e80

Authored by Ye Li
1 parent 50ea462702
Exists in smarc_8mq_lf_v2020.04 and in 4 other branches pitx_8mp_lf_v2020.04, smarc-8m-android-11.0.0_2.0.0, smarc-8mp-android-11.0.0_2.0.0, smarc_8mp_lf_v2020.04

MLK-22192 imx8mn: Add variant parts support 

According to datasheet, there are totally 6 variant parts for imx8mn:
Quad, Dual, Solo with core number changed.
QuadLite, DualLite, SoloLite with core number changed and GPU disabled.

Add the support for these variant parts
1. Recognize the variant parts according to fuse
2. Power down disabled cores
3. Remove the cores node and disable GPU node from kernel DTB before
   entering kernel.
4. Since the mscale dummy id has been used out, increase one more bit
   (bit 8) for cpu id.

Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
(cherry picked from commit 144bd9ce223ead71e1726bea510242a3166f66ce)
(cherry picked from commit 380370b5460cb3f5284828fe0aabc7cca29c3bcd)

Showing 4 changed files with 65 additions and 7 deletions Side-by-side Diff

arch/arm/include/asm/arch-imx/cpu.h
Diff comments   View file @ 062c859
... ... @@ -35,6 +35,11 @@
35 35 #define MXC_CPU_IMX8MMS 0x89 /* dummy ID */
36 36 #define MXC_CPU_IMX8MMSL 0x8a /* dummy ID */
37 37 #define MXC_CPU_IMX8MN 0x8b /* dummy ID */
  38 +#define MXC_CPU_IMX8MND 0x8c /* dummy ID */
  39 +#define MXC_CPU_IMX8MNS 0x8d /* dummy ID */
  40 +#define MXC_CPU_IMX8MNL 0x8e /* dummy ID */
  41 +#define MXC_CPU_IMX8MNDL 0x8f /* dummy ID */
  42 +#define MXC_CPU_IMX8MNSL 0x181 /* dummy ID */
38 43 #define MXC_CPU_IMX8MP 0x182/* dummy ID */
39 44 #define MXC_CPU_IMX8QXP_A0 0x90 /* dummy ID */
40 45 #define MXC_CPU_IMX8QM 0x91 /* dummy ID */
arch/arm/include/asm/mach-imx/sys_proto.h
Diff comments   View file @ 062c859
... ... @@ -16,7 +16,7 @@
16 16 #define is_soc_rev(rev) (soc_rev() == rev)
17 17  
18 18 /* returns MXC_CPU_ value */
19   -#define cpu_type(rev) (((rev) >> 12) & 0xff)
  19 +#define cpu_type(rev) (((rev) >> 12) & 0x1ff)
20 20 #define soc_type(rev) (((rev) >> 12) & 0xf0)
21 21 /* both macros return/take MXC_CPU_ constants */
22 22 #define get_cpu_type() (cpu_type(get_cpu_rev()))
23 23  
... ... @@ -55,9 +55,15 @@
55 55 #define is_imx8mmdl() (is_cpu_type(MXC_CPU_IMX8MMDL))
56 56 #define is_imx8mms() (is_cpu_type(MXC_CPU_IMX8MMS))
57 57 #define is_imx8mmsl() (is_cpu_type(MXC_CPU_IMX8MMSL))
58   -#define is_imx8mn() (is_cpu_type(MXC_CPU_IMX8MN))
  58 +#define is_imx8mn() (is_cpu_type(MXC_CPU_IMX8MN) || is_cpu_type(MXC_CPU_IMX8MND) || \
  59 + is_cpu_type(MXC_CPU_IMX8MNS) || is_cpu_type(MXC_CPU_IMX8MNL) || \
  60 + is_cpu_type(MXC_CPU_IMX8MNDL) || is_cpu_type(MXC_CPU_IMX8MNSL))
  61 +#define is_imx8mnd() (is_cpu_type(MXC_CPU_IMX8MND))
  62 +#define is_imx8mns() (is_cpu_type(MXC_CPU_IMX8MNS))
  63 +#define is_imx8mnl() (is_cpu_type(MXC_CPU_IMX8MNL))
  64 +#define is_imx8mndl() (is_cpu_type(MXC_CPU_IMX8MNDL))
  65 +#define is_imx8mnsl() (is_cpu_type(MXC_CPU_IMX8MNSL))
59 66 #define is_imx8mp() (is_cpu_type(MXC_CPU_IMX8MP))
60   -
61 67 #define is_imx8qxp() (is_cpu_type(MXC_CPU_IMX8QXP))
62 68  
63 69 /* gd->flags reserves high 16 bits for arch-specific flags */
arch/arm/mach-imx/cpu.c
Diff comments   View file @ 062c859
... ... @@ -113,7 +113,17 @@
113 113 case MXC_CPU_IMX8MP:
114 114 return "8MP"; /* Quad-core version of the imx8mp */
115 115 case MXC_CPU_IMX8MN:
116   - return "8MNano";/* Quad-core version of the imx8mn */
  116 + return "8MNano Quad";/* Quad-core version of the imx8mn */
  117 + case MXC_CPU_IMX8MND:
  118 + return "8MNano Dual";/* Dual-core version of the imx8mn */
  119 + case MXC_CPU_IMX8MNS:
  120 + return "8MNano Solo";/* Single-core version of the imx8mn */
  121 + case MXC_CPU_IMX8MNL:
  122 + return "8MNano QuadLite";/* Quad-core Lite version of the imx8mn */
  123 + case MXC_CPU_IMX8MNDL:
  124 + return "8MNano DualLite";/* Dual-core Lite version of the imx8mn */
  125 + case MXC_CPU_IMX8MNSL:
  126 + return "8MNano SoloLite";/* Single-core Lite version of the imx8mn */
117 127 case MXC_CPU_IMX8MM:
118 128 return "8MMQ"; /* Quad-core version of the imx8mm */
119 129 case MXC_CPU_IMX8MML:
arch/arm/mach-imx/imx8m/soc.c
Diff comments   View file @ 062c859
... ... @@ -202,6 +202,23 @@
202 202 return MXC_CPU_IMX8MML;
203 203 break;
204 204 }
  205 + } else if (type == MXC_CPU_IMX8MN) {
  206 + switch (value & 0x3) {
  207 + case 2:
  208 + if (value & 0x1000000)
  209 + return MXC_CPU_IMX8MNDL;
  210 + else
  211 + return MXC_CPU_IMX8MND;
  212 + case 3:
  213 + if (value & 0x1000000)
  214 + return MXC_CPU_IMX8MNSL;
  215 + else
  216 + return MXC_CPU_IMX8MNS;
  217 + default:
  218 + if (value & 0x1000000)
  219 + return MXC_CPU_IMX8MNL;
  220 + break;
  221 + }
205 222 }
206 223  
207 224 return type;
... ... @@ -222,7 +239,7 @@
222 239 return (MXC_CPU_IMX8MP << 12) | reg;
223 240 } else if (major_low == 0x42) {
224 241 /* iMX8MN */
225   - return (MXC_CPU_IMX8MN << 12) | reg;
  242 + type = get_cpu_variant_type(MXC_CPU_IMX8MN);
226 243 } else if (major_low == 0x41) {
227 244 type = get_cpu_variant_type(MXC_CPU_IMX8MM);
228 245 } else {
... ... @@ -302,7 +319,8 @@
302 319 clock_init();
303 320 imx_set_wdog_powerdown(false);
304 321  
305   - if (is_imx8md() || is_imx8mmd() || is_imx8mmdl() || is_imx8mms() || is_imx8mmsl()) {
  322 + if (is_imx8md() || is_imx8mmd() || is_imx8mmdl() || is_imx8mms() || is_imx8mmsl() ||
  323 + is_imx8mnd() || is_imx8mndl() || is_imx8mns() || is_imx8mnsl()) {
306 324 /* Power down cpu core 1, 2 and 3 for iMX8M Dual core or Single core */
307 325 struct pgc_reg *pgc_core1 = (struct pgc_reg *)(GPC_BASE_ADDR + 0x840);
308 326 struct pgc_reg *pgc_core2 = (struct pgc_reg *)(GPC_BASE_ADDR + 0x880);
... ... @@ -311,7 +329,7 @@
311 329  
312 330 writel(0x1, &pgc_core2->pgcr);
313 331 writel(0x1, &pgc_core3->pgcr);
314   - if (is_imx8mms() || is_imx8mmsl()) {
  332 + if (is_imx8mms() || is_imx8mmsl() || is_imx8mns() || is_imx8mnsl()) {
315 333 writel(0x1, &pgc_core1->pgcr);
316 334 writel(0xE, &gpc->cpu_pgc_dn_trg);
317 335 } else {
... ... @@ -595,6 +613,15 @@
595 613  
596 614 }
597 615  
  616 +int disable_gpu_nodes(void *blob)
  617 +{
  618 + const char *nodes_path_8mn[] = {
  619 + "/gpu@38000000"
  620 + };
  621 +
  622 + return disable_fdt_nodes(blob, nodes_path_8mn, ARRAY_SIZE(nodes_path_8mn));
  623 +}
  624 +
598 625 static int disable_cpu_nodes(void *blob, u32 disabled_cores)
599 626 {
600 627 const char *nodes_path[] = {
... ... @@ -716,6 +743,16 @@
716 743 disable_cpu_nodes(blob, 2);
717 744 else if (is_imx8mms() || is_imx8mmsl())
718 745 disable_cpu_nodes(blob, 3);
  746 +
  747 +#elif defined(CONFIG_IMX8MN)
  748 + if (is_imx8mnl() || is_imx8mndl() || is_imx8mnsl())
  749 + disable_gpu_nodes(blob);
  750 +
  751 + if (is_imx8mnd() || is_imx8mndl())
  752 + disable_cpu_nodes(blob, 2);
  753 + else if (is_imx8mns() || is_imx8mnsl())
  754 + disable_cpu_nodes(blob, 3);
  755 +
719 756 #endif
720 757  
721 758 return ft_add_optee_node(blob, bd);