Commit 0678587fb6f517d40c461f1d43fe7a6ff430f168
Committed by
Albert ARIBAUD
1 parent
ef123c5253
Exists in
master
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53 other branches
ARM: implement some Cortex-A9 errata workarounds
Various errata exist in the Cortex-A9 CPU, and may be worked around by setting some bits in a CP15 diagnostic register. Add code to implement the workarounds, enabled by new CONFIG_ options. This code was taken from the Linux kernel, v3.8, arch/arm/mm/proc-v7.S, and modified to remove the logic to conditionally apply the WAR (since we know exactly which CPU we're running on given the U-Boot configuration), and use r0 instead of r10 for consistency with the rest of U-Boot's cpu_init_cp15(). Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org>
Showing 2 changed files with 29 additions and 0 deletions Side-by-side Diff
README
... | ... | @@ -485,6 +485,16 @@ |
485 | 485 | Thumb2 this flag will result in Thumb2 code generated by |
486 | 486 | GCC. |
487 | 487 | |
488 | + CONFIG_ARM_ERRATA_742230 | |
489 | + CONFIG_ARM_ERRATA_743622 | |
490 | + CONFIG_ARM_ERRATA_751472 | |
491 | + | |
492 | + If set, the workarounds for these ARM errata are applied early | |
493 | + during U-Boot startup. Note that these options force the | |
494 | + workarounds to be applied; no CPU-type/version detection | |
495 | + exists, unlike the similar options in the Linux kernel. Do not | |
496 | + set these options unless they apply! | |
497 | + | |
488 | 498 | - Linux Kernel Interface: |
489 | 499 | CONFIG_CLOCKS_IN_MHZ |
490 | 500 |
arch/arm/cpu/armv7/start.S
... | ... | @@ -309,6 +309,25 @@ |
309 | 309 | orr r0, r0, #0x00001000 @ set bit 12 (I) I-cache |
310 | 310 | #endif |
311 | 311 | mcr p15, 0, r0, c1, c0, 0 |
312 | + | |
313 | +#ifdef CONFIG_ARM_ERRATA_742230 | |
314 | + mrc p15, 0, r0, c15, c0, 1 @ read diagnostic register | |
315 | + orr r0, r0, #1 << 4 @ set bit #4 | |
316 | + mcr p15, 0, r0, c15, c0, 1 @ write diagnostic register | |
317 | +#endif | |
318 | + | |
319 | +#ifdef CONFIG_ARM_ERRATA_743622 | |
320 | + mrc p15, 0, r0, c15, c0, 1 @ read diagnostic register | |
321 | + orr r0, r0, #1 << 6 @ set bit #6 | |
322 | + mcr p15, 0, r0, c15, c0, 1 @ write diagnostic register | |
323 | +#endif | |
324 | + | |
325 | +#ifdef CONFIG_ARM_ERRATA_751472 | |
326 | + mrc p15, 0, r0, c15, c0, 1 @ read diagnostic register | |
327 | + orr r0, r0, #1 << 11 @ set bit #11 | |
328 | + mcr p15, 0, r0, c15, c0, 1 @ write diagnostic register | |
329 | +#endif | |
330 | + | |
312 | 331 | mov pc, lr @ back to my caller |
313 | 332 | ENDPROC(cpu_init_cp15) |
314 | 333 |