riscv: Modify generic codes to support RISC-V

Support common commands bdinfo and image format, also modify common generic flow for RISC-V. Signed-off-by: Rick Chen <rick@andestech.com> Signed-off-by: Rick Chen <rickchen36@gmail.com> Signed-off-by: Greentime Hu <green.hu@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com>

riscv: Modify generic codes to support RISC-V
Support common commands bdinfo and image format, also modify common generic flow for RISC-V. Signed-off-by: Rick Chen <rick@andestech.com> Signed-off-by: Rick Chen <rickchen36@gmail.com> Signed-off-by: Greentime Hu <green.hu@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com>
Rick Chen · Tom Rini
1 parent c7d7e80acd
Showing 6 changed files with 29 additions and 3 deletions Side-by-side Diff
arch/Kconfig
cmd/bdinfo.c
common/board_f.c
common/board_r.c
include/elf.h
include/image.h
@@ -54,6 +54,10 @@
 	select HAVE_PRIVATE_LIBGCC
 	select SUPPORT_OF_CONTROL
  
+config RISCV
+	bool "riscv architecture"
+	select SUPPORT_OF_CONTROL
+
 config SANDBOX
 	bool "Sandbox"
 	select BOARD_LATE_INIT
@@ -194,4 +198,5 @@
 source "arch/sh/Kconfig"
 source "arch/x86/Kconfig"
 source "arch/xtensa/Kconfig"
+source "arch/riscv/Kconfig"
@@ -417,6 +417,21 @@
 	return 0;
 }
  
+#elif defined(CONFIG_RISCV)
+
+int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+{
+	bd_t *bd = gd->bd;
+
+	print_num("arch_number", bd->bi_arch_number);
+	print_bi_boot_params(bd);
+	print_bi_dram(bd);
+	print_eth_ip_addr();
+	print_baudrate();
+
+	return 0;
+}
+
 #elif defined(CONFIG_ARC)
  
 int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
@@ -218,7 +218,7 @@
 	gd->mon_len = (ulong)&_end - (ulong)_init;
 #elif defined(CONFIG_NIOS2) || defined(CONFIG_XTENSA)
 	gd->mon_len = CONFIG_SYS_MONITOR_LEN;
-#elif defined(CONFIG_NDS32) || defined(CONFIG_SH)
+#elif defined(CONFIG_NDS32) || defined(CONFIG_SH) || defined(CONFIG_RISCV)
 	gd->mon_len = (ulong)(&__bss_end) - (ulong)(&_start);
 #elif defined(CONFIG_SYS_MONITOR_BASE)
 	/* TODO: use (ulong)&__bss_end - (ulong)&__text_start; ? */
@@ -126,7 +126,7 @@
 {
 #ifdef __ARM__
 	monitor_flash_len = _end - __image_copy_start;
-#elif defined(CONFIG_NDS32)
+#elif defined(CONFIG_NDS32) || defined(CONFIG_RISCV)
 	monitor_flash_len = (ulong)&_end - (ulong)&_start;
 #elif !defined(CONFIG_SANDBOX) && !defined(CONFIG_NIOS2)
 	monitor_flash_len = (ulong)&__init_end - gd->relocaddr;
@@ -704,7 +704,7 @@
 #ifdef CONFIG_DM
 	initr_dm,
 #endif
-#if defined(CONFIG_ARM) || defined(CONFIG_NDS32)
+#if defined(CONFIG_ARM) || defined(CONFIG_NDS32) || defined(CONFIG_RISCV)
 	board_init,	/* Setup chipselects */
 #endif
 	/*
@@ -613,6 +613,11 @@
 #define R_AARCH64_NONE		0	/* No relocation.  */
 #define R_AARCH64_RELATIVE	1027	/* Adjust by program base.  */
  
+/* RISC-V relocations */
+#define R_RISCV_32		1
+#define R_RISCV_64		2
+#define R_RISCV_RELATIVE	3
+
 #ifndef __ASSEMBLER__
 int valid_elf_image(unsigned long addr);
 #endif
@@ -190,6 +190,7 @@
 	IH_ARCH_ARC,			/* Synopsys DesignWare ARC */
 	IH_ARCH_X86_64,			/* AMD x86_64, Intel and Via */
 	IH_ARCH_XTENSA,			/* Xtensa	*/
+	IH_ARCH_RISCV,			/* RISC-V */
  
 	IH_ARCH_COUNT,
 };
...	...	@@ -54,6 +54,10 @@
54	54	select HAVE_PRIVATE_LIBGCC
55	55	select SUPPORT_OF_CONTROL
56	56
	57	+config RISCV
	58	+ bool "riscv architecture"
	59	+ select SUPPORT_OF_CONTROL
	60	+
57	61	config SANDBOX
58	62	bool "Sandbox"
59	63	select BOARD_LATE_INIT
...	...	@@ -194,4 +198,5 @@
194	198	source "arch/sh/Kconfig"
195	199	source "arch/x86/Kconfig"
196	200	source "arch/xtensa/Kconfig"
	201	+source "arch/riscv/Kconfig"
...	...	@@ -417,6 +417,21 @@
417	417	return 0;
418	418	}
419	419
	420	+#elif defined(CONFIG_RISCV)
	421	+
	422	+int do_bdinfo(cmd_tbl_t cmdtp, int flag, int argc, char const argv[])
	423	+{
	424	+ bd_t *bd = gd->bd;
	425	+
	426	+ print_num("arch_number", bd->bi_arch_number);
	427	+ print_bi_boot_params(bd);
	428	+ print_bi_dram(bd);
	429	+ print_eth_ip_addr();
	430	+ print_baudrate();
	431	+
	432	+ return 0;
	433	+}
	434	+
420	435	#elif defined(CONFIG_ARC)
421	436
422	437	int do_bdinfo(cmd_tbl_t cmdtp, int flag, int argc, char const argv[])
...	...	@@ -218,7 +218,7 @@
218	218	gd->mon_len = (ulong)&_end - (ulong)_init;
219	219	#elif defined(CONFIG_NIOS2) \|\| defined(CONFIG_XTENSA)
220	220	gd->mon_len = CONFIG_SYS_MONITOR_LEN;
221		-#elif defined(CONFIG_NDS32) \|\| defined(CONFIG_SH)
	221	+#elif defined(CONFIG_NDS32) \|\| defined(CONFIG_SH) \|\| defined(CONFIG_RISCV)
222	222	gd->mon_len = (ulong)(&__bss_end) - (ulong)(&_start);
223	223	#elif defined(CONFIG_SYS_MONITOR_BASE)
224	224	/* TODO: use (ulong)&__bss_end - (ulong)&__text_start; ? */
...	...	@@ -126,7 +126,7 @@
126	126	{
127	127	#ifdef __ARM__
128	128	monitor_flash_len = _end - __image_copy_start;
129		-#elif defined(CONFIG_NDS32)
	129	+#elif defined(CONFIG_NDS32) \|\| defined(CONFIG_RISCV)
130	130	monitor_flash_len = (ulong)&_end - (ulong)&_start;
131	131	#elif !defined(CONFIG_SANDBOX) && !defined(CONFIG_NIOS2)
132	132	monitor_flash_len = (ulong)&__init_end - gd->relocaddr;
...	...	@@ -704,7 +704,7 @@
704	704	#ifdef CONFIG_DM
705	705	initr_dm,
706	706	#endif
707		-#if defined(CONFIG_ARM) \|\| defined(CONFIG_NDS32)
	707	+#if defined(CONFIG_ARM) \|\| defined(CONFIG_NDS32) \|\| defined(CONFIG_RISCV)
708	708	board_init, /* Setup chipselects */
709	709	#endif
710	710	/*
...	...	@@ -613,6 +613,11 @@
613	613	#define R_AARCH64_NONE 0 /* No relocation. */
614	614	#define R_AARCH64_RELATIVE 1027 /* Adjust by program base. */
615	615
	616	+/* RISC-V relocations */
	617	+#define R_RISCV_32 1
	618	+#define R_RISCV_64 2
	619	+#define R_RISCV_RELATIVE 3
	620	+
616	621	#ifndef __ASSEMBLER__
617	622	int valid_elf_image(unsigned long addr);
618	623	#endif
...	...	@@ -190,6 +190,7 @@
190	190	IH_ARCH_ARC, /* Synopsys DesignWare ARC */
191	191	IH_ARCH_X86_64, /* AMD x86_64, Intel and Via */
192	192	IH_ARCH_XTENSA, /* Xtensa */
	193	+ IH_ARCH_RISCV, /* RISC-V */
193	194
194	195	IH_ARCH_COUNT,
195	196	};