Commit 076446f106d0732f79456485be275ad2109306f4
Committed by
Tom Rini
1 parent
21254713d3
Exists in
v2017.01-smarct4x
and in
40 other branches
cm-t54: add cm-t54 board support
Add cm-t54 board directory, config file. Enable build. Basic support includes: Serial console SD/MMC eMMC USB Ethernet Signed-off-by: Dmitry Lifshitz <lifshitz@compulab.co.il> Acked-by: Igor Grinberg <grinberg@compulab.co.il>
Showing 6 changed files with 487 additions and 0 deletions Side-by-side Diff
board/compulab/cm_t54/Makefile
board/compulab/cm_t54/cm_t54.c
1 | +/* | |
2 | + * Board functions for Compulab CM-T54 board | |
3 | + * | |
4 | + * Copyright (C) 2014, Compulab Ltd - http://compulab.co.il/ | |
5 | + * | |
6 | + * Author: Dmitry Lifshitz <lifshitz@compulab.co.il> | |
7 | + * | |
8 | + * SPDX-License-Identifier: GPL-2.0+ | |
9 | + */ | |
10 | + | |
11 | +#include <common.h> | |
12 | +#include <usb.h> | |
13 | +#include <mmc.h> | |
14 | +#include <palmas.h> | |
15 | + | |
16 | +#include <asm/gpio.h> | |
17 | +#include <asm/arch/sys_proto.h> | |
18 | +#include <asm/arch/mmc_host_def.h> | |
19 | +#include <asm/arch/clock.h> | |
20 | +#include <asm/arch/ehci.h> | |
21 | +#include <asm/ehci-omap.h> | |
22 | + | |
23 | +#define DIE_ID_REG_BASE (OMAP54XX_L4_CORE_BASE + 0x2000) | |
24 | +#define DIE_ID_REG_OFFSET 0x200 | |
25 | + | |
26 | +DECLARE_GLOBAL_DATA_PTR; | |
27 | + | |
28 | +#if !defined(CONFIG_SPL_BUILD) | |
29 | +inline void set_muxconf_regs_essential(void){}; | |
30 | +#endif | |
31 | + | |
32 | +const struct omap_sysinfo sysinfo = { | |
33 | + "Board: CM-T54\n" | |
34 | +}; | |
35 | + | |
36 | +/* | |
37 | + * Routine: board_init | |
38 | + * Description: hardware init. | |
39 | + */ | |
40 | +int board_init(void) | |
41 | +{ | |
42 | + gd->bd->bi_boot_params = (CONFIG_SYS_SDRAM_BASE + 0x100); /* boot param addr */ | |
43 | + | |
44 | + return 0; | |
45 | +} | |
46 | + | |
47 | +/* | |
48 | + * Routine: cm_t54_palmas_regulator_set | |
49 | + * Description: select voltage and turn on/off Palmas PMIC regulator. | |
50 | + */ | |
51 | +static int cm_t54_palmas_regulator_set(u8 vreg, u8 vval, u8 creg, u8 cval) | |
52 | +{ | |
53 | + int err; | |
54 | + | |
55 | + /* Setup voltage */ | |
56 | + err = palmas_i2c_write_u8(TWL603X_CHIP_P1, vreg, vval); | |
57 | + if (err) { | |
58 | + printf("cm_t54: could not set regulator 0x%02x voltage : %d\n", | |
59 | + vreg, err); | |
60 | + return err; | |
61 | + } | |
62 | + | |
63 | + /* Turn on/off regulator */ | |
64 | + err = palmas_i2c_write_u8(TWL603X_CHIP_P1, creg, cval); | |
65 | + if (err) { | |
66 | + printf("cm_t54: could not turn on/off regulator 0x%02x : %d\n", | |
67 | + creg, err); | |
68 | + return err; | |
69 | + } | |
70 | + | |
71 | + return 0; | |
72 | +} | |
73 | + | |
74 | +#if defined(CONFIG_GENERIC_MMC) && !defined(CONFIG_SPL_BUILD) | |
75 | +#define SB_T54_CD_GPIO 228 | |
76 | +#define SB_T54_WP_GPIO 229 | |
77 | + | |
78 | +int board_mmc_getcd(struct mmc *mmc) | |
79 | +{ | |
80 | + return !gpio_get_value(SB_T54_CD_GPIO); | |
81 | +} | |
82 | + | |
83 | +int board_mmc_init(bd_t *bis) | |
84 | +{ | |
85 | + int ret0, ret1; | |
86 | + | |
87 | + ret0 = omap_mmc_init(0, 0, 0, -1, SB_T54_WP_GPIO); | |
88 | + if (ret0) | |
89 | + printf("cm_t54: failed to initialize mmc0\n"); | |
90 | + | |
91 | + ret1 = omap_mmc_init(1, 0, 0, -1, -1); | |
92 | + if (ret1) | |
93 | + printf("cm_t54: failed to initialize mmc1\n"); | |
94 | + | |
95 | + if (ret0 && ret1) | |
96 | + return -1; | |
97 | + | |
98 | + return 0; | |
99 | +} | |
100 | +#endif | |
101 | + | |
102 | +#ifdef CONFIG_USB_EHCI | |
103 | +static struct omap_usbhs_board_data usbhs_bdata = { | |
104 | + .port_mode[0] = OMAP_USBHS_PORT_MODE_UNUSED, | |
105 | + .port_mode[1] = OMAP_EHCI_PORT_MODE_HSIC, | |
106 | + .port_mode[2] = OMAP_EHCI_PORT_MODE_HSIC, | |
107 | +}; | |
108 | + | |
109 | +static void setup_host_clocks(bool enable) | |
110 | +{ | |
111 | + int usbhost_clk = OPTFCLKEN_HSIC60M_P3_CLK | | |
112 | + OPTFCLKEN_HSIC480M_P3_CLK | | |
113 | + OPTFCLKEN_HSIC60M_P2_CLK | | |
114 | + OPTFCLKEN_HSIC480M_P2_CLK | | |
115 | + OPTFCLKEN_UTMI_P3_CLK | | |
116 | + OPTFCLKEN_UTMI_P2_CLK; | |
117 | + | |
118 | + int usbtll_clk = OPTFCLKEN_USB_CH1_CLK_ENABLE | | |
119 | + OPTFCLKEN_USB_CH2_CLK_ENABLE; | |
120 | + | |
121 | + int usbhub_clk = CKOBUFFER_CLK_ENABLE_MASK; | |
122 | + | |
123 | + if (enable) { | |
124 | + /* Enable port 2 and 3 clocks*/ | |
125 | + setbits_le32((*prcm)->cm_l3init_hsusbhost_clkctrl, usbhost_clk); | |
126 | + /* Enable port 2 and 3 usb host ports tll clocks*/ | |
127 | + setbits_le32((*prcm)->cm_l3init_hsusbtll_clkctrl, usbtll_clk); | |
128 | + /* Request FREF_XTAL_CLK clock for HSIC USB Hub */ | |
129 | + setbits_le32((*ctrl)->control_ckobuffer, usbhub_clk); | |
130 | + } else { | |
131 | + clrbits_le32((*ctrl)->control_ckobuffer, usbhub_clk); | |
132 | + clrbits_le32((*prcm)->cm_l3init_hsusbtll_clkctrl, usbtll_clk); | |
133 | + clrbits_le32((*prcm)->cm_l3init_hsusbhost_clkctrl, usbhost_clk); | |
134 | + } | |
135 | +} | |
136 | + | |
137 | +int ehci_hcd_init(int index, enum usb_init_type init, | |
138 | + struct ehci_hccr **hccr, struct ehci_hcor **hcor) | |
139 | +{ | |
140 | + int ret; | |
141 | + | |
142 | + /* VCC_3V3_ETH */ | |
143 | + cm_t54_palmas_regulator_set(SMPS9_VOLTAGE, SMPS_VOLT_3V3, SMPS9_CTRL, | |
144 | + SMPS_MODE_SLP_AUTO | SMPS_MODE_ACT_AUTO); | |
145 | + | |
146 | + setup_host_clocks(true); | |
147 | + | |
148 | + ret = omap_ehci_hcd_init(index, &usbhs_bdata, hccr, hcor); | |
149 | + if (ret < 0) | |
150 | + printf("cm_t54: Failed to initialize ehci : %d\n", ret); | |
151 | + | |
152 | + return ret; | |
153 | +} | |
154 | + | |
155 | +int ehci_hcd_stop(void) | |
156 | +{ | |
157 | + int ret = omap_ehci_hcd_stop(); | |
158 | + | |
159 | + setup_host_clocks(false); | |
160 | + | |
161 | + cm_t54_palmas_regulator_set(SMPS9_VOLTAGE, SMPS_VOLT_OFF, | |
162 | + SMPS9_CTRL, SMPS_MODE_SLP_AUTO); | |
163 | + | |
164 | + return ret; | |
165 | +} | |
166 | + | |
167 | +void usb_hub_reset_devices(int port) | |
168 | +{ | |
169 | + /* The LAN9730 needs to be reset after the port power has been set. */ | |
170 | + if (port == 3) { | |
171 | + gpio_direction_output(CONFIG_OMAP_EHCI_PHY3_RESET_GPIO, 0); | |
172 | + udelay(10); | |
173 | + gpio_direction_output(CONFIG_OMAP_EHCI_PHY3_RESET_GPIO, 1); | |
174 | + } | |
175 | +} | |
176 | +#endif |
board/compulab/cm_t54/mux.c
1 | +/* | |
2 | + * Pinmux configuration for Compulab CM-T54 board | |
3 | + * | |
4 | + * Copyright (C) 2014, Compulab Ltd - http://compulab.co.il/ | |
5 | + * | |
6 | + * Author: Dmitry Lifshitz <lifshitz@compulab.co.il> | |
7 | + * | |
8 | + * SPDX-License-Identifier: GPL-2.0+ | |
9 | + */ | |
10 | + | |
11 | +#ifndef _CM_T54_MUX_DATA_H | |
12 | +#define _CM_T54_MUX_DATA_H | |
13 | + | |
14 | +#include <asm/arch/mux_omap5.h> | |
15 | +#include <asm/arch/sys_proto.h> | |
16 | + | |
17 | +const struct pad_conf_entry core_padconf_array_essential[] = { | |
18 | + /* MMC1 - SD CARD */ | |
19 | + {SDCARD_CLK, (PTU | IEN | M0)}, /* SDCARD_CLK */ | |
20 | + {SDCARD_CMD, (PTU | IEN | M0)}, /* SDCARD_CMD */ | |
21 | + {SDCARD_DATA0, (PTU | IEN | M0)}, /* SDCARD_DATA0 */ | |
22 | + {SDCARD_DATA1, (PTU | IEN | M0)}, /* SDCARD_DATA1 */ | |
23 | + {SDCARD_DATA2, (PTU | IEN | M0)}, /* SDCARD_DATA2 */ | |
24 | + {SDCARD_DATA3, (PTU | IEN | M0)}, /* SDCARD_DATA3 */ | |
25 | + | |
26 | + /* SD CARD CD and WP GPIOs*/ | |
27 | + {TIMER5_PWM_EVT, (PTU | IEN | M6)}, /* GPIO8_228 */ | |
28 | + {TIMER6_PWM_EVT, (PTU | IEN | M6)}, /* GPIO8_229 */ | |
29 | + | |
30 | + /* MMC2 - eMMC */ | |
31 | + {EMMC_CLK, (PTU | IEN | M0)}, /* EMMC_CLK */ | |
32 | + {EMMC_CMD, (PTU | IEN | M0)}, /* EMMC_CMD */ | |
33 | + {EMMC_DATA0, (PTU | IEN | M0)}, /* EMMC_DATA0 */ | |
34 | + {EMMC_DATA1, (PTU | IEN | M0)}, /* EMMC_DATA1 */ | |
35 | + {EMMC_DATA2, (PTU | IEN | M0)}, /* EMMC_DATA2 */ | |
36 | + {EMMC_DATA3, (PTU | IEN | M0)}, /* EMMC_DATA3 */ | |
37 | + {EMMC_DATA4, (PTU | IEN | M0)}, /* EMMC_DATA4 */ | |
38 | + {EMMC_DATA5, (PTU | IEN | M0)}, /* EMMC_DATA5 */ | |
39 | + {EMMC_DATA6, (PTU | IEN | M0)}, /* EMMC_DATA6 */ | |
40 | + {EMMC_DATA7, (PTU | IEN | M0)}, /* EMMC_DATA7 */ | |
41 | + | |
42 | + /* UART4 */ | |
43 | + {I2C5_SCL, (PTU | IEN | M2)}, /* UART4_RX */ | |
44 | + {I2C5_SDA, (M2)}, /* UART4_TX */ | |
45 | + | |
46 | + /* Led */ | |
47 | + {HSI2_CAFLAG, (PTU | M6)}, /* GPIO3_80 */ | |
48 | + | |
49 | + /* I2C1 */ | |
50 | + {I2C1_PMIC_SCL, (PTU | IEN | M0)}, /* I2C1_PMIC_SCL */ | |
51 | + {I2C1_PMIC_SDA, (PTU | IEN | M0)}, /* I2C1_PMIC_SDA */ | |
52 | + | |
53 | + /* USBB2, USBB3 */ | |
54 | + {USBB2_HSIC_STROBE, (PTU | IEN | M0)}, /* USBB2_HSIC_STROBE */ | |
55 | + {USBB2_HSIC_DATA, (PTU | IEN | M0)}, /* USBB2_HSIC_DATA */ | |
56 | + {USBB3_HSIC_STROBE, (PTU | IEN | M0)}, /* USBB3_HSIC_STROBE */ | |
57 | + {USBB3_HSIC_DATA, (PTU | IEN | M0)}, /* USBB3_HSIC_DATA */ | |
58 | + | |
59 | + /* USB Hub and USB Eth reset GPIOs */ | |
60 | + {HSI2_CAREADY, (PTD | M6)}, /* GPIO3_76 */ | |
61 | + {HSI2_ACDATA, (PTD | M6)}, /* GPIO3_83 */ | |
62 | + | |
63 | + /* I2C4 */ | |
64 | + {I2C4_SCL, (PTU | IEN | M0)}, /* I2C4_SCL */ | |
65 | + {I2C4_SDA, (PTU | IEN | M0)}, /* I2C4_SDA */ | |
66 | +}; | |
67 | + | |
68 | +const struct pad_conf_entry wkup_padconf_array_essential[] = { | |
69 | + {SR_PMIC_SCL, (PTU | IEN | M0)}, /* SR_PMIC_SCL */ | |
70 | + {SR_PMIC_SDA, (PTU | IEN | M0)}, /* SR_PMIC_SDA */ | |
71 | + {SYS_32K, (IEN | M0)}, /* SYS_32K */ | |
72 | + | |
73 | + /* USB Hub clock */ | |
74 | + {FREF_CLK1_OUT, (PTD | IEN | M0)}, /* FREF_CLK1_OUT */ | |
75 | +}; | |
76 | + | |
77 | +/* | |
78 | + * Routine: set_muxconf_regs_essential | |
79 | + * Description: setup board pinmux configuration. | |
80 | + */ | |
81 | +void set_muxconf_regs_essential(void) | |
82 | +{ | |
83 | + do_set_mux((*ctrl)->control_padconf_core_base, | |
84 | + core_padconf_array_essential, | |
85 | + sizeof(core_padconf_array_essential) / | |
86 | + sizeof(struct pad_conf_entry)); | |
87 | + | |
88 | + do_set_mux((*ctrl)->control_padconf_wkup_base, | |
89 | + wkup_padconf_array_essential, | |
90 | + sizeof(wkup_padconf_array_essential) / | |
91 | + sizeof(struct pad_conf_entry)); | |
92 | +} | |
93 | + | |
94 | +#endif /* _CM_T54_MUX_DATA_H */ |
board/compulab/cm_t54/spl.c
1 | +/* | |
2 | + * SPL specific code for Compulab CM-T54 board | |
3 | + * | |
4 | + * Copyright (C) 2014, Compulab Ltd - http://compulab.co.il/ | |
5 | + * | |
6 | + * Author: Dmitry Lifshitz <lifshitz@compulab.co.il> | |
7 | + * | |
8 | + * SPDX-License-Identifier: GPL-2.0+ | |
9 | + */ | |
10 | + | |
11 | +#include <asm/emif.h> | |
12 | + | |
13 | +const struct emif_regs emif_regs_ddr3_532_mhz_cm_t54 = { | |
14 | +#if defined(CONFIG_DRAM_1G) || defined(CONFIG_DRAM_512M) | |
15 | + .sdram_config_init = 0x618522B2, | |
16 | + .sdram_config = 0x618522B2, | |
17 | +#elif defined(CONFIG_DRAM_2G) | |
18 | + .sdram_config_init = 0x618522BA, | |
19 | + .sdram_config = 0x618522BA, | |
20 | +#endif | |
21 | + .sdram_config2 = 0x0, | |
22 | + .ref_ctrl = 0x00001040, | |
23 | + .sdram_tim1 = 0xEEEF36F3, | |
24 | + .sdram_tim2 = 0x348F7FDA, | |
25 | + .sdram_tim3 = 0x027F88A8, | |
26 | + .read_idle_ctrl = 0x00050000, | |
27 | + .zq_config = 0x1007190B, | |
28 | + .temp_alert_config = 0x00000000, | |
29 | + | |
30 | + .emif_ddr_phy_ctlr_1_init = 0x0030400B, | |
31 | + .emif_ddr_phy_ctlr_1 = 0x0034400B, | |
32 | + .emif_ddr_ext_phy_ctrl_1 = 0x04040100, | |
33 | + .emif_ddr_ext_phy_ctrl_2 = 0x00000000, | |
34 | + .emif_ddr_ext_phy_ctrl_3 = 0x00000000, | |
35 | + .emif_ddr_ext_phy_ctrl_4 = 0x00000000, | |
36 | + .emif_ddr_ext_phy_ctrl_5 = 0x4350D435, | |
37 | + .emif_rd_wr_lvl_rmp_win = 0x00000000, | |
38 | + .emif_rd_wr_lvl_rmp_ctl = 0x80000000, | |
39 | + .emif_rd_wr_lvl_ctl = 0x00000000, | |
40 | + .emif_rd_wr_exec_thresh = 0x40000305, | |
41 | +}; | |
42 | + | |
43 | +const struct dmm_lisa_map_regs lisa_map_cm_t54 = { | |
44 | + .dmm_lisa_map_0 = 0x0, | |
45 | + .dmm_lisa_map_1 = 0x0, | |
46 | + | |
47 | +#ifdef CONFIG_DRAM_2G | |
48 | + .dmm_lisa_map_2 = 0x80740300, | |
49 | +#elif defined(CONFIG_DRAM_1G) | |
50 | + .dmm_lisa_map_2 = 0x80640300, | |
51 | +#elif defined(CONFIG_DRAM_512M) | |
52 | + .dmm_lisa_map_2 = 0x80500100, | |
53 | +#endif | |
54 | + .dmm_lisa_map_3 = 0x00000000, | |
55 | + .is_ma_present = 0x1, | |
56 | +}; | |
57 | + | |
58 | +void emif_get_reg_dump(u32 emif_nr, const struct emif_regs **regs) | |
59 | +{ | |
60 | + *regs = &emif_regs_ddr3_532_mhz_cm_t54; | |
61 | +} | |
62 | + | |
63 | +void emif_get_dmm_regs(const struct dmm_lisa_map_regs **dmm_lisa_regs) | |
64 | +{ | |
65 | + *dmm_lisa_regs = &lisa_map_cm_t54; | |
66 | +} |
boards.cfg
... | ... | @@ -365,6 +365,7 @@ |
365 | 365 | Active arm armv7 omap4 gumstix duovero duovero - Ash Charles <ash@gumstix.com> |
366 | 366 | Active arm armv7 omap4 ti panda omap4_panda - Sricharan R <r.sricharan@ti.com> |
367 | 367 | Active arm armv7 omap4 ti sdp4430 omap4_sdp4430 - Sricharan R <r.sricharan@ti.com> |
368 | +Active arm armv7 omap5 compulab cm_t54 cm_t54 - Dmitry Lifshitz <lifshitz@compulab.co.il> | |
368 | 369 | Active arm armv7 omap5 ti dra7xx dra7xx_evm dra7xx_evm:CONS_INDEX=1 Lokesh Vutla <lokeshvutla@ti.com> |
369 | 370 | Active arm armv7 omap5 ti dra7xx dra7xx_evm_qspiboot dra7xx_evm:CONS_INDEX=1,QSPI_BOOT Lokesh Vutla <lokeshvutla@ti.com> |
370 | 371 | Active arm armv7 omap5 ti dra7xx dra7xx_evm_uart3 dra7xx_evm:CONS_INDEX=3,SPL_YMODEM_SUPPORT Lokesh Vutla <lokeshvutla@ti.com> |
include/configs/cm_t54.h
1 | +/* | |
2 | + * Config file for Compulab CM-T54 board | |
3 | + * | |
4 | + * Copyright (C) 2014, Compulab Ltd - http://compulab.co.il/ | |
5 | + * | |
6 | + * Author: Dmitry Lifshitz <lifshitz@compulab.co.il> | |
7 | + * | |
8 | + * SPDX-License-Identifier: GPL-2.0+ | |
9 | + */ | |
10 | + | |
11 | +#ifndef __CONFIG_CM_T54_H | |
12 | +#define __CONFIG_CM_T54_H | |
13 | + | |
14 | +#define CONFIG_CM_T54 | |
15 | +#define CONFIG_DRAM_2G | |
16 | + | |
17 | +#include <configs/ti_omap5_common.h> | |
18 | + | |
19 | +#undef CONFIG_MISC_INIT_R | |
20 | +#undef CONFIG_SPL_OS_BOOT | |
21 | + | |
22 | +/* Enable SD/MMC CD and WP GPIOs */ | |
23 | +#define OMAP_HSMMC_USE_GPIO | |
24 | + | |
25 | +/* UART setup */ | |
26 | +#define CONFIG_CONS_INDEX 4 | |
27 | +#define CONFIG_SYS_NS16550_COM4 UART4_BASE | |
28 | +#define CONFIG_BAUDRATE 115200 | |
29 | + | |
30 | +/* SD/MMC RAW boot */ | |
31 | +#undef CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR | |
32 | +#undef CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS | |
33 | + | |
34 | +#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x200 /* 0x40000 - 256 KB */ | |
35 | +#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x300 /* 384 KB */ | |
36 | + | |
37 | +/* MMC ENV related defines */ | |
38 | +#undef CONFIG_ENV_OFFSET | |
39 | +#undef CONFIG_ENV_SIZE | |
40 | + | |
41 | +#define CONFIG_ENV_IS_IN_MMC | |
42 | +#define CONFIG_SYS_MMC_ENV_DEV 1 /* SLOT2: eMMC(1) */ | |
43 | +#define CONFIG_ENV_OFFSET 0xc0000 /* (in bytes) 768 KB */ | |
44 | +#define CONFIG_ENV_SIZE (16 << 10) /* 16 KB */ | |
45 | +#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE) | |
46 | +#define CONFIG_SYS_REDUNDAND_ENVIRONMENT | |
47 | +#define CONFIG_CMD_SAVEENV | |
48 | + | |
49 | +/* Enhance our eMMC support / experience. */ | |
50 | +#define CONFIG_HSMMC2_8BIT | |
51 | +#define CONFIG_SUPPORT_EMMC_BOOT | |
52 | + | |
53 | +/* USB UHH support options */ | |
54 | +#define CONFIG_CMD_USB | |
55 | +#define CONFIG_USB_HOST | |
56 | +#define CONFIG_USB_EHCI | |
57 | +#define CONFIG_USB_EHCI_OMAP | |
58 | +#define CONFIG_USB_STORAGE | |
59 | +#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3 | |
60 | +#define CONFIG_EHCI_HCD_INIT_AFTER_RESET | |
61 | + | |
62 | +#define CONFIG_OMAP_EHCI_PHY2_RESET_GPIO 76 /* HSIC2 HUB #RESET */ | |
63 | +#define CONFIG_OMAP_EHCI_PHY3_RESET_GPIO 83 /* HSIC3 ETH #RESET */ | |
64 | + | |
65 | +/* Enabled commands */ | |
66 | +#define CONFIG_CMD_DHCP /* DHCP Support */ | |
67 | +#define CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */ | |
68 | +#define CONFIG_CMD_PING | |
69 | + | |
70 | +/* USB Networking options */ | |
71 | +#define CONFIG_USB_HOST_ETHER | |
72 | +#define CONFIG_USB_ETHER_SMSC95XX | |
73 | +#define CONFIG_USB_ETHER_RNDIS | |
74 | +#define CONFIG_USB_ETHER_ASIX | |
75 | +#define CONFIG_USB_ETHER_MCS7830 | |
76 | + | |
77 | +/* Max time to hold reset on this board, see doc/README.omap-reset-time */ | |
78 | +#define CONFIG_OMAP_PLATFORM_RESET_TIME_MAX_USEC 16296 | |
79 | + | |
80 | +/* | |
81 | + * Miscellaneous configurable options | |
82 | + */ | |
83 | +#undef CONFIG_SYS_AUTOLOAD | |
84 | +#undef CONFIG_SYS_PROMPT | |
85 | +#undef CONFIG_EXTRA_ENV_SETTINGS | |
86 | +#undef CONFIG_BOOTCOMMAND | |
87 | +#undef CONFIG_BOOTDELAY | |
88 | + | |
89 | +#define CONFIG_BOOTDELAY 3 | |
90 | +#define CONFIG_SYS_AUTOLOAD "no" | |
91 | +#define CONFIG_SYS_PROMPT "CM-T54 # " | |
92 | + | |
93 | +#define CONFIG_EXTRA_ENV_SETTINGS \ | |
94 | + DEFAULT_LINUX_BOOT_ENV \ | |
95 | + "baudrate=115200\0" \ | |
96 | + "bootdelay=3\0" \ | |
97 | + "autoload=no\0" \ | |
98 | + "bootscr=bootscr.img\0" \ | |
99 | + "fdtfile=omap5-sbc-t54.dtb\0" \ | |
100 | + "kernel=zImage-cm-t54\0" \ | |
101 | + "ramdisk=ramdisk-cm-t54.img\0" \ | |
102 | + "console=ttyO3\0" \ | |
103 | + "ramdisksize=16384\0" \ | |
104 | + "mmcdev=0\0" \ | |
105 | + "mmcroot=/dev/mmcblk1p2\0" \ | |
106 | + "mmcargs=setenv bootargs console=${console} " \ | |
107 | + "root=${mmcroot} rw rootwait\0" \ | |
108 | + "ramroot=/dev/ram0\0" \ | |
109 | + "ramargs=setenv bootargs console=${console} " \ | |
110 | + "root=${ramroot} ramdisk_size=${ramdisksize} rw\0" \ | |
111 | + "mmcloadkernel=load mmc ${mmcdev} ${loadaddr} ${kernel}\0" \ | |
112 | + "mmcloadfdt=load mmc ${mmcdev} ${fdtaddr} ${fdtfile}\0" \ | |
113 | + "mmcloadramdisk=load mmc ${mmcdev} ${rdaddr} ${ramdisk}\0" \ | |
114 | + "mmcloadbootscript=load mmc ${mmcdev} ${loadaddr} ${bootsrc}\0" \ | |
115 | + "mmcbootscript=echo Running bootscript from mmc${mmcdev}...; " \ | |
116 | + "source ${loadaddr}\0" \ | |
117 | + "mmcbootlinux=echo Booting from mmc${mmcdev} ...; " \ | |
118 | + "bootz ${loadaddr} ${rdaddr} ${fdtaddr}\0" \ | |
119 | + "mmcboot=if mmc dev ${mmcdev} && mmc rescan; then " \ | |
120 | + "if run mmcloadbootscript; " \ | |
121 | + "then run mmcbootscript; " \ | |
122 | + "fi; " \ | |
123 | + "if run mmcloadkernel; then " \ | |
124 | + "if run mmcloadfdt; then " \ | |
125 | + "if run mmcloadramdisk; then " \ | |
126 | + "run ramargs; " \ | |
127 | + "run mmcbootlinux; " \ | |
128 | + "fi; " \ | |
129 | + "run mmcargs; " \ | |
130 | + "setenv rdaddr - ; " \ | |
131 | + "run mmcbootlinux; " \ | |
132 | + "fi; " \ | |
133 | + "fi; " \ | |
134 | + "fi;\0" | |
135 | + | |
136 | +#define CONFIG_BOOTCOMMAND \ | |
137 | + "bootcmd=run mmcboot || setenv mmcdev 1; setenv mmcroot /dev/mmcblk0p2; run mmcboot;" | |
138 | + | |
139 | +#endif /* __CONFIG_CM_T54_H */ |