Eric Lee / smarc-uboot

Download as
Browse Code ยป

Commit 07d778382200a05a8b86cc135f79ec48e386f25a

Authored by Tom Rini
2 parents 5c6631beb2 24357dfd2a
Exists in smarc_8mq_lf_v2020.04 and in 17 other branches 8qm-imx_v2020.04_5.4.70_2.3.0, emb_lf_v2022.04, pitx_8mp_lf_v2020.04, smarc-8m-android-10.0.0_2.6.0, smarc-8m-android-11.0.0_2.0.0, smarc-8mp-android-11.0.0_2.0.0, smarc-imx6_v2018.03_4.14.98_2.0.0_ga, smarc-imx7_v2018.03_4.14.98_2.0.0_ga, smarc-imx_v2018.03_4.14.78_1.0.0_ga, smarc_8m-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8m-imx_v2019.04_4.19.35_1.1.0, smarc_8m_00d0-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2019.04_4.19.35_1.1.0, smarc_8mm-imx_v2020.04_5.4.24_2.1.0, smarc_8mp_lf_v2020.04, smarc_8mq-imx_v2020.04_5.4.24_2.1.0

Merge git://git.denx.de/u-boot-x86

Showing 88 changed files Side-by-side Diff

... ... @@ -87,15 +87,26 @@
87 87 bool "x86 architecture"
88 88 select CREATE_ARCH_SYMLINK
89 89 select HAVE_PRIVATE_LIBGCC
  90 + select USE_PRIVATE_LIBGCC
90 91 select SUPPORT_OF_CONTROL
  92 + select OF_CONTROL
91 93 select DM
92   - select DM_KEYBOARD
93   - select DM_SERIAL
94   - select DM_GPIO
95   - select DM_SPI
96   - select DM_SPI_FLASH
97   - select USB
98   - select USB_EHCI_HCD
  94 + select DM_PCI
  95 + select PCI
  96 + select TIMER
  97 + select X86_TSC_TIMER
  98 + imply BLK
  99 + imply DM_ETH
  100 + imply DM_GPIO
  101 + imply DM_KEYBOARD
  102 + imply DM_MMC
  103 + imply DM_RTC
  104 + imply DM_SERIAL
  105 + imply DM_SCSI
  106 + imply DM_SPI
  107 + imply DM_SPI_FLASH
  108 + imply DM_USB
  109 + imply DM_VIDEO
99 110 imply CMD_FPGA_LOADMK
100 111 imply CMD_GETTIME
101 112 imply CMD_IO
... ... @@ -542,6 +542,19 @@
542 542 address of 0xfff90000 indicates that the image will be put at offset
543 543 0x90000 from the beginning of a 1MB flash device.
544 544  
  545 +config ROM_TABLE_ADDR
  546 + hex
  547 + default 0xf0000
  548 + help
  549 + All x86 tables happen to like the address range from 0x0f0000
  550 + to 0x100000. We use 0xf0000 as the starting address to store
  551 + those tables, including PIRQ routing table, Multi-Processor
  552 + table and ACPI table.
  553 +
  554 +config ROM_TABLE_SIZE
  555 + hex
  556 + default 0x10000
  557 +
545 558 menu "System tables"
546 559 depends on !EFI && !SYS_COREBOOT
547 560  
... ... @@ -10,8 +10,7 @@
10 10 PLATFORM_CPPFLAGS += -fno-strict-aliasing
11 11 PLATFORM_CPPFLAGS += -fomit-frame-pointer
12 12 PF_CPPFLAGS_X86 := $(call cc-option, -fno-toplevel-reorder, \
13   - $(call cc-option, -fno-unit-at-a-time)) \
14   - $(call cc-option, -mpreferred-stack-boundary=2)
  13 + $(call cc-option, -fno-unit-at-a-time))
15 14  
16 15 PLATFORM_CPPFLAGS += $(PF_CPPFLAGS_X86)
17 16 PLATFORM_CPPFLAGS += -fno-dwarf2-cfi-asm
... ... @@ -27,7 +26,7 @@
27 26 ifeq ($(IS_32BIT),y)
28 27 PLATFORM_CPPFLAGS += -march=i386 -m32
29 28 else
30   -PLATFORM_CPPFLAGS += $(if $(CONFIG_SPL_BUILD),,-fpic) -fno-common
  29 +PLATFORM_CPPFLAGS += $(if $(CONFIG_SPL_BUILD),,-fpic) -fno-common -m64
31 30 endif
32 31  
33 32 PLATFORM_RELFLAGS += -ffunction-sections -fvisibility=hidden
arch/x86/cpu/baytrail/Kconfig
Diff comments   View file @ 07d7783
... ... @@ -7,7 +7,24 @@
7 7 config INTEL_BAYTRAIL
8 8 bool
9 9 select HAVE_FSP if !EFI
  10 + select ARCH_MISC_INIT if !EFI
  11 + imply HAVE_INTEL_ME if !EFI
  12 + imply ENABLE_MRC_CACHE
10 13 imply ENV_IS_IN_SPI_FLASH
  14 + imply AHCI_PCI
  15 + imply ICH_SPI
  16 + imply INTEL_ICH6_GPIO
  17 + imply MMC
  18 + imply MMC_PCI
  19 + imply MMC_SDHCI
  20 + imply MMC_SDHCI_SDMA
  21 + imply SCSI
  22 + imply SPI_FLASH
  23 + imply SYS_NS16550
  24 + imply USB
  25 + imply USB_EHCI_HCD
  26 + imply USB_XHCI_HCD
  27 + imply VIDEO_VESA
11 28  
12 29 if INTEL_BAYTRAIL
13 30 config INTERNAL_UART
arch/x86/cpu/baytrail/valleyview.c
Diff comments   View file @ 07d7783
... ... @@ -11,18 +11,6 @@
11 11 #include <asm/mrccache.h>
12 12 #include <asm/post.h>
13 13  
14   -static struct pci_device_id mmc_supported[] = {
15   - { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BYT_SDIO },
16   - { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BYT_SD },
17   - { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BYT_EMMC2 },
18   - {},
19   -};
20   -
21   -int cpu_mmc_init(bd_t *bis)
22   -{
23   - return pci_mmc_init("ValleyView SDHCI", mmc_supported);
24   -}
25   -
26 14 #ifndef CONFIG_EFI_APP
27 15 int arch_cpu_init(void)
28 16 {
arch/x86/cpu/broadwell/Kconfig
Diff comments   View file @ 07d7783
... ... @@ -6,6 +6,18 @@
6 6 config INTEL_BROADWELL
7 7 bool
8 8 select CACHE_MRC_BIN
  9 + select ARCH_EARLY_INIT_R
  10 + imply HAVE_INTEL_ME
  11 + imply ENABLE_MRC_CACHE
  12 + imply ENV_IS_IN_SPI_FLASH
  13 + imply AHCI_PCI
  14 + imply ICH_SPI
  15 + imply INTEL_BROADWELL_GPIO
  16 + imply SCSI
  17 + imply SPI_FLASH
  18 + imply USB
  19 + imply USB_EHCI_HCD
  20 + imply VIDEO_BROADWELL_IGD
9 21  
10 22 if INTEL_BROADWELL
11 23  
arch/x86/cpu/broadwell/refcode.c
Diff comments   View file @ 07d7783
... ... @@ -56,7 +56,17 @@
56 56 uint32_t padding[4];
57 57 } __packed;
58 58  
59   -int cpu_run_reference_code(void)
  59 +/**
  60 + * cpu_run_reference_code() - Run the platform reference code
  61 + *
  62 + * Some platforms require a binary blob to be executed once SDRAM is
  63 + * available. This is used to set up various platform features, such as the
  64 + * platform controller hub (PCH). This function should be implemented by the
  65 + * CPU-specific code.
  66 + *
  67 + * @return 0 on success, -ve on failure
  68 + */
  69 +static int cpu_run_reference_code(void)
60 70 {
61 71 struct pei_data _pei_data __aligned(8);
62 72 struct pei_data *pei_data = &_pei_data;
... ... @@ -110,5 +120,10 @@
110 120 debug("Refereence code completed\n");
111 121  
112 122 return 0;
  123 +}
  124 +
  125 +int arch_early_init_r(void)
  126 +{
  127 + return cpu_run_reference_code();
113 128 }
arch/x86/cpu/coreboot/Kconfig
Diff comments   View file @ 07d7783
... ... @@ -3,6 +3,20 @@
3 3 config SYS_COREBOOT
4 4 bool
5 5 default y
  6 + imply ENV_IS_NOWHERE
  7 + imply AHCI_PCI
  8 + imply E1000
  9 + imply ICH_SPI
  10 + imply MMC
  11 + imply MMC_PCI
  12 + imply MMC_SDHCI
  13 + imply MMC_SDHCI_SDMA
  14 + imply SPI_FLASH
  15 + imply SYS_NS16550
  16 + imply USB
  17 + imply USB_EHCI_HCD
  18 + imply USB_XHCI_HCD
  19 + imply VIDEO_COREBOOT
6 20 imply CMD_CBFS
7 21 imply FS_CBFS
8 22  
arch/x86/cpu/coreboot/coreboot.c
Diff comments   View file @ 07d7783
... ... @@ -29,11 +29,6 @@
29 29 return x86_cpu_init_f();
30 30 }
31 31  
32   -int board_early_init_f(void)
33   -{
34   - return 0;
35   -}
36   -
37 32 int checkcpu(void)
38 33 {
39 34 return 0;
... ... @@ -87,11 +82,6 @@
87 82 }
88 83  
89 84 int misc_init_r(void)
90   -{
91   - return 0;
92   -}
93   -
94   -int arch_misc_init(void)
95 85 {
96 86 return 0;
97 87 }
arch/x86/cpu/efi/efi.c
Diff comments   View file @ 07d7783
... ... @@ -13,11 +13,6 @@
13 13 return 0;
14 14 }
15 15  
16   -int board_early_init_f(void)
17   -{
18   - return 0;
19   -}
20   -
21 16 int checkcpu(void)
22 17 {
23 18 return 0;
... ... @@ -33,11 +28,6 @@
33 28 }
34 29  
35 30 int misc_init_r(void)
36   -{
37   - return 0;
38   -}
39   -
40   -int arch_misc_init(void)
41 31 {
42 32 return 0;
43 33 }
arch/x86/cpu/ivybridge/Kconfig
Diff comments   View file @ 07d7783
... ... @@ -8,6 +8,17 @@
8 8 config NORTHBRIDGE_INTEL_IVYBRIDGE
9 9 bool
10 10 select CACHE_MRC_BIN if HAVE_MRC
  11 + imply HAVE_INTEL_ME
  12 + imply ENABLE_MRC_CACHE
  13 + imply ENV_IS_IN_SPI_FLASH
  14 + imply AHCI_PCI
  15 + imply ICH_SPI
  16 + imply INTEL_ICH6_GPIO
  17 + imply SCSI
  18 + imply SPI_FLASH
  19 + imply USB
  20 + imply USB_EHCI_HCD
  21 + imply VIDEO_VESA
11 22  
12 23 if NORTHBRIDGE_INTEL_IVYBRIDGE
13 24  
arch/x86/cpu/ivybridge/sdram.c
Diff comments   View file @ 07d7783
... ... @@ -233,7 +233,6 @@
233 233 uint32_t tseg_base, uma_size, tolud;
234 234 uint64_t tom, me_base, touud;
235 235 uint64_t uma_memory_base = 0;
236   - uint64_t uma_memory_size;
237 236 unsigned long long tomk;
238 237 uint16_t ggc;
239 238 u32 val;
... ... @@ -298,7 +297,6 @@
298 297 tolud += uma_size << 10;
299 298 /* UMA starts at old TOLUD */
300 299 uma_memory_base = tomk * 1024ULL;
301   - uma_memory_size = uma_size * 1024ULL;
302 300 debug("ME UMA base %llx size %uM\n", me_base, uma_size >> 10);
303 301 }
304 302  
305 303  
... ... @@ -312,13 +310,11 @@
312 310 debug("%uM UMA", uma_size >> 10);
313 311 tomk -= uma_size;
314 312 uma_memory_base = tomk * 1024ULL;
315   - uma_memory_size += uma_size * 1024ULL;
316 313  
317 314 /* GTT Graphics Stolen Memory Size (GGMS) */
318 315 uma_size = ((ggc >> 8) & 0x3) * 1024ULL;
319 316 tomk -= uma_size;
320 317 uma_memory_base = tomk * 1024ULL;
321   - uma_memory_size += uma_size * 1024ULL;
322 318 debug(" and %uM GTT\n", uma_size >> 10);
323 319 }
324 320  
... ... @@ -327,7 +323,6 @@
327 323 uma_size = (uma_memory_base - tseg_base) >> 10;
328 324 tomk -= uma_size;
329 325 uma_memory_base = tomk * 1024ULL;
330   - uma_memory_size += uma_size * 1024ULL;
331 326 debug("TSEG base 0x%08x size %uM\n", tseg_base, uma_size >> 10);
332 327  
333 328 debug("Available memory below 4GB: %lluM\n", tomk >> 10);
arch/x86/cpu/qemu/Kconfig
Diff comments   View file @ 07d7783
... ... @@ -6,6 +6,14 @@
6 6  
7 7 config QEMU
8 8 bool
  9 + select ARCH_EARLY_INIT_R
  10 + imply ENV_IS_NOWHERE
  11 + imply AHCI_PCI
  12 + imply E1000
  13 + imply SYS_NS16550
  14 + imply USB
  15 + imply USB_EHCI_HCD
  16 + imply VIDEO_VESA
9 17  
10 18 if QEMU
11 19  
arch/x86/cpu/quark/Kconfig
Diff comments   View file @ 07d7783
... ... @@ -7,6 +7,21 @@
7 7 config INTEL_QUARK
8 8 bool
9 9 select HAVE_RMU
  10 + select ARCH_EARLY_INIT_R
  11 + select ARCH_MISC_INIT
  12 + imply ENABLE_MRC_CACHE
  13 + imply ENV_IS_IN_SPI_FLASH
  14 + imply ETH_DESIGNWARE
  15 + imply ICH_SPI
  16 + imply INTEL_ICH6_GPIO
  17 + imply MMC
  18 + imply MMC_PCI
  19 + imply MMC_SDHCI
  20 + imply MMC_SDHCI_SDMA
  21 + imply SPI_FLASH
  22 + imply SYS_NS16550
  23 + imply USB
  24 + imply USB_EHCI_HCD
10 25  
11 26 if INTEL_QUARK
12 27  
arch/x86/cpu/quark/quark.c
Diff comments   View file @ 07d7783
... ... @@ -16,11 +16,6 @@
16 16 #include <asm/arch/msg_port.h>
17 17 #include <asm/arch/quark.h>
18 18  
19   -static struct pci_device_id mmc_supported[] = {
20   - { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_QRK_SDIO },
21   - {},
22   -};
23   -
24 19 static void quark_setup_mtrr(void)
25 20 {
26 21 u32 base, mask;
... ... @@ -326,11 +321,6 @@
326 321 quark_usb_init();
327 322  
328 323 return 0;
329   -}
330   -
331   -int cpu_mmc_init(bd_t *bis)
332   -{
333   - return pci_mmc_init("Quark SDHCI", mmc_supported);
334 324 }
335 325  
336 326 int arch_misc_init(void)
arch/x86/cpu/queensbay/Kconfig
Diff comments   View file @ 07d7783
... ... @@ -8,6 +8,22 @@
8 8 bool
9 9 select HAVE_FSP
10 10 select HAVE_CMC
  11 + select ARCH_EARLY_INIT_R
  12 + imply ENV_IS_IN_SPI_FLASH
  13 + imply AHCI_PCI
  14 + imply ICH_SPI
  15 + imply INTEL_ICH6_GPIO
  16 + imply MMC
  17 + imply MMC_PCI
  18 + imply MMC_SDHCI
  19 + imply MMC_SDHCI_SDMA
  20 + imply PCH_GBE
  21 + imply SCSI
  22 + imply SPI_FLASH
  23 + imply SYS_NS16550
  24 + imply USB
  25 + imply USB_EHCI_HCD
  26 + imply VIDEO_VESA
11 27  
12 28 if INTEL_QUEENSBAY
13 29  
arch/x86/cpu/queensbay/Makefile
Diff comments   View file @ 07d7783
... ... @@ -5,5 +5,5 @@
5 5 #
6 6  
7 7 obj-y += fsp_configs.o irq.o
8   -obj-y += tnc.o topcliff.o
  8 +obj-y += tnc.o
arch/x86/cpu/queensbay/topcliff.c
View file @ 07d7783
1   -/*
2   - * Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com>
3   - *
4   - * SPDX-License-Identifier: GPL-2.0+
5   - */
6   -
7   -#include <common.h>
8   -#include <mmc.h>
9   -#include <pci_ids.h>
10   -
11   -static struct pci_device_id mmc_supported[] = {
12   - { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_TCF_SDIO_0 },
13   - { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_TCF_SDIO_1 },
14   - {},
15   -};
16   -
17   -int cpu_mmc_init(bd_t *bis)
18   -{
19   - return pci_mmc_init("Topcliff SDHCI", mmc_supported);
20   -}
arch/x86/cpu/tangier/Kconfig
Diff comments   View file @ 07d7783
... ... @@ -7,6 +7,14 @@
7 7 config INTEL_TANGIER
8 8 bool
9 9 depends on INTEL_MID
  10 + imply INTEL_MID_SERIAL
  11 + imply MMC
  12 + imply MMC_SDHCI
  13 + imply MMC_SDHCI_SDMA
  14 + imply MMC_SDHCI_TANGIER
  15 + imply TANGIER_WATCHDOG
  16 + imply USB
  17 + imply USB_DWC3
10 18  
11 19 config SYS_CAR_ADDR
12 20 hex
arch/x86/include/asm/cpu.h
Diff comments   View file @ 07d7783
... ... @@ -288,17 +288,5 @@
288 288 */
289 289 u32 cpu_get_stepping(void);
290 290  
291   -/**
292   - * cpu_run_reference_code() - Run the platform reference code
293   - *
294   - * Some platforms require a binary blob to be executed once SDRAM is
295   - * available. This is used to set up various platform features, such as the
296   - * platform controller hub (PCH). This function should be implemented by the
297   - * CPU-specific code.
298   - *
299   - * @return 0 on success, -ve on failure
300   - */
301   -int cpu_run_reference_code(void);
302   -
303 291 #endif
arch/x86/include/asm/tables.h
Diff comments   View file @ 07d7783
... ... @@ -9,13 +9,8 @@
9 9  
10 10 #include <tables_csum.h>
11 11  
12   -/*
13   - * All x86 tables happen to like the address range from 0xf0000 to 0x100000.
14   - * We use 0xf0000 as the starting address to store those tables, including
15   - * PIRQ routing table, Multi-Processor table and ACPI table.
16   - */
17   -#define ROM_TABLE_ADDR 0xf0000
18   -#define ROM_TABLE_END 0xfffff
  12 +#define ROM_TABLE_ADDR CONFIG_ROM_TABLE_ADDR
  13 +#define ROM_TABLE_END (CONFIG_ROM_TABLE_ADDR + CONFIG_ROM_TABLE_SIZE - 1)
19 14  
20 15 #define ROM_TABLE_ALIGN 1024
21 16  
board/advantech/som-db5800-som-6867/Kconfig
Diff comments   View file @ 07d7783
... ... @@ -21,6 +21,8 @@
21 21 select X86_RESET_VECTOR if !EFI_STUB
22 22 select INTEL_BAYTRAIL
23 23 select BOARD_ROMSIZE_KB_8192
  24 + select BOARD_EARLY_INIT_F
  25 + select SPI_FLASH_MACRONIX
24 26  
25 27 config PCIE_ECAM_BASE
26 28 default 0xe0000000
board/advantech/som-db5800-som-6867/som-db5800-som-6867.c
Diff comments   View file @ 07d7783
... ... @@ -17,9 +17,4 @@
17 17  
18 18 return 0;
19 19 }
20   -
21   -int arch_early_init_r(void)
22   -{
23   - return 0;
24   -}
board/congatec/conga-qeval20-qa3-e3845/Kconfig
Diff comments   View file @ 07d7783
... ... @@ -21,7 +21,9 @@
21 21 select X86_RESET_VECTOR if !EFI_STUB
22 22 select INTEL_BAYTRAIL
23 23 select BOARD_ROMSIZE_KB_8192
  24 + select BOARD_EARLY_INIT_F
24 25 select BOARD_LATE_INIT
  26 + select SPI_FLASH_STMICRO
25 27  
26 28 config PCIE_ECAM_BASE
27 29 default 0xe0000000
board/congatec/conga-qeval20-qa3-e3845/conga-qeval20-qa3.c
Diff comments   View file @ 07d7783
... ... @@ -28,11 +28,6 @@
28 28 return 0;
29 29 }
30 30  
31   -int arch_early_init_r(void)
32   -{
33   - return 0;
34   -}
35   -
36 31 int board_late_init(void)
37 32 {
38 33 struct udevice *dev;
board/coreboot/coreboot/Kconfig
Diff comments   View file @ 07d7783
... ... @@ -12,6 +12,17 @@
12 12 config SYS_TEXT_BASE
13 13 default 0x01110000
14 14  
  15 +config BOARD_SPECIFIC_OPTIONS # dummy
  16 + def_bool y
  17 + imply SPI_FLASH_ATMEL
  18 + imply SPI_FLASH_EON
  19 + imply SPI_FLASH_GIGADEVICE
  20 + imply SPI_FLASH_MACRONIX
  21 + imply SPI_FLASH_SPANSION
  22 + imply SPI_FLASH_STMICRO
  23 + imply SPI_FLASH_SST
  24 + imply SPI_FLASH_WINBOND
  25 +
15 26 comment "coreboot-specific options"
16 27  
17 28 config SYS_CONFIG_NAME
board/coreboot/coreboot/Makefile
Diff comments   View file @ 07d7783
... ... @@ -12,5 +12,5 @@
12 12 # SPDX-License-Identifier: GPL-2.0+
13 13 #
14 14  
15   -obj-y += coreboot_start.o coreboot.o
  15 +obj-y += coreboot_start.o
board/coreboot/coreboot/coreboot.c
View file @ 07d7783
1   -/*
2   - * Copyright (C) 2013 Google, Inc
3   - *
4   - * SPDX-License-Identifier: GPL-2.0+
5   - */
6   -
7   -#include <common.h>
8   -#include <cros_ec.h>
9   -#include <asm/gpio.h>
10   -
11   -int arch_early_init_r(void)
12   -{
13   - return 0;
14   -}
board/dfi/dfi-bt700/Kconfig
Diff comments   View file @ 07d7783
... ... @@ -21,7 +21,9 @@
21 21 select X86_RESET_VECTOR if !EFI_STUB
22 22 select INTEL_BAYTRAIL
23 23 select BOARD_ROMSIZE_KB_8192
  24 + select BOARD_EARLY_INIT_F
24 25 select BOARD_LATE_INIT
  26 + select SPI_FLASH_STMICRO
25 27  
26 28 config PCIE_ECAM_BASE
27 29 default 0xe0000000
board/efi/efi-x86/efi.c
Diff comments   View file @ 07d7783
... ... @@ -5,10 +5,4 @@
5 5 */
6 6  
7 7 #include <common.h>
8   -#include <asm/gpio.h>
9   -
10   -int arch_early_init_r(void)
11   -{
12   - return 0;
13   -}
board/google/chromebook_link/Kconfig
Diff comments   View file @ 07d7783
... ... @@ -22,6 +22,7 @@
22 22 select NORTHBRIDGE_INTEL_IVYBRIDGE
23 23 select HAVE_INTEL_ME
24 24 select BOARD_ROMSIZE_KB_8192
  25 + select SPI_FLASH_WINBOND
25 26  
26 27 config PCIE_ECAM_BASE
27 28 default 0xf0000000
board/google/chromebook_link/link.c
Diff comments   View file @ 07d7783
... ... @@ -5,20 +5,4 @@
5 5 */
6 6  
7 7 #include <common.h>
8   -#include <cros_ec.h>
9   -#include <dm.h>
10   -#include <asm/gpio.h>
11   -#include <asm/io.h>
12   -#include <asm/pci.h>
13   -#include <asm/arch/pch.h>
14   -
15   -int arch_early_init_r(void)
16   -{
17   - return 0;
18   -}
19   -
20   -int board_early_init_f(void)
21   -{
22   - return 0;
23   -}
board/google/chromebook_samus/Kconfig
Diff comments   View file @ 07d7783
... ... @@ -21,6 +21,7 @@
21 21 select INTEL_BROADWELL
22 22 select HAVE_INTEL_ME
23 23 select BOARD_ROMSIZE_KB_8192
  24 + select SPI_FLASH_WINBOND
24 25  
25 26 config PCIE_ECAM_BASE
26 27 default 0xf0000000
board/google/chromebook_samus/samus.c
Diff comments   View file @ 07d7783
... ... @@ -5,15 +5,4 @@
5 5 */
6 6  
7 7 #include <common.h>
8   -#include <asm/cpu.h>
9   -
10   -int arch_early_init_r(void)
11   -{
12   - return cpu_run_reference_code();
13   -}
14   -
15   -int board_early_init_f(void)
16   -{
17   - return 0;
18   -}
board/google/chromebox_panther/Kconfig
Diff comments   View file @ 07d7783
... ... @@ -22,6 +22,7 @@
22 22 select NORTHBRIDGE_INTEL_IVYBRIDGE
23 23 select HAVE_INTEL_ME
24 24 select BOARD_ROMSIZE_KB_8192
  25 + select SPI_FLASH_WINBOND
25 26  
26 27 config SYS_CAR_ADDR
27 28 hex
board/google/chromebox_panther/panther.c
Diff comments   View file @ 07d7783
... ... @@ -5,15 +5,4 @@
5 5 */
6 6  
7 7 #include <common.h>
8   -#include <asm/arch/pch.h>
9   -
10   -int arch_early_init_r(void)
11   -{
12   - return 0;
13   -}
14   -
15   -int board_early_init_f(void)
16   -{
17   - return 0;
18   -}
board/intel/bayleybay/Kconfig
Diff comments   View file @ 07d7783
... ... @@ -20,6 +20,7 @@
20 20 select X86_RESET_VECTOR
21 21 select INTEL_BAYTRAIL
22 22 select BOARD_ROMSIZE_KB_8192
  23 + select SPI_FLASH_WINBOND
23 24  
24 25 config PCIE_ECAM_BASE
25 26 default 0xe0000000
board/intel/cougarcanyon2/Kconfig
Diff comments   View file @ 07d7783
... ... @@ -21,6 +21,8 @@
21 21 select NORTHBRIDGE_INTEL_IVYBRIDGE
22 22 select HAVE_FSP
23 23 select BOARD_ROMSIZE_KB_2048
  24 + select BOARD_EARLY_INIT_F
  25 + select SPI_FLASH_WINBOND
24 26  
25 27 endif
board/intel/crownbay/Kconfig
Diff comments   View file @ 07d7783
... ... @@ -20,6 +20,8 @@
20 20 select X86_RESET_VECTOR
21 21 select INTEL_QUEENSBAY
22 22 select BOARD_ROMSIZE_KB_1024
  23 + select BOARD_EARLY_INIT_F
  24 + select SPI_FLASH_SST
23 25  
24 26 endif
board/intel/galileo/Kconfig
Diff comments   View file @ 07d7783
... ... @@ -20,6 +20,7 @@
20 20 select X86_RESET_VECTOR
21 21 select INTEL_QUARK
22 22 select BOARD_ROMSIZE_KB_1024
  23 + select SPI_FLASH_WINBOND
23 24  
24 25 config SMBIOS_PRODUCT_NAME
25 26 default "GalileoGen2"
board/intel/galileo/galileo.c
Diff comments   View file @ 07d7783
... ... @@ -9,11 +9,6 @@
9 9 #include <asm/arch/device.h>
10 10 #include <asm/arch/quark.h>
11 11  
12   -int board_early_init_f(void)
13   -{
14   - return 0;
15   -}
16   -
17 12 /*
18 13 * Intel Galileo gen2 board uses GPIO Resume Well bank pin0 as the PERST# pin.
19 14 *
board/intel/minnowmax/Kconfig
Diff comments   View file @ 07d7783
... ... @@ -21,6 +21,7 @@
21 21 select X86_RESET_VECTOR if !EFI_STUB
22 22 select INTEL_BAYTRAIL
23 23 select BOARD_ROMSIZE_KB_8192
  24 + select SPI_FLASH_STMICRO
24 25  
25 26 config PCIE_ECAM_BASE
26 27 default 0xe0000000
board/intel/minnowmax/minnowmax.c
Diff comments   View file @ 07d7783
... ... @@ -12,11 +12,6 @@
12 12  
13 13 #define GPIO_BANKE_NAME "gpioe"
14 14  
15   -int arch_early_init_r(void)
16   -{
17   - return 0;
18   -}
19   -
20 15 int misc_init_r(void)
21 16 {
22 17 struct udevice *dev;
... ... @@ -871,7 +871,6 @@
871 871  
872 872 config ARCH_EARLY_INIT_R
873 873 bool "Call arch-specific init soon after relocation"
874   - default y if X86
875 874 help
876 875 With this option U-Boot will call arch_early_init_r() soon after
877 876 relocation. Driver model is running by this point, and the cache
... ... @@ -888,7 +887,6 @@
888 887  
889 888 config BOARD_EARLY_INIT_F
890 889 bool "Call board-specific init before relocation"
891   - default y if X86
892 890 help
893 891 Some boards need to perform initialisation as soon as possible
894 892 after boot. With this option, U-Boot calls board_early_init_f()
configs/bayleybay_defconfig
Diff comments   View file @ 07d7783
... ... @@ -3,8 +3,6 @@
3 3 CONFIG_DEFAULT_DEVICE_TREE="bayleybay"
4 4 CONFIG_TARGET_BAYLEYBAY=y
5 5 CONFIG_INTERNAL_UART=y
6   -CONFIG_HAVE_INTEL_ME=y
7   -CONFIG_ENABLE_MRC_CACHE=y
8 6 CONFIG_SMP=y
9 7 CONFIG_HAVE_VGA_BIOS=y
10 8 CONFIG_VGA_BIOS_ADDR=0xfffa0000
... ... @@ -16,9 +14,6 @@
16 14 CONFIG_BOOTSTAGE=y
17 15 CONFIG_BOOTSTAGE_REPORT=y
18 16 CONFIG_SYS_CONSOLE_INFO_QUIET=y
19   -# CONFIG_ARCH_EARLY_INIT_R is not set
20   -CONFIG_ARCH_MISC_INIT=y
21   -# CONFIG_BOARD_EARLY_INIT_F is not set
22 17 CONFIG_HUSH_PARSER=y
23 18 CONFIG_CMD_CPU=y
24 19 # CONFIG_CMD_IMLS is not set
25 20  
26 21  
27 22  
28 23  
29 24  
... ... @@ -43,33 +38,13 @@
43 38 CONFIG_MAC_PARTITION=y
44 39 CONFIG_ISO_PARTITION=y
45 40 CONFIG_EFI_PARTITION=y
46   -CONFIG_OF_CONTROL=y
47 41 CONFIG_REGMAP=y
48 42 CONFIG_SYSCON=y
49   -CONFIG_SCSI=y
50 43 CONFIG_CPU=y
51   -CONFIG_MMC=y
52   -CONFIG_MMC_PCI=y
53   -CONFIG_MMC_SDHCI=y
54   -CONFIG_MMC_SDHCI_SDMA=y
55   -CONFIG_SPI_FLASH=y
56   -CONFIG_SPI_FLASH_GIGADEVICE=y
57   -CONFIG_SPI_FLASH_MACRONIX=y
58   -CONFIG_SPI_FLASH_WINBOND=y
59   -CONFIG_DM_ETH=y
60 44 CONFIG_E1000=y
61   -CONFIG_DM_PCI=y
62   -CONFIG_DM_RTC=y
63   -CONFIG_SYS_NS16550=y
64   -CONFIG_ICH_SPI=y
65   -CONFIG_TIMER=y
66   -CONFIG_DM_USB=y
67 45 CONFIG_USB_STORAGE=y
68 46 CONFIG_USB_KEYBOARD=y
69   -CONFIG_DM_VIDEO=y
70   -CONFIG_VIDEO_VESA=y
71 47 CONFIG_FRAMEBUFFER_SET_VESA_MODE=y
72 48 CONFIG_FRAMEBUFFER_VESA_MODE_11A=y
73 49 CONFIG_CONSOLE_SCROLL_LINES=5
74   -CONFIG_USE_PRIVATE_LIBGCC=y
configs/chromebook_link64_defconfig
Diff comments   View file @ 07d7783
... ... @@ -11,7 +11,6 @@
11 11 CONFIG_DEFAULT_DEVICE_TREE="chromebook_link"
12 12 CONFIG_TARGET_CHROMEBOOK_LINK64=y
13 13 CONFIG_DEBUG_UART=y
14   -CONFIG_ENABLE_MRC_CACHE=y
15 14 CONFIG_HAVE_MRC=y
16 15 CONFIG_SMP=y
17 16 CONFIG_HAVE_VGA_BIOS=y
18 17  
... ... @@ -19,10 +18,10 @@
19 18 CONFIG_SPL_LOAD_FIT=y
20 19 CONFIG_BOOTSTAGE=y
21 20 CONFIG_BOOTSTAGE_REPORT=y
22   -CONFIG_ENV_IS_IN_SPI_FLASH=y
23 21 CONFIG_SYS_CONSOLE_INFO_QUIET=y
24 22 CONFIG_SPL_SYS_MALLOC_SIMPLE=y
25 23 CONFIG_SPL_CPU_SUPPORT=y
  24 +CONFIG_SPL_ENV_SUPPORT=y
26 25 CONFIG_SPL_I2C_SUPPORT=y
27 26 CONFIG_SPL_NET_SUPPORT=y
28 27 CONFIG_SPL_PCI_SUPPORT=y
29 28  
30 29  
31 30  
32 31  
33 32  
34 33  
... ... @@ -51,44 +50,28 @@
51 50 CONFIG_CMD_EXT4_WRITE=y
52 51 CONFIG_CMD_FAT=y
53 52 CONFIG_CMD_FS_GENERIC=y
54   -CONFIG_OF_CONTROL=y
55 53 CONFIG_SPL_OF_CONTROL=y
56 54 CONFIG_SPL_DM=y
57 55 CONFIG_REGMAP=y
58 56 CONFIG_SPL_REGMAP=y
59 57 CONFIG_SYSCON=y
60 58 CONFIG_SPL_SYSCON=y
61   -CONFIG_SCSI=y
62   -CONFIG_DM_SCSI=y
63   -CONFIG_BLK=y
64 59 CONFIG_CPU=y
65 60 CONFIG_DM_I2C=y
66 61 CONFIG_SYS_I2C_INTEL=y
67 62 CONFIG_CROS_EC=y
68 63 CONFIG_CROS_EC_LPC=y
69   -CONFIG_SPI_FLASH=y
70   -CONFIG_SPI_FLASH_GIGADEVICE=y
71   -CONFIG_SPI_FLASH_MACRONIX=y
72   -CONFIG_SPI_FLASH_WINBOND=y
73   -CONFIG_DM_PCI=y
74   -CONFIG_DM_RTC=y
75 64 CONFIG_DEBUG_UART_BASE=0x3f8
76 65 CONFIG_DEBUG_UART_CLOCK=1843200
77 66 CONFIG_DEBUG_UART_BOARD_INIT=y
78 67 CONFIG_SYS_NS16550=y
79   -CONFIG_ICH_SPI=y
80   -CONFIG_TIMER=y
81 68 CONFIG_TPM_TIS_LPC=y
82   -CONFIG_DM_USB=y
83 69 CONFIG_USB_STORAGE=y
84 70 CONFIG_USB_KEYBOARD=y
85   -CONFIG_DM_VIDEO=y
86   -CONFIG_VIDEO_VESA=y
87 71 CONFIG_FRAMEBUFFER_SET_VESA_MODE=y
88 72 CONFIG_FRAMEBUFFER_VESA_MODE_11A=y
89 73 CONFIG_VIDEO_IVYBRIDGE_IGD=y
90 74 CONFIG_CONSOLE_SCROLL_LINES=5
91   -CONFIG_USE_PRIVATE_LIBGCC=y
92 75 CONFIG_CMD_DHRYSTONE=y
93 76 CONFIG_TPM=y
configs/chromebook_link_defconfig
Diff comments   View file @ 07d7783
... ... @@ -4,14 +4,12 @@
4 4 CONFIG_DEFAULT_DEVICE_TREE="chromebook_link"
5 5 CONFIG_TARGET_CHROMEBOOK_LINK=y
6 6 CONFIG_DEBUG_UART=y
7   -CONFIG_ENABLE_MRC_CACHE=y
8 7 CONFIG_HAVE_MRC=y
9 8 CONFIG_SMP=y
10 9 CONFIG_HAVE_VGA_BIOS=y
11 10 CONFIG_FIT=y
12 11 CONFIG_BOOTSTAGE=y
13 12 CONFIG_BOOTSTAGE_REPORT=y
14   -CONFIG_ENV_IS_IN_SPI_FLASH=y
15 13 CONFIG_SYS_CONSOLE_INFO_QUIET=y
16 14 CONFIG_HUSH_PARSER=y
17 15 CONFIG_CMD_CPU=y
18 16  
19 17  
20 18  
21 19  
22 20  
23 21  
... ... @@ -38,40 +36,24 @@
38 36 CONFIG_MAC_PARTITION=y
39 37 CONFIG_ISO_PARTITION=y
40 38 CONFIG_EFI_PARTITION=y
41   -CONFIG_OF_CONTROL=y
42 39 CONFIG_REGMAP=y
43 40 CONFIG_SYSCON=y
44   -CONFIG_SCSI=y
45   -CONFIG_DM_SCSI=y
46   -CONFIG_BLK=y
47 41 CONFIG_CPU=y
48 42 CONFIG_DM_I2C=y
49 43 CONFIG_SYS_I2C_INTEL=y
50 44 CONFIG_CROS_EC=y
51 45 CONFIG_CROS_EC_LPC=y
52   -CONFIG_SPI_FLASH=y
53   -CONFIG_SPI_FLASH_GIGADEVICE=y
54   -CONFIG_SPI_FLASH_MACRONIX=y
55   -CONFIG_SPI_FLASH_WINBOND=y
56   -CONFIG_DM_PCI=y
57   -CONFIG_DM_RTC=y
58 46 CONFIG_DEBUG_UART_BASE=0x3f8
59 47 CONFIG_DEBUG_UART_CLOCK=1843200
60 48 CONFIG_DEBUG_UART_BOARD_INIT=y
61 49 CONFIG_SYS_NS16550=y
62   -CONFIG_ICH_SPI=y
63   -CONFIG_TIMER=y
64 50 CONFIG_TPM_TIS_LPC=y
65   -CONFIG_DM_USB=y
66 51 CONFIG_USB_STORAGE=y
67 52 CONFIG_USB_KEYBOARD=y
68   -CONFIG_DM_VIDEO=y
69   -CONFIG_VIDEO_VESA=y
70 53 CONFIG_FRAMEBUFFER_SET_VESA_MODE=y
71 54 CONFIG_FRAMEBUFFER_VESA_MODE_11A=y
72 55 CONFIG_VIDEO_IVYBRIDGE_IGD=y
73 56 CONFIG_CONSOLE_SCROLL_LINES=5
74   -CONFIG_USE_PRIVATE_LIBGCC=y
75 57 CONFIG_CMD_DHRYSTONE=y
76 58 CONFIG_TPM=y
configs/chromebook_samus_defconfig
Diff comments   View file @ 07d7783
... ... @@ -4,14 +4,12 @@
4 4 CONFIG_DEFAULT_DEVICE_TREE="chromebook_samus"
5 5 CONFIG_TARGET_CHROMEBOOK_SAMUS=y
6 6 CONFIG_DEBUG_UART=y
7   -CONFIG_ENABLE_MRC_CACHE=y
8 7 CONFIG_HAVE_MRC=y
9 8 CONFIG_HAVE_REFCODE=y
10 9 CONFIG_SMP=y
11 10 CONFIG_HAVE_VGA_BIOS=y
12 11 CONFIG_BOOTSTAGE=y
13 12 CONFIG_BOOTSTAGE_REPORT=y
14   -CONFIG_ENV_IS_IN_SPI_FLASH=y
15 13 CONFIG_SYS_CONSOLE_INFO_QUIET=y
16 14 CONFIG_HUSH_PARSER=y
17 15 CONFIG_CMD_CPU=y
18 16  
19 17  
20 18  
21 19  
22 20  
23 21  
24 22  
25 23  
... ... @@ -38,35 +36,20 @@
38 36 CONFIG_MAC_PARTITION=y
39 37 CONFIG_ISO_PARTITION=y
40 38 CONFIG_EFI_PARTITION=y
41   -CONFIG_OF_CONTROL=y
42 39 CONFIG_REGMAP=y
43 40 CONFIG_SYSCON=y
44   -CONFIG_SCSI=y
45 41 CONFIG_CPU=y
46   -CONFIG_INTEL_BROADWELL_GPIO=y
47 42 CONFIG_CROS_EC=y
48 43 CONFIG_CROS_EC_LPC=y
49   -CONFIG_SPI_FLASH=y
50   -CONFIG_SPI_FLASH_GIGADEVICE=y
51   -CONFIG_SPI_FLASH_MACRONIX=y
52   -CONFIG_SPI_FLASH_WINBOND=y
53   -CONFIG_DM_PCI=y
54   -CONFIG_DM_RTC=y
55 44 CONFIG_DEBUG_UART_BASE=0x3f8
56 45 CONFIG_DEBUG_UART_CLOCK=1843200
57 46 CONFIG_DEBUG_UART_BOARD_INIT=y
58 47 CONFIG_SYS_NS16550=y
59   -CONFIG_ICH_SPI=y
60   -CONFIG_TIMER=y
61 48 CONFIG_TPM_TIS_LPC=y
62   -CONFIG_DM_USB=y
63 49 CONFIG_USB_STORAGE=y
64 50 CONFIG_USB_KEYBOARD=y
65   -CONFIG_DM_VIDEO=y
66 51 CONFIG_FRAMEBUFFER_SET_VESA_MODE=y
67 52 CONFIG_FRAMEBUFFER_VESA_MODE_11A=y
68   -CONFIG_VIDEO_BROADWELL_IGD=y
69 53 CONFIG_CONSOLE_SCROLL_LINES=5
70   -CONFIG_USE_PRIVATE_LIBGCC=y
71 54 CONFIG_TPM=y
configs/chromebox_panther_defconfig
Diff comments   View file @ 07d7783
... ... @@ -2,13 +2,11 @@
2 2 CONFIG_VENDOR_GOOGLE=y
3 3 CONFIG_DEFAULT_DEVICE_TREE="chromebox_panther"
4 4 CONFIG_TARGET_CHROMEBOX_PANTHER=y
5   -CONFIG_ENABLE_MRC_CACHE=y
6 5 CONFIG_HAVE_MRC=y
7 6 CONFIG_HAVE_VGA_BIOS=y
8 7 CONFIG_FIT=y
9 8 CONFIG_BOOTSTAGE=y
10 9 CONFIG_BOOTSTAGE_REPORT=y
11   -CONFIG_ENV_IS_IN_SPI_FLASH=y
12 10 CONFIG_SYS_CONSOLE_INFO_QUIET=y
13 11 CONFIG_HUSH_PARSER=y
14 12 # CONFIG_CMD_IMLS is not set
15 13  
16 14  
17 15  
18 16  
19 17  
20 18  
21 19  
... ... @@ -34,34 +32,17 @@
34 32 CONFIG_MAC_PARTITION=y
35 33 CONFIG_ISO_PARTITION=y
36 34 CONFIG_EFI_PARTITION=y
37   -CONFIG_OF_CONTROL=y
38 35 CONFIG_REGMAP=y
39 36 CONFIG_SYSCON=y
40   -CONFIG_SCSI=y
41   -CONFIG_DM_SCSI=y
42   -CONFIG_BLK=y
43 37 CONFIG_CROS_EC=y
44 38 CONFIG_CROS_EC_LPC=y
45   -CONFIG_SPI_FLASH=y
46   -CONFIG_SPI_FLASH_GIGADEVICE=y
47   -CONFIG_SPI_FLASH_MACRONIX=y
48   -CONFIG_SPI_FLASH_WINBOND=y
49   -CONFIG_DM_ETH=y
50 39 CONFIG_RTL8169=y
51   -CONFIG_DM_PCI=y
52   -CONFIG_DM_RTC=y
53 40 CONFIG_SYS_NS16550=y
54   -CONFIG_ICH_SPI=y
55   -CONFIG_TIMER=y
56 41 CONFIG_TPM_TIS_LPC=y
57   -CONFIG_DM_USB=y
58 42 CONFIG_USB_STORAGE=y
59 43 CONFIG_USB_KEYBOARD=y
60   -CONFIG_DM_VIDEO=y
61   -CONFIG_VIDEO_VESA=y
62 44 CONFIG_FRAMEBUFFER_SET_VESA_MODE=y
63 45 CONFIG_FRAMEBUFFER_VESA_MODE_11A=y
64 46 CONFIG_CONSOLE_SCROLL_LINES=5
65   -CONFIG_USE_PRIVATE_LIBGCC=y
66 47 CONFIG_TPM=y
configs/conga-qeval20-qa3-e3845-internal-uart_defconfig
Diff comments   View file @ 07d7783
... ... @@ -4,8 +4,6 @@
4 4 CONFIG_DEFAULT_DEVICE_TREE="conga-qeval20-qa3-e3845"
5 5 CONFIG_INTERNAL_UART=y
6 6 CONFIG_DEBUG_UART=y
7   -CONFIG_HAVE_INTEL_ME=y
8   -CONFIG_ENABLE_MRC_CACHE=y
9 7 CONFIG_SMP=y
10 8 CONFIG_HAVE_VGA_BIOS=y
11 9 CONFIG_GENERATE_PIRQ_TABLE=y
... ... @@ -17,7 +15,6 @@
17 15 CONFIG_BOOTSTAGE=y
18 16 CONFIG_BOOTSTAGE_REPORT=y
19 17 CONFIG_SYS_CONSOLE_INFO_QUIET=y
20   -CONFIG_ARCH_MISC_INIT=y
21 18 CONFIG_HUSH_PARSER=y
22 19 CONFIG_CMD_CPU=y
23 20 # CONFIG_CMD_IMLS is not set
24 21  
25 22  
26 23  
27 24  
28 25  
... ... @@ -43,38 +40,18 @@
43 40 CONFIG_MAC_PARTITION=y
44 41 CONFIG_ISO_PARTITION=y
45 42 CONFIG_EFI_PARTITION=y
46   -CONFIG_OF_CONTROL=y
47 43 CONFIG_REGMAP=y
48 44 CONFIG_SYSCON=y
49 45 CONFIG_CPU=y
50 46 CONFIG_DM_I2C=y
51 47 CONFIG_SYS_I2C_INTEL=y
52 48 CONFIG_WINBOND_W83627=y
53   -CONFIG_MMC=y
54   -CONFIG_MMC_PCI=y
55   -CONFIG_MMC_SDHCI=y
56   -CONFIG_MMC_SDHCI_SDMA=y
57   -CONFIG_SPI_FLASH=y
58   -CONFIG_SPI_FLASH_GIGADEVICE=y
59   -CONFIG_SPI_FLASH_MACRONIX=y
60   -CONFIG_SPI_FLASH_STMICRO=y
61   -CONFIG_SPI_FLASH_WINBOND=y
62   -CONFIG_DM_ETH=y
63 49 CONFIG_E1000=y
64   -CONFIG_DM_PCI=y
65   -CONFIG_DM_RTC=y
66 50 CONFIG_DEBUG_UART_BASE=0x3f8
67 51 CONFIG_DEBUG_UART_CLOCK=1843200
68   -CONFIG_SYS_NS16550=y
69   -CONFIG_ICH_SPI=y
70   -CONFIG_TIMER=y
71   -CONFIG_DM_USB=y
72 52 CONFIG_USB_STORAGE=y
73 53 CONFIG_USB_KEYBOARD=y
74   -CONFIG_DM_VIDEO=y
75   -CONFIG_VIDEO_VESA=y
76 54 CONFIG_FRAMEBUFFER_SET_VESA_MODE=y
77 55 CONFIG_FRAMEBUFFER_VESA_MODE_114=y
78 56 CONFIG_CONSOLE_SCROLL_LINES=5
79   -CONFIG_USE_PRIVATE_LIBGCC=y
configs/conga-qeval20-qa3-e3845_defconfig
Diff comments   View file @ 07d7783
... ... @@ -3,8 +3,6 @@
3 3 CONFIG_TARGET_CONGA_QEVAL20_QA3_E3845=y
4 4 CONFIG_DEFAULT_DEVICE_TREE="conga-qeval20-qa3-e3845"
5 5 CONFIG_DEBUG_UART=y
6   -CONFIG_HAVE_INTEL_ME=y
7   -CONFIG_ENABLE_MRC_CACHE=y
8 6 CONFIG_SMP=y
9 7 CONFIG_HAVE_VGA_BIOS=y
10 8 CONFIG_GENERATE_PIRQ_TABLE=y
... ... @@ -16,7 +14,6 @@
16 14 CONFIG_BOOTSTAGE=y
17 15 CONFIG_BOOTSTAGE_REPORT=y
18 16 CONFIG_SYS_CONSOLE_INFO_QUIET=y
19   -CONFIG_ARCH_MISC_INIT=y
20 17 CONFIG_HUSH_PARSER=y
21 18 CONFIG_CMD_CPU=y
22 19 # CONFIG_CMD_IMLS is not set
23 20  
24 21  
25 22  
26 23  
27 24  
... ... @@ -42,38 +39,18 @@
42 39 CONFIG_MAC_PARTITION=y
43 40 CONFIG_ISO_PARTITION=y
44 41 CONFIG_EFI_PARTITION=y
45   -CONFIG_OF_CONTROL=y
46 42 CONFIG_REGMAP=y
47 43 CONFIG_SYSCON=y
48 44 CONFIG_CPU=y
49 45 CONFIG_DM_I2C=y
50 46 CONFIG_SYS_I2C_INTEL=y
51 47 CONFIG_WINBOND_W83627=y
52   -CONFIG_MMC=y
53   -CONFIG_MMC_PCI=y
54   -CONFIG_MMC_SDHCI=y
55   -CONFIG_MMC_SDHCI_SDMA=y
56   -CONFIG_SPI_FLASH=y
57   -CONFIG_SPI_FLASH_GIGADEVICE=y
58   -CONFIG_SPI_FLASH_MACRONIX=y
59   -CONFIG_SPI_FLASH_STMICRO=y
60   -CONFIG_SPI_FLASH_WINBOND=y
61   -CONFIG_DM_ETH=y
62 48 CONFIG_E1000=y
63   -CONFIG_DM_PCI=y
64   -CONFIG_DM_RTC=y
65 49 CONFIG_DEBUG_UART_BASE=0x3f8
66 50 CONFIG_DEBUG_UART_CLOCK=1843200
67   -CONFIG_SYS_NS16550=y
68   -CONFIG_ICH_SPI=y
69   -CONFIG_TIMER=y
70   -CONFIG_DM_USB=y
71 51 CONFIG_USB_STORAGE=y
72 52 CONFIG_USB_KEYBOARD=y
73   -CONFIG_DM_VIDEO=y
74   -CONFIG_VIDEO_VESA=y
75 53 CONFIG_FRAMEBUFFER_SET_VESA_MODE=y
76 54 CONFIG_FRAMEBUFFER_VESA_MODE_114=y
77 55 CONFIG_CONSOLE_SCROLL_LINES=5
78   -CONFIG_USE_PRIVATE_LIBGCC=y
configs/coreboot-x86_defconfig
Diff comments   View file @ 07d7783
... ... @@ -4,9 +4,7 @@
4 4 CONFIG_FIT=y
5 5 CONFIG_BOOTSTAGE=y
6 6 CONFIG_BOOTSTAGE_REPORT=y
7   -CONFIG_ENV_IS_NOWHERE=y
8 7 CONFIG_SYS_CONSOLE_INFO_QUIET=y
9   -# CONFIG_BOARD_EARLY_INIT_F is not set
10 8 CONFIG_HUSH_PARSER=y
11 9 # CONFIG_CMD_IMLS is not set
12 10 CONFIG_CMD_IDE=y
13 11  
14 12  
15 13  
16 14  
... ... @@ -31,26 +29,11 @@
31 29 CONFIG_MAC_PARTITION=y
32 30 CONFIG_ISO_PARTITION=y
33 31 CONFIG_EFI_PARTITION=y
34   -CONFIG_OF_CONTROL=y
35 32 CONFIG_REGMAP=y
36 33 CONFIG_SYSCON=y
37   -CONFIG_SPI_FLASH=y
38   -CONFIG_SPI_FLASH_GIGADEVICE=y
39   -CONFIG_SPI_FLASH_MACRONIX=y
40   -CONFIG_SPI_FLASH_WINBOND=y
41   -CONFIG_DM_ETH=y
42   -CONFIG_E1000=y
43   -CONFIG_DM_PCI=y
44   -CONFIG_DM_RTC=y
45   -CONFIG_SYS_NS16550=y
46   -CONFIG_TIMER=y
47 34 CONFIG_TPM_TIS_LPC=y
48   -CONFIG_DM_USB=y
49 35 CONFIG_USB_STORAGE=y
50 36 CONFIG_USB_KEYBOARD=y
51   -CONFIG_DM_VIDEO=y
52   -CONFIG_VIDEO_COREBOOT=y
53 37 CONFIG_CONSOLE_SCROLL_LINES=5
54   -CONFIG_USE_PRIVATE_LIBGCC=y
55 38 CONFIG_TPM=y
configs/cougarcanyon2_defconfig
Diff comments   View file @ 07d7783
... ... @@ -2,10 +2,8 @@
2 2 CONFIG_VENDOR_INTEL=y
3 3 CONFIG_DEFAULT_DEVICE_TREE="cougarcanyon2"
4 4 CONFIG_TARGET_COUGARCANYON2=y
5   -CONFIG_ENV_IS_IN_SPI_FLASH=y
6   -CONFIG_CONSOLE_MUX=y
  5 +# CONFIG_ENABLE_MRC_CACHE is not set
7 6 CONFIG_SYS_CONSOLE_INFO_QUIET=y
8   -# CONFIG_ARCH_EARLY_INIT_R is not set
9 7 CONFIG_HUSH_PARSER=y
10 8 # CONFIG_CMD_IMLS is not set
11 9 # CONFIG_CMD_FLASH is not set
12 10  
13 11  
14 12  
... ... @@ -27,19 +25,10 @@
27 25 CONFIG_MAC_PARTITION=y
28 26 CONFIG_ISO_PARTITION=y
29 27 CONFIG_EFI_PARTITION=y
30   -CONFIG_OF_CONTROL=y
31 28 CONFIG_REGMAP=y
32 29 CONFIG_SYSCON=y
33   -CONFIG_SCSI=y
34   -CONFIG_SPI_FLASH=y
35   -CONFIG_SPI_FLASH_WINBOND=y
36   -CONFIG_DM_PCI=y
37   -CONFIG_DM_RTC=y
38 30 CONFIG_SYS_NS16550=y
39   -CONFIG_ICH_SPI=y
40   -CONFIG_TIMER=y
41   -CONFIG_DM_USB=y
42 31 CONFIG_USB_STORAGE=y
43 32 CONFIG_USB_KEYBOARD=y
44   -CONFIG_USE_PRIVATE_LIBGCC=y
  33 +# CONFIG_VIDEO_VESA is not set
configs/crownbay_defconfig
Diff comments   View file @ 07d7783
... ... @@ -8,7 +8,6 @@
8 8 CONFIG_GENERATE_PIRQ_TABLE=y
9 9 CONFIG_GENERATE_MP_TABLE=y
10 10 CONFIG_FIT=y
11   -CONFIG_ENV_IS_IN_SPI_FLASH=y
12 11 CONFIG_SYS_CONSOLE_INFO_QUIET=y
13 12 CONFIG_HUSH_PARSER=y
14 13 CONFIG_CMD_CPU=y
15 14  
16 15  
17 16  
18 17  
19 18  
... ... @@ -33,34 +32,12 @@
33 32 CONFIG_MAC_PARTITION=y
34 33 CONFIG_ISO_PARTITION=y
35 34 CONFIG_EFI_PARTITION=y
36   -CONFIG_OF_CONTROL=y
37 35 CONFIG_REGMAP=y
38 36 CONFIG_SYSCON=y
39   -CONFIG_SCSI=y
40 37 CONFIG_CPU=y
41   -CONFIG_MMC=y
42   -CONFIG_MMC_PCI=y
43   -CONFIG_MMC_SDHCI=y
44   -CONFIG_MMC_SDHCI_SDMA=y
45   -CONFIG_SPI_FLASH=y
46   -CONFIG_SPI_FLASH_GIGADEVICE=y
47   -CONFIG_SPI_FLASH_MACRONIX=y
48   -CONFIG_SPI_FLASH_SST=y
49   -CONFIG_SPI_FLASH_WINBOND=y
50   -CONFIG_DM_ETH=y
51 38 CONFIG_E1000=y
52   -CONFIG_PCH_GBE=y
53   -CONFIG_DM_PCI=y
54   -CONFIG_DM_RTC=y
55   -CONFIG_SYS_NS16550=y
56   -CONFIG_ICH_SPI=y
57   -CONFIG_TIMER=y
58   -CONFIG_DM_USB=y
59 39 CONFIG_USB_STORAGE=y
60 40 CONFIG_USB_KEYBOARD=y
61   -CONFIG_DM_VIDEO=y
62   -CONFIG_VIDEO_VESA=y
63 41 CONFIG_FRAMEBUFFER_SET_VESA_MODE=y
64 42 CONFIG_CONSOLE_SCROLL_LINES=5
65   -CONFIG_USE_PRIVATE_LIBGCC=y
configs/dfi-bt700-q7x-151_defconfig
Diff comments   View file @ 07d7783
... ... @@ -3,8 +3,6 @@
3 3 CONFIG_DEFAULT_DEVICE_TREE="dfi-bt700-q7x-151"
4 4 CONFIG_TARGET_DFI_BT700=y
5 5 CONFIG_DEBUG_UART=y
6   -CONFIG_HAVE_INTEL_ME=y
7   -CONFIG_ENABLE_MRC_CACHE=y
8 6 CONFIG_SMP=y
9 7 CONFIG_HAVE_VGA_BIOS=y
10 8 CONFIG_GENERATE_PIRQ_TABLE=y
... ... @@ -16,7 +14,6 @@
16 14 CONFIG_BOOTSTAGE=y
17 15 CONFIG_BOOTSTAGE_REPORT=y
18 16 CONFIG_SYS_CONSOLE_INFO_QUIET=y
19   -# CONFIG_ARCH_EARLY_INIT_R is not set
20 17 CONFIG_HUSH_PARSER=y
21 18 CONFIG_CMD_CPU=y
22 19 # CONFIG_CMD_IMLS is not set
23 20  
24 21  
25 22  
26 23  
27 24  
... ... @@ -41,37 +38,17 @@
41 38 CONFIG_MAC_PARTITION=y
42 39 CONFIG_ISO_PARTITION=y
43 40 CONFIG_EFI_PARTITION=y
44   -CONFIG_OF_CONTROL=y
45 41 CONFIG_REGMAP=y
46 42 CONFIG_SYSCON=y
47 43 CONFIG_CPU=y
48 44 CONFIG_DM_I2C=y
49 45 CONFIG_NUVOTON_NCT6102D=y
50   -CONFIG_MMC=y
51   -CONFIG_MMC_PCI=y
52   -CONFIG_MMC_SDHCI=y
53   -CONFIG_MMC_SDHCI_SDMA=y
54   -CONFIG_SPI_FLASH=y
55   -CONFIG_SPI_FLASH_GIGADEVICE=y
56   -CONFIG_SPI_FLASH_MACRONIX=y
57   -CONFIG_SPI_FLASH_STMICRO=y
58   -CONFIG_SPI_FLASH_WINBOND=y
59   -CONFIG_DM_ETH=y
60 46 CONFIG_E1000=y
61   -CONFIG_DM_PCI=y
62   -CONFIG_DM_RTC=y
63 47 CONFIG_DEBUG_UART_BASE=0x3f8
64 48 CONFIG_DEBUG_UART_CLOCK=1843200
65   -CONFIG_SYS_NS16550=y
66   -CONFIG_ICH_SPI=y
67   -CONFIG_TIMER=y
68   -CONFIG_DM_USB=y
69 49 CONFIG_USB_STORAGE=y
70 50 CONFIG_USB_KEYBOARD=y
71   -CONFIG_DM_VIDEO=y
72   -CONFIG_VIDEO_VESA=y
73 51 CONFIG_FRAMEBUFFER_SET_VESA_MODE=y
74 52 CONFIG_FRAMEBUFFER_VESA_MODE_114=y
75 53 CONFIG_CONSOLE_SCROLL_LINES=5
76   -CONFIG_USE_PRIVATE_LIBGCC=y
configs/edison_defconfig
Diff comments   View file @ 07d7783
... ... @@ -3,8 +3,6 @@
3 3 CONFIG_DEFAULT_DEVICE_TREE="edison"
4 4 CONFIG_TARGET_EDISON=y
5 5 CONFIG_SMP=y
6   -# CONFIG_ARCH_EARLY_INIT_R is not set
7   -# CONFIG_BOARD_EARLY_INIT_F is not set
8 6 CONFIG_HUSH_PARSER=y
9 7 CONFIG_CMD_CPU=y
10 8 # CONFIG_CMD_IMLS is not set
11 9  
12 10  
13 11  
14 12  
... ... @@ -25,30 +23,17 @@
25 23 CONFIG_CMD_EXT4_WRITE=y
26 24 CONFIG_CMD_FAT=y
27 25 CONFIG_CMD_FS_GENERIC=y
28   -CONFIG_OF_CONTROL=y
29 26 CONFIG_OF_EMBED=y
30 27 CONFIG_CPU=y
31 28 CONFIG_DFU_MMC=y
32 29 CONFIG_DFU_RAM=y
33   -CONFIG_MMC=y
34   -CONFIG_DM_MMC=y
35   -CONFIG_MMC_SDHCI=y
36   -CONFIG_MMC_SDHCI_SDMA=y
37   -CONFIG_MMC_SDHCI_TANGIER=y
38   -CONFIG_DM_PCI=y
39 30 CONFIG_DM_PCI_COMPAT=y
40   -CONFIG_DM_RTC=y
41   -CONFIG_INTEL_MID_SERIAL=y
42   -CONFIG_TIMER=y
43   -CONFIG_USB_DWC3=y
44 31 CONFIG_USB_DWC3_GADGET=y
45 32 CONFIG_USB_GADGET=y
46 33 CONFIG_USB_GADGET_DOWNLOAD=y
47 34 CONFIG_G_DNL_MANUFACTURER="Intel"
48 35 CONFIG_G_DNL_VENDOR_NUM=0x8087
49 36 CONFIG_G_DNL_PRODUCT_NUM=0x0a99
50   -CONFIG_TANGIER_WATCHDOG=y
51 37 CONFIG_FAT_WRITE=y
52   -CONFIG_USE_PRIVATE_LIBGCC=y
53 38 CONFIG_SHA1=y
configs/efi-x86_defconfig
Diff comments   View file @ 07d7783
... ... @@ -5,10 +5,7 @@
5 5 CONFIG_DEBUG_UART=y
6 6 CONFIG_FIT=y
7 7 CONFIG_ENV_IS_NOWHERE=y
8   -CONFIG_CONSOLE_MUX=y
9 8 CONFIG_SYS_CONSOLE_INFO_QUIET=y
10   -# CONFIG_ARCH_EARLY_INIT_R is not set
11   -# CONFIG_BOARD_EARLY_INIT_F is not set
12 9 CONFIG_HUSH_PARSER=y
13 10 # CONFIG_CMD_BOOTM is not set
14 11 # CONFIG_CMD_IMLS is not set
... ... @@ -20,7 +17,6 @@
20 17 # CONFIG_CMD_NET is not set
21 18 CONFIG_CMD_DHCP=y
22 19 CONFIG_CMD_PING=y
23   -CONFIG_CMD_DATE=y
24 20 CONFIG_CMD_TIME=y
25 21 CONFIG_CMD_EXT2=y
26 22 CONFIG_CMD_EXT4=y
27 23  
28 24  
... ... @@ -30,16 +26,12 @@
30 26 CONFIG_MAC_PARTITION=y
31 27 CONFIG_ISO_PARTITION=y
32 28 CONFIG_EFI_PARTITION=y
33   -CONFIG_OF_CONTROL=y
34 29 CONFIG_OF_EMBED=y
35   -CONFIG_DM_PCI=y
  30 +# CONFIG_DM_ETH is not set
36 31 CONFIG_DEBUG_EFI_CONSOLE=y
37 32 CONFIG_DEBUG_UART_BASE=0
38 33 CONFIG_DEBUG_UART_CLOCK=0
39 34 CONFIG_ICH_SPI=y
40   -CONFIG_TIMER=y
41   -CONFIG_USB_STORAGE=y
42   -CONFIG_USB_KEYBOARD=y
43 35 CONFIG_EFI=y
44 36 # CONFIG_EFI_LOADER is not set
configs/galileo_defconfig
Diff comments   View file @ 07d7783
... ... @@ -2,17 +2,13 @@
2 2 CONFIG_VENDOR_INTEL=y
3 3 CONFIG_DEFAULT_DEVICE_TREE="galileo"
4 4 CONFIG_TARGET_GALILEO=y
5   -CONFIG_ENABLE_MRC_CACHE=y
6 5 CONFIG_GENERATE_PIRQ_TABLE=y
7 6 CONFIG_GENERATE_MP_TABLE=y
8 7 CONFIG_GENERATE_ACPI_TABLE=y
9 8 CONFIG_FIT=y
10 9 CONFIG_BOOTSTAGE=y
11 10 CONFIG_BOOTSTAGE_REPORT=y
12   -CONFIG_ENV_IS_IN_SPI_FLASH=y
13   -CONFIG_CONSOLE_MUX=y
14 11 CONFIG_SYS_CONSOLE_INFO_QUIET=y
15   -CONFIG_ARCH_MISC_INIT=y
16 12 CONFIG_HUSH_PARSER=y
17 13 CONFIG_CMD_CPU=y
18 14 # CONFIG_CMD_IMLS is not set
19 15  
20 16  
... ... @@ -37,28 +33,10 @@
37 33 CONFIG_MAC_PARTITION=y
38 34 CONFIG_ISO_PARTITION=y
39 35 CONFIG_EFI_PARTITION=y
40   -CONFIG_OF_CONTROL=y
41 36 CONFIG_NET_RANDOM_ETHADDR=y
42 37 CONFIG_REGMAP=y
43 38 CONFIG_SYSCON=y
44 39 CONFIG_CPU=y
45   -CONFIG_MMC=y
46   -CONFIG_MMC_PCI=y
47   -CONFIG_MMC_SDHCI=y
48   -CONFIG_MMC_SDHCI_SDMA=y
49   -CONFIG_SPI_FLASH=y
50   -CONFIG_SPI_FLASH_GIGADEVICE=y
51   -CONFIG_SPI_FLASH_MACRONIX=y
52   -CONFIG_SPI_FLASH_WINBOND=y
53   -CONFIG_DM_ETH=y
54   -CONFIG_ETH_DESIGNWARE=y
55   -CONFIG_DM_PCI=y
56   -CONFIG_DM_RTC=y
57   -CONFIG_SYS_NS16550=y
58   -CONFIG_ICH_SPI=y
59   -CONFIG_TIMER=y
60   -CONFIG_DM_USB=y
61 40 CONFIG_USB_STORAGE=y
62 41 CONFIG_USB_KEYBOARD=y
63   -CONFIG_USE_PRIVATE_LIBGCC=y
configs/minnowmax_defconfig
Diff comments   View file @ 07d7783
... ... @@ -4,8 +4,6 @@
4 4 CONFIG_TARGET_MINNOWMAX=y
5 5 CONFIG_INTERNAL_UART=y
6 6 CONFIG_DEBUG_UART=y
7   -CONFIG_HAVE_INTEL_ME=y
8   -CONFIG_ENABLE_MRC_CACHE=y
9 7 CONFIG_SMP=y
10 8 CONFIG_HAVE_VGA_BIOS=y
11 9 CONFIG_GENERATE_PIRQ_TABLE=y
... ... @@ -18,8 +16,6 @@
18 16 CONFIG_BOOTSTAGE=y
19 17 CONFIG_BOOTSTAGE_REPORT=y
20 18 CONFIG_SYS_CONSOLE_INFO_QUIET=y
21   -CONFIG_ARCH_MISC_INIT=y
22   -# CONFIG_BOARD_EARLY_INIT_F is not set
23 19 CONFIG_HUSH_PARSER=y
24 20 CONFIG_CMD_CPU=y
25 21 # CONFIG_CMD_IMLS is not set
26 22  
27 23  
28 24  
29 25  
30 26  
31 27  
... ... @@ -44,37 +40,15 @@
44 40 CONFIG_MAC_PARTITION=y
45 41 CONFIG_ISO_PARTITION=y
46 42 CONFIG_EFI_PARTITION=y
47   -CONFIG_OF_CONTROL=y
48 43 CONFIG_REGMAP=y
49 44 CONFIG_SYSCON=y
50   -CONFIG_SCSI=y
51 45 CONFIG_CPU=y
52   -CONFIG_MMC=y
53   -CONFIG_MMC_PCI=y
54   -CONFIG_MMC_SDHCI=y
55   -CONFIG_MMC_SDHCI_SDMA=y
56   -CONFIG_SPI_FLASH=y
57   -CONFIG_SPI_FLASH_GIGADEVICE=y
58   -CONFIG_SPI_FLASH_MACRONIX=y
59   -CONFIG_SPI_FLASH_STMICRO=y
60   -CONFIG_SPI_FLASH_WINBOND=y
61   -CONFIG_DM_ETH=y
62 46 CONFIG_RTL8169=y
63   -CONFIG_DM_PCI=y
64   -CONFIG_DM_RTC=y
65 47 CONFIG_DEBUG_UART_BASE=0x3f8
66 48 CONFIG_DEBUG_UART_CLOCK=1843200
67   -CONFIG_SYS_NS16550=y
68   -CONFIG_ICH_SPI=y
69   -CONFIG_TIMER=y
70   -CONFIG_DM_USB=y
71   -CONFIG_USB_XHCI_HCD=y
72 49 CONFIG_USB_STORAGE=y
73 50 CONFIG_USB_KEYBOARD=y
74   -CONFIG_DM_VIDEO=y
75   -CONFIG_VIDEO_VESA=y
76 51 CONFIG_FRAMEBUFFER_SET_VESA_MODE=y
77 52 CONFIG_FRAMEBUFFER_VESA_MODE_11A=y
78 53 CONFIG_CONSOLE_SCROLL_LINES=5
79   -CONFIG_USE_PRIVATE_LIBGCC=y
configs/qemu-x86_64_defconfig
Diff comments   View file @ 07d7783
... ... @@ -5,7 +5,6 @@
5 5 CONFIG_MAX_CPUS=2
6 6 CONFIG_SPL_SERIAL_SUPPORT=y
7 7 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
8   -CONFIG_SPL_SPI_FLASH_SUPPORT=y
9 8 CONFIG_SPL_SPI_SUPPORT=y
10 9 CONFIG_X86_RUN_64BIT=y
11 10 CONFIG_DEFAULT_DEVICE_TREE="qemu-x86_i440fx"
12 11  
... ... @@ -19,9 +18,7 @@
19 18 CONFIG_SPL_LOAD_FIT=y
20 19 CONFIG_BOOTSTAGE=y
21 20 CONFIG_BOOTSTAGE_REPORT=y
22   -CONFIG_ENV_IS_NOWHERE=y
23 21 CONFIG_SYS_CONSOLE_INFO_QUIET=y
24   -# CONFIG_BOARD_EARLY_INIT_F is not set
25 22 CONFIG_SPL_SYS_MALLOC_SIMPLE=y
26 23 CONFIG_SPL_CPU_SUPPORT=y
27 24 CONFIG_SPL_ENV_SUPPORT=y
... ... @@ -51,7 +48,6 @@
51 48 CONFIG_CMD_EXT4_WRITE=y
52 49 CONFIG_CMD_FAT=y
53 50 CONFIG_CMD_FS_GENERIC=y
54   -CONFIG_OF_CONTROL=y
55 51 CONFIG_SPL_OF_CONTROL=y
56 52 CONFIG_SPL_DM=y
57 53 CONFIG_REGMAP=y
58 54  
59 55  
60 56  
... ... @@ -59,25 +55,11 @@
59 55 CONFIG_SYSCON=y
60 56 CONFIG_SPL_SYSCON=y
61 57 CONFIG_CPU=y
62   -CONFIG_SPI_FLASH=y
63   -CONFIG_SPI_FLASH_GIGADEVICE=y
64   -CONFIG_SPI_FLASH_MACRONIX=y
65   -CONFIG_SPI_FLASH_WINBOND=y
66   -CONFIG_DM_ETH=y
67   -CONFIG_E1000=y
68   -CONFIG_DM_PCI=y
69   -CONFIG_DM_RTC=y
70 58 CONFIG_DEBUG_UART_BASE=0x3f8
71 59 CONFIG_DEBUG_UART_CLOCK=1843200
72   -CONFIG_SYS_NS16550=y
73   -CONFIG_TIMER=y
74   -CONFIG_DM_USB=y
75 60 CONFIG_USB_STORAGE=y
76 61 CONFIG_USB_KEYBOARD=y
77   -CONFIG_DM_VIDEO=y
78   -CONFIG_VIDEO_VESA=y
79 62 CONFIG_FRAMEBUFFER_SET_VESA_MODE=y
80 63 CONFIG_FRAMEBUFFER_VESA_MODE_111=y
81 64 CONFIG_CONSOLE_SCROLL_LINES=5
82   -CONFIG_USE_PRIVATE_LIBGCC=y
configs/qemu-x86_defconfig
Diff comments   View file @ 07d7783
... ... @@ -8,9 +8,7 @@
8 8 CONFIG_FIT=y
9 9 CONFIG_BOOTSTAGE=y
10 10 CONFIG_BOOTSTAGE_REPORT=y
11   -CONFIG_ENV_IS_NOWHERE=y
12 11 CONFIG_SYS_CONSOLE_INFO_QUIET=y
13   -# CONFIG_BOARD_EARLY_INIT_F is not set
14 12 CONFIG_HUSH_PARSER=y
15 13 CONFIG_CMD_CPU=y
16 14 # CONFIG_CMD_IMLS is not set
17 15  
18 16  
19 17  
... ... @@ -35,27 +33,12 @@
35 33 CONFIG_MAC_PARTITION=y
36 34 CONFIG_ISO_PARTITION=y
37 35 CONFIG_EFI_PARTITION=y
38   -CONFIG_OF_CONTROL=y
39 36 CONFIG_REGMAP=y
40 37 CONFIG_SYSCON=y
41 38 CONFIG_CPU=y
42   -CONFIG_SPI_FLASH=y
43   -CONFIG_SPI_FLASH_GIGADEVICE=y
44   -CONFIG_SPI_FLASH_MACRONIX=y
45   -CONFIG_SPI_FLASH_WINBOND=y
46   -CONFIG_DM_ETH=y
47   -CONFIG_E1000=y
48   -CONFIG_DM_PCI=y
49   -CONFIG_DM_RTC=y
50   -CONFIG_SYS_NS16550=y
51   -CONFIG_TIMER=y
52   -CONFIG_DM_USB=y
53 39 CONFIG_USB_STORAGE=y
54 40 CONFIG_USB_KEYBOARD=y
55   -CONFIG_DM_VIDEO=y
56   -CONFIG_VIDEO_VESA=y
57 41 CONFIG_FRAMEBUFFER_SET_VESA_MODE=y
58 42 CONFIG_FRAMEBUFFER_VESA_MODE_111=y
59 43 CONFIG_CONSOLE_SCROLL_LINES=5
60   -CONFIG_USE_PRIVATE_LIBGCC=y
configs/qemu-x86_efi_payload32_defconfig
Diff comments   View file @ 07d7783
... ... @@ -5,9 +5,7 @@
5 5 CONFIG_FIT=y
6 6 CONFIG_BOOTSTAGE=y
7 7 CONFIG_BOOTSTAGE_REPORT=y
8   -CONFIG_ENV_IS_NOWHERE=y
9 8 CONFIG_SYS_CONSOLE_INFO_QUIET=y
10   -# CONFIG_BOARD_EARLY_INIT_F is not set
11 9 CONFIG_HUSH_PARSER=y
12 10 CONFIG_CMD_CPU=y
13 11 # CONFIG_CMD_IMLS is not set
14 12  
15 13  
16 14  
... ... @@ -32,29 +30,14 @@
32 30 CONFIG_MAC_PARTITION=y
33 31 CONFIG_ISO_PARTITION=y
34 32 CONFIG_EFI_PARTITION=y
35   -CONFIG_OF_CONTROL=y
36 33 CONFIG_REGMAP=y
37 34 CONFIG_SYSCON=y
38 35 CONFIG_CPU=y
39   -CONFIG_SPI_FLASH=y
40   -CONFIG_SPI_FLASH_GIGADEVICE=y
41   -CONFIG_SPI_FLASH_MACRONIX=y
42   -CONFIG_SPI_FLASH_WINBOND=y
43   -CONFIG_DM_ETH=y
44   -CONFIG_E1000=y
45   -CONFIG_DM_PCI=y
46   -CONFIG_DM_RTC=y
47   -CONFIG_SYS_NS16550=y
48   -CONFIG_TIMER=y
49   -CONFIG_DM_USB=y
50 36 CONFIG_USB_STORAGE=y
51 37 CONFIG_USB_KEYBOARD=y
52   -CONFIG_DM_VIDEO=y
53   -CONFIG_VIDEO_VESA=y
54 38 CONFIG_FRAMEBUFFER_SET_VESA_MODE=y
55 39 CONFIG_FRAMEBUFFER_VESA_MODE_111=y
56 40 CONFIG_CONSOLE_SCROLL_LINES=5
57   -CONFIG_USE_PRIVATE_LIBGCC=y
58 41 CONFIG_EFI=y
59 42 CONFIG_EFI_STUB=y
configs/qemu-x86_efi_payload64_defconfig
Diff comments   View file @ 07d7783
... ... @@ -5,9 +5,7 @@
5 5 CONFIG_FIT=y
6 6 CONFIG_BOOTSTAGE=y
7 7 CONFIG_BOOTSTAGE_REPORT=y
8   -CONFIG_ENV_IS_NOWHERE=y
9 8 CONFIG_SYS_CONSOLE_INFO_QUIET=y
10   -# CONFIG_BOARD_EARLY_INIT_F is not set
11 9 CONFIG_HUSH_PARSER=y
12 10 CONFIG_CMD_CPU=y
13 11 # CONFIG_CMD_BOOTEFI_HELLO_COMPILE is not set
14 12  
15 13  
16 14  
... ... @@ -33,29 +31,14 @@
33 31 CONFIG_MAC_PARTITION=y
34 32 CONFIG_ISO_PARTITION=y
35 33 CONFIG_EFI_PARTITION=y
36   -CONFIG_OF_CONTROL=y
37 34 CONFIG_REGMAP=y
38 35 CONFIG_SYSCON=y
39 36 CONFIG_CPU=y
40   -CONFIG_SPI_FLASH=y
41   -CONFIG_SPI_FLASH_GIGADEVICE=y
42   -CONFIG_SPI_FLASH_MACRONIX=y
43   -CONFIG_SPI_FLASH_WINBOND=y
44   -CONFIG_DM_ETH=y
45   -CONFIG_E1000=y
46   -CONFIG_DM_PCI=y
47   -CONFIG_DM_RTC=y
48   -CONFIG_SYS_NS16550=y
49   -CONFIG_TIMER=y
50   -CONFIG_DM_USB=y
51 37 CONFIG_USB_STORAGE=y
52 38 CONFIG_USB_KEYBOARD=y
53   -CONFIG_DM_VIDEO=y
54   -CONFIG_VIDEO_VESA=y
55 39 CONFIG_FRAMEBUFFER_SET_VESA_MODE=y
56 40 CONFIG_FRAMEBUFFER_VESA_MODE_111=y
57 41 CONFIG_CONSOLE_SCROLL_LINES=5
58   -CONFIG_USE_PRIVATE_LIBGCC=y
59 42 CONFIG_EFI=y
60 43 CONFIG_EFI_STUB=y
61 44 CONFIG_EFI_STUB_64BIT=y
configs/som-db5800-som-6867_defconfig
Diff comments   View file @ 07d7783
... ... @@ -3,8 +3,6 @@
3 3 CONFIG_TARGET_SOM_DB5800_SOM_6867=y
4 4 CONFIG_DEFAULT_DEVICE_TREE="baytrail_som-db5800-som-6867"
5 5 CONFIG_DEBUG_UART=y
6   -CONFIG_HAVE_INTEL_ME=y
7   -CONFIG_ENABLE_MRC_CACHE=y
8 6 CONFIG_SMP=y
9 7 CONFIG_HAVE_VGA_BIOS=y
10 8 CONFIG_GENERATE_PIRQ_TABLE=y
... ... @@ -16,7 +14,6 @@
16 14 CONFIG_BOOTSTAGE=y
17 15 CONFIG_BOOTSTAGE_REPORT=y
18 16 CONFIG_SYS_CONSOLE_INFO_QUIET=y
19   -CONFIG_ARCH_MISC_INIT=y
20 17 CONFIG_HUSH_PARSER=y
21 18 CONFIG_CMD_CPU=y
22 19 # CONFIG_CMD_IMLS is not set
23 20  
24 21  
25 22  
26 23  
27 24  
28 25  
... ... @@ -40,32 +37,15 @@
40 37 CONFIG_MAC_PARTITION=y
41 38 CONFIG_ISO_PARTITION=y
42 39 CONFIG_EFI_PARTITION=y
43   -CONFIG_OF_CONTROL=y
44 40 CONFIG_REGMAP=y
45 41 CONFIG_SYSCON=y
46   -CONFIG_SCSI=y
47 42 CONFIG_CPU=y
48   -CONFIG_SPI_FLASH=y
49   -CONFIG_SPI_FLASH_GIGADEVICE=y
50   -CONFIG_SPI_FLASH_MACRONIX=y
51   -CONFIG_SPI_FLASH_STMICRO=y
52   -CONFIG_SPI_FLASH_WINBOND=y
53   -CONFIG_DM_ETH=y
54 43 CONFIG_E1000=y
55   -CONFIG_DM_PCI=y
56   -CONFIG_DM_RTC=y
57 44 CONFIG_DEBUG_UART_BASE=0x3f8
58 45 CONFIG_DEBUG_UART_CLOCK=1843200
59   -CONFIG_SYS_NS16550=y
60   -CONFIG_ICH_SPI=y
61   -CONFIG_TIMER=y
62   -CONFIG_DM_USB=y
63 46 CONFIG_USB_STORAGE=y
64 47 CONFIG_USB_KEYBOARD=y
65   -CONFIG_DM_VIDEO=y
66   -CONFIG_VIDEO_VESA=y
67 48 CONFIG_FRAMEBUFFER_SET_VESA_MODE=y
68 49 CONFIG_FRAMEBUFFER_VESA_MODE_11A=y
69 50 CONFIG_CONSOLE_SCROLL_LINES=5
70   -CONFIG_USE_PRIVATE_LIBGCC=y
configs/theadorable-x86-dfi-bt700_defconfig
Diff comments   View file @ 07d7783
... ... @@ -2,8 +2,6 @@
2 2 CONFIG_VENDOR_DFI=y
3 3 CONFIG_DEFAULT_DEVICE_TREE="theadorable-x86-dfi-bt700"
4 4 CONFIG_TARGET_DFI_BT700=y
5   -CONFIG_HAVE_INTEL_ME=y
6   -CONFIG_ENABLE_MRC_CACHE=y
7 5 CONFIG_SMP=y
8 6 CONFIG_HAVE_VGA_BIOS=y
9 7 CONFIG_VGA_BIOS_ADDR=0xfffa0000
... ... @@ -16,7 +14,6 @@
16 14 CONFIG_BOOTSTAGE=y
17 15 CONFIG_BOOTSTAGE_REPORT=y
18 16 CONFIG_SYS_CONSOLE_INFO_QUIET=y
19   -# CONFIG_ARCH_EARLY_INIT_R is not set
20 17 CONFIG_HUSH_PARSER=y
21 18 CONFIG_CMD_CPU=y
22 19 # CONFIG_CMD_IMLS is not set
23 20  
24 21  
25 22  
26 23  
... ... @@ -41,36 +38,15 @@
41 38 CONFIG_MAC_PARTITION=y
42 39 CONFIG_ISO_PARTITION=y
43 40 CONFIG_EFI_PARTITION=y
44   -CONFIG_OF_CONTROL=y
45 41 CONFIG_REGMAP=y
46 42 CONFIG_SYSCON=y
47 43 CONFIG_CPU=y
48 44 CONFIG_DM_I2C=y
49 45 CONFIG_NUVOTON_NCT6102D=y
50   -CONFIG_MMC=y
51   -CONFIG_MMC_PCI=y
52   -CONFIG_MMC_SDHCI=y
53   -CONFIG_MMC_SDHCI_SDMA=y
54   -CONFIG_SPI_FLASH=y
55   -CONFIG_SPI_FLASH_GIGADEVICE=y
56   -CONFIG_SPI_FLASH_MACRONIX=y
57   -CONFIG_SPI_FLASH_SPANSION=y
58   -CONFIG_SPI_FLASH_STMICRO=y
59   -CONFIG_SPI_FLASH_WINBOND=y
60   -CONFIG_DM_ETH=y
61 46 CONFIG_E1000=y
62   -CONFIG_DM_PCI=y
63   -CONFIG_DM_RTC=y
64   -CONFIG_SYS_NS16550=y
65   -CONFIG_ICH_SPI=y
66   -CONFIG_TIMER=y
67   -CONFIG_DM_USB=y
68 47 CONFIG_USB_STORAGE=y
69 48 CONFIG_USB_KEYBOARD=y
70   -CONFIG_DM_VIDEO=y
71   -CONFIG_VIDEO_VESA=y
72 49 CONFIG_FRAMEBUFFER_SET_VESA_MODE=y
73 50 CONFIG_FRAMEBUFFER_VESA_MODE_114=y
74 51 CONFIG_CONSOLE_SCROLL_LINES=5
75   -CONFIG_USE_PRIVATE_LIBGCC=y
... ... @@ -22,6 +22,12 @@
22 22  
23 23 menu "SATA/SCSI device support"
24 24  
  25 +config AHCI_PCI
  26 + bool "Support for PCI-based AHCI controller"
  27 + depends on DM_SCSI
  28 + help
  29 + Enables support for the PCI-based AHCI controller.
  30 +
25 31 config SATA_CEVA
26 32 bool "Ceva Sata controller"
27 33 depends on AHCI
drivers/ata/Makefile
Diff comments   View file @ 07d7783
... ... @@ -7,6 +7,7 @@
7 7  
8 8 obj-$(CONFIG_DWC_AHCI) += dwc_ahci.o
9 9 obj-$(CONFIG_AHCI) += ahci-uclass.o
  10 +obj-$(CONFIG_AHCI_PCI) += ahci-pci.o
10 11 obj-$(CONFIG_SCSI_AHCI) += ahci.o
11 12 obj-$(CONFIG_DWC_AHSATA) += dwc_ahsata.o
12 13 obj-$(CONFIG_FSL_SATA) += fsl_sata.o
drivers/ata/ahci-pci.c
Diff comments   View file @ 07d7783
  1 +/*
  2 + * Copyright (C) 2017, Bin Meng <bmeng.cn@gmail.com>
  3 + *
  4 + * SPDX-License-Identifier: GPL-2.0+
  5 + */
  6 +
  7 +#include <common.h>
  8 +#include <ahci.h>
  9 +#include <dm.h>
  10 +#include <pci.h>
  11 +
  12 +static int ahci_pci_bind(struct udevice *dev)
  13 +{
  14 + struct udevice *scsi_dev;
  15 +
  16 + return ahci_bind_scsi(dev, &scsi_dev);
  17 +}
  18 +
  19 +static int ahci_pci_probe(struct udevice *dev)
  20 +{
  21 + return ahci_probe_scsi(dev);
  22 +}
  23 +
  24 +static const struct udevice_id ahci_pci_ids[] = {
  25 + { .compatible = "ahci-pci" },
  26 + { }
  27 +};
  28 +
  29 +U_BOOT_DRIVER(ahci_pci) = {
  30 + .name = "ahci_pci",
  31 + .id = UCLASS_AHCI,
  32 + .of_match = ahci_pci_ids,
  33 + .bind = ahci_pci_bind,
  34 + .probe = ahci_pci_probe,
  35 +};
  36 +
  37 +static struct pci_device_id ahci_pci_supported[] = {
  38 + { PCI_DEVICE_CLASS(PCI_CLASS_STORAGE_SATA_AHCI, ~0) },
  39 + {},
  40 +};
  41 +
  42 +U_BOOT_PCI_DEVICE(ahci_pci, ahci_pci_supported);
... ... @@ -469,7 +469,9 @@
469 469  
470 470 device = dev_desc->devnum;
471 471 dev_desc->type = DEV_TYPE_UNKNOWN; /* not yet valid */
  472 +#ifndef CONFIG_BLK
472 473 dev_desc->block_read = atapi_read;
  474 +#endif
473 475  
474 476 memset(ccb, 0, sizeof(ccb));
475 477 memset(iobuf, 0, sizeof(iobuf));
drivers/gpio/Kconfig
Diff comments   View file @ 07d7783
... ... @@ -67,6 +67,12 @@
67 67 driver from the common Intel ICH6 driver. It supports a total of
68 68 95 GPIOs which can be configured from the device tree.
69 69  
  70 +config INTEL_ICH6_GPIO
  71 + bool "Intel ICH6 compatible legacy GPIO driver"
  72 + depends on DM_GPIO
  73 + help
  74 + Say yes here to select Intel ICH6 compatible legacy GPIO driver.
  75 +
70 76 config IMX_RGPIO2P
71 77 bool "i.MX7ULP RGPIO2P driver"
72 78 depends on DM
drivers/mmc/pci_mmc.c
Diff comments   View file @ 07d7783
... ... @@ -6,38 +6,72 @@
6 6 */
7 7  
8 8 #include <common.h>
  9 +#include <dm.h>
9 10 #include <errno.h>
10 11 #include <malloc.h>
  12 +#include <mapmem.h>
11 13 #include <sdhci.h>
12 14 #include <asm/pci.h>
13 15  
14   -int pci_mmc_init(const char *name, struct pci_device_id *mmc_supported)
  16 +struct pci_mmc_plat {
  17 + struct mmc_config cfg;
  18 + struct mmc mmc;
  19 +};
  20 +
  21 +struct pci_mmc_priv {
  22 + struct sdhci_host host;
  23 + void *base;
  24 +};
  25 +
  26 +static int pci_mmc_probe(struct udevice *dev)
15 27 {
16   - struct sdhci_host *mmc_host;
17   - u32 iobase;
  28 + struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
  29 + struct pci_mmc_plat *plat = dev_get_platdata(dev);
  30 + struct pci_mmc_priv *priv = dev_get_priv(dev);
  31 + struct sdhci_host *host = &priv->host;
  32 + u32 ioaddr;
18 33 int ret;
19   - int i;
20 34  
21   - for (i = 0; ; i++) {
22   - struct udevice *dev;
  35 + dm_pci_read_config32(dev, PCI_BASE_ADDRESS_0, &ioaddr);
  36 + host->ioaddr = map_sysmem(ioaddr, 0);
  37 + host->name = dev->name;
  38 + ret = sdhci_setup_cfg(&plat->cfg, host, 0, 0);
  39 + if (ret)
  40 + return ret;
  41 + host->mmc = &plat->mmc;
  42 + host->mmc->priv = &priv->host;
  43 + host->mmc->dev = dev;
  44 + upriv->mmc = host->mmc;
23 45  
24   - ret = pci_find_device_id(mmc_supported, i, &dev);
25   - if (ret)
26   - return ret;
27   - mmc_host = malloc(sizeof(struct sdhci_host));
28   - if (!mmc_host)
29   - return -ENOMEM;
  46 + return sdhci_probe(dev);
  47 +}
30 48  
31   - mmc_host->name = name;
32   - dm_pci_read_config32(dev, PCI_BASE_ADDRESS_0, &iobase);
33   - mmc_host->ioaddr = (void *)(ulong)iobase;
34   - mmc_host->quirks = 0;
35   - mmc_host->max_clk = 0;
36   - ret = add_sdhci(mmc_host, 0, 0);
37   - if (ret)
38   - return ret;
39   - }
  49 +static int pci_mmc_bind(struct udevice *dev)
  50 +{
  51 + struct pci_mmc_plat *plat = dev_get_platdata(dev);
40 52  
41   - return 0;
  53 + return sdhci_bind(dev, &plat->mmc, &plat->cfg);
42 54 }
  55 +
  56 +U_BOOT_DRIVER(pci_mmc) = {
  57 + .name = "pci_mmc",
  58 + .id = UCLASS_MMC,
  59 + .bind = pci_mmc_bind,
  60 + .probe = pci_mmc_probe,
  61 + .ops = &sdhci_ops,
  62 + .priv_auto_alloc_size = sizeof(struct pci_mmc_priv),
  63 + .platdata_auto_alloc_size = sizeof(struct pci_mmc_plat),
  64 +};
  65 +
  66 +static struct pci_device_id mmc_supported[] = {
  67 + { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BYT_SDIO) },
  68 + { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BYT_SD) },
  69 + { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BYT_EMMC2) },
  70 + { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_QRK_SDIO) },
  71 + { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_TCF_SDIO_0) },
  72 + { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_TCF_SDIO_1) },
  73 + {},
  74 +};
  75 +
  76 +U_BOOT_PCI_DEVICE(pci_mmc, mmc_supported);
1 1 menuconfig PCI
2 2 bool "PCI support"
3   - default y if PPC || X86
  3 + default y if PPC
4 4 help
5 5 Enable support for PCI (Peripheral Interconnect Bus), a type of bus
6 6 used on some devices to allow the CPU to communicate with its
drivers/timer/Kconfig
Diff comments   View file @ 07d7783
... ... @@ -36,7 +36,6 @@
36 36 config X86_TSC_TIMER
37 37 bool "x86 Time-Stamp Counter (TSC) timer support"
38 38 depends on TIMER && X86
39   - default y if X86
40 39 help
41 40 Select this to enable Time-Stamp Counter (TSC) timer for x86.
42 41  
drivers/timer/tsc_timer.c
Diff comments   View file @ 07d7783
... ... @@ -11,18 +11,13 @@
11 11 #include <dm.h>
12 12 #include <malloc.h>
13 13 #include <timer.h>
  14 +#include <asm/cpu.h>
14 15 #include <asm/io.h>
15 16 #include <asm/i8254.h>
16 17 #include <asm/ibmpc.h>
17 18 #include <asm/msr.h>
18 19 #include <asm/u-boot-x86.h>
19 20  
20   -/* CPU reference clock frequency: in KHz */
21   -#define FREQ_83 83200
22   -#define FREQ_100 99840
23   -#define FREQ_133 133200
24   -#define FREQ_166 166400
25   -
26 21 #define MAX_NUM_FREQS 8
27 22  
28 23 DECLARE_GLOBAL_DATA_PTR;
29 24  
30 25  
... ... @@ -45,17 +40,17 @@
45 40  
46 41 static struct freq_desc freq_desc_tables[] = {
47 42 /* PNW */
48   - { 6, 0x27, 0, { 0, 0, 0, 0, 0, FREQ_100, 0, FREQ_83 } },
  43 + { 6, 0x27, 0, { 0, 0, 0, 0, 0, 99840, 0, 83200 } },
49 44 /* CLV+ */
50   - { 6, 0x35, 0, { 0, FREQ_133, 0, 0, 0, FREQ_100, 0, FREQ_83 } },
51   - /* TNG */
52   - { 6, 0x4a, 1, { 0, FREQ_100, FREQ_133, 0, 0, 0, 0, 0 } },
53   - /* VLV2 */
54   - { 6, 0x37, 1, { FREQ_83, FREQ_100, FREQ_133, FREQ_166, 0, 0, 0, 0 } },
  45 + { 6, 0x35, 0, { 0, 133200, 0, 0, 0, 99840, 0, 83200 } },
  46 + /* TNG - Intel Atom processor Z3400 series */
  47 + { 6, 0x4a, 1, { 0, 100000, 133300, 0, 0, 0, 0, 0 } },
  48 + /* VLV2 - Intel Atom processor E3000, Z3600, Z3700 series */
  49 + { 6, 0x37, 1, { 83300, 100000, 133300, 116700, 80000, 0, 0, 0 } },
  50 + /* ANN - Intel Atom processor Z3500 series */
  51 + { 6, 0x5a, 1, { 83300, 100000, 133300, 100000, 0, 0, 0, 0 } },
55 52 /* Ivybridge */
56 53 { 6, 0x3a, 2, { 0, 0, 0, 0, 0, 0, 0, 0 } },
57   - /* ANN */
58   - { 6, 0x5a, 1, { FREQ_83, FREQ_100, FREQ_133, FREQ_100, 0, 0, 0, 0 } },
59 54 };
60 55  
61 56 static int match_cpu(u8 family, u8 model)
62 57  
63 58  
64 59  
65 60  
66 61  
67 62  
... ... @@ -76,35 +71,40 @@
76 71 (freq_desc_tables[cpu_index].freqs[freq_id])
77 72  
78 73 /*
79   - * Do MSR calibration only for known/supported CPUs.
  74 + * TSC on Intel Atom SoCs capable of determining TSC frequency by MSR is
  75 + * reliable and the frequency is known (provided by HW).
80 76 *
81   - * Returns the calibration value or 0 if MSR calibration failed.
  77 + * On these platforms PIT/HPET is generally not available so calibration won't
  78 + * work at all and there is no other clocksource to act as a watchdog for the
  79 + * TSC, so we have no other choice than to trust it.
  80 + *
  81 + * Returns the TSC frequency in MHz or 0 if HW does not provide it.
82 82 */
83   -static unsigned long __maybe_unused try_msr_calibrate_tsc(void)
  83 +static unsigned long __maybe_unused cpu_mhz_from_msr(void)
84 84 {
85 85 u32 lo, hi, ratio, freq_id, freq;
86 86 unsigned long res;
87 87 int cpu_index;
88 88  
  89 + if (gd->arch.x86_vendor != X86_VENDOR_INTEL)
  90 + return 0;
  91 +
89 92 cpu_index = match_cpu(gd->arch.x86, gd->arch.x86_model);
90 93 if (cpu_index < 0)
91 94 return 0;
92 95  
93 96 if (freq_desc_tables[cpu_index].msr_plat) {
94 97 rdmsr(MSR_PLATFORM_INFO, lo, hi);
95   - ratio = (lo >> 8) & 0x1f;
  98 + ratio = (lo >> 8) & 0xff;
96 99 } else {
97 100 rdmsr(MSR_IA32_PERF_STATUS, lo, hi);
98 101 ratio = (hi >> 8) & 0x1f;
99 102 }
100 103 debug("Maximum core-clock to bus-clock ratio: 0x%x\n", ratio);
101 104  
102   - if (!ratio)
103   - goto fail;
104   -
105 105 if (freq_desc_tables[cpu_index].msr_plat == 2) {
106 106 /* TODO: Figure out how best to deal with this */
107   - freq = FREQ_100;
  107 + freq = 100000;
108 108 debug("Using frequency: %u KHz\n", freq);
109 109 } else {
110 110 /* Get FSB FREQ ID */
111 111  
... ... @@ -114,18 +114,12 @@
114 114 debug("Resolved frequency ID: %u, frequency: %u KHz\n",
115 115 freq_id, freq);
116 116 }
117   - if (!freq)
118   - goto fail;
119 117  
120 118 /* TSC frequency = maximum resolved freq * maximum resolved bus ratio */
121 119 res = freq * ratio / 1000;
122 120 debug("TSC runs at %lu MHz\n", res);
123 121  
124 122 return res;
125   -
126   -fail:
127   - debug("Fast TSC calibration using MSR failed\n");
128   - return 0;
129 123 }
130 124  
131 125 /*
... ... @@ -347,7 +341,7 @@
347 341 if (!uc_priv->clock_rate) {
348 342 unsigned long fast_calibrate;
349 343  
350   - fast_calibrate = try_msr_calibrate_tsc();
  344 + fast_calibrate = cpu_mhz_from_msr();
351 345 if (!fast_calibrate) {
352 346 fast_calibrate = quick_pit_calibrate();
353 347 if (!fast_calibrate)
include/configs/bayleybay.h
Diff comments   View file @ 07d7783
... ... @@ -19,10 +19,6 @@
19 19 "stdout=serial,vidconsole\0" \
20 20 "stderr=serial,vidconsole\0"
21 21  
22   -#define CONFIG_SCSI_DEV_LIST \
23   - {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_VALLEYVIEW_SATA}, \
24   - {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_VALLEYVIEW_SATA_ALT}
25   -
26 22 /* Environment configuration */
27 23 #define CONFIG_ENV_SECT_SIZE 0x1000
28 24 #define CONFIG_ENV_OFFSET 0x006ff000
include/configs/conga-qeval20-qa3-e3845.h
Diff comments   View file @ 07d7783
... ... @@ -19,10 +19,6 @@
19 19 "stdout=serial\0" \
20 20 "stderr=serial\0"
21 21  
22   -#define CONFIG_SCSI_DEV_LIST \
23   - {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_VALLEYVIEW_SATA}, \
24   - {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_VALLEYVIEW_SATA_ALT}
25   -
26 22 #define VIDEO_IO_OFFSET 0
27 23 #define CONFIG_X86EMU_RAW_IO
28 24  
include/configs/cougarcanyon2.h
Diff comments   View file @ 07d7783
... ... @@ -17,9 +17,6 @@
17 17 "stdout=serial,vga\0" \
18 18 "stderr=serial,vga\0"
19 19  
20   -#define CONFIG_SCSI_DEV_LIST \
21   - {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_PANTHERPOINT_AHCI_MOBILE}
22   -
23 20 /* Environment configuration */
24 21 #define CONFIG_ENV_SECT_SIZE 0x1000
25 22 #define CONFIG_ENV_OFFSET 0x5ff000
include/configs/crownbay.h
Diff comments   View file @ 07d7783
... ... @@ -21,9 +21,6 @@
21 21 "stdout=serial,vidconsole\0" \
22 22 "stderr=serial,vidconsole\0"
23 23  
24   -#define CONFIG_SCSI_DEV_LIST \
25   - {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_TCF_SATA}
26   -
27 24 /* Environment configuration */
28 25 #define CONFIG_ENV_SECT_SIZE 0x1000
29 26 #define CONFIG_ENV_OFFSET 0
include/configs/dfi-bt700.h
Diff comments   View file @ 07d7783
... ... @@ -24,10 +24,6 @@
24 24 "stdout=serial\0" \
25 25 "stderr=serial\0"
26 26  
27   -#define CONFIG_SCSI_DEV_LIST \
28   - {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_VALLEYVIEW_SATA}, \
29   - {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_VALLEYVIEW_SATA_ALT}
30   -
31 27 #define CONFIG_USB_HOST_ETHER
32 28 #define CONFIG_USB_ETHER_ASIX
33 29 #define CONFIG_USB_ETHER_SMSC95XX
include/configs/efi-x86.h
Diff comments   View file @ 07d7783
... ... @@ -14,7 +14,6 @@
14 14 #undef CONFIG_TPM_TIS_BASE_ADDRESS
15 15  
16 16 #undef CONFIG_SCSI_AHCI
17   -#undef CONFIG_INTEL_ICH6_GPIO
18 17 #undef CONFIG_USB_EHCI_PCI
19 18  
20 19 #define CONFIG_STD_DEVICES_SETTINGS "stdin=usbkbd,vga,serial\0" \
include/configs/minnowmax.h
Diff comments   View file @ 07d7783
... ... @@ -22,10 +22,6 @@
22 22 "stderr=vidconsole,serial\0" \
23 23 "usb_pgood_delay=40\0"
24 24  
25   -#define CONFIG_SCSI_DEV_LIST \
26   - {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_VALLEYVIEW_SATA}, \
27   - {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_VALLEYVIEW_SATA_ALT}
28   -
29 25 #define VIDEO_IO_OFFSET 0
30 26 #define CONFIG_X86EMU_RAW_IO
31 27  
include/configs/qemu-x86.h
Diff comments   View file @ 07d7783
... ... @@ -23,11 +23,7 @@
23 23 * ATA/SATA support for QEMU x86 targets
24 24 * - Only legacy IDE controller is supported for QEMU '-M pc' target
25 25 * - AHCI controller is supported for QEMU '-M q35' target
26   - *
27   - * Default configuraion is to support the QEMU default x86 target
28   - * Undefine CONFIG_IDE to support q35 target
29 26 */
30   -#ifdef CONFIG_IDE
31 27 #define CONFIG_SYS_IDE_MAXBUS 2
32 28 #define CONFIG_SYS_IDE_MAXDEVICE 4
33 29 #define CONFIG_SYS_ATA_BASE_ADDR 0
... ... @@ -37,15 +33,6 @@
37 33 #define CONFIG_SYS_ATA_IDE0_OFFSET 0x1f0
38 34 #define CONFIG_SYS_ATA_IDE1_OFFSET 0x170
39 35 #define CONFIG_ATAPI
40   -
41   -#undef CONFIG_SCSI_AHCI
42   -#else
43   -#define CONFIG_SCSI_DEV_LIST \
44   - {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH9_AHCI}
45   -#endif
46   -
47   -/* GPIO is not supported */
48   -#undef CONFIG_INTEL_ICH6_GPIO
49 36  
50 37 /* SPI is not supported */
51 38  
include/configs/som-6896.h
Diff comments   View file @ 07d7783
... ... @@ -16,9 +16,6 @@
16 16  
17 17 #define CONFIG_MISC_INIT_R
18 18  
19   -#define CONFIG_SCSI_DEV_LIST \
20   - {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_WILDCATPOINT_AHCI}
21   -
22 19 #define VIDEO_IO_OFFSET 0
23 20 #define CONFIG_X86EMU_RAW_IO
24 21  
include/configs/som-db5800-som-6867.h
Diff comments   View file @ 07d7783
... ... @@ -19,10 +19,6 @@
19 19 "stdout=serial,vidconsole\0" \
20 20 "stderr=serial,vidconsole\0"
21 21  
22   -#define CONFIG_SCSI_DEV_LIST \
23   - {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_VALLEYVIEW_SATA}, \
24   - {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_VALLEYVIEW_SATA_ALT}
25   -
26 22 #define VIDEO_IO_OFFSET 0
27 23 #define CONFIG_X86EMU_RAW_IO
28 24  
include/configs/x86-chromebook.h
Diff comments   View file @ 07d7783
... ... @@ -15,14 +15,6 @@
15 15 #define CONFIG_X86_REFCODE_ADDR 0xffea0000
16 16 #define CONFIG_X86_REFCODE_RUN_ADDR 0
17 17  
18   -#define CONFIG_SCSI_DEV_LIST \
19   - {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_NM10_AHCI}, \
20   - {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_COUGARPOINT_AHCI_MOBILE}, \
21   - {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_COUGARPOINT_AHCI_SERIES6}, \
22   - {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_PANTHERPOINT_AHCI_MOBILE}, \
23   - {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_LYNXPOINT_AHCI}, \
24   - {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_WILDCATPOINT_AHCI}
25   -
26 18 #define CONFIG_PCI_MEM_BUS 0xe0000000
27 19 #define CONFIG_PCI_MEM_PHYS CONFIG_PCI_MEM_BUS
28 20 #define CONFIG_PCI_MEM_SIZE 0x10000000
include/configs/x86-common.h
Diff comments   View file @ 07d7783
... ... @@ -63,9 +63,6 @@
63 63  
64 64 #define CONFIG_SUPPORT_VFAT
65 65  
66   -/* x86 GPIOs are accessed through a PCI device */
67   -#define CONFIG_INTEL_ICH6_GPIO
68   -
69 66 /*-----------------------------------------------------------------------
70 67 * Command line configuration.
71 68 */
... ... @@ -585,18 +585,6 @@
585 585 int mmc_get_env_addr(struct mmc *mmc, int copy, u32 *env_addr);
586 586 int mmc_get_env_dev(void);
587 587  
588   -struct pci_device_id;
589   -
590   -/**
591   - * pci_mmc_init() - set up PCI MMC devices
592   - *
593   - * This finds all the matching PCI IDs and sets them up as MMC devices.
594   - *
595   - * @name: Name to use for devices
596   - * @mmc_supported: PCI IDs to search for, terminated by {0, 0}
597   - */
598   -int pci_mmc_init(const char *name, struct pci_device_id *mmc_supported);
599   -
600 588 /* Set block count limit because of 16 bit register limit on some hardware*/
601 589 #ifndef CONFIG_SYS_MMC_MAX_BLK_COUNT
602 590 #define CONFIG_SYS_MMC_MAX_BLK_COUNT 65535
scripts/config_whitelist.txt
Diff comments   View file @ 07d7783
... ... @@ -1154,7 +1154,6 @@
1154 1154 CONFIG_INI_MAX_NAME
1155 1155 CONFIG_INI_MAX_SECTION
1156 1156 CONFIG_INTEGRITY
1157   -CONFIG_INTEL_ICH6_GPIO
1158 1157 CONFIG_INTERRUPTS
1159 1158 CONFIG_IO
1160 1159 CONFIG_IO64