Eric Lee / smarc-uboot

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Commit 080b7643fb93ad058ab40da27533d7b9ed8b6c6d

Authored by Michael Schwingen
Committed by Albert ARIBAUD
1 parent 8b5ab4c1b6
Exists in master and in 54 other branches 8qm-imx_v2020.04_5.4.70_2.3.0, emb_lf_v2022.04, imx_v2015.04_4.1.15_1.0.0_ga, pitx_8mp_lf_v2020.04, smarc-8m-android-10.0.0_2.6.0, smarc-8m-android-11.0.0_2.0.0, smarc-8mp-android-11.0.0_2.0.0, smarc-emmc-imx_v2014.04_3.10.53_1.1.0_ga, smarc-emmc-imx_v2014.04_3.14.28_1.0.0_ga, smarc-imx-l5.0.0_1.0.0-ga, smarc-imx6_v2018.03_4.14.98_2.0.0_ga, smarc-imx7_v2017.03_4.9.11_1.0.0_ga, smarc-imx7_v2018.03_4.14.98_2.0.0_ga, smarc-imx_v2014.04_3.14.28_1.0.0_ga, smarc-imx_v2015.04_4.1.15_1.0.0_ga, smarc-imx_v2017.03_4.9.11_1.0.0_ga, smarc-imx_v2017.03_4.9.88_2.0.0_ga, smarc-imx_v2017.03_o8.1.0_1.3.0_8m, smarc-imx_v2018.03_4.14.78_1.0.0_ga, smarc-m6.0.1_2.1.0-ga, smarc-n7.1.2_2.0.0-ga, smarc-rel_imx_4.1.15_2.0.0_ga, smarc_8m-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8m-imx_v2019.04_4.19.35_1.1.0, smarc_8m_00d0-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2019.04_4.19.35_1.1.0, smarc_8mm-imx_v2020.04_5.4.24_2.1.0, smarc_8mp_lf_v2020.04, smarc_8mq-imx_v2020.04_5.4.24_2.1.0, smarc_8mq_lf_v2020.04, ti-u-boot-2015.07, u-boot-2013.01.y, v2013.10, v2013.10-smarct33, v2013.10-smartmen, v2014.01, v2014.04, v2014.04-smarct33, v2014.04-smarct33-emmc, v2014.04-smartmen, v2014.07, v2014.07-smarct33, v2014.07-smartmen, v2015.07-smarct33, v2015.07-smarct33-emmc, v2015.07-smarct4x, v2016.05-dlt, v2016.05-smarct3x, v2016.05-smarct3x-emmc, v2016.05-smarct4x, v2017.01-smarct3x, v2017.01-smarct3x-emmc, v2017.01-smarct4x

update/fix AcTux4 board 

Signed-off-by: Michael Schwingen <michael@schwingen.org>

Showing 3 changed files with 86 additions and 60 deletions Inline Diff

board/actux4/actux4.c
Diff comments   View file @ 080b764
1 /* 1 /*
2 * (C) Copyright 2007 2 * (C) Copyright 2007
3 * Michael Schwingen, michael@schwingen.org 3 * Michael Schwingen, michael@schwingen.org
4 * 4 *
5 * (C) Copyright 2006 5 * (C) Copyright 2006
6 * Stefan Roese, DENX Software Engineering, sr@denx.de. 6 * Stefan Roese, DENX Software Engineering, sr@denx.de.
7 * 7 *
8 * (C) Copyright 2002 8 * (C) Copyright 2002
9 * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net 9 * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
10 * 10 *
11 * (C) Copyright 2002 11 * (C) Copyright 2002
12 * Sysgo Real-Time Solutions, GmbH <www.elinos.com> 12 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
13 * Marius Groeger <mgroeger@sysgo.de> 13 * Marius Groeger <mgroeger@sysgo.de>
14 * 14 *
15 * See file CREDITS for list of people who contributed to this 15 * See file CREDITS for list of people who contributed to this
16 * project. 16 * project.
17 * 17 *
18 * This program is free software; you can redistribute it and/or 18 * This program is free software; you can redistribute it and/or
19 * modify it under the terms of the GNU General Public License as 19 * modify it under the terms of the GNU General Public License as
20 * published by the Free Software Foundation; either version 2 of 20 * published by the Free Software Foundation; either version 2 of
21 * the License, or (at your option) any later version. 21 * the License, or (at your option) any later version.
22 * 22 *
23 * This program is distributed in the hope that it will be useful, 23 * This program is distributed in the hope that it will be useful,
24 * but WITHOUT ANY WARRANTY; without even the implied warranty of 24 * but WITHOUT ANY WARRANTY; without even the implied warranty of
25 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 25 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
26 * GNU General Public License for more details. 26 * GNU General Public License for more details.
27 * 27 *
28 * You should have received a copy of the GNU General Public License 28 * You should have received a copy of the GNU General Public License
29 * along with this program; if not, write to the Free Software 29 * along with this program; if not, write to the Free Software
30 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 30 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
31 * MA 02111-1307 USA 31 * MA 02111-1307 USA
32 */ 32 */
33 33
34 #include <common.h> 34 #include <common.h>
35 #include <command.h> 35 #include <command.h>
36 #include <malloc.h> 36 #include <malloc.h>
37 #include <asm/arch/ixp425.h> 37 #include <asm/arch/ixp425.h>
38 38 #include <asm/io.h>
39 #include <miiphy.h> 39 #include <miiphy.h>
40 #ifdef CONFIG_PCI
41 #include <pci.h>
42 #include <asm/arch/ixp425pci.h>
43 #endif
40 44
41 #include "actux4_hw.h" 45 #include "actux4_hw.h"
42 46
43 DECLARE_GLOBAL_DATA_PTR; 47 DECLARE_GLOBAL_DATA_PTR;
44 48
45 int board_init (void) 49 int board_early_init_f(void)
46 { 50 {
51 writel(0xbd113c42, IXP425_EXP_CS1);
52 return 0;
53 }
54
55 int board_init(void)
56 {
47 gd->bd->bi_arch_number = MACH_TYPE_ACTUX4; 57 gd->bd->bi_arch_number = MACH_TYPE_ACTUX4;
48 58
49 /* adress of boot parameters */ 59 /* adress of boot parameters */
50 gd->bd->bi_boot_params = 0x00000100; 60 gd->bd->bi_boot_params = 0x00000100;
51 61
52 GPIO_OUTPUT_CLEAR (CONFIG_SYS_GPIO_nPWRON); 62 GPIO_OUTPUT_CLEAR(CONFIG_SYS_GPIO_nPWRON);
53 GPIO_OUTPUT_ENABLE (CONFIG_SYS_GPIO_nPWRON); 63 GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_nPWRON);
54 64
55 GPIO_OUTPUT_CLEAR (CONFIG_SYS_GPIO_IORST); 65 GPIO_OUTPUT_CLEAR(CONFIG_SYS_GPIO_IORST);
56 GPIO_OUTPUT_ENABLE (CONFIG_SYS_GPIO_IORST); 66 GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_IORST);
57 67
58 /* led not populated on board*/ 68 /* led not populated on board*/
59 GPIO_OUTPUT_ENABLE (CONFIG_SYS_GPIO_LED3); 69 GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_LED3);
60 GPIO_OUTPUT_SET (CONFIG_SYS_GPIO_LED3); 70 GPIO_OUTPUT_SET(CONFIG_SYS_GPIO_LED3);
61 71
62 /* middle LED */ 72 /* middle LED */
63 GPIO_OUTPUT_ENABLE (CONFIG_SYS_GPIO_LED2); 73 GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_LED2);
64 GPIO_OUTPUT_SET (CONFIG_SYS_GPIO_LED2); 74 GPIO_OUTPUT_SET(CONFIG_SYS_GPIO_LED2);
65 75
66 /* right LED */ 76 /* right LED */
67 /* weak pulldown = LED weak on */ 77 /* weak pulldown = LED weak on */
68 GPIO_OUTPUT_DISABLE (CONFIG_SYS_GPIO_LED1); 78 GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_LED1);
69 GPIO_OUTPUT_SET (CONFIG_SYS_GPIO_LED1); 79 GPIO_OUTPUT_SET(CONFIG_SYS_GPIO_LED1);
70 80
71 /* Setup GPIO's for Interrupt inputs */ 81 /* Setup GPIO's for Interrupt inputs */
72 GPIO_OUTPUT_DISABLE (CONFIG_SYS_GPIO_USBINTA); 82 GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_USBINTA);
73 GPIO_OUTPUT_DISABLE (CONFIG_SYS_GPIO_USBINTB); 83 GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_USBINTB);
74 GPIO_OUTPUT_DISABLE (CONFIG_SYS_GPIO_USBINTC); 84 GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_USBINTC);
75 GPIO_OUTPUT_DISABLE (CONFIG_SYS_GPIO_RTCINT); 85 GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_RTCINT);
76 GPIO_OUTPUT_DISABLE (CONFIG_SYS_GPIO_PCI_INTA); 86 GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_PCI_INTA);
77 GPIO_OUTPUT_DISABLE (CONFIG_SYS_GPIO_PCI_INTB); 87 GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_PCI_INTB);
78 88
79 GPIO_INT_ACT_LOW_SET (CONFIG_SYS_GPIO_USBINTA); 89 GPIO_INT_ACT_LOW_SET(CONFIG_SYS_GPIO_USBINTA);
80 GPIO_INT_ACT_LOW_SET (CONFIG_SYS_GPIO_USBINTB); 90 GPIO_INT_ACT_LOW_SET(CONFIG_SYS_GPIO_USBINTB);
81 GPIO_INT_ACT_LOW_SET (CONFIG_SYS_GPIO_USBINTC); 91 GPIO_INT_ACT_LOW_SET(CONFIG_SYS_GPIO_USBINTC);
82 GPIO_INT_ACT_LOW_SET (CONFIG_SYS_GPIO_RTCINT); 92 GPIO_INT_ACT_LOW_SET(CONFIG_SYS_GPIO_RTCINT);
83 GPIO_INT_ACT_LOW_SET (CONFIG_SYS_GPIO_PCI_INTA); 93 GPIO_INT_ACT_LOW_SET(CONFIG_SYS_GPIO_PCI_INTA);
84 GPIO_INT_ACT_LOW_SET (CONFIG_SYS_GPIO_PCI_INTB); 94 GPIO_INT_ACT_LOW_SET(CONFIG_SYS_GPIO_PCI_INTB);
85 95
86 /* Setup GPIO's for 33MHz clock output */ 96 /* Setup GPIO's for 33MHz clock output */
87 *IXP425_GPIO_GPCLKR = 0x011001FF; 97 writel(0x011001FF, IXP425_GPIO_GPCLKR);
88 GPIO_OUTPUT_ENABLE (CONFIG_SYS_GPIO_EXTBUS_CLK); 98 GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_EXTBUS_CLK);
89 GPIO_OUTPUT_ENABLE (CONFIG_SYS_GPIO_PCI_CLK); 99 GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_PCI_CLK);
90 100
91 *IXP425_EXP_CS1 = 0xbd113c42; 101 udelay(10000);
102 GPIO_OUTPUT_SET(CONFIG_SYS_GPIO_IORST);
103 udelay(10000);
104 GPIO_OUTPUT_CLEAR(CONFIG_SYS_GPIO_IORST);
105 udelay(10000);
106 GPIO_OUTPUT_SET(CONFIG_SYS_GPIO_IORST);
92 107
93 udelay (10000);
94 GPIO_OUTPUT_SET (CONFIG_SYS_GPIO_IORST);
95 udelay (10000);
96 GPIO_OUTPUT_CLEAR (CONFIG_SYS_GPIO_IORST);
97 udelay (10000);
98 GPIO_OUTPUT_SET (CONFIG_SYS_GPIO_IORST);
99
100 return 0; 108 return 0;
101 } 109 }
102 110
103 /* Check Board Identity */ 111 /* Check Board Identity */
104 int checkboard (void) 112 int checkboard(void)
105 { 113 {
106 puts ("Board: AcTux-4\n"); 114 puts("Board: AcTux-4\n");
107 return (0); 115 return 0;
108 } 116 }
109 117
110 int dram_init (void) 118 int dram_init(void)
111 { 119 {
112 gd->bd->bi_dram[0].start = PHYS_SDRAM_1; 120 gd->ram_size = get_ram_size(CONFIG_SYS_SDRAM_BASE, 128<<20);
113 gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; 121 return 0;
122 }
114 123
115 return (0); 124 #ifdef CONFIG_PCI
125 struct pci_controller hose;
126
127 void pci_init_board(void)
128 {
129 pci_ixp_init(&hose);
116 } 130 }
131 #endif
117 132
118 /* 133 /*
119 * Hardcoded flash setup: 134 * Hardcoded flash setup:
120 * Flash 0 is a non-CFI SST 39VF020 flash, 8 bit flash / 8 bit bus. 135 * Flash 0 is a non-CFI SST 39VF020 flash, 8 bit flash / 8 bit bus.
121 * Flash 1 is an Intel *16 flash using the CFI driver. 136 * Flash 1 is an Intel *16 flash using the CFI driver.
122 */ 137 */
123 ulong board_flash_get_legacy (ulong base, int banknum, flash_info_t * info) 138 ulong board_flash_get_legacy(ulong base, int banknum, flash_info_t *info)
124 { 139 {
125 if (banknum == 0) { /* non-CFI boot flash */ 140 if (banknum == 0) { /* non-CFI boot flash */
126 info->portwidth = 1; 141 info->portwidth = 1;
board/actux4/config.mk
View file @ 080b764
1 CONFIG_SYS_TEXT_BASE = 0x00e00000 File was deleted
2
3 # include NPE ethernet driver
4 BOARDLIBS = arch/arm/cpu/ixp/npe/libnpe.o
5 1 CONFIG_SYS_TEXT_BASE = 0x00e00000
include/configs/actux4.h
Diff comments   View file @ 080b764
1 /* 1 /*
2 * (C) Copyright 2007 2 * (C) Copyright 2007
3 * Michael Schwingen, michael@schwingen.org 3 * Michael Schwingen, michael@schwingen.org
4 * 4 *
5 * Configuration settings for the AcTux-4 board. 5 * Configuration settings for the AcTux-4 board.
6 * 6 *
7 * See file CREDITS for list of people who contributed to this 7 * See file CREDITS for list of people who contributed to this
8 * project. 8 * project.
9 * 9 *
10 * This program is free software; you can redistribute it and/or 10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as 11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of 12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version. 13 * the License, or (at your option) any later version.
14 * 14 *
15 * This program is distributed in the hope that it will be useful, 15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details. 18 * GNU General Public License for more details.
19 * 19 *
20 * You should have received a copy of the GNU General Public License 20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software 21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23 * MA 02111-1307 USA 23 * MA 02111-1307 USA
24 */ 24 */
25 25
26 #ifndef __CONFIG_H 26 #ifndef __CONFIG_H
27 #define __CONFIG_H 27 #define __CONFIG_H
28 28
29 #define CONFIG_IXP425 1 29 #define CONFIG_IXP425 1
30 #define CONFIG_ACTUX4 1 30 #define CONFIG_ACTUX4 1
31 31
32 #define CONFIG_DISPLAY_CPUINFO 1 32 #define CONFIG_DISPLAY_CPUINFO 1
33 #define CONFIG_DISPLAY_BOARDINFO 1 33 #define CONFIG_DISPLAY_BOARDINFO 1
34 34
35 #define CONFIG_IXP_SERIAL 35 #define CONFIG_IXP_SERIAL
36 #define CONFIG_SYS_IXP425_CONSOLE IXP425_UART1 36 #define CONFIG_SYS_IXP425_CONSOLE IXP425_UART1
37 #define CONFIG_BAUDRATE 115200 37 #define CONFIG_BAUDRATE 115200
38 #define CONFIG_BOOTDELAY 3 38 #define CONFIG_BOOTDELAY 3
39 #define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */ 39 #define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */
40 #define CONFIG_BOARD_EARLY_INIT_F 1
40 41
41 /*************************************************************** 42 /***************************************************************
42 * U-boot generic defines start here. 43 * U-boot generic defines start here.
43 ***************************************************************/ 44 ***************************************************************/
44 #undef CONFIG_USE_IRQ
45
46 /* Size of malloc() pool */ 45 /* Size of malloc() pool */
47 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024) 46 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024)
48 47
49 /* allow to overwrite serial and ethaddr */ 48 /* allow to overwrite serial and ethaddr */
50 #define CONFIG_ENV_OVERWRITE 49 #define CONFIG_ENV_OVERWRITE
51 50
52 /* Command line configuration */ 51 /* Command line configuration */
53 #include <config_cmd_default.h> 52 #include <config_cmd_default.h>
54 53
55 #define CONFIG_CMD_ELF 54 #define CONFIG_CMD_ELF
56 55
56 #define CONFIG_PCI
57 #ifdef CONFIG_PCI
58 #define CONFIG_CMD_PCI
59 #define CONFIG_PCI_PNP
60 #define CONFIG_IXP_PCI
61 #define CONFIG_PCI_SCAN_SHOW
62 #define CONFIG_CMD_PCI_ENUM
63 #endif
64
57 #define CONFIG_BOOTCOMMAND "run boot_flash" 65 #define CONFIG_BOOTCOMMAND "run boot_flash"
58 /* enable passing of ATAGs */ 66 /* enable passing of ATAGs */
59 #define CONFIG_CMDLINE_TAG 1 67 #define CONFIG_CMDLINE_TAG 1
60 #define CONFIG_SETUP_MEMORY_TAGS 1 68 #define CONFIG_SETUP_MEMORY_TAGS 1
61 #define CONFIG_INITRD_TAG 1 69 #define CONFIG_INITRD_TAG 1
62 70
63 #if defined(CONFIG_CMD_KGDB) 71 #if defined(CONFIG_CMD_KGDB)
64 # define CONFIG_KGDB_BAUDRATE 230400 72 # define CONFIG_KGDB_BAUDRATE 230400
65 /* which serial port to use */ 73 /* which serial port to use */
66 # define CONFIG_KGDB_SER_INDEX 1 74 # define CONFIG_KGDB_SER_INDEX 1
67 #endif 75 #endif
68 76
69 /* Miscellaneous configurable options */ 77 /* Miscellaneous configurable options */
70 #define CONFIG_SYS_LONGHELP 78 #define CONFIG_SYS_LONGHELP
71 #define CONFIG_SYS_PROMPT "=> " 79 #define CONFIG_SYS_PROMPT "=> "
72 /* Console I/O Buffer Size */ 80 /* Console I/O Buffer Size */
73 #define CONFIG_SYS_CBSIZE 256 81 #define CONFIG_SYS_CBSIZE 256
74 /* Print Buffer Size */ 82 /* Print Buffer Size */
75 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) 83 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
76 /* max number of command args */ 84 /* max number of command args */
77 #define CONFIG_SYS_MAXARGS 16 85 #define CONFIG_SYS_MAXARGS 16
78 /* Boot Argument Buffer Size */ 86 /* Boot Argument Buffer Size */
79 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 87 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
80 88
81 #define CONFIG_SYS_MEMTEST_START 0x00400000 89 #define CONFIG_SYS_MEMTEST_START 0x00400000
82 #define CONFIG_SYS_MEMTEST_END 0x00800000 90 #define CONFIG_SYS_MEMTEST_END 0x00800000
83 91
84 /* spec says 66.666 MHz, but it appears to be 33 */ 92 /* timer clock - 2* OSC_IN system clock */
85 #define CONFIG_SYS_HZ 3333333 93 #define CONFIG_IXP425_TIMER_CLK 66000000
94 #define CONFIG_SYS_HZ 1000
86 95
87 /* default load address */ 96 /* default load address */
88 #define CONFIG_SYS_LOAD_ADDR 0x00010000 97 #define CONFIG_SYS_LOAD_ADDR 0x00010000
89 98
90 /* valid baudrates */ 99 /* valid baudrates */
91 #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, \ 100 #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, \
92 115200, 230400 } 101 115200, 230400 }
93 #define CONFIG_SERIAL_RTS_ACTIVE 1 102 #define CONFIG_SERIAL_RTS_ACTIVE 1
94 103
95 /* 104 /*
96 * Stack sizes 105 * Stack sizes
97 * The stack sizes are set up in start.S using the settings below 106 * The stack sizes are set up in start.S using the settings below
98 */ 107 */
99 #define CONFIG_STACKSIZE (128*1024) /* regular stack */ 108 #define CONFIG_STACKSIZE (128*1024) /* regular stack */
100 #ifdef CONFIG_USE_IRQ
101 # define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */
102 # define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */
103 #endif
104 109
105 /* Expansion bus settings */ 110 /* Expansion bus settings */
106 #define CONFIG_SYS_EXP_CS0 0xbd113003 111 #define CONFIG_SYS_EXP_CS0 0xbd113003
107 112
108 /* SDRAM settings */ 113 /* SDRAM settings */
109 #define CONFIG_NR_DRAM_BANKS 1 114 #define CONFIG_NR_DRAM_BANKS 1
110 #define PHYS_SDRAM_1 0x00000000 115 #define PHYS_SDRAM_1 0x00000000
111 #define CONFIG_SYS_DRAM_BASE 0x00000000 116 #define CONFIG_SYS_SDRAM_BASE 0x00000000
112 117
113 /* 32MB SDRAM */ 118 /* 32MB SDRAM */
114 #define CONFIG_SYS_SDR_CONFIG 0x18 119 #define CONFIG_SYS_SDR_CONFIG 0x18
115 #define PHYS_SDRAM_1_SIZE 0x02000000 120 #define PHYS_SDRAM_1_SIZE 0x02000000
116 #define CONFIG_SYS_SDRAM_REFRESH_CNT 0x81a 121 #define CONFIG_SYS_SDRAM_REFRESH_CNT 0x81a
117 #define CONFIG_SYS_SDR_MODE_CONFIG 0x1 122 #define CONFIG_SYS_SDR_MODE_CONFIG 0x1
118 #define CONFIG_SYS_DRAM_SIZE 0x02000000 123 #define CONFIG_SYS_DRAM_SIZE 0x02000000
119 124
120 /* FLASH organization */ 125 /* FLASH organization */
126 #define CONFIG_SYS_TEXT_BASE 0x50000000
121 #define CONFIG_SYS_MAX_FLASH_BANKS 2 127 #define CONFIG_SYS_MAX_FLASH_BANKS 2
122 /* max # of sectors per chip */ 128 /* max # of sectors per chip */
123 #define CONFIG_SYS_MAX_FLASH_SECT 70 129 #define CONFIG_SYS_MAX_FLASH_SECT 70
124 #define PHYS_FLASH_1 0x50000000 130 #define PHYS_FLASH_1 0x50000000
125 #define PHYS_FLASH_2 0x51000000 131 #define PHYS_FLASH_2 0x51000000
126 #define CONFIG_SYS_FLASH_BANKS_LIST { PHYS_FLASH_1, PHYS_FLASH_2 } 132 #define CONFIG_SYS_FLASH_BANKS_LIST { PHYS_FLASH_1, PHYS_FLASH_2 }
127 133
128 #define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1 134 #define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
129 #define CONFIG_SYS_MONITOR_BASE PHYS_FLASH_1 135 #define CONFIG_SYS_MONITOR_BASE PHYS_FLASH_1
130 #define CONFIG_SYS_MONITOR_LEN (252 << 10) 136 #define CONFIG_SYS_MONITOR_LEN (252 << 10)
137 #define CONFIG_BOARD_SIZE_LIMIT 258048
131 138
132 /* Use common CFI driver */ 139 /* Use common CFI driver */
133 #define CONFIG_SYS_FLASH_CFI 140 #define CONFIG_SYS_FLASH_CFI
134 #define CONFIG_FLASH_CFI_DRIVER 141 #define CONFIG_FLASH_CFI_DRIVER
135 /* board provides its own flash_init code */ 142 /* board provides its own flash_init code */
136 #define CONFIG_FLASH_CFI_LEGACY 1 143 #define CONFIG_FLASH_CFI_LEGACY 1
137 /* no byte writes on IXP4xx */ 144 /* no byte writes on IXP4xx */
138 #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT 145 #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT
139 /* SST 39VF020 etc. support */ 146 /* SST 39VF020 etc. support */
140 #define CONFIG_SYS_FLASH_LEGACY_256Kx8 1 147 #define CONFIG_SYS_FLASH_LEGACY_256Kx8 1
141 148
142 /* print 'E' for empty sector on flinfo */ 149 /* print 'E' for empty sector on flinfo */
143 #define CONFIG_SYS_FLASH_EMPTY_INFO 150 #define CONFIG_SYS_FLASH_EMPTY_INFO
144 151
145 /* Ethernet */ 152 /* Ethernet */
146 153
147 /* include IXP4xx NPE support */ 154 /* include IXP4xx NPE support */
148 #define CONFIG_IXP4XX_NPE 1 155 #define CONFIG_IXP4XX_NPE 1
149 156
150 #define CONFIG_NET_MULTI 1 157 #define CONFIG_NET_MULTI 1
151 /* NPE0 PHY address */ 158 /* NPE0 PHY address */
152 #define CONFIG_PHY_ADDR 0x1C 159 #define CONFIG_PHY_ADDR 0x1C
153 /* MII PHY management */ 160 /* MII PHY management */
154 #define CONFIG_MII 1 161 #define CONFIG_MII 1
162
155 /* Number of ethernet rx buffers & descriptors */ 163 /* Number of ethernet rx buffers & descriptors */
156 #define CONFIG_SYS_RX_ETH_BUFFER 16 164 #define CONFIG_SYS_RX_ETH_BUFFER 16
157 165
158 #define CONFIG_CMD_DHCP 166 #define CONFIG_CMD_DHCP
159 #define CONFIG_CMD_NET 167 #define CONFIG_CMD_NET
160 #define CONFIG_CMD_MII 168 #define CONFIG_CMD_MII
161 #define CONFIG_CMD_PING 169 #define CONFIG_CMD_PING
162 #undef CONFIG_CMD_NFS 170 #undef CONFIG_CMD_NFS
163 171
164 /* BOOTP options */ 172 /* BOOTP options */
165 #define CONFIG_BOOTP_BOOTFILESIZE 173 #define CONFIG_BOOTP_BOOTFILESIZE
166 #define CONFIG_BOOTP_BOOTPATH 174 #define CONFIG_BOOTP_BOOTPATH
167 #define CONFIG_BOOTP_GATEWAY 175 #define CONFIG_BOOTP_GATEWAY
168 #define CONFIG_BOOTP_HOSTNAME 176 #define CONFIG_BOOTP_HOSTNAME
169 177
170 /* Cache Configuration */ 178 /* Cache Configuration */
171 #define CONFIG_SYS_CACHELINE_SIZE 32 179 #define CONFIG_SYS_CACHELINE_SIZE 32
172 180
173 /* environment organization: one complete 4k flash sector */ 181 /* environment organization: one complete 4k flash sector */
174 #define CONFIG_ENV_IS_IN_FLASH 1 182 #define CONFIG_ENV_IS_IN_FLASH 1
175 #define CONFIG_ENV_SIZE 0x1000 183 #define CONFIG_ENV_SIZE 0x1000
176 #define CONFIG_ENV_ADDR (PHYS_FLASH_1 + 0x3f000) 184 #define CONFIG_ENV_ADDR (PHYS_FLASH_1 + 0x3f000)
177 185
178 #define CONFIG_EXTRA_ENV_SETTINGS \ 186 #define CONFIG_EXTRA_ENV_SETTINGS \
179 "npe_ucode=51000000\0" \ 187 "npe_ucode=51000000\0" \
180 "mtd=IXP4XX-Flash.0:252k(uboot),4k(uboot_env);" \ 188 "mtd=IXP4XX-Flash.0:252k(uboot),4k(uboot_env);" \
181 "IXP4XX-Flash.1:128k(ucode),1280k(linux),-(root)\0" \ 189 "IXP4XX-Flash.1:128k(ucode),1280k(linux),-(root)\0" \
182 "kerneladdr=51020000\0" \ 190 "kerneladdr=51020000\0" \
191 "kernelfile=actux4/uImage\0" \
192 "rootfile=actux4/rootfs\0" \
183 "rootaddr=51160000\0" \ 193 "rootaddr=51160000\0" \
184 "loadaddr=10000\0" \ 194 "loadaddr=10000\0" \
185 "updateboot_ser=mw.b 10000 ff 40000;" \ 195 "updateboot_ser=mw.b 10000 ff 40000;" \
186 " loady ${loadaddr};" \ 196 " loady ${loadaddr};" \
187 " run eraseboot writeboot\0" \ 197 " run eraseboot writeboot\0" \
188 "updateboot_net=mw.b 10000 ff 40000;" \ 198 "updateboot_net=mw.b 10000 ff 40000;" \
189 " tftp ${loadaddr} u-boot.bin;" \ 199 " tftp ${loadaddr} actux4/u-boot.bin;" \
190 " run eraseboot writeboot\0" \ 200 " run eraseboot writeboot\0" \
191 "eraseboot=protect off 50000000 5003efff;" \ 201 "eraseboot=protect off 50000000 5003efff;" \
192 " erase 50000000 +${filesize}\0" \ 202 " erase 50000000 +${filesize}\0" \
193 "writeboot=cp.b 10000 50000000 ${filesize}\0" \ 203 "writeboot=cp.b 10000 50000000 ${filesize}\0" \
194 "eraseenv=protect off 5003f000 5003ffff;" \ 204 "updateucode=loady;" \
195 " erase 5003f000 5003ffff\0" \ 205 " era ${npe_ucode} +${filesize};" \
206 " cp.b ${loadaddr} ${npe_ucode} ${filesize}\0" \
196 "updateroot=tftp ${loadaddr} ${rootfile};" \ 207 "updateroot=tftp ${loadaddr} ${rootfile};" \
197 " era ${rootaddr} +${filesize};" \ 208 " era ${rootaddr} +${filesize};" \
198 " cp.b ${loadaddr} ${rootaddr} ${filesize}\0" \ 209 " cp.b ${loadaddr} ${rootaddr} ${filesize}\0" \
199 "updatekern=tftp ${loadaddr} ${kernelfile};" \ 210 "updatekern=tftp ${loadaddr} ${kernelfile};" \
200 " era ${kerneladdr} +${filesize};" \ 211 " era ${kerneladdr} +${filesize};" \
201 " cp.b ${loadaddr} ${kerneladdr} ${filesize}\0" \ 212 " cp.b ${loadaddr} ${kerneladdr} ${filesize}\0" \
202 "flashargs=setenv bootargs mtdparts=${mtd} root=/dev/mtdblock4" \ 213 "flashargs=setenv bootargs mtdparts=${mtd} root=/dev/mtdblock4" \
203 " rootfstype=squashfs,jffs2 init=/etc/preinit\0" \ 214 " rootfstype=squashfs,jffs2 init=/etc/preinit\0" \
204 "netargs=setenv bootargs mtdparts=${mtd} root=/dev/mtdblock4" \ 215 "netargs=setenv bootargs mtdparts=${mtd} root=/dev/mtdblock4" \
205 " rootfstype=squashfs,jffs2 init=/etc/preinit\0" \ 216 " rootfstype=squashfs,jffs2 init=/etc/preinit\0" \
206 "addtty=setenv bootargs ${bootargs} console=ttyS0,${baudrate}\0" \ 217 "addtty=setenv bootargs ${bootargs} console=ttyS0,${baudrate}\0" \
207 "addeth=setenv bootargs ${bootargs} ethaddr=${ethaddr}\0" \ 218 "addeth=setenv bootargs ${bootargs} ethaddr=${ethaddr}\0" \
208 "boot_flash=run flashargs addtty addeth;" \ 219 "boot_flash=run flashargs addtty addeth;" \
209 " bootm ${kerneladdr}\0" \ 220 " bootm ${kerneladdr}\0" \
210 "boot_net=run netargs addtty addeth;" \ 221 "boot_net=run netargs addtty addeth;" \
211 " tftpboot ${loadaddr} ${kernelfile};" \ 222 " tftpboot ${loadaddr} ${kernelfile};" \
212 " bootm\0" 223 " bootm\0"
224