nitrogen6x: add otg usb host/device mode support

Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>

nitrogen6x: add otg usb host/device mode support
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Troy Kisky · Marek Vasut
1 parent 7132869d4c
Showing 1 changed file with 26 additions and 0 deletions Side-by-side Diff
board/boundary/nitrogen6x/nitrogen6x.c
@@ -30,6 +30,7 @@
 #include <i2c.h>
  
 DECLARE_GLOBAL_DATA_PTR;
+#define GP_USB_OTG_PWR	IMX_GPIO_NR(3, 22)
  
 #define UART_PAD_CTRL  (PAD_CTL_PUS_100K_UP |			\
 	PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm |			\
@@ -179,6 +180,14 @@
 	MX6_PAD_RGMII_RX_CTL__RGMII_RX_CTL	| MUX_PAD_CTRL(ENET_PAD_CTRL),
 };
  
+static iomux_v3_cfg_t const misc_pads[] = {
+	MX6_PAD_GPIO_1__USB_OTG_ID		| MUX_PAD_CTRL(WEAK_PULLUP),
+	MX6_PAD_KEY_COL4__USBOH3_USBOTG_OC	| MUX_PAD_CTRL(WEAK_PULLUP),
+	MX6_PAD_EIM_D30__USBOH3_USBH1_OC	| MUX_PAD_CTRL(WEAK_PULLUP),
+	/* OTG Power enable */
+	MX6_PAD_EIM_D22__GPIO_3_22		| MUX_PAD_CTRL(OUTPUT_40OHM),
+};
+
 /* wl1271 pads on nitrogen6x */
 iomux_v3_cfg_t const wl12xx_pads[] = {
 	(MX6_PAD_NANDF_CS1__GPIO_6_14 & ~MUX_PAD_CTRL_MASK)
@@ -250,6 +259,15 @@
  
 	return 0;
 }
+
+int board_ehci_power(int port, int on)
+{
+	if (port)
+		return 0;
+	gpio_set_value(GP_USB_OTG_PWR, on);
+	return 0;
+}
+
 #endif
  
 #ifdef CONFIG_FSL_ESDHC
@@ -369,6 +387,11 @@
 		free(bus);
 	}
 #endif
+
+#ifdef CONFIG_MV_UDC
+	/* For otg ethernet*/
+	usb_eth_initialize(bis);
+#endif
 	return 0;
 }
  
@@ -685,6 +708,7 @@
 	gpio_direction_input(WL12XX_WL_IRQ_GP);
 	gpio_direction_output(WL12XX_WL_ENABLE_GP, 0);
 	gpio_direction_output(WL12XX_BT_ENABLE_GP, 0);
+	gpio_direction_output(GP_USB_OTG_PWR, 0); /* OTG power off */
  
 	imx_iomux_v3_setup_multiple_pads(wl12xx_pads, ARRAY_SIZE(wl12xx_pads));
 	setup_buttons();
@@ -712,6 +736,8 @@
 	clrsetbits_le32(&iomuxc_regs->gpr[1],
 			IOMUXC_GPR1_OTG_ID_MASK,
 			IOMUXC_GPR1_OTG_ID_GPIO1);
+
+	imx_iomux_v3_setup_multiple_pads(misc_pads, ARRAY_SIZE(misc_pads));
  
 	/* address of boot parameters */
 	gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
...	...	@@ -30,6 +30,7 @@
30	30	#include <i2c.h>
31	31
32	32	DECLARE_GLOBAL_DATA_PTR;
	33	+#define GP_USB_OTG_PWR IMX_GPIO_NR(3, 22)
33	34
34	35	#define UART_PAD_CTRL (PAD_CTL_PUS_100K_UP \| \
35	36	PAD_CTL_SPEED_MED \| PAD_CTL_DSE_40ohm \| \
...	...	@@ -179,6 +180,14 @@
179	180	MX6_PAD_RGMII_RX_CTL__RGMII_RX_CTL \| MUX_PAD_CTRL(ENET_PAD_CTRL),
180	181	};
181	182
	183	+static iomux_v3_cfg_t const misc_pads[] = {
	184	+ MX6_PAD_GPIO_1__USB_OTG_ID \| MUX_PAD_CTRL(WEAK_PULLUP),
	185	+ MX6_PAD_KEY_COL4__USBOH3_USBOTG_OC \| MUX_PAD_CTRL(WEAK_PULLUP),
	186	+ MX6_PAD_EIM_D30__USBOH3_USBH1_OC \| MUX_PAD_CTRL(WEAK_PULLUP),
	187	+ /* OTG Power enable */
	188	+ MX6_PAD_EIM_D22__GPIO_3_22 \| MUX_PAD_CTRL(OUTPUT_40OHM),
	189	+};
	190	+
182	191	/* wl1271 pads on nitrogen6x */
183	192	iomux_v3_cfg_t const wl12xx_pads[] = {
184	193	(MX6_PAD_NANDF_CS1__GPIO_6_14 & ~MUX_PAD_CTRL_MASK)
...	...	@@ -250,6 +259,15 @@
250	259
251	260	return 0;
252	261	}
	262	+
	263	+int board_ehci_power(int port, int on)
	264	+{
	265	+ if (port)
	266	+ return 0;
	267	+ gpio_set_value(GP_USB_OTG_PWR, on);
	268	+ return 0;
	269	+}
	270	+
253	271	#endif
254	272
255	273	#ifdef CONFIG_FSL_ESDHC
...	...	@@ -369,6 +387,11 @@
369	387	free(bus);
370	388	}
371	389	#endif
	390	+
	391	+#ifdef CONFIG_MV_UDC
	392	+ /* For otg ethernet*/
	393	+ usb_eth_initialize(bis);
	394	+#endif
372	395	return 0;
373	396	}
374	397
...	...	@@ -685,6 +708,7 @@
685	708	gpio_direction_input(WL12XX_WL_IRQ_GP);
686	709	gpio_direction_output(WL12XX_WL_ENABLE_GP, 0);
687	710	gpio_direction_output(WL12XX_BT_ENABLE_GP, 0);
	711	+ gpio_direction_output(GP_USB_OTG_PWR, 0); /* OTG power off */
688	712
689	713	imx_iomux_v3_setup_multiple_pads(wl12xx_pads, ARRAY_SIZE(wl12xx_pads));
690	714	setup_buttons();
...	...	@@ -712,6 +736,8 @@
712	736	clrsetbits_le32(&iomuxc_regs->gpr[1],
713	737	IOMUXC_GPR1_OTG_ID_MASK,
714	738	IOMUXC_GPR1_OTG_ID_GPIO1);
	739	+
	740	+ imx_iomux_v3_setup_multiple_pads(misc_pads, ARRAY_SIZE(misc_pads));
715	741
716	742	/* address of boot parameters */
717	743	gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;