MLK-20928 imx8: Update SCFW API to latest

Update to latest SCFW API with below commit. Add version API and remove some resource ids. commit 004247e14afc74a21d65569415c4b2e35bfaabc3 Author: Ranjani Vaidyanathan <ranjani.vaidyanathan@nxp.com> Date: Thu Feb 14 14:55:12 2019 -0800 SCF-341 Fix bug in setting large slice clock divider Incorrect mask was applied when clearing out the bits in the DSC large slice divider. Signed-off-by: Ranjani Vaidyanathan <ranjani.vaidyanathan@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com> (cherry picked from commit 745f2e597613e96f1ac630e842faafdc060ee029)

MLK-20928 imx8: Update SCFW API to latest
Update to latest SCFW API with below commit. Add version API and remove some resource ids. commit 004247e14afc74a21d65569415c4b2e35bfaabc3 Author: Ranjani Vaidyanathan <ranjani.vaidyanathan@nxp.com> Date: Thu Feb 14 14:55:12 2019 -0800 SCF-341 Fix bug in setting large slice clock divider Incorrect mask was applied when clearing out the bits in the DSC large slice divider. Signed-off-by: Ranjani Vaidyanathan <ranjani.vaidyanathan@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com> (cherry picked from commit 745f2e597613e96f1ac630e842faafdc060ee029)
Ye Li
1 parent a52ac63177
Showing 7 changed files with 91 additions and 34 deletions Side-by-side Diff
arch/arm/include/asm/mach-imx/sci/rpc.h
arch/arm/include/asm/mach-imx/sci/svc/irq/api.h
arch/arm/include/asm/mach-imx/sci/svc/misc/api.h
arch/arm/include/asm/mach-imx/sci/types.h
arch/arm/mach-imx/sci/svc/misc/rpc.h
arch/arm/mach-imx/sci/svc/misc/rpc_clnt.c
include/dt-bindings/soc/imx_rsrc.h
@@ -19,6 +19,9 @@
  
 /* Defines */
  
+#define SCFW_API_VERSION_MAJOR  1U
+#define SCFW_API_VERSION_MINOR  2U
+
 #define SC_RPC_VERSION          1U
  
 #define SC_RPC_MAX_MSG          8U
@@ -90,6 +90,7 @@
 #define SC_IRQ_PAD               (1U << 1U)    /*!< Pad wakeup */
 #define SC_IRQ_USR1              (1U << 2U)    /*!< User defined 1 */
 #define SC_IRQ_USR2              (1U << 3U)    /*!< User defined 2 */
+#define SC_IRQ_BC_PAD            (1U << 4U)    /*!< Pad wakeup (broadcast to all partitions) */
 /*@}*/
  
 /*!
@@ -319,6 +319,23 @@
     uint32_t *commit);
  
 /*!
+ * This function is used to return the SCFW API versions.
+ *
+ * @param[in]     ipc         IPC handle
+ * @param[out]    cl_maj      pointer to return major part of client version
+ * @param[out]    cl_min      pointer to return minor part of client version
+ * @param[out]    sv_maj      pointer to return major part of SCFW version
+ * @param[out]    sv_min      pointer to return minor part of SCFW version
+ *
+ * Client verion is the version of the API ported to and used by the caller.
+ * SCFW version is the version of the SCFW binary running on the CPU.
+ *
+ * Note a major version difference indicates a break in compatibility.
+ */
+void sc_misc_api_ver(sc_ipc_t ipc, uint16_t *cl_maj,
+    uint16_t *cl_min, uint16_t *sv_maj, uint16_t *sv_min);
+
+/*!
  * This function is used to return the device's unique ID.
  *
  * @param[in]     ipc         IPC handle
@@ -18,6 +18,8 @@
  
 /* Defines */
  
+#define SCFW_API_VERSION            100U
+
 /*!
  * @name Defines for common frequencies
  */
  
  
@@ -202,15 +204,15 @@
 #define SC_R_DC_0_BLIT1           20U
 #define SC_R_DC_0_BLIT2           21U
 #define SC_R_DC_0_BLIT_OUT        22U
-#define SC_R_DC_0_CAPTURE0        23U
-#define SC_R_DC_0_CAPTURE1        24U
+#define SC_R_PERF                 23U
+#define SC_R_UNUSED5              24U
 #define SC_R_DC_0_WARP            25U
-#define SC_R_DC_0_INTEGRAL0       26U
-#define SC_R_DC_0_INTEGRAL1       27U
+#define SC_R_UNUSED7              26U
+#define SC_R_UNUSED8              27U
 #define SC_R_DC_0_VIDEO0          28U
 #define SC_R_DC_0_VIDEO1          29U
 #define SC_R_DC_0_FRAC0           30U
-#define SC_R_DC_0_FRAC1           31U
+#define SC_R_UNUSED6              31U
 #define SC_R_DC_0                 32U
 #define SC_R_GPU_2_PID0           33U
 #define SC_R_DC_0_PLL_0           34U
  
  
  
@@ -219,17 +221,17 @@
 #define SC_R_DC_1_BLIT1           37U
 #define SC_R_DC_1_BLIT2           38U
 #define SC_R_DC_1_BLIT_OUT        39U
-#define SC_R_DC_1_CAPTURE0        40U
-#define SC_R_DC_1_CAPTURE1        41U
+#define SC_R_UNUSED9              40U
+#define SC_R_UNUSED10             41U
 #define SC_R_DC_1_WARP            42U
-#define SC_R_DC_1_INTEGRAL0       43U
-#define SC_R_DC_1_INTEGRAL1       44U
+#define SC_R_UNUSED11             43U
+#define SC_R_UNUSED12             44U
 #define SC_R_DC_1_VIDEO0          45U
 #define SC_R_DC_1_VIDEO1          46U
 #define SC_R_DC_1_FRAC0           47U
-#define SC_R_DC_1_FRAC1           48U
+#define SC_R_UNUSED13             48U
 #define SC_R_DC_1                 49U
-#define SC_R_GPU_3_PID0           50U
+#define SC_R_UNUSED14             50U
 #define SC_R_DC_1_PLL_0           51U
 #define SC_R_DC_1_PLL_1           52U
 #define SC_R_SPI_0                53U
@@ -469,8 +471,8 @@
 #define SC_R_M4_0_UART            287U
 #define SC_R_M4_0_I2C             288U
 #define SC_R_M4_0_INTMUX          289U
-#define SC_R_M4_0_SIM             290U
-#define SC_R_M4_0_WDOG            291U
+#define SC_R_UNUSED15             290U
+#define SC_R_UNUSED16             291U
 #define SC_R_M4_0_MU_0B           292U
 #define SC_R_M4_0_MU_0A0          293U
 #define SC_R_M4_0_MU_0A1          294U
@@ -489,8 +491,8 @@
 #define SC_R_M4_1_UART            307U
 #define SC_R_M4_1_I2C             308U
 #define SC_R_M4_1_INTMUX          309U
-#define SC_R_M4_1_SIM             310U
-#define SC_R_M4_1_WDOG            311U
+#define SC_R_UNUSED17             310U
+#define SC_R_UNUSED18             311U
 #define SC_R_M4_1_MU_0B           312U
 #define SC_R_M4_1_MU_0A0          313U
 #define SC_R_M4_1_MU_0A1          314U
@@ -725,8 +727,7 @@
 #define SC_R_DMA_5_CH2            543U
 #define SC_R_DMA_5_CH3            544U
 #define SC_R_ATTESTATION          545U
-#define SC_R_PERF                 546U
-#define SC_R_LAST                 547U
+#define SC_R_LAST                 546U
 #define SC_R_ALL                  ((sc_rsrc_t) UINT16_MAX)  /*!< All resources */
 /*@}*/
  
@@ -45,6 +45,7 @@
 #define MISC_FUNC_DEBUG_OUT 10U /*!< Index for misc_debug_out() RPC call */
 #define MISC_FUNC_WAVEFORM_CAPTURE 6U /*!< Index for misc_waveform_capture() RPC call */
 #define MISC_FUNC_BUILD_INFO 15U /*!< Index for misc_build_info() RPC call */
+#define MISC_FUNC_API_VER 35U /*!< Index for misc_api_ver() RPC call */
 #define MISC_FUNC_UNIQUE_ID 19U /*!< Index for misc_unique_id() RPC call */
 #define MISC_FUNC_SET_ARI 3U /*!< Index for misc_set_ari() RPC call */
 #define MISC_FUNC_BOOT_STATUS 7U /*!< Index for misc_boot_status() RPC call */
@@ -449,6 +449,41 @@
     return;
 }
  
+void sc_misc_api_ver(sc_ipc_t ipc, uint16_t *cl_maj,
+    uint16_t *cl_min, uint16_t *sv_maj, uint16_t *sv_min)
+{
+    sc_rpc_msg_t msg;
+
+    RPC_VER(&msg) = SC_RPC_VERSION;
+    RPC_SVC(&msg) = U8(SC_RPC_SVC_MISC);
+    RPC_FUNC(&msg) = U8(MISC_FUNC_API_VER);
+    RPC_SIZE(&msg) = 1U;
+
+    sc_call_rpc(ipc, &msg, SC_FALSE);
+
+    if (cl_maj != NULL)
+    {
+        *cl_maj = SCFW_API_VERSION_MAJOR;
+    }
+
+    if (cl_min != NULL)
+    {
+        *cl_min = SCFW_API_VERSION_MINOR;
+    }
+
+    if (sv_maj != NULL)
+    {
+        *sv_maj = RPC_U16(&msg, 4U);
+    }
+
+    if (sv_min != NULL)
+    {
+        *sv_min = RPC_U16(&msg, 6U);
+    }
+
+    return;
+}
+
 void sc_misc_unique_id(sc_ipc_t ipc, uint32_t *id_l,
     uint32_t *id_h)
 {
@@ -36,15 +36,15 @@
 #define SC_R_DC_0_BLIT1                 20
 #define SC_R_DC_0_BLIT2                 21
 #define SC_R_DC_0_BLIT_OUT              22
-#define SC_R_DC_0_CAPTURE0              23
-#define SC_R_DC_0_CAPTURE1              24
+#define SC_R_PERF                       23
+#define SC_R_UNUSED5                    24
 #define SC_R_DC_0_WARP                  25
-#define SC_R_DC_0_INTEGRAL0             26
-#define SC_R_DC_0_INTEGRAL1             27
+#define SC_R_UNUSED7                    26
+#define SC_R_UNUSED8                    27
 #define SC_R_DC_0_VIDEO0                28
 #define SC_R_DC_0_VIDEO1                29
 #define SC_R_DC_0_FRAC0                 30
-#define SC_R_DC_0_FRAC1                 31
+#define SC_R_UNUSED6                    31
 #define SC_R_DC_0                       32
 #define SC_R_GPU_2_PID0                 33
 #define SC_R_DC_0_PLL_0                 34
  
  
  
@@ -53,17 +53,17 @@
 #define SC_R_DC_1_BLIT1                 37
 #define SC_R_DC_1_BLIT2                 38
 #define SC_R_DC_1_BLIT_OUT              39
-#define SC_R_DC_1_CAPTURE0              40
-#define SC_R_DC_1_CAPTURE1              41
+#define SC_R_UNUSED9                    40
+#define SC_R_UNUSED10                   41
 #define SC_R_DC_1_WARP                  42
-#define SC_R_DC_1_INTEGRAL0             43
-#define SC_R_DC_1_INTEGRAL1             44
+#define SC_R_UNUSED11                   43
+#define SC_R_UNUSED12                   44
 #define SC_R_DC_1_VIDEO0                45
 #define SC_R_DC_1_VIDEO1                46
 #define SC_R_DC_1_FRAC0                 47
-#define SC_R_DC_1_FRAC1                 48
+#define SC_R_UNUSED13                   48
 #define SC_R_DC_1                       49
-#define SC_R_GPU_3_PID0                 50
+#define SC_R_UNUSED14                   50
 #define SC_R_DC_1_PLL_0                 51
 #define SC_R_DC_1_PLL_1                 52
 #define SC_R_SPI_0                      53
@@ -303,8 +303,8 @@
 #define SC_R_M4_0_UART                  287
 #define SC_R_M4_0_I2C                   288
 #define SC_R_M4_0_INTMUX                289
-#define SC_R_M4_0_SIM                   290
-#define SC_R_M4_0_WDOG                  291
+#define SC_R_UNUSED15                   290
+#define SC_R_UNUSED16                   291
 #define SC_R_M4_0_MU_0B                 292
 #define SC_R_M4_0_MU_0A0                293
 #define SC_R_M4_0_MU_0A1                294
@@ -323,8 +323,8 @@
 #define SC_R_M4_1_UART                  307
 #define SC_R_M4_1_I2C                   308
 #define SC_R_M4_1_INTMUX                309
-#define SC_R_M4_1_SIM                   310
-#define SC_R_M4_1_WDOG                  311
+#define SC_R_UNUSED17                   310
+#define SC_R_UNUSED18                   311
 #define SC_R_M4_1_MU_0B                 312
 #define SC_R_M4_1_MU_0A0                313
 #define SC_R_M4_1_MU_0A1                314
@@ -559,8 +559,7 @@
 #define SC_R_DMA_5_CH2                  543
 #define SC_R_DMA_5_CH3                  544
 #define SC_R_ATTESTATION                545
-#define SC_R_PERF                       546
-#define SC_R_LAST                       547
+#define SC_R_LAST                       546
  
 #endif /* DT_BINDINGS_RSCRC_IMX_H */
...	...	@@ -19,6 +19,9 @@
19	19
20	20	/* Defines */
21	21
	22	+#define SCFW_API_VERSION_MAJOR 1U
	23	+#define SCFW_API_VERSION_MINOR 2U
	24	+
22	25	#define SC_RPC_VERSION 1U
23	26
24	27	#define SC_RPC_MAX_MSG 8U
...	...	@@ -90,6 +90,7 @@
90	90	#define SC_IRQ_PAD (1U << 1U) /!< Pad wakeup /
91	91	#define SC_IRQ_USR1 (1U << 2U) /!< User defined 1 /
92	92	#define SC_IRQ_USR2 (1U << 3U) /!< User defined 2 /
	93	+#define SC_IRQ_BC_PAD (1U << 4U) /!< Pad wakeup (broadcast to all partitions) /
93	94	/@}/
94	95
95	96	/*!
...	...	@@ -319,6 +319,23 @@
319	319	uint32_t *commit);
320	320
321	321	/*!
	322	+ * This function is used to return the SCFW API versions.
	323	+ *
	324	+ * @param[in] ipc IPC handle
	325	+ * @param[out] cl_maj pointer to return major part of client version
	326	+ * @param[out] cl_min pointer to return minor part of client version
	327	+ * @param[out] sv_maj pointer to return major part of SCFW version
	328	+ * @param[out] sv_min pointer to return minor part of SCFW version
	329	+ *
	330	+ * Client verion is the version of the API ported to and used by the caller.
	331	+ * SCFW version is the version of the SCFW binary running on the CPU.
	332	+ *
	333	+ * Note a major version difference indicates a break in compatibility.
	334	+ */
	335	+void sc_misc_api_ver(sc_ipc_t ipc, uint16_t *cl_maj,
	336	+ uint16_t cl_min, uint16_t sv_maj, uint16_t *sv_min);
	337	+
	338	+/*!
322	339	* This function is used to return the device's unique ID.
323	340	*
324	341	* @param[in] ipc IPC handle
...	...	@@ -18,6 +18,8 @@
18	18
19	19	/* Defines */
20	20
	21	+#define SCFW_API_VERSION 100U
	22	+
21	23	/*!
22	24	* @name Defines for common frequencies
23	25	*/
24	26
25	27
...	...	@@ -202,15 +204,15 @@
202	204	#define SC_R_DC_0_BLIT1 20U
203	205	#define SC_R_DC_0_BLIT2 21U
204	206	#define SC_R_DC_0_BLIT_OUT 22U
205		-#define SC_R_DC_0_CAPTURE0 23U
206		-#define SC_R_DC_0_CAPTURE1 24U
	207	+#define SC_R_PERF 23U
	208	+#define SC_R_UNUSED5 24U
207	209	#define SC_R_DC_0_WARP 25U
208		-#define SC_R_DC_0_INTEGRAL0 26U
209		-#define SC_R_DC_0_INTEGRAL1 27U
	210	+#define SC_R_UNUSED7 26U
	211	+#define SC_R_UNUSED8 27U
210	212	#define SC_R_DC_0_VIDEO0 28U
211	213	#define SC_R_DC_0_VIDEO1 29U
212	214	#define SC_R_DC_0_FRAC0 30U
213		-#define SC_R_DC_0_FRAC1 31U
	215	+#define SC_R_UNUSED6 31U
214	216	#define SC_R_DC_0 32U
215	217	#define SC_R_GPU_2_PID0 33U
216	218	#define SC_R_DC_0_PLL_0 34U
217	219
218	220
219	221
...	...	@@ -219,17 +221,17 @@
219	221	#define SC_R_DC_1_BLIT1 37U
220	222	#define SC_R_DC_1_BLIT2 38U
221	223	#define SC_R_DC_1_BLIT_OUT 39U
222		-#define SC_R_DC_1_CAPTURE0 40U
223		-#define SC_R_DC_1_CAPTURE1 41U
	224	+#define SC_R_UNUSED9 40U
	225	+#define SC_R_UNUSED10 41U
224	226	#define SC_R_DC_1_WARP 42U
225		-#define SC_R_DC_1_INTEGRAL0 43U
226		-#define SC_R_DC_1_INTEGRAL1 44U
	227	+#define SC_R_UNUSED11 43U
	228	+#define SC_R_UNUSED12 44U
227	229	#define SC_R_DC_1_VIDEO0 45U
228	230	#define SC_R_DC_1_VIDEO1 46U
229	231	#define SC_R_DC_1_FRAC0 47U
230		-#define SC_R_DC_1_FRAC1 48U
	232	+#define SC_R_UNUSED13 48U
231	233	#define SC_R_DC_1 49U
232		-#define SC_R_GPU_3_PID0 50U
	234	+#define SC_R_UNUSED14 50U
233	235	#define SC_R_DC_1_PLL_0 51U
234	236	#define SC_R_DC_1_PLL_1 52U
235	237	#define SC_R_SPI_0 53U
...	...	@@ -469,8 +471,8 @@
469	471	#define SC_R_M4_0_UART 287U
470	472	#define SC_R_M4_0_I2C 288U
471	473	#define SC_R_M4_0_INTMUX 289U
472		-#define SC_R_M4_0_SIM 290U
473		-#define SC_R_M4_0_WDOG 291U
	474	+#define SC_R_UNUSED15 290U
	475	+#define SC_R_UNUSED16 291U
474	476	#define SC_R_M4_0_MU_0B 292U
475	477	#define SC_R_M4_0_MU_0A0 293U
476	478	#define SC_R_M4_0_MU_0A1 294U
...	...	@@ -489,8 +491,8 @@
489	491	#define SC_R_M4_1_UART 307U
490	492	#define SC_R_M4_1_I2C 308U
491	493	#define SC_R_M4_1_INTMUX 309U
492		-#define SC_R_M4_1_SIM 310U
493		-#define SC_R_M4_1_WDOG 311U
	494	+#define SC_R_UNUSED17 310U
	495	+#define SC_R_UNUSED18 311U
494	496	#define SC_R_M4_1_MU_0B 312U
495	497	#define SC_R_M4_1_MU_0A0 313U
496	498	#define SC_R_M4_1_MU_0A1 314U
...	...	@@ -725,8 +727,7 @@
725	727	#define SC_R_DMA_5_CH2 543U
726	728	#define SC_R_DMA_5_CH3 544U
727	729	#define SC_R_ATTESTATION 545U
728		-#define SC_R_PERF 546U
729		-#define SC_R_LAST 547U
	730	+#define SC_R_LAST 546U
730	731	#define SC_R_ALL ((sc_rsrc_t) UINT16_MAX) /!< All resources /
731	732	/@}/
732	733
...	...	@@ -45,6 +45,7 @@
45	45	#define MISC_FUNC_DEBUG_OUT 10U /!< Index for misc_debug_out() RPC call /
46	46	#define MISC_FUNC_WAVEFORM_CAPTURE 6U /!< Index for misc_waveform_capture() RPC call /
47	47	#define MISC_FUNC_BUILD_INFO 15U /!< Index for misc_build_info() RPC call /
	48	+#define MISC_FUNC_API_VER 35U /!< Index for misc_api_ver() RPC call /
48	49	#define MISC_FUNC_UNIQUE_ID 19U /!< Index for misc_unique_id() RPC call /
49	50	#define MISC_FUNC_SET_ARI 3U /!< Index for misc_set_ari() RPC call /
50	51	#define MISC_FUNC_BOOT_STATUS 7U /!< Index for misc_boot_status() RPC call /
...	...	@@ -449,6 +449,41 @@
449	449	return;
450	450	}
451	451
	452	+void sc_misc_api_ver(sc_ipc_t ipc, uint16_t *cl_maj,
	453	+ uint16_t cl_min, uint16_t sv_maj, uint16_t *sv_min)
	454	+{
	455	+ sc_rpc_msg_t msg;
	456	+
	457	+ RPC_VER(&msg) = SC_RPC_VERSION;
	458	+ RPC_SVC(&msg) = U8(SC_RPC_SVC_MISC);
	459	+ RPC_FUNC(&msg) = U8(MISC_FUNC_API_VER);
	460	+ RPC_SIZE(&msg) = 1U;
	461	+
	462	+ sc_call_rpc(ipc, &msg, SC_FALSE);
	463	+
	464	+ if (cl_maj != NULL)
	465	+ {
	466	+ *cl_maj = SCFW_API_VERSION_MAJOR;
	467	+ }
	468	+
	469	+ if (cl_min != NULL)
	470	+ {
	471	+ *cl_min = SCFW_API_VERSION_MINOR;
	472	+ }
	473	+
	474	+ if (sv_maj != NULL)
	475	+ {
	476	+ *sv_maj = RPC_U16(&msg, 4U);
	477	+ }
	478	+
	479	+ if (sv_min != NULL)
	480	+ {
	481	+ *sv_min = RPC_U16(&msg, 6U);
	482	+ }
	483	+
	484	+ return;
	485	+}
	486	+
452	487	void sc_misc_unique_id(sc_ipc_t ipc, uint32_t *id_l,
453	488	uint32_t *id_h)
454	489	{
...	...	@@ -36,15 +36,15 @@
36	36	#define SC_R_DC_0_BLIT1 20
37	37	#define SC_R_DC_0_BLIT2 21
38	38	#define SC_R_DC_0_BLIT_OUT 22
39		-#define SC_R_DC_0_CAPTURE0 23
40		-#define SC_R_DC_0_CAPTURE1 24
	39	+#define SC_R_PERF 23
	40	+#define SC_R_UNUSED5 24
41	41	#define SC_R_DC_0_WARP 25
42		-#define SC_R_DC_0_INTEGRAL0 26
43		-#define SC_R_DC_0_INTEGRAL1 27
	42	+#define SC_R_UNUSED7 26
	43	+#define SC_R_UNUSED8 27
44	44	#define SC_R_DC_0_VIDEO0 28
45	45	#define SC_R_DC_0_VIDEO1 29
46	46	#define SC_R_DC_0_FRAC0 30
47		-#define SC_R_DC_0_FRAC1 31
	47	+#define SC_R_UNUSED6 31
48	48	#define SC_R_DC_0 32
49	49	#define SC_R_GPU_2_PID0 33
50	50	#define SC_R_DC_0_PLL_0 34
51	51
52	52
53	53
...	...	@@ -53,17 +53,17 @@
53	53	#define SC_R_DC_1_BLIT1 37
54	54	#define SC_R_DC_1_BLIT2 38
55	55	#define SC_R_DC_1_BLIT_OUT 39
56		-#define SC_R_DC_1_CAPTURE0 40
57		-#define SC_R_DC_1_CAPTURE1 41
	56	+#define SC_R_UNUSED9 40
	57	+#define SC_R_UNUSED10 41
58	58	#define SC_R_DC_1_WARP 42
59		-#define SC_R_DC_1_INTEGRAL0 43
60		-#define SC_R_DC_1_INTEGRAL1 44
	59	+#define SC_R_UNUSED11 43
	60	+#define SC_R_UNUSED12 44
61	61	#define SC_R_DC_1_VIDEO0 45
62	62	#define SC_R_DC_1_VIDEO1 46
63	63	#define SC_R_DC_1_FRAC0 47
64		-#define SC_R_DC_1_FRAC1 48
	64	+#define SC_R_UNUSED13 48
65	65	#define SC_R_DC_1 49
66		-#define SC_R_GPU_3_PID0 50
	66	+#define SC_R_UNUSED14 50
67	67	#define SC_R_DC_1_PLL_0 51
68	68	#define SC_R_DC_1_PLL_1 52
69	69	#define SC_R_SPI_0 53
...	...	@@ -303,8 +303,8 @@
303	303	#define SC_R_M4_0_UART 287
304	304	#define SC_R_M4_0_I2C 288
305	305	#define SC_R_M4_0_INTMUX 289
306		-#define SC_R_M4_0_SIM 290
307		-#define SC_R_M4_0_WDOG 291
	306	+#define SC_R_UNUSED15 290
	307	+#define SC_R_UNUSED16 291
308	308	#define SC_R_M4_0_MU_0B 292
309	309	#define SC_R_M4_0_MU_0A0 293
310	310	#define SC_R_M4_0_MU_0A1 294
...	...	@@ -323,8 +323,8 @@
323	323	#define SC_R_M4_1_UART 307
324	324	#define SC_R_M4_1_I2C 308
325	325	#define SC_R_M4_1_INTMUX 309
326		-#define SC_R_M4_1_SIM 310
327		-#define SC_R_M4_1_WDOG 311
	326	+#define SC_R_UNUSED17 310
	327	+#define SC_R_UNUSED18 311
328	328	#define SC_R_M4_1_MU_0B 312
329	329	#define SC_R_M4_1_MU_0A0 313
330	330	#define SC_R_M4_1_MU_0A1 314
...	...	@@ -559,8 +559,7 @@
559	559	#define SC_R_DMA_5_CH2 543
560	560	#define SC_R_DMA_5_CH3 544
561	561	#define SC_R_ATTESTATION 545
562		-#define SC_R_PERF 546
563		-#define SC_R_LAST 547
	562	+#define SC_R_LAST 546
564	563
565	564	#endif /* DT_BINDINGS_RSCRC_IMX_H */