Commit 0b1a70b2e3f519d6bf6c34f0df3a81ff1a4852cb
Committed by
Jason Liu
Jason Liu
1 parent
ad12cd1580
Exists in
smarc-imx_v2017.03_o8.1.0_1.3.0_8m
and in
1 other branch
MLK-14938-12 serial_lpuart: Update lpuart driver to support i.MX8
Add i.MX8 compatible string and cpu type support to lpuart driver, to use little endian 32 bits configurations. Signed-off-by: Ye Li <ye.li@nxp.com>
Showing 2 changed files with 11 additions and 6 deletions Side-by-side Diff
drivers/serial/serial_lpuart.c
| ... | ... | @@ -55,7 +55,8 @@ |
| 55 | 55 | enum lpuart_devtype { |
| 56 | 56 | DEV_VF610 = 1, |
| 57 | 57 | DEV_LS1021A, |
| 58 | - DEV_MX7ULP | |
| 58 | + DEV_MX7ULP, | |
| 59 | + DEV_IMX8 | |
| 59 | 60 | }; |
| 60 | 61 | |
| 61 | 62 | struct lpuart_serial_platdata { |
| ... | ... | @@ -265,7 +266,7 @@ |
| 265 | 266 | |
| 266 | 267 | lpuart_read32(plat->flags, &base->data, &val); |
| 267 | 268 | |
| 268 | - if (plat->devtype & DEV_MX7ULP) { | |
| 269 | + if (plat->devtype == DEV_MX7ULP || plat->devtype == DEV_IMX8) { | |
| 269 | 270 | lpuart_read32(plat->flags, &base->stat, &stat); |
| 270 | 271 | if (stat & STAT_OR) |
| 271 | 272 | lpuart_write32(plat->flags, &base->stat, STAT_OR); |
| ... | ... | @@ -280,7 +281,7 @@ |
| 280 | 281 | struct lpuart_fsl_reg32 *base = plat->reg; |
| 281 | 282 | u32 stat; |
| 282 | 283 | |
| 283 | - if (plat->devtype & DEV_MX7ULP) { | |
| 284 | + if (plat->devtype == DEV_MX7ULP || plat->devtype == DEV_IMX8) { | |
| 284 | 285 | if (c == '\n') |
| 285 | 286 | serial_putc('\r'); |
| 286 | 287 | } |
| ... | ... | @@ -330,7 +331,7 @@ |
| 330 | 331 | |
| 331 | 332 | lpuart_write32(plat->flags, &base->match, 0); |
| 332 | 333 | |
| 333 | - if (plat->devtype & DEV_MX7ULP) { | |
| 334 | + if (plat->devtype == DEV_MX7ULP || plat->devtype == DEV_IMX8) { | |
| 334 | 335 | _lpuart32_serial_setbrg_7ulp(plat, gd->baudrate); |
| 335 | 336 | } else { |
| 336 | 337 | /* provide data bits, parity, stop bit, etc */ |
| ... | ... | @@ -347,7 +348,7 @@ |
| 347 | 348 | struct lpuart_serial_platdata *plat = dev->platdata; |
| 348 | 349 | |
| 349 | 350 | if (is_lpuart32(dev)) { |
| 350 | - if (plat->devtype & DEV_MX7ULP) | |
| 351 | + if (plat->devtype == DEV_MX7ULP || plat->devtype == DEV_IMX8) | |
| 351 | 352 | _lpuart32_serial_setbrg_7ulp(plat, baudrate); |
| 352 | 353 | else |
| 353 | 354 | _lpuart32_serial_setbrg(plat, baudrate); |
| ... | ... | @@ -432,6 +433,8 @@ |
| 432 | 433 | plat->devtype = DEV_MX7ULP; |
| 433 | 434 | else if (!fdt_node_check_compatible(blob, node, "fsl,vf610-lpuart")) |
| 434 | 435 | plat->devtype = DEV_VF610; |
| 436 | + else if (!fdt_node_check_compatible(blob, node, "fsl,imx8qm-lpuart")) | |
| 437 | + plat->devtype = DEV_IMX8; | |
| 435 | 438 | |
| 436 | 439 | return 0; |
| 437 | 440 | } |
| ... | ... | @@ -449,6 +452,8 @@ |
| 449 | 452 | { .compatible = "fsl,imx7ulp-lpuart", |
| 450 | 453 | .data = LPUART_FLAG_REGMAP_32BIT_REG }, |
| 451 | 454 | { .compatible = "fsl,vf610-lpuart"}, |
| 455 | + { .compatible = "fsl,imx8qm-lpuart", | |
| 456 | + .data = LPUART_FLAG_REGMAP_32BIT_REG }, | |
| 452 | 457 | { } |
| 453 | 458 | }; |
| 454 | 459 |
