Eric Lee / smarc-uboot

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Commit 0b1b60c77954df19b5a601e2ba87614f2d0bbb8b

Authored by Lokesh Vutla
Committed by Tom Rini
1 parent 15191c91a2
Exists in master and in 53 other branches 8qm-imx_v2020.04_5.4.70_2.3.0, emb_lf_v2022.04, imx_v2015.04_4.1.15_1.0.0_ga, pitx_8mp_lf_v2020.04, smarc-8m-android-10.0.0_2.6.0, smarc-8m-android-11.0.0_2.0.0, smarc-8mp-android-11.0.0_2.0.0, smarc-emmc-imx_v2014.04_3.10.53_1.1.0_ga, smarc-emmc-imx_v2014.04_3.14.28_1.0.0_ga, smarc-imx-l5.0.0_1.0.0-ga, smarc-imx6_v2018.03_4.14.98_2.0.0_ga, smarc-imx7_v2017.03_4.9.11_1.0.0_ga, smarc-imx7_v2018.03_4.14.98_2.0.0_ga, smarc-imx_v2014.04_3.14.28_1.0.0_ga, smarc-imx_v2015.04_4.1.15_1.0.0_ga, smarc-imx_v2017.03_4.9.11_1.0.0_ga, smarc-imx_v2017.03_4.9.88_2.0.0_ga, smarc-imx_v2017.03_o8.1.0_1.3.0_8m, smarc-imx_v2018.03_4.14.78_1.0.0_ga, smarc-m6.0.1_2.1.0-ga, smarc-n7.1.2_2.0.0-ga, smarc-rel_imx_4.1.15_2.0.0_ga, smarc_8m-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8m-imx_v2019.04_4.19.35_1.1.0, smarc_8m_00d0-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2019.04_4.19.35_1.1.0, smarc_8mm-imx_v2020.04_5.4.24_2.1.0, smarc_8mp_lf_v2020.04, smarc_8mq-imx_v2020.04_5.4.24_2.1.0, smarc_8mq_lf_v2020.04, ti-u-boot-2015.07, v2013.10, v2013.10-smarct33, v2013.10-smartmen, v2014.01, v2014.04, v2014.04-smarct33, v2014.04-smarct33-emmc, v2014.04-smartmen, v2014.07, v2014.07-smarct33, v2014.07-smartmen, v2015.07-smarct33, v2015.07-smarct33-emmc, v2015.07-smarct4x, v2016.05-dlt, v2016.05-smarct3x, v2016.05-smarct3x-emmc, v2016.05-smarct4x, v2017.01-smarct3x, v2017.01-smarct3x-emmc, v2017.01-smarct4x

ARM: OMAP5: Fix warm reset with USB cable connected 

Warm reset on OMAP5 freezes when USB cable is connected.
Fix requires PRM_RSTTIME.RSTTIME1 to be programmed
with the time for which reset should be held low for the
voltages and the oscillator to reach stable state.

There are 3 parameters to be considered for calculating
the time, which are mostly board and PMIC dependent.
-1- Time taken by the Oscillator to shut + restart
-2- PMIC OTP times
-3- Voltage rail ramp times, which inturn depends on the
PMIC slew rate and value of the voltage ramp needed.

In order to keep the code in u-boot simple, have a way
for boards to specify a pre computed time directly using
the 'CONFIG_OMAP_PLATFORM_RESET_TIME_MAX_USEC'
option. If boards fail to specify the time, use a default
as specified by 'CONFIG_DEFAULT_OMAP_RESET_TIME_MAX_USEC' instead.
Using the default value translates into some ~22ms and should work in
all cases.
However in order to avoid this large delay hiding other bugs,
its recommended that all boards look at their respective data
sheets and specify a pre computed and optimal value using
'CONFIG_OMAP_PLATFORM_RESET_TIME_MAX_USEC'

In order to help future board additions to compute this
config option value, add a README at doc/README.omap-reset-time
which explains how to compute the value. Also update the toplevel
README with the additional option and pointers to
doc/README.omap-reset-time.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
[rnayak@ti.com: Updated changelog and added the README]
Signed-off-by: Rajendra Nayak <rnayak@ti.com>

Showing 11 changed files with 73 additions and 0 deletions Inline Diff

1 # 1 #
2 # (C) Copyright 2000 - 2012 2 # (C) Copyright 2000 - 2012
3 # Wolfgang Denk, DENX Software Engineering, wd@denx.de. 3 # Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 # 4 #
5 # See file CREDITS for list of people who contributed to this 5 # See file CREDITS for list of people who contributed to this
6 # project. 6 # project.
7 # 7 #
8 # This program is free software; you can redistribute it and/or 8 # This program is free software; you can redistribute it and/or
9 # modify it under the terms of the GNU General Public License as 9 # modify it under the terms of the GNU General Public License as
10 # published by the Free Software Foundation; either version 2 of 10 # published by the Free Software Foundation; either version 2 of
11 # the License, or (at your option) any later version. 11 # the License, or (at your option) any later version.
12 # 12 #
13 # This program is distributed in the hope that it will be useful, 13 # This program is distributed in the hope that it will be useful,
14 # but WITHOUT ANY WARRANTY; without even the implied warranty of 14 # but WITHOUT ANY WARRANTY; without even the implied warranty of
15 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 # GNU General Public License for more details. 16 # GNU General Public License for more details.
17 # 17 #
18 # You should have received a copy of the GNU General Public License 18 # You should have received a copy of the GNU General Public License
19 # along with this program; if not, write to the Free Software 19 # along with this program; if not, write to the Free Software
20 # Foundation, Inc., 59 Temple Place, Suite 330, Boston, 20 # Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 # MA 02111-1307 USA 21 # MA 02111-1307 USA
22 # 22 #
23 23
24 Summary: 24 Summary:
25 ======== 25 ========
26 26
27 This directory contains the source code for U-Boot, a boot loader for 27 This directory contains the source code for U-Boot, a boot loader for
28 Embedded boards based on PowerPC, ARM, MIPS and several other 28 Embedded boards based on PowerPC, ARM, MIPS and several other
29 processors, which can be installed in a boot ROM and used to 29 processors, which can be installed in a boot ROM and used to
30 initialize and test the hardware or to download and run application 30 initialize and test the hardware or to download and run application
31 code. 31 code.
32 32
33 The development of U-Boot is closely related to Linux: some parts of 33 The development of U-Boot is closely related to Linux: some parts of
34 the source code originate in the Linux source tree, we have some 34 the source code originate in the Linux source tree, we have some
35 header files in common, and special provision has been made to 35 header files in common, and special provision has been made to
36 support booting of Linux images. 36 support booting of Linux images.
37 37
38 Some attention has been paid to make this software easily 38 Some attention has been paid to make this software easily
39 configurable and extendable. For instance, all monitor commands are 39 configurable and extendable. For instance, all monitor commands are
40 implemented with the same call interface, so that it's very easy to 40 implemented with the same call interface, so that it's very easy to
41 add new commands. Also, instead of permanently adding rarely used 41 add new commands. Also, instead of permanently adding rarely used
42 code (for instance hardware test utilities) to the monitor, you can 42 code (for instance hardware test utilities) to the monitor, you can
43 load and run it dynamically. 43 load and run it dynamically.
44 44
45 45
46 Status: 46 Status:
47 ======= 47 =======
48 48
49 In general, all boards for which a configuration option exists in the 49 In general, all boards for which a configuration option exists in the
50 Makefile have been tested to some extent and can be considered 50 Makefile have been tested to some extent and can be considered
51 "working". In fact, many of them are used in production systems. 51 "working". In fact, many of them are used in production systems.
52 52
53 In case of problems see the CHANGELOG and CREDITS files to find out 53 In case of problems see the CHANGELOG and CREDITS files to find out
54 who contributed the specific port. The MAINTAINERS file lists board 54 who contributed the specific port. The MAINTAINERS file lists board
55 maintainers. 55 maintainers.
56 56
57 Note: There is no CHANGELOG file in the actual U-Boot source tree; 57 Note: There is no CHANGELOG file in the actual U-Boot source tree;
58 it can be created dynamically from the Git log using: 58 it can be created dynamically from the Git log using:
59 59
60 make CHANGELOG 60 make CHANGELOG
61 61
62 62
63 Where to get help: 63 Where to get help:
64 ================== 64 ==================
65 65
66 In case you have questions about, problems with or contributions for 66 In case you have questions about, problems with or contributions for
67 U-Boot you should send a message to the U-Boot mailing list at 67 U-Boot you should send a message to the U-Boot mailing list at
68 <u-boot@lists.denx.de>. There is also an archive of previous traffic 68 <u-boot@lists.denx.de>. There is also an archive of previous traffic
69 on the mailing list - please search the archive before asking FAQ's. 69 on the mailing list - please search the archive before asking FAQ's.
70 Please see http://lists.denx.de/pipermail/u-boot and 70 Please see http://lists.denx.de/pipermail/u-boot and
71 http://dir.gmane.org/gmane.comp.boot-loaders.u-boot 71 http://dir.gmane.org/gmane.comp.boot-loaders.u-boot
72 72
73 73
74 Where to get source code: 74 Where to get source code:
75 ========================= 75 =========================
76 76
77 The U-Boot source code is maintained in the git repository at 77 The U-Boot source code is maintained in the git repository at
78 git://www.denx.de/git/u-boot.git ; you can browse it online at 78 git://www.denx.de/git/u-boot.git ; you can browse it online at
79 http://www.denx.de/cgi-bin/gitweb.cgi?p=u-boot.git;a=summary 79 http://www.denx.de/cgi-bin/gitweb.cgi?p=u-boot.git;a=summary
80 80
81 The "snapshot" links on this page allow you to download tarballs of 81 The "snapshot" links on this page allow you to download tarballs of
82 any version you might be interested in. Official releases are also 82 any version you might be interested in. Official releases are also
83 available for FTP download from the ftp://ftp.denx.de/pub/u-boot/ 83 available for FTP download from the ftp://ftp.denx.de/pub/u-boot/
84 directory. 84 directory.
85 85
86 Pre-built (and tested) images are available from 86 Pre-built (and tested) images are available from
87 ftp://ftp.denx.de/pub/u-boot/images/ 87 ftp://ftp.denx.de/pub/u-boot/images/
88 88
89 89
90 Where we come from: 90 Where we come from:
91 =================== 91 ===================
92 92
93 - start from 8xxrom sources 93 - start from 8xxrom sources
94 - create PPCBoot project (http://sourceforge.net/projects/ppcboot) 94 - create PPCBoot project (http://sourceforge.net/projects/ppcboot)
95 - clean up code 95 - clean up code
96 - make it easier to add custom boards 96 - make it easier to add custom boards
97 - make it possible to add other [PowerPC] CPUs 97 - make it possible to add other [PowerPC] CPUs
98 - extend functions, especially: 98 - extend functions, especially:
99 * Provide extended interface to Linux boot loader 99 * Provide extended interface to Linux boot loader
100 * S-Record download 100 * S-Record download
101 * network boot 101 * network boot
102 * PCMCIA / CompactFlash / ATA disk / SCSI ... boot 102 * PCMCIA / CompactFlash / ATA disk / SCSI ... boot
103 - create ARMBoot project (http://sourceforge.net/projects/armboot) 103 - create ARMBoot project (http://sourceforge.net/projects/armboot)
104 - add other CPU families (starting with ARM) 104 - add other CPU families (starting with ARM)
105 - create U-Boot project (http://sourceforge.net/projects/u-boot) 105 - create U-Boot project (http://sourceforge.net/projects/u-boot)
106 - current project page: see http://www.denx.de/wiki/U-Boot 106 - current project page: see http://www.denx.de/wiki/U-Boot
107 107
108 108
109 Names and Spelling: 109 Names and Spelling:
110 =================== 110 ===================
111 111
112 The "official" name of this project is "Das U-Boot". The spelling 112 The "official" name of this project is "Das U-Boot". The spelling
113 "U-Boot" shall be used in all written text (documentation, comments 113 "U-Boot" shall be used in all written text (documentation, comments
114 in source files etc.). Example: 114 in source files etc.). Example:
115 115
116 This is the README file for the U-Boot project. 116 This is the README file for the U-Boot project.
117 117
118 File names etc. shall be based on the string "u-boot". Examples: 118 File names etc. shall be based on the string "u-boot". Examples:
119 119
120 include/asm-ppc/u-boot.h 120 include/asm-ppc/u-boot.h
121 121
122 #include <asm/u-boot.h> 122 #include <asm/u-boot.h>
123 123
124 Variable names, preprocessor constants etc. shall be either based on 124 Variable names, preprocessor constants etc. shall be either based on
125 the string "u_boot" or on "U_BOOT". Example: 125 the string "u_boot" or on "U_BOOT". Example:
126 126
127 U_BOOT_VERSION u_boot_logo 127 U_BOOT_VERSION u_boot_logo
128 IH_OS_U_BOOT u_boot_hush_start 128 IH_OS_U_BOOT u_boot_hush_start
129 129
130 130
131 Versioning: 131 Versioning:
132 =========== 132 ===========
133 133
134 Starting with the release in October 2008, the names of the releases 134 Starting with the release in October 2008, the names of the releases
135 were changed from numerical release numbers without deeper meaning 135 were changed from numerical release numbers without deeper meaning
136 into a time stamp based numbering. Regular releases are identified by 136 into a time stamp based numbering. Regular releases are identified by
137 names consisting of the calendar year and month of the release date. 137 names consisting of the calendar year and month of the release date.
138 Additional fields (if present) indicate release candidates or bug fix 138 Additional fields (if present) indicate release candidates or bug fix
139 releases in "stable" maintenance trees. 139 releases in "stable" maintenance trees.
140 140
141 Examples: 141 Examples:
142 U-Boot v2009.11 - Release November 2009 142 U-Boot v2009.11 - Release November 2009
143 U-Boot v2009.11.1 - Release 1 in version November 2009 stable tree 143 U-Boot v2009.11.1 - Release 1 in version November 2009 stable tree
144 U-Boot v2010.09-rc1 - Release candiate 1 for September 2010 release 144 U-Boot v2010.09-rc1 - Release candiate 1 for September 2010 release
145 145
146 146
147 Directory Hierarchy: 147 Directory Hierarchy:
148 ==================== 148 ====================
149 149
150 /arch Architecture specific files 150 /arch Architecture specific files
151 /arm Files generic to ARM architecture 151 /arm Files generic to ARM architecture
152 /cpu CPU specific files 152 /cpu CPU specific files
153 /arm720t Files specific to ARM 720 CPUs 153 /arm720t Files specific to ARM 720 CPUs
154 /arm920t Files specific to ARM 920 CPUs 154 /arm920t Files specific to ARM 920 CPUs
155 /at91 Files specific to Atmel AT91RM9200 CPU 155 /at91 Files specific to Atmel AT91RM9200 CPU
156 /imx Files specific to Freescale MC9328 i.MX CPUs 156 /imx Files specific to Freescale MC9328 i.MX CPUs
157 /s3c24x0 Files specific to Samsung S3C24X0 CPUs 157 /s3c24x0 Files specific to Samsung S3C24X0 CPUs
158 /arm925t Files specific to ARM 925 CPUs 158 /arm925t Files specific to ARM 925 CPUs
159 /arm926ejs Files specific to ARM 926 CPUs 159 /arm926ejs Files specific to ARM 926 CPUs
160 /arm1136 Files specific to ARM 1136 CPUs 160 /arm1136 Files specific to ARM 1136 CPUs
161 /ixp Files specific to Intel XScale IXP CPUs 161 /ixp Files specific to Intel XScale IXP CPUs
162 /pxa Files specific to Intel XScale PXA CPUs 162 /pxa Files specific to Intel XScale PXA CPUs
163 /s3c44b0 Files specific to Samsung S3C44B0 CPUs 163 /s3c44b0 Files specific to Samsung S3C44B0 CPUs
164 /sa1100 Files specific to Intel StrongARM SA1100 CPUs 164 /sa1100 Files specific to Intel StrongARM SA1100 CPUs
165 /lib Architecture specific library files 165 /lib Architecture specific library files
166 /avr32 Files generic to AVR32 architecture 166 /avr32 Files generic to AVR32 architecture
167 /cpu CPU specific files 167 /cpu CPU specific files
168 /lib Architecture specific library files 168 /lib Architecture specific library files
169 /blackfin Files generic to Analog Devices Blackfin architecture 169 /blackfin Files generic to Analog Devices Blackfin architecture
170 /cpu CPU specific files 170 /cpu CPU specific files
171 /lib Architecture specific library files 171 /lib Architecture specific library files
172 /x86 Files generic to x86 architecture 172 /x86 Files generic to x86 architecture
173 /cpu CPU specific files 173 /cpu CPU specific files
174 /lib Architecture specific library files 174 /lib Architecture specific library files
175 /m68k Files generic to m68k architecture 175 /m68k Files generic to m68k architecture
176 /cpu CPU specific files 176 /cpu CPU specific files
177 /mcf52x2 Files specific to Freescale ColdFire MCF52x2 CPUs 177 /mcf52x2 Files specific to Freescale ColdFire MCF52x2 CPUs
178 /mcf5227x Files specific to Freescale ColdFire MCF5227x CPUs 178 /mcf5227x Files specific to Freescale ColdFire MCF5227x CPUs
179 /mcf532x Files specific to Freescale ColdFire MCF5329 CPUs 179 /mcf532x Files specific to Freescale ColdFire MCF5329 CPUs
180 /mcf5445x Files specific to Freescale ColdFire MCF5445x CPUs 180 /mcf5445x Files specific to Freescale ColdFire MCF5445x CPUs
181 /mcf547x_8x Files specific to Freescale ColdFire MCF547x_8x CPUs 181 /mcf547x_8x Files specific to Freescale ColdFire MCF547x_8x CPUs
182 /lib Architecture specific library files 182 /lib Architecture specific library files
183 /microblaze Files generic to microblaze architecture 183 /microblaze Files generic to microblaze architecture
184 /cpu CPU specific files 184 /cpu CPU specific files
185 /lib Architecture specific library files 185 /lib Architecture specific library files
186 /mips Files generic to MIPS architecture 186 /mips Files generic to MIPS architecture
187 /cpu CPU specific files 187 /cpu CPU specific files
188 /mips32 Files specific to MIPS32 CPUs 188 /mips32 Files specific to MIPS32 CPUs
189 /xburst Files specific to Ingenic XBurst CPUs 189 /xburst Files specific to Ingenic XBurst CPUs
190 /lib Architecture specific library files 190 /lib Architecture specific library files
191 /nds32 Files generic to NDS32 architecture 191 /nds32 Files generic to NDS32 architecture
192 /cpu CPU specific files 192 /cpu CPU specific files
193 /n1213 Files specific to Andes Technology N1213 CPUs 193 /n1213 Files specific to Andes Technology N1213 CPUs
194 /lib Architecture specific library files 194 /lib Architecture specific library files
195 /nios2 Files generic to Altera NIOS2 architecture 195 /nios2 Files generic to Altera NIOS2 architecture
196 /cpu CPU specific files 196 /cpu CPU specific files
197 /lib Architecture specific library files 197 /lib Architecture specific library files
198 /powerpc Files generic to PowerPC architecture 198 /powerpc Files generic to PowerPC architecture
199 /cpu CPU specific files 199 /cpu CPU specific files
200 /74xx_7xx Files specific to Freescale MPC74xx and 7xx CPUs 200 /74xx_7xx Files specific to Freescale MPC74xx and 7xx CPUs
201 /mpc5xx Files specific to Freescale MPC5xx CPUs 201 /mpc5xx Files specific to Freescale MPC5xx CPUs
202 /mpc5xxx Files specific to Freescale MPC5xxx CPUs 202 /mpc5xxx Files specific to Freescale MPC5xxx CPUs
203 /mpc8xx Files specific to Freescale MPC8xx CPUs 203 /mpc8xx Files specific to Freescale MPC8xx CPUs
204 /mpc8220 Files specific to Freescale MPC8220 CPUs 204 /mpc8220 Files specific to Freescale MPC8220 CPUs
205 /mpc824x Files specific to Freescale MPC824x CPUs 205 /mpc824x Files specific to Freescale MPC824x CPUs
206 /mpc8260 Files specific to Freescale MPC8260 CPUs 206 /mpc8260 Files specific to Freescale MPC8260 CPUs
207 /mpc85xx Files specific to Freescale MPC85xx CPUs 207 /mpc85xx Files specific to Freescale MPC85xx CPUs
208 /ppc4xx Files specific to AMCC PowerPC 4xx CPUs 208 /ppc4xx Files specific to AMCC PowerPC 4xx CPUs
209 /lib Architecture specific library files 209 /lib Architecture specific library files
210 /sh Files generic to SH architecture 210 /sh Files generic to SH architecture
211 /cpu CPU specific files 211 /cpu CPU specific files
212 /sh2 Files specific to sh2 CPUs 212 /sh2 Files specific to sh2 CPUs
213 /sh3 Files specific to sh3 CPUs 213 /sh3 Files specific to sh3 CPUs
214 /sh4 Files specific to sh4 CPUs 214 /sh4 Files specific to sh4 CPUs
215 /lib Architecture specific library files 215 /lib Architecture specific library files
216 /sparc Files generic to SPARC architecture 216 /sparc Files generic to SPARC architecture
217 /cpu CPU specific files 217 /cpu CPU specific files
218 /leon2 Files specific to Gaisler LEON2 SPARC CPU 218 /leon2 Files specific to Gaisler LEON2 SPARC CPU
219 /leon3 Files specific to Gaisler LEON3 SPARC CPU 219 /leon3 Files specific to Gaisler LEON3 SPARC CPU
220 /lib Architecture specific library files 220 /lib Architecture specific library files
221 /api Machine/arch independent API for external apps 221 /api Machine/arch independent API for external apps
222 /board Board dependent files 222 /board Board dependent files
223 /common Misc architecture independent functions 223 /common Misc architecture independent functions
224 /disk Code for disk drive partition handling 224 /disk Code for disk drive partition handling
225 /doc Documentation (don't expect too much) 225 /doc Documentation (don't expect too much)
226 /drivers Commonly used device drivers 226 /drivers Commonly used device drivers
227 /examples Example code for standalone applications, etc. 227 /examples Example code for standalone applications, etc.
228 /fs Filesystem code (cramfs, ext2, jffs2, etc.) 228 /fs Filesystem code (cramfs, ext2, jffs2, etc.)
229 /include Header Files 229 /include Header Files
230 /lib Files generic to all architectures 230 /lib Files generic to all architectures
231 /libfdt Library files to support flattened device trees 231 /libfdt Library files to support flattened device trees
232 /lzma Library files to support LZMA decompression 232 /lzma Library files to support LZMA decompression
233 /lzo Library files to support LZO decompression 233 /lzo Library files to support LZO decompression
234 /net Networking code 234 /net Networking code
235 /post Power On Self Test 235 /post Power On Self Test
236 /rtc Real Time Clock drivers 236 /rtc Real Time Clock drivers
237 /tools Tools to build S-Record or U-Boot images, etc. 237 /tools Tools to build S-Record or U-Boot images, etc.
238 238
239 Software Configuration: 239 Software Configuration:
240 ======================= 240 =======================
241 241
242 Configuration is usually done using C preprocessor defines; the 242 Configuration is usually done using C preprocessor defines; the
243 rationale behind that is to avoid dead code whenever possible. 243 rationale behind that is to avoid dead code whenever possible.
244 244
245 There are two classes of configuration variables: 245 There are two classes of configuration variables:
246 246
247 * Configuration _OPTIONS_: 247 * Configuration _OPTIONS_:
248 These are selectable by the user and have names beginning with 248 These are selectable by the user and have names beginning with
249 "CONFIG_". 249 "CONFIG_".
250 250
251 * Configuration _SETTINGS_: 251 * Configuration _SETTINGS_:
252 These depend on the hardware etc. and should not be meddled with if 252 These depend on the hardware etc. and should not be meddled with if
253 you don't know what you're doing; they have names beginning with 253 you don't know what you're doing; they have names beginning with
254 "CONFIG_SYS_". 254 "CONFIG_SYS_".
255 255
256 Later we will add a configuration tool - probably similar to or even 256 Later we will add a configuration tool - probably similar to or even
257 identical to what's used for the Linux kernel. Right now, we have to 257 identical to what's used for the Linux kernel. Right now, we have to
258 do the configuration by hand, which means creating some symbolic 258 do the configuration by hand, which means creating some symbolic
259 links and editing some configuration files. We use the TQM8xxL boards 259 links and editing some configuration files. We use the TQM8xxL boards
260 as an example here. 260 as an example here.
261 261
262 262
263 Selection of Processor Architecture and Board Type: 263 Selection of Processor Architecture and Board Type:
264 --------------------------------------------------- 264 ---------------------------------------------------
265 265
266 For all supported boards there are ready-to-use default 266 For all supported boards there are ready-to-use default
267 configurations available; just type "make <board_name>_config". 267 configurations available; just type "make <board_name>_config".
268 268
269 Example: For a TQM823L module type: 269 Example: For a TQM823L module type:
270 270
271 cd u-boot 271 cd u-boot
272 make TQM823L_config 272 make TQM823L_config
273 273
274 For the Cogent platform, you need to specify the CPU type as well; 274 For the Cogent platform, you need to specify the CPU type as well;
275 e.g. "make cogent_mpc8xx_config". And also configure the cogent 275 e.g. "make cogent_mpc8xx_config". And also configure the cogent
276 directory according to the instructions in cogent/README. 276 directory according to the instructions in cogent/README.
277 277
278 278
279 Configuration Options: 279 Configuration Options:
280 ---------------------- 280 ----------------------
281 281
282 Configuration depends on the combination of board and CPU type; all 282 Configuration depends on the combination of board and CPU type; all
283 such information is kept in a configuration file 283 such information is kept in a configuration file
284 "include/configs/<board_name>.h". 284 "include/configs/<board_name>.h".
285 285
286 Example: For a TQM823L module, all configuration settings are in 286 Example: For a TQM823L module, all configuration settings are in
287 "include/configs/TQM823L.h". 287 "include/configs/TQM823L.h".
288 288
289 289
290 Many of the options are named exactly as the corresponding Linux 290 Many of the options are named exactly as the corresponding Linux
291 kernel configuration options. The intention is to make it easier to 291 kernel configuration options. The intention is to make it easier to
292 build a config tool - later. 292 build a config tool - later.
293 293
294 294
295 The following options need to be configured: 295 The following options need to be configured:
296 296
297 - CPU Type: Define exactly one, e.g. CONFIG_MPC85XX. 297 - CPU Type: Define exactly one, e.g. CONFIG_MPC85XX.
298 298
299 - Board Type: Define exactly one, e.g. CONFIG_MPC8540ADS. 299 - Board Type: Define exactly one, e.g. CONFIG_MPC8540ADS.
300 300
301 - CPU Daughterboard Type: (if CONFIG_ATSTK1000 is defined) 301 - CPU Daughterboard Type: (if CONFIG_ATSTK1000 is defined)
302 Define exactly one, e.g. CONFIG_ATSTK1002 302 Define exactly one, e.g. CONFIG_ATSTK1002
303 303
304 - CPU Module Type: (if CONFIG_COGENT is defined) 304 - CPU Module Type: (if CONFIG_COGENT is defined)
305 Define exactly one of 305 Define exactly one of
306 CONFIG_CMA286_60_OLD 306 CONFIG_CMA286_60_OLD
307 --- FIXME --- not tested yet: 307 --- FIXME --- not tested yet:
308 CONFIG_CMA286_60, CONFIG_CMA286_21, CONFIG_CMA286_60P, 308 CONFIG_CMA286_60, CONFIG_CMA286_21, CONFIG_CMA286_60P,
309 CONFIG_CMA287_23, CONFIG_CMA287_50 309 CONFIG_CMA287_23, CONFIG_CMA287_50
310 310
311 - Motherboard Type: (if CONFIG_COGENT is defined) 311 - Motherboard Type: (if CONFIG_COGENT is defined)
312 Define exactly one of 312 Define exactly one of
313 CONFIG_CMA101, CONFIG_CMA102 313 CONFIG_CMA101, CONFIG_CMA102
314 314
315 - Motherboard I/O Modules: (if CONFIG_COGENT is defined) 315 - Motherboard I/O Modules: (if CONFIG_COGENT is defined)
316 Define one or more of 316 Define one or more of
317 CONFIG_CMA302 317 CONFIG_CMA302
318 318
319 - Motherboard Options: (if CONFIG_CMA101 or CONFIG_CMA102 are defined) 319 - Motherboard Options: (if CONFIG_CMA101 or CONFIG_CMA102 are defined)
320 Define one or more of 320 Define one or more of
321 CONFIG_LCD_HEARTBEAT - update a character position on 321 CONFIG_LCD_HEARTBEAT - update a character position on
322 the LCD display every second with 322 the LCD display every second with
323 a "rotator" |\-/|\-/ 323 a "rotator" |\-/|\-/
324 324
325 - Board flavour: (if CONFIG_MPC8260ADS is defined) 325 - Board flavour: (if CONFIG_MPC8260ADS is defined)
326 CONFIG_ADSTYPE 326 CONFIG_ADSTYPE
327 Possible values are: 327 Possible values are:
328 CONFIG_SYS_8260ADS - original MPC8260ADS 328 CONFIG_SYS_8260ADS - original MPC8260ADS
329 CONFIG_SYS_8266ADS - MPC8266ADS 329 CONFIG_SYS_8266ADS - MPC8266ADS
330 CONFIG_SYS_PQ2FADS - PQ2FADS-ZU or PQ2FADS-VR 330 CONFIG_SYS_PQ2FADS - PQ2FADS-ZU or PQ2FADS-VR
331 CONFIG_SYS_8272ADS - MPC8272ADS 331 CONFIG_SYS_8272ADS - MPC8272ADS
332 332
333 - Marvell Family Member 333 - Marvell Family Member
334 CONFIG_SYS_MVFS - define it if you want to enable 334 CONFIG_SYS_MVFS - define it if you want to enable
335 multiple fs option at one time 335 multiple fs option at one time
336 for marvell soc family 336 for marvell soc family
337 337
338 - MPC824X Family Member (if CONFIG_MPC824X is defined) 338 - MPC824X Family Member (if CONFIG_MPC824X is defined)
339 Define exactly one of 339 Define exactly one of
340 CONFIG_MPC8240, CONFIG_MPC8245 340 CONFIG_MPC8240, CONFIG_MPC8245
341 341
342 - 8xx CPU Options: (if using an MPC8xx CPU) 342 - 8xx CPU Options: (if using an MPC8xx CPU)
343 CONFIG_8xx_GCLK_FREQ - deprecated: CPU clock if 343 CONFIG_8xx_GCLK_FREQ - deprecated: CPU clock if
344 get_gclk_freq() cannot work 344 get_gclk_freq() cannot work
345 e.g. if there is no 32KHz 345 e.g. if there is no 32KHz
346 reference PIT/RTC clock 346 reference PIT/RTC clock
347 CONFIG_8xx_OSCLK - PLL input clock (either EXTCLK 347 CONFIG_8xx_OSCLK - PLL input clock (either EXTCLK
348 or XTAL/EXTAL) 348 or XTAL/EXTAL)
349 349
350 - 859/866/885 CPU options: (if using a MPC859 or MPC866 or MPC885 CPU): 350 - 859/866/885 CPU options: (if using a MPC859 or MPC866 or MPC885 CPU):
351 CONFIG_SYS_8xx_CPUCLK_MIN 351 CONFIG_SYS_8xx_CPUCLK_MIN
352 CONFIG_SYS_8xx_CPUCLK_MAX 352 CONFIG_SYS_8xx_CPUCLK_MAX
353 CONFIG_8xx_CPUCLK_DEFAULT 353 CONFIG_8xx_CPUCLK_DEFAULT
354 See doc/README.MPC866 354 See doc/README.MPC866
355 355
356 CONFIG_SYS_MEASURE_CPUCLK 356 CONFIG_SYS_MEASURE_CPUCLK
357 357
358 Define this to measure the actual CPU clock instead 358 Define this to measure the actual CPU clock instead
359 of relying on the correctness of the configured 359 of relying on the correctness of the configured
360 values. Mostly useful for board bringup to make sure 360 values. Mostly useful for board bringup to make sure
361 the PLL is locked at the intended frequency. Note 361 the PLL is locked at the intended frequency. Note
362 that this requires a (stable) reference clock (32 kHz 362 that this requires a (stable) reference clock (32 kHz
363 RTC clock or CONFIG_SYS_8XX_XIN) 363 RTC clock or CONFIG_SYS_8XX_XIN)
364 364
365 CONFIG_SYS_DELAYED_ICACHE 365 CONFIG_SYS_DELAYED_ICACHE
366 366
367 Define this option if you want to enable the 367 Define this option if you want to enable the
368 ICache only when Code runs from RAM. 368 ICache only when Code runs from RAM.
369 369
370 - 85xx CPU Options: 370 - 85xx CPU Options:
371 CONFIG_SYS_PPC64 371 CONFIG_SYS_PPC64
372 372
373 Specifies that the core is a 64-bit PowerPC implementation (implements 373 Specifies that the core is a 64-bit PowerPC implementation (implements
374 the "64" category of the Power ISA). This is necessary for ePAPR 374 the "64" category of the Power ISA). This is necessary for ePAPR
375 compliance, among other possible reasons. 375 compliance, among other possible reasons.
376 376
377 CONFIG_SYS_FSL_TBCLK_DIV 377 CONFIG_SYS_FSL_TBCLK_DIV
378 378
379 Defines the core time base clock divider ratio compared to the 379 Defines the core time base clock divider ratio compared to the
380 system clock. On most PQ3 devices this is 8, on newer QorIQ 380 system clock. On most PQ3 devices this is 8, on newer QorIQ
381 devices it can be 16 or 32. The ratio varies from SoC to Soc. 381 devices it can be 16 or 32. The ratio varies from SoC to Soc.
382 382
383 CONFIG_SYS_FSL_PCIE_COMPAT 383 CONFIG_SYS_FSL_PCIE_COMPAT
384 384
385 Defines the string to utilize when trying to match PCIe device 385 Defines the string to utilize when trying to match PCIe device
386 tree nodes for the given platform. 386 tree nodes for the given platform.
387 387
388 CONFIG_SYS_PPC_E500_DEBUG_TLB 388 CONFIG_SYS_PPC_E500_DEBUG_TLB
389 389
390 Enables a temporary TLB entry to be used during boot to work 390 Enables a temporary TLB entry to be used during boot to work
391 around limitations in e500v1 and e500v2 external debugger 391 around limitations in e500v1 and e500v2 external debugger
392 support. This reduces the portions of the boot code where 392 support. This reduces the portions of the boot code where
393 breakpoints and single stepping do not work. The value of this 393 breakpoints and single stepping do not work. The value of this
394 symbol should be set to the TLB1 entry to be used for this 394 symbol should be set to the TLB1 entry to be used for this
395 purpose. 395 purpose.
396 396
397 CONFIG_SYS_FSL_ERRATUM_A004510 397 CONFIG_SYS_FSL_ERRATUM_A004510
398 398
399 Enables a workaround for erratum A004510. If set, 399 Enables a workaround for erratum A004510. If set,
400 then CONFIG_SYS_FSL_ERRATUM_A004510_SVR_REV and 400 then CONFIG_SYS_FSL_ERRATUM_A004510_SVR_REV and
401 CONFIG_SYS_FSL_CORENET_SNOOPVEC_COREONLY must be set. 401 CONFIG_SYS_FSL_CORENET_SNOOPVEC_COREONLY must be set.
402 402
403 CONFIG_SYS_FSL_ERRATUM_A004510_SVR_REV 403 CONFIG_SYS_FSL_ERRATUM_A004510_SVR_REV
404 CONFIG_SYS_FSL_ERRATUM_A004510_SVR_REV2 (optional) 404 CONFIG_SYS_FSL_ERRATUM_A004510_SVR_REV2 (optional)
405 405
406 Defines one or two SoC revisions (low 8 bits of SVR) 406 Defines one or two SoC revisions (low 8 bits of SVR)
407 for which the A004510 workaround should be applied. 407 for which the A004510 workaround should be applied.
408 408
409 The rest of SVR is either not relevant to the decision 409 The rest of SVR is either not relevant to the decision
410 of whether the erratum is present (e.g. p2040 versus 410 of whether the erratum is present (e.g. p2040 versus
411 p2041) or is implied by the build target, which controls 411 p2041) or is implied by the build target, which controls
412 whether CONFIG_SYS_FSL_ERRATUM_A004510 is set. 412 whether CONFIG_SYS_FSL_ERRATUM_A004510 is set.
413 413
414 See Freescale App Note 4493 for more information about 414 See Freescale App Note 4493 for more information about
415 this erratum. 415 this erratum.
416 416
417 CONFIG_SYS_FSL_CORENET_SNOOPVEC_COREONLY 417 CONFIG_SYS_FSL_CORENET_SNOOPVEC_COREONLY
418 418
419 This is the value to write into CCSR offset 0x18600 419 This is the value to write into CCSR offset 0x18600
420 according to the A004510 workaround. 420 according to the A004510 workaround.
421 421
422 - Generic CPU options: 422 - Generic CPU options:
423 CONFIG_SYS_BIG_ENDIAN, CONFIG_SYS_LITTLE_ENDIAN 423 CONFIG_SYS_BIG_ENDIAN, CONFIG_SYS_LITTLE_ENDIAN
424 424
425 Defines the endianess of the CPU. Implementation of those 425 Defines the endianess of the CPU. Implementation of those
426 values is arch specific. 426 values is arch specific.
427 427
428 - Intel Monahans options: 428 - Intel Monahans options:
429 CONFIG_SYS_MONAHANS_RUN_MODE_OSC_RATIO 429 CONFIG_SYS_MONAHANS_RUN_MODE_OSC_RATIO
430 430
431 Defines the Monahans run mode to oscillator 431 Defines the Monahans run mode to oscillator
432 ratio. Valid values are 8, 16, 24, 31. The core 432 ratio. Valid values are 8, 16, 24, 31. The core
433 frequency is this value multiplied by 13 MHz. 433 frequency is this value multiplied by 13 MHz.
434 434
435 CONFIG_SYS_MONAHANS_TURBO_RUN_MODE_RATIO 435 CONFIG_SYS_MONAHANS_TURBO_RUN_MODE_RATIO
436 436
437 Defines the Monahans turbo mode to oscillator 437 Defines the Monahans turbo mode to oscillator
438 ratio. Valid values are 1 (default if undefined) and 438 ratio. Valid values are 1 (default if undefined) and
439 2. The core frequency as calculated above is multiplied 439 2. The core frequency as calculated above is multiplied
440 by this value. 440 by this value.
441 441
442 - MIPS CPU options: 442 - MIPS CPU options:
443 CONFIG_SYS_INIT_SP_OFFSET 443 CONFIG_SYS_INIT_SP_OFFSET
444 444
445 Offset relative to CONFIG_SYS_SDRAM_BASE for initial stack 445 Offset relative to CONFIG_SYS_SDRAM_BASE for initial stack
446 pointer. This is needed for the temporary stack before 446 pointer. This is needed for the temporary stack before
447 relocation. 447 relocation.
448 448
449 CONFIG_SYS_MIPS_CACHE_MODE 449 CONFIG_SYS_MIPS_CACHE_MODE
450 450
451 Cache operation mode for the MIPS CPU. 451 Cache operation mode for the MIPS CPU.
452 See also arch/mips/include/asm/mipsregs.h. 452 See also arch/mips/include/asm/mipsregs.h.
453 Possible values are: 453 Possible values are:
454 CONF_CM_CACHABLE_NO_WA 454 CONF_CM_CACHABLE_NO_WA
455 CONF_CM_CACHABLE_WA 455 CONF_CM_CACHABLE_WA
456 CONF_CM_UNCACHED 456 CONF_CM_UNCACHED
457 CONF_CM_CACHABLE_NONCOHERENT 457 CONF_CM_CACHABLE_NONCOHERENT
458 CONF_CM_CACHABLE_CE 458 CONF_CM_CACHABLE_CE
459 CONF_CM_CACHABLE_COW 459 CONF_CM_CACHABLE_COW
460 CONF_CM_CACHABLE_CUW 460 CONF_CM_CACHABLE_CUW
461 CONF_CM_CACHABLE_ACCELERATED 461 CONF_CM_CACHABLE_ACCELERATED
462 462
463 CONFIG_SYS_XWAY_EBU_BOOTCFG 463 CONFIG_SYS_XWAY_EBU_BOOTCFG
464 464
465 Special option for Lantiq XWAY SoCs for booting from NOR flash. 465 Special option for Lantiq XWAY SoCs for booting from NOR flash.
466 See also arch/mips/cpu/mips32/start.S. 466 See also arch/mips/cpu/mips32/start.S.
467 467
468 CONFIG_XWAY_SWAP_BYTES 468 CONFIG_XWAY_SWAP_BYTES
469 469
470 Enable compilation of tools/xway-swap-bytes needed for Lantiq 470 Enable compilation of tools/xway-swap-bytes needed for Lantiq
471 XWAY SoCs for booting from NOR flash. The U-Boot image needs to 471 XWAY SoCs for booting from NOR flash. The U-Boot image needs to
472 be swapped if a flash programmer is used. 472 be swapped if a flash programmer is used.
473 473
474 - ARM options: 474 - ARM options:
475 CONFIG_SYS_EXCEPTION_VECTORS_HIGH 475 CONFIG_SYS_EXCEPTION_VECTORS_HIGH
476 476
477 Select high exception vectors of the ARM core, e.g., do not 477 Select high exception vectors of the ARM core, e.g., do not
478 clear the V bit of the c1 register of CP15. 478 clear the V bit of the c1 register of CP15.
479 479
480 CONFIG_SYS_THUMB_BUILD 480 CONFIG_SYS_THUMB_BUILD
481 481
482 Use this flag to build U-Boot using the Thumb instruction 482 Use this flag to build U-Boot using the Thumb instruction
483 set for ARM architectures. Thumb instruction set provides 483 set for ARM architectures. Thumb instruction set provides
484 better code density. For ARM architectures that support 484 better code density. For ARM architectures that support
485 Thumb2 this flag will result in Thumb2 code generated by 485 Thumb2 this flag will result in Thumb2 code generated by
486 GCC. 486 GCC.
487 487
488 CONFIG_ARM_ERRATA_716044 488 CONFIG_ARM_ERRATA_716044
489 CONFIG_ARM_ERRATA_742230 489 CONFIG_ARM_ERRATA_742230
490 CONFIG_ARM_ERRATA_743622 490 CONFIG_ARM_ERRATA_743622
491 CONFIG_ARM_ERRATA_751472 491 CONFIG_ARM_ERRATA_751472
492 492
493 If set, the workarounds for these ARM errata are applied early 493 If set, the workarounds for these ARM errata are applied early
494 during U-Boot startup. Note that these options force the 494 during U-Boot startup. Note that these options force the
495 workarounds to be applied; no CPU-type/version detection 495 workarounds to be applied; no CPU-type/version detection
496 exists, unlike the similar options in the Linux kernel. Do not 496 exists, unlike the similar options in the Linux kernel. Do not
497 set these options unless they apply! 497 set these options unless they apply!
498 498
499 - CPU timer options: 499 - CPU timer options:
500 CONFIG_SYS_HZ 500 CONFIG_SYS_HZ
501 501
502 The frequency of the timer returned by get_timer(). 502 The frequency of the timer returned by get_timer().
503 get_timer() must operate in milliseconds and this CONFIG 503 get_timer() must operate in milliseconds and this CONFIG
504 option must be set to 1000. 504 option must be set to 1000.
505 505
506 - Linux Kernel Interface: 506 - Linux Kernel Interface:
507 CONFIG_CLOCKS_IN_MHZ 507 CONFIG_CLOCKS_IN_MHZ
508 508
509 U-Boot stores all clock information in Hz 509 U-Boot stores all clock information in Hz
510 internally. For binary compatibility with older Linux 510 internally. For binary compatibility with older Linux
511 kernels (which expect the clocks passed in the 511 kernels (which expect the clocks passed in the
512 bd_info data to be in MHz) the environment variable 512 bd_info data to be in MHz) the environment variable
513 "clocks_in_mhz" can be defined so that U-Boot 513 "clocks_in_mhz" can be defined so that U-Boot
514 converts clock data to MHZ before passing it to the 514 converts clock data to MHZ before passing it to the
515 Linux kernel. 515 Linux kernel.
516 When CONFIG_CLOCKS_IN_MHZ is defined, a definition of 516 When CONFIG_CLOCKS_IN_MHZ is defined, a definition of
517 "clocks_in_mhz=1" is automatically included in the 517 "clocks_in_mhz=1" is automatically included in the
518 default environment. 518 default environment.
519 519
520 CONFIG_MEMSIZE_IN_BYTES [relevant for MIPS only] 520 CONFIG_MEMSIZE_IN_BYTES [relevant for MIPS only]
521 521
522 When transferring memsize parameter to linux, some versions 522 When transferring memsize parameter to linux, some versions
523 expect it to be in bytes, others in MB. 523 expect it to be in bytes, others in MB.
524 Define CONFIG_MEMSIZE_IN_BYTES to make it in bytes. 524 Define CONFIG_MEMSIZE_IN_BYTES to make it in bytes.
525 525
526 CONFIG_OF_LIBFDT 526 CONFIG_OF_LIBFDT
527 527
528 New kernel versions are expecting firmware settings to be 528 New kernel versions are expecting firmware settings to be
529 passed using flattened device trees (based on open firmware 529 passed using flattened device trees (based on open firmware
530 concepts). 530 concepts).
531 531
532 CONFIG_OF_LIBFDT 532 CONFIG_OF_LIBFDT
533 * New libfdt-based support 533 * New libfdt-based support
534 * Adds the "fdt" command 534 * Adds the "fdt" command
535 * The bootm command automatically updates the fdt 535 * The bootm command automatically updates the fdt
536 536
537 OF_CPU - The proper name of the cpus node (only required for 537 OF_CPU - The proper name of the cpus node (only required for
538 MPC512X and MPC5xxx based boards). 538 MPC512X and MPC5xxx based boards).
539 OF_SOC - The proper name of the soc node (only required for 539 OF_SOC - The proper name of the soc node (only required for
540 MPC512X and MPC5xxx based boards). 540 MPC512X and MPC5xxx based boards).
541 OF_TBCLK - The timebase frequency. 541 OF_TBCLK - The timebase frequency.
542 OF_STDOUT_PATH - The path to the console device 542 OF_STDOUT_PATH - The path to the console device
543 543
544 boards with QUICC Engines require OF_QE to set UCC MAC 544 boards with QUICC Engines require OF_QE to set UCC MAC
545 addresses 545 addresses
546 546
547 CONFIG_OF_BOARD_SETUP 547 CONFIG_OF_BOARD_SETUP
548 548
549 Board code has addition modification that it wants to make 549 Board code has addition modification that it wants to make
550 to the flat device tree before handing it off to the kernel 550 to the flat device tree before handing it off to the kernel
551 551
552 CONFIG_OF_BOOT_CPU 552 CONFIG_OF_BOOT_CPU
553 553
554 This define fills in the correct boot CPU in the boot 554 This define fills in the correct boot CPU in the boot
555 param header, the default value is zero if undefined. 555 param header, the default value is zero if undefined.
556 556
557 CONFIG_OF_IDE_FIXUP 557 CONFIG_OF_IDE_FIXUP
558 558
559 U-Boot can detect if an IDE device is present or not. 559 U-Boot can detect if an IDE device is present or not.
560 If not, and this new config option is activated, U-Boot 560 If not, and this new config option is activated, U-Boot
561 removes the ATA node from the DTS before booting Linux, 561 removes the ATA node from the DTS before booting Linux,
562 so the Linux IDE driver does not probe the device and 562 so the Linux IDE driver does not probe the device and
563 crash. This is needed for buggy hardware (uc101) where 563 crash. This is needed for buggy hardware (uc101) where
564 no pull down resistor is connected to the signal IDE5V_DD7. 564 no pull down resistor is connected to the signal IDE5V_DD7.
565 565
566 CONFIG_MACH_TYPE [relevant for ARM only][mandatory] 566 CONFIG_MACH_TYPE [relevant for ARM only][mandatory]
567 567
568 This setting is mandatory for all boards that have only one 568 This setting is mandatory for all boards that have only one
569 machine type and must be used to specify the machine type 569 machine type and must be used to specify the machine type
570 number as it appears in the ARM machine registry 570 number as it appears in the ARM machine registry
571 (see http://www.arm.linux.org.uk/developer/machines/). 571 (see http://www.arm.linux.org.uk/developer/machines/).
572 Only boards that have multiple machine types supported 572 Only boards that have multiple machine types supported
573 in a single configuration file and the machine type is 573 in a single configuration file and the machine type is
574 runtime discoverable, do not have to use this setting. 574 runtime discoverable, do not have to use this setting.
575 575
576 - vxWorks boot parameters: 576 - vxWorks boot parameters:
577 577
578 bootvx constructs a valid bootline using the following 578 bootvx constructs a valid bootline using the following
579 environments variables: bootfile, ipaddr, serverip, hostname. 579 environments variables: bootfile, ipaddr, serverip, hostname.
580 It loads the vxWorks image pointed bootfile. 580 It loads the vxWorks image pointed bootfile.
581 581
582 CONFIG_SYS_VXWORKS_BOOT_DEVICE - The vxworks device name 582 CONFIG_SYS_VXWORKS_BOOT_DEVICE - The vxworks device name
583 CONFIG_SYS_VXWORKS_MAC_PTR - Ethernet 6 byte MA -address 583 CONFIG_SYS_VXWORKS_MAC_PTR - Ethernet 6 byte MA -address
584 CONFIG_SYS_VXWORKS_SERVERNAME - Name of the server 584 CONFIG_SYS_VXWORKS_SERVERNAME - Name of the server
585 CONFIG_SYS_VXWORKS_BOOT_ADDR - Address of boot parameters 585 CONFIG_SYS_VXWORKS_BOOT_ADDR - Address of boot parameters
586 586
587 CONFIG_SYS_VXWORKS_ADD_PARAMS 587 CONFIG_SYS_VXWORKS_ADD_PARAMS
588 588
589 Add it at the end of the bootline. E.g "u=username pw=secret" 589 Add it at the end of the bootline. E.g "u=username pw=secret"
590 590
591 Note: If a "bootargs" environment is defined, it will overwride 591 Note: If a "bootargs" environment is defined, it will overwride
592 the defaults discussed just above. 592 the defaults discussed just above.
593 593
594 - Cache Configuration: 594 - Cache Configuration:
595 CONFIG_SYS_ICACHE_OFF - Do not enable instruction cache in U-Boot 595 CONFIG_SYS_ICACHE_OFF - Do not enable instruction cache in U-Boot
596 CONFIG_SYS_DCACHE_OFF - Do not enable data cache in U-Boot 596 CONFIG_SYS_DCACHE_OFF - Do not enable data cache in U-Boot
597 CONFIG_SYS_L2CACHE_OFF- Do not enable L2 cache in U-Boot 597 CONFIG_SYS_L2CACHE_OFF- Do not enable L2 cache in U-Boot
598 598
599 - Cache Configuration for ARM: 599 - Cache Configuration for ARM:
600 CONFIG_SYS_L2_PL310 - Enable support for ARM PL310 L2 cache 600 CONFIG_SYS_L2_PL310 - Enable support for ARM PL310 L2 cache
601 controller 601 controller
602 CONFIG_SYS_PL310_BASE - Physical base address of PL310 602 CONFIG_SYS_PL310_BASE - Physical base address of PL310
603 controller register space 603 controller register space
604 604
605 - Serial Ports: 605 - Serial Ports:
606 CONFIG_PL010_SERIAL 606 CONFIG_PL010_SERIAL
607 607
608 Define this if you want support for Amba PrimeCell PL010 UARTs. 608 Define this if you want support for Amba PrimeCell PL010 UARTs.
609 609
610 CONFIG_PL011_SERIAL 610 CONFIG_PL011_SERIAL
611 611
612 Define this if you want support for Amba PrimeCell PL011 UARTs. 612 Define this if you want support for Amba PrimeCell PL011 UARTs.
613 613
614 CONFIG_PL011_CLOCK 614 CONFIG_PL011_CLOCK
615 615
616 If you have Amba PrimeCell PL011 UARTs, set this variable to 616 If you have Amba PrimeCell PL011 UARTs, set this variable to
617 the clock speed of the UARTs. 617 the clock speed of the UARTs.
618 618
619 CONFIG_PL01x_PORTS 619 CONFIG_PL01x_PORTS
620 620
621 If you have Amba PrimeCell PL010 or PL011 UARTs on your board, 621 If you have Amba PrimeCell PL010 or PL011 UARTs on your board,
622 define this to a list of base addresses for each (supported) 622 define this to a list of base addresses for each (supported)
623 port. See e.g. include/configs/versatile.h 623 port. See e.g. include/configs/versatile.h
624 624
625 CONFIG_PL011_SERIAL_RLCR 625 CONFIG_PL011_SERIAL_RLCR
626 626
627 Some vendor versions of PL011 serial ports (e.g. ST-Ericsson U8500) 627 Some vendor versions of PL011 serial ports (e.g. ST-Ericsson U8500)
628 have separate receive and transmit line control registers. Set 628 have separate receive and transmit line control registers. Set
629 this variable to initialize the extra register. 629 this variable to initialize the extra register.
630 630
631 CONFIG_PL011_SERIAL_FLUSH_ON_INIT 631 CONFIG_PL011_SERIAL_FLUSH_ON_INIT
632 632
633 On some platforms (e.g. U8500) U-Boot is loaded by a second stage 633 On some platforms (e.g. U8500) U-Boot is loaded by a second stage
634 boot loader that has already initialized the UART. Define this 634 boot loader that has already initialized the UART. Define this
635 variable to flush the UART at init time. 635 variable to flush the UART at init time.
636 636
637 637
638 - Console Interface: 638 - Console Interface:
639 Depending on board, define exactly one serial port 639 Depending on board, define exactly one serial port
640 (like CONFIG_8xx_CONS_SMC1, CONFIG_8xx_CONS_SMC2, 640 (like CONFIG_8xx_CONS_SMC1, CONFIG_8xx_CONS_SMC2,
641 CONFIG_8xx_CONS_SCC1, ...), or switch off the serial 641 CONFIG_8xx_CONS_SCC1, ...), or switch off the serial
642 console by defining CONFIG_8xx_CONS_NONE 642 console by defining CONFIG_8xx_CONS_NONE
643 643
644 Note: if CONFIG_8xx_CONS_NONE is defined, the serial 644 Note: if CONFIG_8xx_CONS_NONE is defined, the serial
645 port routines must be defined elsewhere 645 port routines must be defined elsewhere
646 (i.e. serial_init(), serial_getc(), ...) 646 (i.e. serial_init(), serial_getc(), ...)
647 647
648 CONFIG_CFB_CONSOLE 648 CONFIG_CFB_CONSOLE
649 Enables console device for a color framebuffer. Needs following 649 Enables console device for a color framebuffer. Needs following
650 defines (cf. smiLynxEM, i8042) 650 defines (cf. smiLynxEM, i8042)
651 VIDEO_FB_LITTLE_ENDIAN graphic memory organisation 651 VIDEO_FB_LITTLE_ENDIAN graphic memory organisation
652 (default big endian) 652 (default big endian)
653 VIDEO_HW_RECTFILL graphic chip supports 653 VIDEO_HW_RECTFILL graphic chip supports
654 rectangle fill 654 rectangle fill
655 (cf. smiLynxEM) 655 (cf. smiLynxEM)
656 VIDEO_HW_BITBLT graphic chip supports 656 VIDEO_HW_BITBLT graphic chip supports
657 bit-blit (cf. smiLynxEM) 657 bit-blit (cf. smiLynxEM)
658 VIDEO_VISIBLE_COLS visible pixel columns 658 VIDEO_VISIBLE_COLS visible pixel columns
659 (cols=pitch) 659 (cols=pitch)
660 VIDEO_VISIBLE_ROWS visible pixel rows 660 VIDEO_VISIBLE_ROWS visible pixel rows
661 VIDEO_PIXEL_SIZE bytes per pixel 661 VIDEO_PIXEL_SIZE bytes per pixel
662 VIDEO_DATA_FORMAT graphic data format 662 VIDEO_DATA_FORMAT graphic data format
663 (0-5, cf. cfb_console.c) 663 (0-5, cf. cfb_console.c)
664 VIDEO_FB_ADRS framebuffer address 664 VIDEO_FB_ADRS framebuffer address
665 VIDEO_KBD_INIT_FCT keyboard int fct 665 VIDEO_KBD_INIT_FCT keyboard int fct
666 (i.e. i8042_kbd_init()) 666 (i.e. i8042_kbd_init())
667 VIDEO_TSTC_FCT test char fct 667 VIDEO_TSTC_FCT test char fct
668 (i.e. i8042_tstc) 668 (i.e. i8042_tstc)
669 VIDEO_GETC_FCT get char fct 669 VIDEO_GETC_FCT get char fct
670 (i.e. i8042_getc) 670 (i.e. i8042_getc)
671 CONFIG_CONSOLE_CURSOR cursor drawing on/off 671 CONFIG_CONSOLE_CURSOR cursor drawing on/off
672 (requires blink timer 672 (requires blink timer
673 cf. i8042.c) 673 cf. i8042.c)
674 CONFIG_SYS_CONSOLE_BLINK_COUNT blink interval (cf. i8042.c) 674 CONFIG_SYS_CONSOLE_BLINK_COUNT blink interval (cf. i8042.c)
675 CONFIG_CONSOLE_TIME display time/date info in 675 CONFIG_CONSOLE_TIME display time/date info in
676 upper right corner 676 upper right corner
677 (requires CONFIG_CMD_DATE) 677 (requires CONFIG_CMD_DATE)
678 CONFIG_VIDEO_LOGO display Linux logo in 678 CONFIG_VIDEO_LOGO display Linux logo in
679 upper left corner 679 upper left corner
680 CONFIG_VIDEO_BMP_LOGO use bmp_logo.h instead of 680 CONFIG_VIDEO_BMP_LOGO use bmp_logo.h instead of
681 linux_logo.h for logo. 681 linux_logo.h for logo.
682 Requires CONFIG_VIDEO_LOGO 682 Requires CONFIG_VIDEO_LOGO
683 CONFIG_CONSOLE_EXTRA_INFO 683 CONFIG_CONSOLE_EXTRA_INFO
684 additional board info beside 684 additional board info beside
685 the logo 685 the logo
686 686
687 When CONFIG_CFB_CONSOLE_ANSI is defined, console will support 687 When CONFIG_CFB_CONSOLE_ANSI is defined, console will support
688 a limited number of ANSI escape sequences (cursor control, 688 a limited number of ANSI escape sequences (cursor control,
689 erase functions and limited graphics rendition control). 689 erase functions and limited graphics rendition control).
690 690
691 When CONFIG_CFB_CONSOLE is defined, video console is 691 When CONFIG_CFB_CONSOLE is defined, video console is
692 default i/o. Serial console can be forced with 692 default i/o. Serial console can be forced with
693 environment 'console=serial'. 693 environment 'console=serial'.
694 694
695 When CONFIG_SILENT_CONSOLE is defined, all console 695 When CONFIG_SILENT_CONSOLE is defined, all console
696 messages (by U-Boot and Linux!) can be silenced with 696 messages (by U-Boot and Linux!) can be silenced with
697 the "silent" environment variable. See 697 the "silent" environment variable. See
698 doc/README.silent for more information. 698 doc/README.silent for more information.
699 699
700 - Console Baudrate: 700 - Console Baudrate:
701 CONFIG_BAUDRATE - in bps 701 CONFIG_BAUDRATE - in bps
702 Select one of the baudrates listed in 702 Select one of the baudrates listed in
703 CONFIG_SYS_BAUDRATE_TABLE, see below. 703 CONFIG_SYS_BAUDRATE_TABLE, see below.
704 CONFIG_SYS_BRGCLK_PRESCALE, baudrate prescale 704 CONFIG_SYS_BRGCLK_PRESCALE, baudrate prescale
705 705
706 - Console Rx buffer length 706 - Console Rx buffer length
707 With CONFIG_SYS_SMC_RXBUFLEN it is possible to define 707 With CONFIG_SYS_SMC_RXBUFLEN it is possible to define
708 the maximum receive buffer length for the SMC. 708 the maximum receive buffer length for the SMC.
709 This option is actual only for 82xx and 8xx possible. 709 This option is actual only for 82xx and 8xx possible.
710 If using CONFIG_SYS_SMC_RXBUFLEN also CONFIG_SYS_MAXIDLE 710 If using CONFIG_SYS_SMC_RXBUFLEN also CONFIG_SYS_MAXIDLE
711 must be defined, to setup the maximum idle timeout for 711 must be defined, to setup the maximum idle timeout for
712 the SMC. 712 the SMC.
713 713
714 - Pre-Console Buffer: 714 - Pre-Console Buffer:
715 Prior to the console being initialised (i.e. serial UART 715 Prior to the console being initialised (i.e. serial UART
716 initialised etc) all console output is silently discarded. 716 initialised etc) all console output is silently discarded.
717 Defining CONFIG_PRE_CONSOLE_BUFFER will cause U-Boot to 717 Defining CONFIG_PRE_CONSOLE_BUFFER will cause U-Boot to
718 buffer any console messages prior to the console being 718 buffer any console messages prior to the console being
719 initialised to a buffer of size CONFIG_PRE_CON_BUF_SZ 719 initialised to a buffer of size CONFIG_PRE_CON_BUF_SZ
720 bytes located at CONFIG_PRE_CON_BUF_ADDR. The buffer is 720 bytes located at CONFIG_PRE_CON_BUF_ADDR. The buffer is
721 a circular buffer, so if more than CONFIG_PRE_CON_BUF_SZ 721 a circular buffer, so if more than CONFIG_PRE_CON_BUF_SZ
722 bytes are output before the console is initialised, the 722 bytes are output before the console is initialised, the
723 earlier bytes are discarded. 723 earlier bytes are discarded.
724 724
725 'Sane' compilers will generate smaller code if 725 'Sane' compilers will generate smaller code if
726 CONFIG_PRE_CON_BUF_SZ is a power of 2 726 CONFIG_PRE_CON_BUF_SZ is a power of 2
727 727
728 - Safe printf() functions 728 - Safe printf() functions
729 Define CONFIG_SYS_VSNPRINTF to compile in safe versions of 729 Define CONFIG_SYS_VSNPRINTF to compile in safe versions of
730 the printf() functions. These are defined in 730 the printf() functions. These are defined in
731 include/vsprintf.h and include snprintf(), vsnprintf() and 731 include/vsprintf.h and include snprintf(), vsnprintf() and
732 so on. Code size increase is approximately 300-500 bytes. 732 so on. Code size increase is approximately 300-500 bytes.
733 If this option is not given then these functions will 733 If this option is not given then these functions will
734 silently discard their buffer size argument - this means 734 silently discard their buffer size argument - this means
735 you are not getting any overflow checking in this case. 735 you are not getting any overflow checking in this case.
736 736
737 - Boot Delay: CONFIG_BOOTDELAY - in seconds 737 - Boot Delay: CONFIG_BOOTDELAY - in seconds
738 Delay before automatically booting the default image; 738 Delay before automatically booting the default image;
739 set to -1 to disable autoboot. 739 set to -1 to disable autoboot.
740 set to -2 to autoboot with no delay and not check for abort 740 set to -2 to autoboot with no delay and not check for abort
741 (even when CONFIG_ZERO_BOOTDELAY_CHECK is defined). 741 (even when CONFIG_ZERO_BOOTDELAY_CHECK is defined).
742 742
743 See doc/README.autoboot for these options that 743 See doc/README.autoboot for these options that
744 work with CONFIG_BOOTDELAY. None are required. 744 work with CONFIG_BOOTDELAY. None are required.
745 CONFIG_BOOT_RETRY_TIME 745 CONFIG_BOOT_RETRY_TIME
746 CONFIG_BOOT_RETRY_MIN 746 CONFIG_BOOT_RETRY_MIN
747 CONFIG_AUTOBOOT_KEYED 747 CONFIG_AUTOBOOT_KEYED
748 CONFIG_AUTOBOOT_PROMPT 748 CONFIG_AUTOBOOT_PROMPT
749 CONFIG_AUTOBOOT_DELAY_STR 749 CONFIG_AUTOBOOT_DELAY_STR
750 CONFIG_AUTOBOOT_STOP_STR 750 CONFIG_AUTOBOOT_STOP_STR
751 CONFIG_AUTOBOOT_DELAY_STR2 751 CONFIG_AUTOBOOT_DELAY_STR2
752 CONFIG_AUTOBOOT_STOP_STR2 752 CONFIG_AUTOBOOT_STOP_STR2
753 CONFIG_ZERO_BOOTDELAY_CHECK 753 CONFIG_ZERO_BOOTDELAY_CHECK
754 CONFIG_RESET_TO_RETRY 754 CONFIG_RESET_TO_RETRY
755 755
756 - Autoboot Command: 756 - Autoboot Command:
757 CONFIG_BOOTCOMMAND 757 CONFIG_BOOTCOMMAND
758 Only needed when CONFIG_BOOTDELAY is enabled; 758 Only needed when CONFIG_BOOTDELAY is enabled;
759 define a command string that is automatically executed 759 define a command string that is automatically executed
760 when no character is read on the console interface 760 when no character is read on the console interface
761 within "Boot Delay" after reset. 761 within "Boot Delay" after reset.
762 762
763 CONFIG_BOOTARGS 763 CONFIG_BOOTARGS
764 This can be used to pass arguments to the bootm 764 This can be used to pass arguments to the bootm
765 command. The value of CONFIG_BOOTARGS goes into the 765 command. The value of CONFIG_BOOTARGS goes into the
766 environment value "bootargs". 766 environment value "bootargs".
767 767
768 CONFIG_RAMBOOT and CONFIG_NFSBOOT 768 CONFIG_RAMBOOT and CONFIG_NFSBOOT
769 The value of these goes into the environment as 769 The value of these goes into the environment as
770 "ramboot" and "nfsboot" respectively, and can be used 770 "ramboot" and "nfsboot" respectively, and can be used
771 as a convenience, when switching between booting from 771 as a convenience, when switching between booting from
772 RAM and NFS. 772 RAM and NFS.
773 773
774 - Pre-Boot Commands: 774 - Pre-Boot Commands:
775 CONFIG_PREBOOT 775 CONFIG_PREBOOT
776 776
777 When this option is #defined, the existence of the 777 When this option is #defined, the existence of the
778 environment variable "preboot" will be checked 778 environment variable "preboot" will be checked
779 immediately before starting the CONFIG_BOOTDELAY 779 immediately before starting the CONFIG_BOOTDELAY
780 countdown and/or running the auto-boot command resp. 780 countdown and/or running the auto-boot command resp.
781 entering interactive mode. 781 entering interactive mode.
782 782
783 This feature is especially useful when "preboot" is 783 This feature is especially useful when "preboot" is
784 automatically generated or modified. For an example 784 automatically generated or modified. For an example
785 see the LWMON board specific code: here "preboot" is 785 see the LWMON board specific code: here "preboot" is
786 modified when the user holds down a certain 786 modified when the user holds down a certain
787 combination of keys on the (special) keyboard when 787 combination of keys on the (special) keyboard when
788 booting the systems 788 booting the systems
789 789
790 - Serial Download Echo Mode: 790 - Serial Download Echo Mode:
791 CONFIG_LOADS_ECHO 791 CONFIG_LOADS_ECHO
792 If defined to 1, all characters received during a 792 If defined to 1, all characters received during a
793 serial download (using the "loads" command) are 793 serial download (using the "loads" command) are
794 echoed back. This might be needed by some terminal 794 echoed back. This might be needed by some terminal
795 emulations (like "cu"), but may as well just take 795 emulations (like "cu"), but may as well just take
796 time on others. This setting #define's the initial 796 time on others. This setting #define's the initial
797 value of the "loads_echo" environment variable. 797 value of the "loads_echo" environment variable.
798 798
799 - Kgdb Serial Baudrate: (if CONFIG_CMD_KGDB is defined) 799 - Kgdb Serial Baudrate: (if CONFIG_CMD_KGDB is defined)
800 CONFIG_KGDB_BAUDRATE 800 CONFIG_KGDB_BAUDRATE
801 Select one of the baudrates listed in 801 Select one of the baudrates listed in
802 CONFIG_SYS_BAUDRATE_TABLE, see below. 802 CONFIG_SYS_BAUDRATE_TABLE, see below.
803 803
804 - Monitor Functions: 804 - Monitor Functions:
805 Monitor commands can be included or excluded 805 Monitor commands can be included or excluded
806 from the build by using the #include files 806 from the build by using the #include files
807 <config_cmd_all.h> and #undef'ing unwanted 807 <config_cmd_all.h> and #undef'ing unwanted
808 commands, or using <config_cmd_default.h> 808 commands, or using <config_cmd_default.h>
809 and augmenting with additional #define's 809 and augmenting with additional #define's
810 for wanted commands. 810 for wanted commands.
811 811
812 The default command configuration includes all commands 812 The default command configuration includes all commands
813 except those marked below with a "*". 813 except those marked below with a "*".
814 814
815 CONFIG_CMD_ASKENV * ask for env variable 815 CONFIG_CMD_ASKENV * ask for env variable
816 CONFIG_CMD_BDI bdinfo 816 CONFIG_CMD_BDI bdinfo
817 CONFIG_CMD_BEDBUG * Include BedBug Debugger 817 CONFIG_CMD_BEDBUG * Include BedBug Debugger
818 CONFIG_CMD_BMP * BMP support 818 CONFIG_CMD_BMP * BMP support
819 CONFIG_CMD_BSP * Board specific commands 819 CONFIG_CMD_BSP * Board specific commands
820 CONFIG_CMD_BOOTD bootd 820 CONFIG_CMD_BOOTD bootd
821 CONFIG_CMD_CACHE * icache, dcache 821 CONFIG_CMD_CACHE * icache, dcache
822 CONFIG_CMD_CONSOLE coninfo 822 CONFIG_CMD_CONSOLE coninfo
823 CONFIG_CMD_CRC32 * crc32 823 CONFIG_CMD_CRC32 * crc32
824 CONFIG_CMD_DATE * support for RTC, date/time... 824 CONFIG_CMD_DATE * support for RTC, date/time...
825 CONFIG_CMD_DHCP * DHCP support 825 CONFIG_CMD_DHCP * DHCP support
826 CONFIG_CMD_DIAG * Diagnostics 826 CONFIG_CMD_DIAG * Diagnostics
827 CONFIG_CMD_DS4510 * ds4510 I2C gpio commands 827 CONFIG_CMD_DS4510 * ds4510 I2C gpio commands
828 CONFIG_CMD_DS4510_INFO * ds4510 I2C info command 828 CONFIG_CMD_DS4510_INFO * ds4510 I2C info command
829 CONFIG_CMD_DS4510_MEM * ds4510 I2C eeprom/sram commansd 829 CONFIG_CMD_DS4510_MEM * ds4510 I2C eeprom/sram commansd
830 CONFIG_CMD_DS4510_RST * ds4510 I2C rst command 830 CONFIG_CMD_DS4510_RST * ds4510 I2C rst command
831 CONFIG_CMD_DTT * Digital Therm and Thermostat 831 CONFIG_CMD_DTT * Digital Therm and Thermostat
832 CONFIG_CMD_ECHO echo arguments 832 CONFIG_CMD_ECHO echo arguments
833 CONFIG_CMD_EDITENV edit env variable 833 CONFIG_CMD_EDITENV edit env variable
834 CONFIG_CMD_EEPROM * EEPROM read/write support 834 CONFIG_CMD_EEPROM * EEPROM read/write support
835 CONFIG_CMD_ELF * bootelf, bootvx 835 CONFIG_CMD_ELF * bootelf, bootvx
836 CONFIG_CMD_ENV_CALLBACK * display details about env callbacks 836 CONFIG_CMD_ENV_CALLBACK * display details about env callbacks
837 CONFIG_CMD_ENV_FLAGS * display details about env flags 837 CONFIG_CMD_ENV_FLAGS * display details about env flags
838 CONFIG_CMD_EXPORTENV * export the environment 838 CONFIG_CMD_EXPORTENV * export the environment
839 CONFIG_CMD_EXT2 * ext2 command support 839 CONFIG_CMD_EXT2 * ext2 command support
840 CONFIG_CMD_EXT4 * ext4 command support 840 CONFIG_CMD_EXT4 * ext4 command support
841 CONFIG_CMD_SAVEENV saveenv 841 CONFIG_CMD_SAVEENV saveenv
842 CONFIG_CMD_FDC * Floppy Disk Support 842 CONFIG_CMD_FDC * Floppy Disk Support
843 CONFIG_CMD_FAT * FAT command support 843 CONFIG_CMD_FAT * FAT command support
844 CONFIG_CMD_FDOS * Dos diskette Support 844 CONFIG_CMD_FDOS * Dos diskette Support
845 CONFIG_CMD_FLASH flinfo, erase, protect 845 CONFIG_CMD_FLASH flinfo, erase, protect
846 CONFIG_CMD_FPGA FPGA device initialization support 846 CONFIG_CMD_FPGA FPGA device initialization support
847 CONFIG_CMD_GETTIME * Get time since boot 847 CONFIG_CMD_GETTIME * Get time since boot
848 CONFIG_CMD_GO * the 'go' command (exec code) 848 CONFIG_CMD_GO * the 'go' command (exec code)
849 CONFIG_CMD_GREPENV * search environment 849 CONFIG_CMD_GREPENV * search environment
850 CONFIG_CMD_HASH * calculate hash / digest 850 CONFIG_CMD_HASH * calculate hash / digest
851 CONFIG_CMD_HWFLOW * RTS/CTS hw flow control 851 CONFIG_CMD_HWFLOW * RTS/CTS hw flow control
852 CONFIG_CMD_I2C * I2C serial bus support 852 CONFIG_CMD_I2C * I2C serial bus support
853 CONFIG_CMD_IDE * IDE harddisk support 853 CONFIG_CMD_IDE * IDE harddisk support
854 CONFIG_CMD_IMI iminfo 854 CONFIG_CMD_IMI iminfo
855 CONFIG_CMD_IMLS List all images found in NOR flash 855 CONFIG_CMD_IMLS List all images found in NOR flash
856 CONFIG_CMD_IMLS_NAND List all images found in NAND flash 856 CONFIG_CMD_IMLS_NAND List all images found in NAND flash
857 CONFIG_CMD_IMMAP * IMMR dump support 857 CONFIG_CMD_IMMAP * IMMR dump support
858 CONFIG_CMD_IMPORTENV * import an environment 858 CONFIG_CMD_IMPORTENV * import an environment
859 CONFIG_CMD_INI * import data from an ini file into the env 859 CONFIG_CMD_INI * import data from an ini file into the env
860 CONFIG_CMD_IRQ * irqinfo 860 CONFIG_CMD_IRQ * irqinfo
861 CONFIG_CMD_ITEST Integer/string test of 2 values 861 CONFIG_CMD_ITEST Integer/string test of 2 values
862 CONFIG_CMD_JFFS2 * JFFS2 Support 862 CONFIG_CMD_JFFS2 * JFFS2 Support
863 CONFIG_CMD_KGDB * kgdb 863 CONFIG_CMD_KGDB * kgdb
864 CONFIG_CMD_LDRINFO ldrinfo (display Blackfin loader) 864 CONFIG_CMD_LDRINFO ldrinfo (display Blackfin loader)
865 CONFIG_CMD_LINK_LOCAL * link-local IP address auto-configuration 865 CONFIG_CMD_LINK_LOCAL * link-local IP address auto-configuration
866 (169.254.*.*) 866 (169.254.*.*)
867 CONFIG_CMD_LOADB loadb 867 CONFIG_CMD_LOADB loadb
868 CONFIG_CMD_LOADS loads 868 CONFIG_CMD_LOADS loads
869 CONFIG_CMD_MD5SUM print md5 message digest 869 CONFIG_CMD_MD5SUM print md5 message digest
870 (requires CONFIG_CMD_MEMORY and CONFIG_MD5) 870 (requires CONFIG_CMD_MEMORY and CONFIG_MD5)
871 CONFIG_CMD_MEMINFO * Display detailed memory information 871 CONFIG_CMD_MEMINFO * Display detailed memory information
872 CONFIG_CMD_MEMORY md, mm, nm, mw, cp, cmp, crc, base, 872 CONFIG_CMD_MEMORY md, mm, nm, mw, cp, cmp, crc, base,
873 loop, loopw 873 loop, loopw
874 CONFIG_CMD_MEMTEST mtest 874 CONFIG_CMD_MEMTEST mtest
875 CONFIG_CMD_MISC Misc functions like sleep etc 875 CONFIG_CMD_MISC Misc functions like sleep etc
876 CONFIG_CMD_MMC * MMC memory mapped support 876 CONFIG_CMD_MMC * MMC memory mapped support
877 CONFIG_CMD_MII * MII utility commands 877 CONFIG_CMD_MII * MII utility commands
878 CONFIG_CMD_MTDPARTS * MTD partition support 878 CONFIG_CMD_MTDPARTS * MTD partition support
879 CONFIG_CMD_NAND * NAND support 879 CONFIG_CMD_NAND * NAND support
880 CONFIG_CMD_NET bootp, tftpboot, rarpboot 880 CONFIG_CMD_NET bootp, tftpboot, rarpboot
881 CONFIG_CMD_PCA953X * PCA953x I2C gpio commands 881 CONFIG_CMD_PCA953X * PCA953x I2C gpio commands
882 CONFIG_CMD_PCA953X_INFO * PCA953x I2C gpio info command 882 CONFIG_CMD_PCA953X_INFO * PCA953x I2C gpio info command
883 CONFIG_CMD_PCI * pciinfo 883 CONFIG_CMD_PCI * pciinfo
884 CONFIG_CMD_PCMCIA * PCMCIA support 884 CONFIG_CMD_PCMCIA * PCMCIA support
885 CONFIG_CMD_PING * send ICMP ECHO_REQUEST to network 885 CONFIG_CMD_PING * send ICMP ECHO_REQUEST to network
886 host 886 host
887 CONFIG_CMD_PORTIO * Port I/O 887 CONFIG_CMD_PORTIO * Port I/O
888 CONFIG_CMD_READ * Read raw data from partition 888 CONFIG_CMD_READ * Read raw data from partition
889 CONFIG_CMD_REGINFO * Register dump 889 CONFIG_CMD_REGINFO * Register dump
890 CONFIG_CMD_RUN run command in env variable 890 CONFIG_CMD_RUN run command in env variable
891 CONFIG_CMD_SANDBOX * sb command to access sandbox features 891 CONFIG_CMD_SANDBOX * sb command to access sandbox features
892 CONFIG_CMD_SAVES * save S record dump 892 CONFIG_CMD_SAVES * save S record dump
893 CONFIG_CMD_SCSI * SCSI Support 893 CONFIG_CMD_SCSI * SCSI Support
894 CONFIG_CMD_SDRAM * print SDRAM configuration information 894 CONFIG_CMD_SDRAM * print SDRAM configuration information
895 (requires CONFIG_CMD_I2C) 895 (requires CONFIG_CMD_I2C)
896 CONFIG_CMD_SETGETDCR Support for DCR Register access 896 CONFIG_CMD_SETGETDCR Support for DCR Register access
897 (4xx only) 897 (4xx only)
898 CONFIG_CMD_SF * Read/write/erase SPI NOR flash 898 CONFIG_CMD_SF * Read/write/erase SPI NOR flash
899 CONFIG_CMD_SHA1SUM print sha1 memory digest 899 CONFIG_CMD_SHA1SUM print sha1 memory digest
900 (requires CONFIG_CMD_MEMORY) 900 (requires CONFIG_CMD_MEMORY)
901 CONFIG_CMD_SOURCE "source" command Support 901 CONFIG_CMD_SOURCE "source" command Support
902 CONFIG_CMD_SPI * SPI serial bus support 902 CONFIG_CMD_SPI * SPI serial bus support
903 CONFIG_CMD_TFTPSRV * TFTP transfer in server mode 903 CONFIG_CMD_TFTPSRV * TFTP transfer in server mode
904 CONFIG_CMD_TFTPPUT * TFTP put command (upload) 904 CONFIG_CMD_TFTPPUT * TFTP put command (upload)
905 CONFIG_CMD_TIME * run command and report execution time (ARM specific) 905 CONFIG_CMD_TIME * run command and report execution time (ARM specific)
906 CONFIG_CMD_TIMER * access to the system tick timer 906 CONFIG_CMD_TIMER * access to the system tick timer
907 CONFIG_CMD_USB * USB support 907 CONFIG_CMD_USB * USB support
908 CONFIG_CMD_CDP * Cisco Discover Protocol support 908 CONFIG_CMD_CDP * Cisco Discover Protocol support
909 CONFIG_CMD_MFSL * Microblaze FSL support 909 CONFIG_CMD_MFSL * Microblaze FSL support
910 910
911 911
912 EXAMPLE: If you want all functions except of network 912 EXAMPLE: If you want all functions except of network
913 support you can write: 913 support you can write:
914 914
915 #include "config_cmd_all.h" 915 #include "config_cmd_all.h"
916 #undef CONFIG_CMD_NET 916 #undef CONFIG_CMD_NET
917 917
918 Other Commands: 918 Other Commands:
919 fdt (flattened device tree) command: CONFIG_OF_LIBFDT 919 fdt (flattened device tree) command: CONFIG_OF_LIBFDT
920 920
921 Note: Don't enable the "icache" and "dcache" commands 921 Note: Don't enable the "icache" and "dcache" commands
922 (configuration option CONFIG_CMD_CACHE) unless you know 922 (configuration option CONFIG_CMD_CACHE) unless you know
923 what you (and your U-Boot users) are doing. Data 923 what you (and your U-Boot users) are doing. Data
924 cache cannot be enabled on systems like the 8xx or 924 cache cannot be enabled on systems like the 8xx or
925 8260 (where accesses to the IMMR region must be 925 8260 (where accesses to the IMMR region must be
926 uncached), and it cannot be disabled on all other 926 uncached), and it cannot be disabled on all other
927 systems where we (mis-) use the data cache to hold an 927 systems where we (mis-) use the data cache to hold an
928 initial stack and some data. 928 initial stack and some data.
929 929
930 930
931 XXX - this list needs to get updated! 931 XXX - this list needs to get updated!
932 932
933 - Device tree: 933 - Device tree:
934 CONFIG_OF_CONTROL 934 CONFIG_OF_CONTROL
935 If this variable is defined, U-Boot will use a device tree 935 If this variable is defined, U-Boot will use a device tree
936 to configure its devices, instead of relying on statically 936 to configure its devices, instead of relying on statically
937 compiled #defines in the board file. This option is 937 compiled #defines in the board file. This option is
938 experimental and only available on a few boards. The device 938 experimental and only available on a few boards. The device
939 tree is available in the global data as gd->fdt_blob. 939 tree is available in the global data as gd->fdt_blob.
940 940
941 U-Boot needs to get its device tree from somewhere. This can 941 U-Boot needs to get its device tree from somewhere. This can
942 be done using one of the two options below: 942 be done using one of the two options below:
943 943
944 CONFIG_OF_EMBED 944 CONFIG_OF_EMBED
945 If this variable is defined, U-Boot will embed a device tree 945 If this variable is defined, U-Boot will embed a device tree
946 binary in its image. This device tree file should be in the 946 binary in its image. This device tree file should be in the
947 board directory and called <soc>-<board>.dts. The binary file 947 board directory and called <soc>-<board>.dts. The binary file
948 is then picked up in board_init_f() and made available through 948 is then picked up in board_init_f() and made available through
949 the global data structure as gd->blob. 949 the global data structure as gd->blob.
950 950
951 CONFIG_OF_SEPARATE 951 CONFIG_OF_SEPARATE
952 If this variable is defined, U-Boot will build a device tree 952 If this variable is defined, U-Boot will build a device tree
953 binary. It will be called u-boot.dtb. Architecture-specific 953 binary. It will be called u-boot.dtb. Architecture-specific
954 code will locate it at run-time. Generally this works by: 954 code will locate it at run-time. Generally this works by:
955 955
956 cat u-boot.bin u-boot.dtb >image.bin 956 cat u-boot.bin u-boot.dtb >image.bin
957 957
958 and in fact, U-Boot does this for you, creating a file called 958 and in fact, U-Boot does this for you, creating a file called
959 u-boot-dtb.bin which is useful in the common case. You can 959 u-boot-dtb.bin which is useful in the common case. You can
960 still use the individual files if you need something more 960 still use the individual files if you need something more
961 exotic. 961 exotic.
962 962
963 - Watchdog: 963 - Watchdog:
964 CONFIG_WATCHDOG 964 CONFIG_WATCHDOG
965 If this variable is defined, it enables watchdog 965 If this variable is defined, it enables watchdog
966 support for the SoC. There must be support in the SoC 966 support for the SoC. There must be support in the SoC
967 specific code for a watchdog. For the 8xx and 8260 967 specific code for a watchdog. For the 8xx and 8260
968 CPUs, the SIU Watchdog feature is enabled in the SYPCR 968 CPUs, the SIU Watchdog feature is enabled in the SYPCR
969 register. When supported for a specific SoC is 969 register. When supported for a specific SoC is
970 available, then no further board specific code should 970 available, then no further board specific code should
971 be needed to use it. 971 be needed to use it.
972 972
973 CONFIG_HW_WATCHDOG 973 CONFIG_HW_WATCHDOG
974 When using a watchdog circuitry external to the used 974 When using a watchdog circuitry external to the used
975 SoC, then define this variable and provide board 975 SoC, then define this variable and provide board
976 specific code for the "hw_watchdog_reset" function. 976 specific code for the "hw_watchdog_reset" function.
977 977
978 - U-Boot Version: 978 - U-Boot Version:
979 CONFIG_VERSION_VARIABLE 979 CONFIG_VERSION_VARIABLE
980 If this variable is defined, an environment variable 980 If this variable is defined, an environment variable
981 named "ver" is created by U-Boot showing the U-Boot 981 named "ver" is created by U-Boot showing the U-Boot
982 version as printed by the "version" command. 982 version as printed by the "version" command.
983 Any change to this variable will be reverted at the 983 Any change to this variable will be reverted at the
984 next reset. 984 next reset.
985 985
986 - Real-Time Clock: 986 - Real-Time Clock:
987 987
988 When CONFIG_CMD_DATE is selected, the type of the RTC 988 When CONFIG_CMD_DATE is selected, the type of the RTC
989 has to be selected, too. Define exactly one of the 989 has to be selected, too. Define exactly one of the
990 following options: 990 following options:
991 991
992 CONFIG_RTC_MPC8xx - use internal RTC of MPC8xx 992 CONFIG_RTC_MPC8xx - use internal RTC of MPC8xx
993 CONFIG_RTC_PCF8563 - use Philips PCF8563 RTC 993 CONFIG_RTC_PCF8563 - use Philips PCF8563 RTC
994 CONFIG_RTC_MC13XXX - use MC13783 or MC13892 RTC 994 CONFIG_RTC_MC13XXX - use MC13783 or MC13892 RTC
995 CONFIG_RTC_MC146818 - use MC146818 RTC 995 CONFIG_RTC_MC146818 - use MC146818 RTC
996 CONFIG_RTC_DS1307 - use Maxim, Inc. DS1307 RTC 996 CONFIG_RTC_DS1307 - use Maxim, Inc. DS1307 RTC
997 CONFIG_RTC_DS1337 - use Maxim, Inc. DS1337 RTC 997 CONFIG_RTC_DS1337 - use Maxim, Inc. DS1337 RTC
998 CONFIG_RTC_DS1338 - use Maxim, Inc. DS1338 RTC 998 CONFIG_RTC_DS1338 - use Maxim, Inc. DS1338 RTC
999 CONFIG_RTC_DS164x - use Dallas DS164x RTC 999 CONFIG_RTC_DS164x - use Dallas DS164x RTC
1000 CONFIG_RTC_ISL1208 - use Intersil ISL1208 RTC 1000 CONFIG_RTC_ISL1208 - use Intersil ISL1208 RTC
1001 CONFIG_RTC_MAX6900 - use Maxim, Inc. MAX6900 RTC 1001 CONFIG_RTC_MAX6900 - use Maxim, Inc. MAX6900 RTC
1002 CONFIG_SYS_RTC_DS1337_NOOSC - Turn off the OSC output for DS1337 1002 CONFIG_SYS_RTC_DS1337_NOOSC - Turn off the OSC output for DS1337
1003 CONFIG_SYS_RV3029_TCR - enable trickle charger on 1003 CONFIG_SYS_RV3029_TCR - enable trickle charger on
1004 RV3029 RTC. 1004 RV3029 RTC.
1005 1005
1006 Note that if the RTC uses I2C, then the I2C interface 1006 Note that if the RTC uses I2C, then the I2C interface
1007 must also be configured. See I2C Support, below. 1007 must also be configured. See I2C Support, below.
1008 1008
1009 - GPIO Support: 1009 - GPIO Support:
1010 CONFIG_PCA953X - use NXP's PCA953X series I2C GPIO 1010 CONFIG_PCA953X - use NXP's PCA953X series I2C GPIO
1011 CONFIG_PCA953X_INFO - enable pca953x info command 1011 CONFIG_PCA953X_INFO - enable pca953x info command
1012 1012
1013 The CONFIG_SYS_I2C_PCA953X_WIDTH option specifies a list of 1013 The CONFIG_SYS_I2C_PCA953X_WIDTH option specifies a list of
1014 chip-ngpio pairs that tell the PCA953X driver the number of 1014 chip-ngpio pairs that tell the PCA953X driver the number of
1015 pins supported by a particular chip. 1015 pins supported by a particular chip.
1016 1016
1017 Note that if the GPIO device uses I2C, then the I2C interface 1017 Note that if the GPIO device uses I2C, then the I2C interface
1018 must also be configured. See I2C Support, below. 1018 must also be configured. See I2C Support, below.
1019 1019
1020 - Timestamp Support: 1020 - Timestamp Support:
1021 1021
1022 When CONFIG_TIMESTAMP is selected, the timestamp 1022 When CONFIG_TIMESTAMP is selected, the timestamp
1023 (date and time) of an image is printed by image 1023 (date and time) of an image is printed by image
1024 commands like bootm or iminfo. This option is 1024 commands like bootm or iminfo. This option is
1025 automatically enabled when you select CONFIG_CMD_DATE . 1025 automatically enabled when you select CONFIG_CMD_DATE .
1026 1026
1027 - Partition Labels (disklabels) Supported: 1027 - Partition Labels (disklabels) Supported:
1028 Zero or more of the following: 1028 Zero or more of the following:
1029 CONFIG_MAC_PARTITION Apple's MacOS partition table. 1029 CONFIG_MAC_PARTITION Apple's MacOS partition table.
1030 CONFIG_DOS_PARTITION MS Dos partition table, traditional on the 1030 CONFIG_DOS_PARTITION MS Dos partition table, traditional on the
1031 Intel architecture, USB sticks, etc. 1031 Intel architecture, USB sticks, etc.
1032 CONFIG_ISO_PARTITION ISO partition table, used on CDROM etc. 1032 CONFIG_ISO_PARTITION ISO partition table, used on CDROM etc.
1033 CONFIG_EFI_PARTITION GPT partition table, common when EFI is the 1033 CONFIG_EFI_PARTITION GPT partition table, common when EFI is the
1034 bootloader. Note 2TB partition limit; see 1034 bootloader. Note 2TB partition limit; see
1035 disk/part_efi.c 1035 disk/part_efi.c
1036 CONFIG_MTD_PARTITIONS Memory Technology Device partition table. 1036 CONFIG_MTD_PARTITIONS Memory Technology Device partition table.
1037 1037
1038 If IDE or SCSI support is enabled (CONFIG_CMD_IDE or 1038 If IDE or SCSI support is enabled (CONFIG_CMD_IDE or
1039 CONFIG_CMD_SCSI) you must configure support for at 1039 CONFIG_CMD_SCSI) you must configure support for at
1040 least one non-MTD partition type as well. 1040 least one non-MTD partition type as well.
1041 1041
1042 - IDE Reset method: 1042 - IDE Reset method:
1043 CONFIG_IDE_RESET_ROUTINE - this is defined in several 1043 CONFIG_IDE_RESET_ROUTINE - this is defined in several
1044 board configurations files but used nowhere! 1044 board configurations files but used nowhere!
1045 1045
1046 CONFIG_IDE_RESET - is this is defined, IDE Reset will 1046 CONFIG_IDE_RESET - is this is defined, IDE Reset will
1047 be performed by calling the function 1047 be performed by calling the function
1048 ide_set_reset(int reset) 1048 ide_set_reset(int reset)
1049 which has to be defined in a board specific file 1049 which has to be defined in a board specific file
1050 1050
1051 - ATAPI Support: 1051 - ATAPI Support:
1052 CONFIG_ATAPI 1052 CONFIG_ATAPI
1053 1053
1054 Set this to enable ATAPI support. 1054 Set this to enable ATAPI support.
1055 1055
1056 - LBA48 Support 1056 - LBA48 Support
1057 CONFIG_LBA48 1057 CONFIG_LBA48
1058 1058
1059 Set this to enable support for disks larger than 137GB 1059 Set this to enable support for disks larger than 137GB
1060 Also look at CONFIG_SYS_64BIT_LBA. 1060 Also look at CONFIG_SYS_64BIT_LBA.
1061 Whithout these , LBA48 support uses 32bit variables and will 'only' 1061 Whithout these , LBA48 support uses 32bit variables and will 'only'
1062 support disks up to 2.1TB. 1062 support disks up to 2.1TB.
1063 1063
1064 CONFIG_SYS_64BIT_LBA: 1064 CONFIG_SYS_64BIT_LBA:
1065 When enabled, makes the IDE subsystem use 64bit sector addresses. 1065 When enabled, makes the IDE subsystem use 64bit sector addresses.
1066 Default is 32bit. 1066 Default is 32bit.
1067 1067
1068 - SCSI Support: 1068 - SCSI Support:
1069 At the moment only there is only support for the 1069 At the moment only there is only support for the
1070 SYM53C8XX SCSI controller; define 1070 SYM53C8XX SCSI controller; define
1071 CONFIG_SCSI_SYM53C8XX to enable it. 1071 CONFIG_SCSI_SYM53C8XX to enable it.
1072 1072
1073 CONFIG_SYS_SCSI_MAX_LUN [8], CONFIG_SYS_SCSI_MAX_SCSI_ID [7] and 1073 CONFIG_SYS_SCSI_MAX_LUN [8], CONFIG_SYS_SCSI_MAX_SCSI_ID [7] and
1074 CONFIG_SYS_SCSI_MAX_DEVICE [CONFIG_SYS_SCSI_MAX_SCSI_ID * 1074 CONFIG_SYS_SCSI_MAX_DEVICE [CONFIG_SYS_SCSI_MAX_SCSI_ID *
1075 CONFIG_SYS_SCSI_MAX_LUN] can be adjusted to define the 1075 CONFIG_SYS_SCSI_MAX_LUN] can be adjusted to define the
1076 maximum numbers of LUNs, SCSI ID's and target 1076 maximum numbers of LUNs, SCSI ID's and target
1077 devices. 1077 devices.
1078 CONFIG_SYS_SCSI_SYM53C8XX_CCF to fix clock timing (80Mhz) 1078 CONFIG_SYS_SCSI_SYM53C8XX_CCF to fix clock timing (80Mhz)
1079 1079
1080 The environment variable 'scsidevs' is set to the number of 1080 The environment variable 'scsidevs' is set to the number of
1081 SCSI devices found during the last scan. 1081 SCSI devices found during the last scan.
1082 1082
1083 - NETWORK Support (PCI): 1083 - NETWORK Support (PCI):
1084 CONFIG_E1000 1084 CONFIG_E1000
1085 Support for Intel 8254x/8257x gigabit chips. 1085 Support for Intel 8254x/8257x gigabit chips.
1086 1086
1087 CONFIG_E1000_SPI 1087 CONFIG_E1000_SPI
1088 Utility code for direct access to the SPI bus on Intel 8257x. 1088 Utility code for direct access to the SPI bus on Intel 8257x.
1089 This does not do anything useful unless you set at least one 1089 This does not do anything useful unless you set at least one
1090 of CONFIG_CMD_E1000 or CONFIG_E1000_SPI_GENERIC. 1090 of CONFIG_CMD_E1000 or CONFIG_E1000_SPI_GENERIC.
1091 1091
1092 CONFIG_E1000_SPI_GENERIC 1092 CONFIG_E1000_SPI_GENERIC
1093 Allow generic access to the SPI bus on the Intel 8257x, for 1093 Allow generic access to the SPI bus on the Intel 8257x, for
1094 example with the "sspi" command. 1094 example with the "sspi" command.
1095 1095
1096 CONFIG_CMD_E1000 1096 CONFIG_CMD_E1000
1097 Management command for E1000 devices. When used on devices 1097 Management command for E1000 devices. When used on devices
1098 with SPI support you can reprogram the EEPROM from U-Boot. 1098 with SPI support you can reprogram the EEPROM from U-Boot.
1099 1099
1100 CONFIG_E1000_FALLBACK_MAC 1100 CONFIG_E1000_FALLBACK_MAC
1101 default MAC for empty EEPROM after production. 1101 default MAC for empty EEPROM after production.
1102 1102
1103 CONFIG_EEPRO100 1103 CONFIG_EEPRO100
1104 Support for Intel 82557/82559/82559ER chips. 1104 Support for Intel 82557/82559/82559ER chips.
1105 Optional CONFIG_EEPRO100_SROM_WRITE enables EEPROM 1105 Optional CONFIG_EEPRO100_SROM_WRITE enables EEPROM
1106 write routine for first time initialisation. 1106 write routine for first time initialisation.
1107 1107
1108 CONFIG_TULIP 1108 CONFIG_TULIP
1109 Support for Digital 2114x chips. 1109 Support for Digital 2114x chips.
1110 Optional CONFIG_TULIP_SELECT_MEDIA for board specific 1110 Optional CONFIG_TULIP_SELECT_MEDIA for board specific
1111 modem chip initialisation (KS8761/QS6611). 1111 modem chip initialisation (KS8761/QS6611).
1112 1112
1113 CONFIG_NATSEMI 1113 CONFIG_NATSEMI
1114 Support for National dp83815 chips. 1114 Support for National dp83815 chips.
1115 1115
1116 CONFIG_NS8382X 1116 CONFIG_NS8382X
1117 Support for National dp8382[01] gigabit chips. 1117 Support for National dp8382[01] gigabit chips.
1118 1118
1119 - NETWORK Support (other): 1119 - NETWORK Support (other):
1120 1120
1121 CONFIG_DRIVER_AT91EMAC 1121 CONFIG_DRIVER_AT91EMAC
1122 Support for AT91RM9200 EMAC. 1122 Support for AT91RM9200 EMAC.
1123 1123
1124 CONFIG_RMII 1124 CONFIG_RMII
1125 Define this to use reduced MII inteface 1125 Define this to use reduced MII inteface
1126 1126
1127 CONFIG_DRIVER_AT91EMAC_QUIET 1127 CONFIG_DRIVER_AT91EMAC_QUIET
1128 If this defined, the driver is quiet. 1128 If this defined, the driver is quiet.
1129 The driver doen't show link status messages. 1129 The driver doen't show link status messages.
1130 1130
1131 CONFIG_CALXEDA_XGMAC 1131 CONFIG_CALXEDA_XGMAC
1132 Support for the Calxeda XGMAC device 1132 Support for the Calxeda XGMAC device
1133 1133
1134 CONFIG_LAN91C96 1134 CONFIG_LAN91C96
1135 Support for SMSC's LAN91C96 chips. 1135 Support for SMSC's LAN91C96 chips.
1136 1136
1137 CONFIG_LAN91C96_BASE 1137 CONFIG_LAN91C96_BASE
1138 Define this to hold the physical address 1138 Define this to hold the physical address
1139 of the LAN91C96's I/O space 1139 of the LAN91C96's I/O space
1140 1140
1141 CONFIG_LAN91C96_USE_32_BIT 1141 CONFIG_LAN91C96_USE_32_BIT
1142 Define this to enable 32 bit addressing 1142 Define this to enable 32 bit addressing
1143 1143
1144 CONFIG_SMC91111 1144 CONFIG_SMC91111
1145 Support for SMSC's LAN91C111 chip 1145 Support for SMSC's LAN91C111 chip
1146 1146
1147 CONFIG_SMC91111_BASE 1147 CONFIG_SMC91111_BASE
1148 Define this to hold the physical address 1148 Define this to hold the physical address
1149 of the device (I/O space) 1149 of the device (I/O space)
1150 1150
1151 CONFIG_SMC_USE_32_BIT 1151 CONFIG_SMC_USE_32_BIT
1152 Define this if data bus is 32 bits 1152 Define this if data bus is 32 bits
1153 1153
1154 CONFIG_SMC_USE_IOFUNCS 1154 CONFIG_SMC_USE_IOFUNCS
1155 Define this to use i/o functions instead of macros 1155 Define this to use i/o functions instead of macros
1156 (some hardware wont work with macros) 1156 (some hardware wont work with macros)
1157 1157
1158 CONFIG_DRIVER_TI_EMAC 1158 CONFIG_DRIVER_TI_EMAC
1159 Support for davinci emac 1159 Support for davinci emac
1160 1160
1161 CONFIG_SYS_DAVINCI_EMAC_PHY_COUNT 1161 CONFIG_SYS_DAVINCI_EMAC_PHY_COUNT
1162 Define this if you have more then 3 PHYs. 1162 Define this if you have more then 3 PHYs.
1163 1163
1164 CONFIG_FTGMAC100 1164 CONFIG_FTGMAC100
1165 Support for Faraday's FTGMAC100 Gigabit SoC Ethernet 1165 Support for Faraday's FTGMAC100 Gigabit SoC Ethernet
1166 1166
1167 CONFIG_FTGMAC100_EGIGA 1167 CONFIG_FTGMAC100_EGIGA
1168 Define this to use GE link update with gigabit PHY. 1168 Define this to use GE link update with gigabit PHY.
1169 Define this if FTGMAC100 is connected to gigabit PHY. 1169 Define this if FTGMAC100 is connected to gigabit PHY.
1170 If your system has 10/100 PHY only, it might not occur 1170 If your system has 10/100 PHY only, it might not occur
1171 wrong behavior. Because PHY usually return timeout or 1171 wrong behavior. Because PHY usually return timeout or
1172 useless data when polling gigabit status and gigabit 1172 useless data when polling gigabit status and gigabit
1173 control registers. This behavior won't affect the 1173 control registers. This behavior won't affect the
1174 correctnessof 10/100 link speed update. 1174 correctnessof 10/100 link speed update.
1175 1175
1176 CONFIG_SMC911X 1176 CONFIG_SMC911X
1177 Support for SMSC's LAN911x and LAN921x chips 1177 Support for SMSC's LAN911x and LAN921x chips
1178 1178
1179 CONFIG_SMC911X_BASE 1179 CONFIG_SMC911X_BASE
1180 Define this to hold the physical address 1180 Define this to hold the physical address
1181 of the device (I/O space) 1181 of the device (I/O space)
1182 1182
1183 CONFIG_SMC911X_32_BIT 1183 CONFIG_SMC911X_32_BIT
1184 Define this if data bus is 32 bits 1184 Define this if data bus is 32 bits
1185 1185
1186 CONFIG_SMC911X_16_BIT 1186 CONFIG_SMC911X_16_BIT
1187 Define this if data bus is 16 bits. If your processor 1187 Define this if data bus is 16 bits. If your processor
1188 automatically converts one 32 bit word to two 16 bit 1188 automatically converts one 32 bit word to two 16 bit
1189 words you may also try CONFIG_SMC911X_32_BIT. 1189 words you may also try CONFIG_SMC911X_32_BIT.
1190 1190
1191 CONFIG_SH_ETHER 1191 CONFIG_SH_ETHER
1192 Support for Renesas on-chip Ethernet controller 1192 Support for Renesas on-chip Ethernet controller
1193 1193
1194 CONFIG_SH_ETHER_USE_PORT 1194 CONFIG_SH_ETHER_USE_PORT
1195 Define the number of ports to be used 1195 Define the number of ports to be used
1196 1196
1197 CONFIG_SH_ETHER_PHY_ADDR 1197 CONFIG_SH_ETHER_PHY_ADDR
1198 Define the ETH PHY's address 1198 Define the ETH PHY's address
1199 1199
1200 CONFIG_SH_ETHER_CACHE_WRITEBACK 1200 CONFIG_SH_ETHER_CACHE_WRITEBACK
1201 If this option is set, the driver enables cache flush. 1201 If this option is set, the driver enables cache flush.
1202 1202
1203 - TPM Support: 1203 - TPM Support:
1204 CONFIG_GENERIC_LPC_TPM 1204 CONFIG_GENERIC_LPC_TPM
1205 Support for generic parallel port TPM devices. Only one device 1205 Support for generic parallel port TPM devices. Only one device
1206 per system is supported at this time. 1206 per system is supported at this time.
1207 1207
1208 CONFIG_TPM_TIS_BASE_ADDRESS 1208 CONFIG_TPM_TIS_BASE_ADDRESS
1209 Base address where the generic TPM device is mapped 1209 Base address where the generic TPM device is mapped
1210 to. Contemporary x86 systems usually map it at 1210 to. Contemporary x86 systems usually map it at
1211 0xfed40000. 1211 0xfed40000.
1212 1212
1213 - USB Support: 1213 - USB Support:
1214 At the moment only the UHCI host controller is 1214 At the moment only the UHCI host controller is
1215 supported (PIP405, MIP405, MPC5200); define 1215 supported (PIP405, MIP405, MPC5200); define
1216 CONFIG_USB_UHCI to enable it. 1216 CONFIG_USB_UHCI to enable it.
1217 define CONFIG_USB_KEYBOARD to enable the USB Keyboard 1217 define CONFIG_USB_KEYBOARD to enable the USB Keyboard
1218 and define CONFIG_USB_STORAGE to enable the USB 1218 and define CONFIG_USB_STORAGE to enable the USB
1219 storage devices. 1219 storage devices.
1220 Note: 1220 Note:
1221 Supported are USB Keyboards and USB Floppy drives 1221 Supported are USB Keyboards and USB Floppy drives
1222 (TEAC FD-05PUB). 1222 (TEAC FD-05PUB).
1223 MPC5200 USB requires additional defines: 1223 MPC5200 USB requires additional defines:
1224 CONFIG_USB_CLOCK 1224 CONFIG_USB_CLOCK
1225 for 528 MHz Clock: 0x0001bbbb 1225 for 528 MHz Clock: 0x0001bbbb
1226 CONFIG_PSC3_USB 1226 CONFIG_PSC3_USB
1227 for USB on PSC3 1227 for USB on PSC3
1228 CONFIG_USB_CONFIG 1228 CONFIG_USB_CONFIG
1229 for differential drivers: 0x00001000 1229 for differential drivers: 0x00001000
1230 for single ended drivers: 0x00005000 1230 for single ended drivers: 0x00005000
1231 for differential drivers on PSC3: 0x00000100 1231 for differential drivers on PSC3: 0x00000100
1232 for single ended drivers on PSC3: 0x00004100 1232 for single ended drivers on PSC3: 0x00004100
1233 CONFIG_SYS_USB_EVENT_POLL 1233 CONFIG_SYS_USB_EVENT_POLL
1234 May be defined to allow interrupt polling 1234 May be defined to allow interrupt polling
1235 instead of using asynchronous interrupts 1235 instead of using asynchronous interrupts
1236 1236
1237 CONFIG_USB_EHCI_TXFIFO_THRESH enables setting of the 1237 CONFIG_USB_EHCI_TXFIFO_THRESH enables setting of the
1238 txfilltuning field in the EHCI controller on reset. 1238 txfilltuning field in the EHCI controller on reset.
1239 1239
1240 - USB Device: 1240 - USB Device:
1241 Define the below if you wish to use the USB console. 1241 Define the below if you wish to use the USB console.
1242 Once firmware is rebuilt from a serial console issue the 1242 Once firmware is rebuilt from a serial console issue the
1243 command "setenv stdin usbtty; setenv stdout usbtty" and 1243 command "setenv stdin usbtty; setenv stdout usbtty" and
1244 attach your USB cable. The Unix command "dmesg" should print 1244 attach your USB cable. The Unix command "dmesg" should print
1245 it has found a new device. The environment variable usbtty 1245 it has found a new device. The environment variable usbtty
1246 can be set to gserial or cdc_acm to enable your device to 1246 can be set to gserial or cdc_acm to enable your device to
1247 appear to a USB host as a Linux gserial device or a 1247 appear to a USB host as a Linux gserial device or a
1248 Common Device Class Abstract Control Model serial device. 1248 Common Device Class Abstract Control Model serial device.
1249 If you select usbtty = gserial you should be able to enumerate 1249 If you select usbtty = gserial you should be able to enumerate
1250 a Linux host by 1250 a Linux host by
1251 # modprobe usbserial vendor=0xVendorID product=0xProductID 1251 # modprobe usbserial vendor=0xVendorID product=0xProductID
1252 else if using cdc_acm, simply setting the environment 1252 else if using cdc_acm, simply setting the environment
1253 variable usbtty to be cdc_acm should suffice. The following 1253 variable usbtty to be cdc_acm should suffice. The following
1254 might be defined in YourBoardName.h 1254 might be defined in YourBoardName.h
1255 1255
1256 CONFIG_USB_DEVICE 1256 CONFIG_USB_DEVICE
1257 Define this to build a UDC device 1257 Define this to build a UDC device
1258 1258
1259 CONFIG_USB_TTY 1259 CONFIG_USB_TTY
1260 Define this to have a tty type of device available to 1260 Define this to have a tty type of device available to
1261 talk to the UDC device 1261 talk to the UDC device
1262 1262
1263 CONFIG_USBD_HS 1263 CONFIG_USBD_HS
1264 Define this to enable the high speed support for usb 1264 Define this to enable the high speed support for usb
1265 device and usbtty. If this feature is enabled, a routine 1265 device and usbtty. If this feature is enabled, a routine
1266 int is_usbd_high_speed(void) 1266 int is_usbd_high_speed(void)
1267 also needs to be defined by the driver to dynamically poll 1267 also needs to be defined by the driver to dynamically poll
1268 whether the enumeration has succeded at high speed or full 1268 whether the enumeration has succeded at high speed or full
1269 speed. 1269 speed.
1270 1270
1271 CONFIG_SYS_CONSOLE_IS_IN_ENV 1271 CONFIG_SYS_CONSOLE_IS_IN_ENV
1272 Define this if you want stdin, stdout &/or stderr to 1272 Define this if you want stdin, stdout &/or stderr to
1273 be set to usbtty. 1273 be set to usbtty.
1274 1274
1275 mpc8xx: 1275 mpc8xx:
1276 CONFIG_SYS_USB_EXTC_CLK 0xBLAH 1276 CONFIG_SYS_USB_EXTC_CLK 0xBLAH
1277 Derive USB clock from external clock "blah" 1277 Derive USB clock from external clock "blah"
1278 - CONFIG_SYS_USB_EXTC_CLK 0x02 1278 - CONFIG_SYS_USB_EXTC_CLK 0x02
1279 1279
1280 CONFIG_SYS_USB_BRG_CLK 0xBLAH 1280 CONFIG_SYS_USB_BRG_CLK 0xBLAH
1281 Derive USB clock from brgclk 1281 Derive USB clock from brgclk
1282 - CONFIG_SYS_USB_BRG_CLK 0x04 1282 - CONFIG_SYS_USB_BRG_CLK 0x04
1283 1283
1284 If you have a USB-IF assigned VendorID then you may wish to 1284 If you have a USB-IF assigned VendorID then you may wish to
1285 define your own vendor specific values either in BoardName.h 1285 define your own vendor specific values either in BoardName.h
1286 or directly in usbd_vendor_info.h. If you don't define 1286 or directly in usbd_vendor_info.h. If you don't define
1287 CONFIG_USBD_MANUFACTURER, CONFIG_USBD_PRODUCT_NAME, 1287 CONFIG_USBD_MANUFACTURER, CONFIG_USBD_PRODUCT_NAME,
1288 CONFIG_USBD_VENDORID and CONFIG_USBD_PRODUCTID, then U-Boot 1288 CONFIG_USBD_VENDORID and CONFIG_USBD_PRODUCTID, then U-Boot
1289 should pretend to be a Linux device to it's target host. 1289 should pretend to be a Linux device to it's target host.
1290 1290
1291 CONFIG_USBD_MANUFACTURER 1291 CONFIG_USBD_MANUFACTURER
1292 Define this string as the name of your company for 1292 Define this string as the name of your company for
1293 - CONFIG_USBD_MANUFACTURER "my company" 1293 - CONFIG_USBD_MANUFACTURER "my company"
1294 1294
1295 CONFIG_USBD_PRODUCT_NAME 1295 CONFIG_USBD_PRODUCT_NAME
1296 Define this string as the name of your product 1296 Define this string as the name of your product
1297 - CONFIG_USBD_PRODUCT_NAME "acme usb device" 1297 - CONFIG_USBD_PRODUCT_NAME "acme usb device"
1298 1298
1299 CONFIG_USBD_VENDORID 1299 CONFIG_USBD_VENDORID
1300 Define this as your assigned Vendor ID from the USB 1300 Define this as your assigned Vendor ID from the USB
1301 Implementors Forum. This *must* be a genuine Vendor ID 1301 Implementors Forum. This *must* be a genuine Vendor ID
1302 to avoid polluting the USB namespace. 1302 to avoid polluting the USB namespace.
1303 - CONFIG_USBD_VENDORID 0xFFFF 1303 - CONFIG_USBD_VENDORID 0xFFFF
1304 1304
1305 CONFIG_USBD_PRODUCTID 1305 CONFIG_USBD_PRODUCTID
1306 Define this as the unique Product ID 1306 Define this as the unique Product ID
1307 for your device 1307 for your device
1308 - CONFIG_USBD_PRODUCTID 0xFFFF 1308 - CONFIG_USBD_PRODUCTID 0xFFFF
1309 1309
1310 - ULPI Layer Support: 1310 - ULPI Layer Support:
1311 The ULPI (UTMI Low Pin (count) Interface) PHYs are supported via 1311 The ULPI (UTMI Low Pin (count) Interface) PHYs are supported via
1312 the generic ULPI layer. The generic layer accesses the ULPI PHY 1312 the generic ULPI layer. The generic layer accesses the ULPI PHY
1313 via the platform viewport, so you need both the genric layer and 1313 via the platform viewport, so you need both the genric layer and
1314 the viewport enabled. Currently only Chipidea/ARC based 1314 the viewport enabled. Currently only Chipidea/ARC based
1315 viewport is supported. 1315 viewport is supported.
1316 To enable the ULPI layer support, define CONFIG_USB_ULPI and 1316 To enable the ULPI layer support, define CONFIG_USB_ULPI and
1317 CONFIG_USB_ULPI_VIEWPORT in your board configuration file. 1317 CONFIG_USB_ULPI_VIEWPORT in your board configuration file.
1318 If your ULPI phy needs a different reference clock than the 1318 If your ULPI phy needs a different reference clock than the
1319 standard 24 MHz then you have to define CONFIG_ULPI_REF_CLK to 1319 standard 24 MHz then you have to define CONFIG_ULPI_REF_CLK to
1320 the appropriate value in Hz. 1320 the appropriate value in Hz.
1321 1321
1322 - MMC Support: 1322 - MMC Support:
1323 The MMC controller on the Intel PXA is supported. To 1323 The MMC controller on the Intel PXA is supported. To
1324 enable this define CONFIG_MMC. The MMC can be 1324 enable this define CONFIG_MMC. The MMC can be
1325 accessed from the boot prompt by mapping the device 1325 accessed from the boot prompt by mapping the device
1326 to physical memory similar to flash. Command line is 1326 to physical memory similar to flash. Command line is
1327 enabled with CONFIG_CMD_MMC. The MMC driver also works with 1327 enabled with CONFIG_CMD_MMC. The MMC driver also works with
1328 the FAT fs. This is enabled with CONFIG_CMD_FAT. 1328 the FAT fs. This is enabled with CONFIG_CMD_FAT.
1329 1329
1330 CONFIG_SH_MMCIF 1330 CONFIG_SH_MMCIF
1331 Support for Renesas on-chip MMCIF controller 1331 Support for Renesas on-chip MMCIF controller
1332 1332
1333 CONFIG_SH_MMCIF_ADDR 1333 CONFIG_SH_MMCIF_ADDR
1334 Define the base address of MMCIF registers 1334 Define the base address of MMCIF registers
1335 1335
1336 CONFIG_SH_MMCIF_CLK 1336 CONFIG_SH_MMCIF_CLK
1337 Define the clock frequency for MMCIF 1337 Define the clock frequency for MMCIF
1338 1338
1339 - USB Device Firmware Update (DFU) class support: 1339 - USB Device Firmware Update (DFU) class support:
1340 CONFIG_DFU_FUNCTION 1340 CONFIG_DFU_FUNCTION
1341 This enables the USB portion of the DFU USB class 1341 This enables the USB portion of the DFU USB class
1342 1342
1343 CONFIG_CMD_DFU 1343 CONFIG_CMD_DFU
1344 This enables the command "dfu" which is used to have 1344 This enables the command "dfu" which is used to have
1345 U-Boot create a DFU class device via USB. This command 1345 U-Boot create a DFU class device via USB. This command
1346 requires that the "dfu_alt_info" environment variable be 1346 requires that the "dfu_alt_info" environment variable be
1347 set and define the alt settings to expose to the host. 1347 set and define the alt settings to expose to the host.
1348 1348
1349 CONFIG_DFU_MMC 1349 CONFIG_DFU_MMC
1350 This enables support for exposing (e)MMC devices via DFU. 1350 This enables support for exposing (e)MMC devices via DFU.
1351 1351
1352 CONFIG_DFU_NAND 1352 CONFIG_DFU_NAND
1353 This enables support for exposing NAND devices via DFU. 1353 This enables support for exposing NAND devices via DFU.
1354 1354
1355 CONFIG_SYS_DFU_MAX_FILE_SIZE 1355 CONFIG_SYS_DFU_MAX_FILE_SIZE
1356 When updating files rather than the raw storage device, 1356 When updating files rather than the raw storage device,
1357 we use a static buffer to copy the file into and then write 1357 we use a static buffer to copy the file into and then write
1358 the buffer once we've been given the whole file. Define 1358 the buffer once we've been given the whole file. Define
1359 this to the maximum filesize (in bytes) for the buffer. 1359 this to the maximum filesize (in bytes) for the buffer.
1360 Default is 4 MiB if undefined. 1360 Default is 4 MiB if undefined.
1361 1361
1362 - Journaling Flash filesystem support: 1362 - Journaling Flash filesystem support:
1363 CONFIG_JFFS2_NAND, CONFIG_JFFS2_NAND_OFF, CONFIG_JFFS2_NAND_SIZE, 1363 CONFIG_JFFS2_NAND, CONFIG_JFFS2_NAND_OFF, CONFIG_JFFS2_NAND_SIZE,
1364 CONFIG_JFFS2_NAND_DEV 1364 CONFIG_JFFS2_NAND_DEV
1365 Define these for a default partition on a NAND device 1365 Define these for a default partition on a NAND device
1366 1366
1367 CONFIG_SYS_JFFS2_FIRST_SECTOR, 1367 CONFIG_SYS_JFFS2_FIRST_SECTOR,
1368 CONFIG_SYS_JFFS2_FIRST_BANK, CONFIG_SYS_JFFS2_NUM_BANKS 1368 CONFIG_SYS_JFFS2_FIRST_BANK, CONFIG_SYS_JFFS2_NUM_BANKS
1369 Define these for a default partition on a NOR device 1369 Define these for a default partition on a NOR device
1370 1370
1371 CONFIG_SYS_JFFS_CUSTOM_PART 1371 CONFIG_SYS_JFFS_CUSTOM_PART
1372 Define this to create an own partition. You have to provide a 1372 Define this to create an own partition. You have to provide a
1373 function struct part_info* jffs2_part_info(int part_num) 1373 function struct part_info* jffs2_part_info(int part_num)
1374 1374
1375 If you define only one JFFS2 partition you may also want to 1375 If you define only one JFFS2 partition you may also want to
1376 #define CONFIG_SYS_JFFS_SINGLE_PART 1 1376 #define CONFIG_SYS_JFFS_SINGLE_PART 1
1377 to disable the command chpart. This is the default when you 1377 to disable the command chpart. This is the default when you
1378 have not defined a custom partition 1378 have not defined a custom partition
1379 1379
1380 - FAT(File Allocation Table) filesystem write function support: 1380 - FAT(File Allocation Table) filesystem write function support:
1381 CONFIG_FAT_WRITE 1381 CONFIG_FAT_WRITE
1382 1382
1383 Define this to enable support for saving memory data as a 1383 Define this to enable support for saving memory data as a
1384 file in FAT formatted partition. 1384 file in FAT formatted partition.
1385 1385
1386 This will also enable the command "fatwrite" enabling the 1386 This will also enable the command "fatwrite" enabling the
1387 user to write files to FAT. 1387 user to write files to FAT.
1388 1388
1389 CBFS (Coreboot Filesystem) support 1389 CBFS (Coreboot Filesystem) support
1390 CONFIG_CMD_CBFS 1390 CONFIG_CMD_CBFS
1391 1391
1392 Define this to enable support for reading from a Coreboot 1392 Define this to enable support for reading from a Coreboot
1393 filesystem. Available commands are cbfsinit, cbfsinfo, cbfsls 1393 filesystem. Available commands are cbfsinit, cbfsinfo, cbfsls
1394 and cbfsload. 1394 and cbfsload.
1395 1395
1396 - Keyboard Support: 1396 - Keyboard Support:
1397 CONFIG_ISA_KEYBOARD 1397 CONFIG_ISA_KEYBOARD
1398 1398
1399 Define this to enable standard (PC-Style) keyboard 1399 Define this to enable standard (PC-Style) keyboard
1400 support 1400 support
1401 1401
1402 CONFIG_I8042_KBD 1402 CONFIG_I8042_KBD
1403 Standard PC keyboard driver with US (is default) and 1403 Standard PC keyboard driver with US (is default) and
1404 GERMAN key layout (switch via environment 'keymap=de') support. 1404 GERMAN key layout (switch via environment 'keymap=de') support.
1405 Export function i8042_kbd_init, i8042_tstc and i8042_getc 1405 Export function i8042_kbd_init, i8042_tstc and i8042_getc
1406 for cfb_console. Supports cursor blinking. 1406 for cfb_console. Supports cursor blinking.
1407 1407
1408 - Video support: 1408 - Video support:
1409 CONFIG_VIDEO 1409 CONFIG_VIDEO
1410 1410
1411 Define this to enable video support (for output to 1411 Define this to enable video support (for output to
1412 video). 1412 video).
1413 1413
1414 CONFIG_VIDEO_CT69000 1414 CONFIG_VIDEO_CT69000
1415 1415
1416 Enable Chips & Technologies 69000 Video chip 1416 Enable Chips & Technologies 69000 Video chip
1417 1417
1418 CONFIG_VIDEO_SMI_LYNXEM 1418 CONFIG_VIDEO_SMI_LYNXEM
1419 Enable Silicon Motion SMI 712/710/810 Video chip. The 1419 Enable Silicon Motion SMI 712/710/810 Video chip. The
1420 video output is selected via environment 'videoout' 1420 video output is selected via environment 'videoout'
1421 (1 = LCD and 2 = CRT). If videoout is undefined, CRT is 1421 (1 = LCD and 2 = CRT). If videoout is undefined, CRT is
1422 assumed. 1422 assumed.
1423 1423
1424 For the CT69000 and SMI_LYNXEM drivers, videomode is 1424 For the CT69000 and SMI_LYNXEM drivers, videomode is
1425 selected via environment 'videomode'. Two different ways 1425 selected via environment 'videomode'. Two different ways
1426 are possible: 1426 are possible:
1427 - "videomode=num" 'num' is a standard LiLo mode numbers. 1427 - "videomode=num" 'num' is a standard LiLo mode numbers.
1428 Following standard modes are supported (* is default): 1428 Following standard modes are supported (* is default):
1429 1429
1430 Colors 640x480 800x600 1024x768 1152x864 1280x1024 1430 Colors 640x480 800x600 1024x768 1152x864 1280x1024
1431 -------------+--------------------------------------------- 1431 -------------+---------------------------------------------
1432 8 bits | 0x301* 0x303 0x305 0x161 0x307 1432 8 bits | 0x301* 0x303 0x305 0x161 0x307
1433 15 bits | 0x310 0x313 0x316 0x162 0x319 1433 15 bits | 0x310 0x313 0x316 0x162 0x319
1434 16 bits | 0x311 0x314 0x317 0x163 0x31A 1434 16 bits | 0x311 0x314 0x317 0x163 0x31A
1435 24 bits | 0x312 0x315 0x318 ? 0x31B 1435 24 bits | 0x312 0x315 0x318 ? 0x31B
1436 -------------+--------------------------------------------- 1436 -------------+---------------------------------------------
1437 (i.e. setenv videomode 317; saveenv; reset;) 1437 (i.e. setenv videomode 317; saveenv; reset;)
1438 1438
1439 - "videomode=bootargs" all the video parameters are parsed 1439 - "videomode=bootargs" all the video parameters are parsed
1440 from the bootargs. (See drivers/video/videomodes.c) 1440 from the bootargs. (See drivers/video/videomodes.c)
1441 1441
1442 1442
1443 CONFIG_VIDEO_SED13806 1443 CONFIG_VIDEO_SED13806
1444 Enable Epson SED13806 driver. This driver supports 8bpp 1444 Enable Epson SED13806 driver. This driver supports 8bpp
1445 and 16bpp modes defined by CONFIG_VIDEO_SED13806_8BPP 1445 and 16bpp modes defined by CONFIG_VIDEO_SED13806_8BPP
1446 or CONFIG_VIDEO_SED13806_16BPP 1446 or CONFIG_VIDEO_SED13806_16BPP
1447 1447
1448 CONFIG_FSL_DIU_FB 1448 CONFIG_FSL_DIU_FB
1449 Enable the Freescale DIU video driver. Reference boards for 1449 Enable the Freescale DIU video driver. Reference boards for
1450 SOCs that have a DIU should define this macro to enable DIU 1450 SOCs that have a DIU should define this macro to enable DIU
1451 support, and should also define these other macros: 1451 support, and should also define these other macros:
1452 1452
1453 CONFIG_SYS_DIU_ADDR 1453 CONFIG_SYS_DIU_ADDR
1454 CONFIG_VIDEO 1454 CONFIG_VIDEO
1455 CONFIG_CMD_BMP 1455 CONFIG_CMD_BMP
1456 CONFIG_CFB_CONSOLE 1456 CONFIG_CFB_CONSOLE
1457 CONFIG_VIDEO_SW_CURSOR 1457 CONFIG_VIDEO_SW_CURSOR
1458 CONFIG_VGA_AS_SINGLE_DEVICE 1458 CONFIG_VGA_AS_SINGLE_DEVICE
1459 CONFIG_VIDEO_LOGO 1459 CONFIG_VIDEO_LOGO
1460 CONFIG_VIDEO_BMP_LOGO 1460 CONFIG_VIDEO_BMP_LOGO
1461 1461
1462 The DIU driver will look for the 'video-mode' environment 1462 The DIU driver will look for the 'video-mode' environment
1463 variable, and if defined, enable the DIU as a console during 1463 variable, and if defined, enable the DIU as a console during
1464 boot. See the documentation file README.video for a 1464 boot. See the documentation file README.video for a
1465 description of this variable. 1465 description of this variable.
1466 1466
1467 CONFIG_VIDEO_VGA 1467 CONFIG_VIDEO_VGA
1468 1468
1469 Enable the VGA video / BIOS for x86. The alternative if you 1469 Enable the VGA video / BIOS for x86. The alternative if you
1470 are using coreboot is to use the coreboot frame buffer 1470 are using coreboot is to use the coreboot frame buffer
1471 driver. 1471 driver.
1472 1472
1473 1473
1474 - Keyboard Support: 1474 - Keyboard Support:
1475 CONFIG_KEYBOARD 1475 CONFIG_KEYBOARD
1476 1476
1477 Define this to enable a custom keyboard support. 1477 Define this to enable a custom keyboard support.
1478 This simply calls drv_keyboard_init() which must be 1478 This simply calls drv_keyboard_init() which must be
1479 defined in your board-specific files. 1479 defined in your board-specific files.
1480 The only board using this so far is RBC823. 1480 The only board using this so far is RBC823.
1481 1481
1482 - LCD Support: CONFIG_LCD 1482 - LCD Support: CONFIG_LCD
1483 1483
1484 Define this to enable LCD support (for output to LCD 1484 Define this to enable LCD support (for output to LCD
1485 display); also select one of the supported displays 1485 display); also select one of the supported displays
1486 by defining one of these: 1486 by defining one of these:
1487 1487
1488 CONFIG_ATMEL_LCD: 1488 CONFIG_ATMEL_LCD:
1489 1489
1490 HITACHI TX09D70VM1CCA, 3.5", 240x320. 1490 HITACHI TX09D70VM1CCA, 3.5", 240x320.
1491 1491
1492 CONFIG_NEC_NL6448AC33: 1492 CONFIG_NEC_NL6448AC33:
1493 1493
1494 NEC NL6448AC33-18. Active, color, single scan. 1494 NEC NL6448AC33-18. Active, color, single scan.
1495 1495
1496 CONFIG_NEC_NL6448BC20 1496 CONFIG_NEC_NL6448BC20
1497 1497
1498 NEC NL6448BC20-08. 6.5", 640x480. 1498 NEC NL6448BC20-08. 6.5", 640x480.
1499 Active, color, single scan. 1499 Active, color, single scan.
1500 1500
1501 CONFIG_NEC_NL6448BC33_54 1501 CONFIG_NEC_NL6448BC33_54
1502 1502
1503 NEC NL6448BC33-54. 10.4", 640x480. 1503 NEC NL6448BC33-54. 10.4", 640x480.
1504 Active, color, single scan. 1504 Active, color, single scan.
1505 1505
1506 CONFIG_SHARP_16x9 1506 CONFIG_SHARP_16x9
1507 1507
1508 Sharp 320x240. Active, color, single scan. 1508 Sharp 320x240. Active, color, single scan.
1509 It isn't 16x9, and I am not sure what it is. 1509 It isn't 16x9, and I am not sure what it is.
1510 1510
1511 CONFIG_SHARP_LQ64D341 1511 CONFIG_SHARP_LQ64D341
1512 1512
1513 Sharp LQ64D341 display, 640x480. 1513 Sharp LQ64D341 display, 640x480.
1514 Active, color, single scan. 1514 Active, color, single scan.
1515 1515
1516 CONFIG_HLD1045 1516 CONFIG_HLD1045
1517 1517
1518 HLD1045 display, 640x480. 1518 HLD1045 display, 640x480.
1519 Active, color, single scan. 1519 Active, color, single scan.
1520 1520
1521 CONFIG_OPTREX_BW 1521 CONFIG_OPTREX_BW
1522 1522
1523 Optrex CBL50840-2 NF-FW 99 22 M5 1523 Optrex CBL50840-2 NF-FW 99 22 M5
1524 or 1524 or
1525 Hitachi LMG6912RPFC-00T 1525 Hitachi LMG6912RPFC-00T
1526 or 1526 or
1527 Hitachi SP14Q002 1527 Hitachi SP14Q002
1528 1528
1529 320x240. Black & white. 1529 320x240. Black & white.
1530 1530
1531 Normally display is black on white background; define 1531 Normally display is black on white background; define
1532 CONFIG_SYS_WHITE_ON_BLACK to get it inverted. 1532 CONFIG_SYS_WHITE_ON_BLACK to get it inverted.
1533 1533
1534 CONFIG_LCD_ALIGNMENT 1534 CONFIG_LCD_ALIGNMENT
1535 1535
1536 Normally the LCD is page-aligned (tyically 4KB). If this is 1536 Normally the LCD is page-aligned (tyically 4KB). If this is
1537 defined then the LCD will be aligned to this value instead. 1537 defined then the LCD will be aligned to this value instead.
1538 For ARM it is sometimes useful to use MMU_SECTION_SIZE 1538 For ARM it is sometimes useful to use MMU_SECTION_SIZE
1539 here, since it is cheaper to change data cache settings on 1539 here, since it is cheaper to change data cache settings on
1540 a per-section basis. 1540 a per-section basis.
1541 1541
1542 CONFIG_CONSOLE_SCROLL_LINES 1542 CONFIG_CONSOLE_SCROLL_LINES
1543 1543
1544 When the console need to be scrolled, this is the number of 1544 When the console need to be scrolled, this is the number of
1545 lines to scroll by. It defaults to 1. Increasing this makes 1545 lines to scroll by. It defaults to 1. Increasing this makes
1546 the console jump but can help speed up operation when scrolling 1546 the console jump but can help speed up operation when scrolling
1547 is slow. 1547 is slow.
1548 1548
1549 CONFIG_LCD_BMP_RLE8 1549 CONFIG_LCD_BMP_RLE8
1550 1550
1551 Support drawing of RLE8-compressed bitmaps on the LCD. 1551 Support drawing of RLE8-compressed bitmaps on the LCD.
1552 1552
1553 CONFIG_I2C_EDID 1553 CONFIG_I2C_EDID
1554 1554
1555 Enables an 'i2c edid' command which can read EDID 1555 Enables an 'i2c edid' command which can read EDID
1556 information over I2C from an attached LCD display. 1556 information over I2C from an attached LCD display.
1557 1557
1558 - Splash Screen Support: CONFIG_SPLASH_SCREEN 1558 - Splash Screen Support: CONFIG_SPLASH_SCREEN
1559 1559
1560 If this option is set, the environment is checked for 1560 If this option is set, the environment is checked for
1561 a variable "splashimage". If found, the usual display 1561 a variable "splashimage". If found, the usual display
1562 of logo, copyright and system information on the LCD 1562 of logo, copyright and system information on the LCD
1563 is suppressed and the BMP image at the address 1563 is suppressed and the BMP image at the address
1564 specified in "splashimage" is loaded instead. The 1564 specified in "splashimage" is loaded instead. The
1565 console is redirected to the "nulldev", too. This 1565 console is redirected to the "nulldev", too. This
1566 allows for a "silent" boot where a splash screen is 1566 allows for a "silent" boot where a splash screen is
1567 loaded very quickly after power-on. 1567 loaded very quickly after power-on.
1568 1568
1569 CONFIG_SPLASHIMAGE_GUARD 1569 CONFIG_SPLASHIMAGE_GUARD
1570 1570
1571 If this option is set, then U-Boot will prevent the environment 1571 If this option is set, then U-Boot will prevent the environment
1572 variable "splashimage" from being set to a problematic address 1572 variable "splashimage" from being set to a problematic address
1573 (see README.displaying-bmps and README.arm-unaligned-accesses). 1573 (see README.displaying-bmps and README.arm-unaligned-accesses).
1574 This option is useful for targets where, due to alignment 1574 This option is useful for targets where, due to alignment
1575 restrictions, an improperly aligned BMP image will cause a data 1575 restrictions, an improperly aligned BMP image will cause a data
1576 abort. If you think you will not have problems with unaligned 1576 abort. If you think you will not have problems with unaligned
1577 accesses (for example because your toolchain prevents them) 1577 accesses (for example because your toolchain prevents them)
1578 there is no need to set this option. 1578 there is no need to set this option.
1579 1579
1580 CONFIG_SPLASH_SCREEN_ALIGN 1580 CONFIG_SPLASH_SCREEN_ALIGN
1581 1581
1582 If this option is set the splash image can be freely positioned 1582 If this option is set the splash image can be freely positioned
1583 on the screen. Environment variable "splashpos" specifies the 1583 on the screen. Environment variable "splashpos" specifies the
1584 position as "x,y". If a positive number is given it is used as 1584 position as "x,y". If a positive number is given it is used as
1585 number of pixel from left/top. If a negative number is given it 1585 number of pixel from left/top. If a negative number is given it
1586 is used as number of pixel from right/bottom. You can also 1586 is used as number of pixel from right/bottom. You can also
1587 specify 'm' for centering the image. 1587 specify 'm' for centering the image.
1588 1588
1589 Example: 1589 Example:
1590 setenv splashpos m,m 1590 setenv splashpos m,m
1591 => image at center of screen 1591 => image at center of screen
1592 1592
1593 setenv splashpos 30,20 1593 setenv splashpos 30,20
1594 => image at x = 30 and y = 20 1594 => image at x = 30 and y = 20
1595 1595
1596 setenv splashpos -10,m 1596 setenv splashpos -10,m
1597 => vertically centered image 1597 => vertically centered image
1598 at x = dspWidth - bmpWidth - 9 1598 at x = dspWidth - bmpWidth - 9
1599 1599
1600 CONFIG_SPLASH_SCREEN_PREPARE 1600 CONFIG_SPLASH_SCREEN_PREPARE
1601 1601
1602 If this option is set then the board_splash_screen_prepare() 1602 If this option is set then the board_splash_screen_prepare()
1603 function, which must be defined in your code, is called as part 1603 function, which must be defined in your code, is called as part
1604 of the splash screen display sequence. It gives the board an 1604 of the splash screen display sequence. It gives the board an
1605 opportunity to prepare the splash image data before it is 1605 opportunity to prepare the splash image data before it is
1606 processed and sent to the frame buffer by U-Boot. 1606 processed and sent to the frame buffer by U-Boot.
1607 1607
1608 - Gzip compressed BMP image support: CONFIG_VIDEO_BMP_GZIP 1608 - Gzip compressed BMP image support: CONFIG_VIDEO_BMP_GZIP
1609 1609
1610 If this option is set, additionally to standard BMP 1610 If this option is set, additionally to standard BMP
1611 images, gzipped BMP images can be displayed via the 1611 images, gzipped BMP images can be displayed via the
1612 splashscreen support or the bmp command. 1612 splashscreen support or the bmp command.
1613 1613
1614 - Run length encoded BMP image (RLE8) support: CONFIG_VIDEO_BMP_RLE8 1614 - Run length encoded BMP image (RLE8) support: CONFIG_VIDEO_BMP_RLE8
1615 1615
1616 If this option is set, 8-bit RLE compressed BMP images 1616 If this option is set, 8-bit RLE compressed BMP images
1617 can be displayed via the splashscreen support or the 1617 can be displayed via the splashscreen support or the
1618 bmp command. 1618 bmp command.
1619 1619
1620 - Do compresssing for memory range: 1620 - Do compresssing for memory range:
1621 CONFIG_CMD_ZIP 1621 CONFIG_CMD_ZIP
1622 1622
1623 If this option is set, it would use zlib deflate method 1623 If this option is set, it would use zlib deflate method
1624 to compress the specified memory at its best effort. 1624 to compress the specified memory at its best effort.
1625 1625
1626 - Compression support: 1626 - Compression support:
1627 CONFIG_BZIP2 1627 CONFIG_BZIP2
1628 1628
1629 If this option is set, support for bzip2 compressed 1629 If this option is set, support for bzip2 compressed
1630 images is included. If not, only uncompressed and gzip 1630 images is included. If not, only uncompressed and gzip
1631 compressed images are supported. 1631 compressed images are supported.
1632 1632
1633 NOTE: the bzip2 algorithm requires a lot of RAM, so 1633 NOTE: the bzip2 algorithm requires a lot of RAM, so
1634 the malloc area (as defined by CONFIG_SYS_MALLOC_LEN) should 1634 the malloc area (as defined by CONFIG_SYS_MALLOC_LEN) should
1635 be at least 4MB. 1635 be at least 4MB.
1636 1636
1637 CONFIG_LZMA 1637 CONFIG_LZMA
1638 1638
1639 If this option is set, support for lzma compressed 1639 If this option is set, support for lzma compressed
1640 images is included. 1640 images is included.
1641 1641
1642 Note: The LZMA algorithm adds between 2 and 4KB of code and it 1642 Note: The LZMA algorithm adds between 2 and 4KB of code and it
1643 requires an amount of dynamic memory that is given by the 1643 requires an amount of dynamic memory that is given by the
1644 formula: 1644 formula:
1645 1645
1646 (1846 + 768 << (lc + lp)) * sizeof(uint16) 1646 (1846 + 768 << (lc + lp)) * sizeof(uint16)
1647 1647
1648 Where lc and lp stand for, respectively, Literal context bits 1648 Where lc and lp stand for, respectively, Literal context bits
1649 and Literal pos bits. 1649 and Literal pos bits.
1650 1650
1651 This value is upper-bounded by 14MB in the worst case. Anyway, 1651 This value is upper-bounded by 14MB in the worst case. Anyway,
1652 for a ~4MB large kernel image, we have lc=3 and lp=0 for a 1652 for a ~4MB large kernel image, we have lc=3 and lp=0 for a
1653 total amount of (1846 + 768 << (3 + 0)) * 2 = ~41KB... that is 1653 total amount of (1846 + 768 << (3 + 0)) * 2 = ~41KB... that is
1654 a very small buffer. 1654 a very small buffer.
1655 1655
1656 Use the lzmainfo tool to determinate the lc and lp values and 1656 Use the lzmainfo tool to determinate the lc and lp values and
1657 then calculate the amount of needed dynamic memory (ensuring 1657 then calculate the amount of needed dynamic memory (ensuring
1658 the appropriate CONFIG_SYS_MALLOC_LEN value). 1658 the appropriate CONFIG_SYS_MALLOC_LEN value).
1659 1659
1660 - MII/PHY support: 1660 - MII/PHY support:
1661 CONFIG_PHY_ADDR 1661 CONFIG_PHY_ADDR
1662 1662
1663 The address of PHY on MII bus. 1663 The address of PHY on MII bus.
1664 1664
1665 CONFIG_PHY_CLOCK_FREQ (ppc4xx) 1665 CONFIG_PHY_CLOCK_FREQ (ppc4xx)
1666 1666
1667 The clock frequency of the MII bus 1667 The clock frequency of the MII bus
1668 1668
1669 CONFIG_PHY_GIGE 1669 CONFIG_PHY_GIGE
1670 1670
1671 If this option is set, support for speed/duplex 1671 If this option is set, support for speed/duplex
1672 detection of gigabit PHY is included. 1672 detection of gigabit PHY is included.
1673 1673
1674 CONFIG_PHY_RESET_DELAY 1674 CONFIG_PHY_RESET_DELAY
1675 1675
1676 Some PHY like Intel LXT971A need extra delay after 1676 Some PHY like Intel LXT971A need extra delay after
1677 reset before any MII register access is possible. 1677 reset before any MII register access is possible.
1678 For such PHY, set this option to the usec delay 1678 For such PHY, set this option to the usec delay
1679 required. (minimum 300usec for LXT971A) 1679 required. (minimum 300usec for LXT971A)
1680 1680
1681 CONFIG_PHY_CMD_DELAY (ppc4xx) 1681 CONFIG_PHY_CMD_DELAY (ppc4xx)
1682 1682
1683 Some PHY like Intel LXT971A need extra delay after 1683 Some PHY like Intel LXT971A need extra delay after
1684 command issued before MII status register can be read 1684 command issued before MII status register can be read
1685 1685
1686 - Ethernet address: 1686 - Ethernet address:
1687 CONFIG_ETHADDR 1687 CONFIG_ETHADDR
1688 CONFIG_ETH1ADDR 1688 CONFIG_ETH1ADDR
1689 CONFIG_ETH2ADDR 1689 CONFIG_ETH2ADDR
1690 CONFIG_ETH3ADDR 1690 CONFIG_ETH3ADDR
1691 CONFIG_ETH4ADDR 1691 CONFIG_ETH4ADDR
1692 CONFIG_ETH5ADDR 1692 CONFIG_ETH5ADDR
1693 1693
1694 Define a default value for Ethernet address to use 1694 Define a default value for Ethernet address to use
1695 for the respective Ethernet interface, in case this 1695 for the respective Ethernet interface, in case this
1696 is not determined automatically. 1696 is not determined automatically.
1697 1697
1698 - IP address: 1698 - IP address:
1699 CONFIG_IPADDR 1699 CONFIG_IPADDR
1700 1700
1701 Define a default value for the IP address to use for 1701 Define a default value for the IP address to use for
1702 the default Ethernet interface, in case this is not 1702 the default Ethernet interface, in case this is not
1703 determined through e.g. bootp. 1703 determined through e.g. bootp.
1704 (Environment variable "ipaddr") 1704 (Environment variable "ipaddr")
1705 1705
1706 - Server IP address: 1706 - Server IP address:
1707 CONFIG_SERVERIP 1707 CONFIG_SERVERIP
1708 1708
1709 Defines a default value for the IP address of a TFTP 1709 Defines a default value for the IP address of a TFTP
1710 server to contact when using the "tftboot" command. 1710 server to contact when using the "tftboot" command.
1711 (Environment variable "serverip") 1711 (Environment variable "serverip")
1712 1712
1713 CONFIG_KEEP_SERVERADDR 1713 CONFIG_KEEP_SERVERADDR
1714 1714
1715 Keeps the server's MAC address, in the env 'serveraddr' 1715 Keeps the server's MAC address, in the env 'serveraddr'
1716 for passing to bootargs (like Linux's netconsole option) 1716 for passing to bootargs (like Linux's netconsole option)
1717 1717
1718 - Gateway IP address: 1718 - Gateway IP address:
1719 CONFIG_GATEWAYIP 1719 CONFIG_GATEWAYIP
1720 1720
1721 Defines a default value for the IP address of the 1721 Defines a default value for the IP address of the
1722 default router where packets to other networks are 1722 default router where packets to other networks are
1723 sent to. 1723 sent to.
1724 (Environment variable "gatewayip") 1724 (Environment variable "gatewayip")
1725 1725
1726 - Subnet mask: 1726 - Subnet mask:
1727 CONFIG_NETMASK 1727 CONFIG_NETMASK
1728 1728
1729 Defines a default value for the subnet mask (or 1729 Defines a default value for the subnet mask (or
1730 routing prefix) which is used to determine if an IP 1730 routing prefix) which is used to determine if an IP
1731 address belongs to the local subnet or needs to be 1731 address belongs to the local subnet or needs to be
1732 forwarded through a router. 1732 forwarded through a router.
1733 (Environment variable "netmask") 1733 (Environment variable "netmask")
1734 1734
1735 - Multicast TFTP Mode: 1735 - Multicast TFTP Mode:
1736 CONFIG_MCAST_TFTP 1736 CONFIG_MCAST_TFTP
1737 1737
1738 Defines whether you want to support multicast TFTP as per 1738 Defines whether you want to support multicast TFTP as per
1739 rfc-2090; for example to work with atftp. Lets lots of targets 1739 rfc-2090; for example to work with atftp. Lets lots of targets
1740 tftp down the same boot image concurrently. Note: the Ethernet 1740 tftp down the same boot image concurrently. Note: the Ethernet
1741 driver in use must provide a function: mcast() to join/leave a 1741 driver in use must provide a function: mcast() to join/leave a
1742 multicast group. 1742 multicast group.
1743 1743
1744 - BOOTP Recovery Mode: 1744 - BOOTP Recovery Mode:
1745 CONFIG_BOOTP_RANDOM_DELAY 1745 CONFIG_BOOTP_RANDOM_DELAY
1746 1746
1747 If you have many targets in a network that try to 1747 If you have many targets in a network that try to
1748 boot using BOOTP, you may want to avoid that all 1748 boot using BOOTP, you may want to avoid that all
1749 systems send out BOOTP requests at precisely the same 1749 systems send out BOOTP requests at precisely the same
1750 moment (which would happen for instance at recovery 1750 moment (which would happen for instance at recovery
1751 from a power failure, when all systems will try to 1751 from a power failure, when all systems will try to
1752 boot, thus flooding the BOOTP server. Defining 1752 boot, thus flooding the BOOTP server. Defining
1753 CONFIG_BOOTP_RANDOM_DELAY causes a random delay to be 1753 CONFIG_BOOTP_RANDOM_DELAY causes a random delay to be
1754 inserted before sending out BOOTP requests. The 1754 inserted before sending out BOOTP requests. The
1755 following delays are inserted then: 1755 following delays are inserted then:
1756 1756
1757 1st BOOTP request: delay 0 ... 1 sec 1757 1st BOOTP request: delay 0 ... 1 sec
1758 2nd BOOTP request: delay 0 ... 2 sec 1758 2nd BOOTP request: delay 0 ... 2 sec
1759 3rd BOOTP request: delay 0 ... 4 sec 1759 3rd BOOTP request: delay 0 ... 4 sec
1760 4th and following 1760 4th and following
1761 BOOTP requests: delay 0 ... 8 sec 1761 BOOTP requests: delay 0 ... 8 sec
1762 1762
1763 - DHCP Advanced Options: 1763 - DHCP Advanced Options:
1764 You can fine tune the DHCP functionality by defining 1764 You can fine tune the DHCP functionality by defining
1765 CONFIG_BOOTP_* symbols: 1765 CONFIG_BOOTP_* symbols:
1766 1766
1767 CONFIG_BOOTP_SUBNETMASK 1767 CONFIG_BOOTP_SUBNETMASK
1768 CONFIG_BOOTP_GATEWAY 1768 CONFIG_BOOTP_GATEWAY
1769 CONFIG_BOOTP_HOSTNAME 1769 CONFIG_BOOTP_HOSTNAME
1770 CONFIG_BOOTP_NISDOMAIN 1770 CONFIG_BOOTP_NISDOMAIN
1771 CONFIG_BOOTP_BOOTPATH 1771 CONFIG_BOOTP_BOOTPATH
1772 CONFIG_BOOTP_BOOTFILESIZE 1772 CONFIG_BOOTP_BOOTFILESIZE
1773 CONFIG_BOOTP_DNS 1773 CONFIG_BOOTP_DNS
1774 CONFIG_BOOTP_DNS2 1774 CONFIG_BOOTP_DNS2
1775 CONFIG_BOOTP_SEND_HOSTNAME 1775 CONFIG_BOOTP_SEND_HOSTNAME
1776 CONFIG_BOOTP_NTPSERVER 1776 CONFIG_BOOTP_NTPSERVER
1777 CONFIG_BOOTP_TIMEOFFSET 1777 CONFIG_BOOTP_TIMEOFFSET
1778 CONFIG_BOOTP_VENDOREX 1778 CONFIG_BOOTP_VENDOREX
1779 CONFIG_BOOTP_MAY_FAIL 1779 CONFIG_BOOTP_MAY_FAIL
1780 1780
1781 CONFIG_BOOTP_SERVERIP - TFTP server will be the serverip 1781 CONFIG_BOOTP_SERVERIP - TFTP server will be the serverip
1782 environment variable, not the BOOTP server. 1782 environment variable, not the BOOTP server.
1783 1783
1784 CONFIG_BOOTP_MAY_FAIL - If the DHCP server is not found 1784 CONFIG_BOOTP_MAY_FAIL - If the DHCP server is not found
1785 after the configured retry count, the call will fail 1785 after the configured retry count, the call will fail
1786 instead of starting over. This can be used to fail over 1786 instead of starting over. This can be used to fail over
1787 to Link-local IP address configuration if the DHCP server 1787 to Link-local IP address configuration if the DHCP server
1788 is not available. 1788 is not available.
1789 1789
1790 CONFIG_BOOTP_DNS2 - If a DHCP client requests the DNS 1790 CONFIG_BOOTP_DNS2 - If a DHCP client requests the DNS
1791 serverip from a DHCP server, it is possible that more 1791 serverip from a DHCP server, it is possible that more
1792 than one DNS serverip is offered to the client. 1792 than one DNS serverip is offered to the client.
1793 If CONFIG_BOOTP_DNS2 is enabled, the secondary DNS 1793 If CONFIG_BOOTP_DNS2 is enabled, the secondary DNS
1794 serverip will be stored in the additional environment 1794 serverip will be stored in the additional environment
1795 variable "dnsip2". The first DNS serverip is always 1795 variable "dnsip2". The first DNS serverip is always
1796 stored in the variable "dnsip", when CONFIG_BOOTP_DNS 1796 stored in the variable "dnsip", when CONFIG_BOOTP_DNS
1797 is defined. 1797 is defined.
1798 1798
1799 CONFIG_BOOTP_SEND_HOSTNAME - Some DHCP servers are capable 1799 CONFIG_BOOTP_SEND_HOSTNAME - Some DHCP servers are capable
1800 to do a dynamic update of a DNS server. To do this, they 1800 to do a dynamic update of a DNS server. To do this, they
1801 need the hostname of the DHCP requester. 1801 need the hostname of the DHCP requester.
1802 If CONFIG_BOOTP_SEND_HOSTNAME is defined, the content 1802 If CONFIG_BOOTP_SEND_HOSTNAME is defined, the content
1803 of the "hostname" environment variable is passed as 1803 of the "hostname" environment variable is passed as
1804 option 12 to the DHCP server. 1804 option 12 to the DHCP server.
1805 1805
1806 CONFIG_BOOTP_DHCP_REQUEST_DELAY 1806 CONFIG_BOOTP_DHCP_REQUEST_DELAY
1807 1807
1808 A 32bit value in microseconds for a delay between 1808 A 32bit value in microseconds for a delay between
1809 receiving a "DHCP Offer" and sending the "DHCP Request". 1809 receiving a "DHCP Offer" and sending the "DHCP Request".
1810 This fixes a problem with certain DHCP servers that don't 1810 This fixes a problem with certain DHCP servers that don't
1811 respond 100% of the time to a "DHCP request". E.g. On an 1811 respond 100% of the time to a "DHCP request". E.g. On an
1812 AT91RM9200 processor running at 180MHz, this delay needed 1812 AT91RM9200 processor running at 180MHz, this delay needed
1813 to be *at least* 15,000 usec before a Windows Server 2003 1813 to be *at least* 15,000 usec before a Windows Server 2003
1814 DHCP server would reply 100% of the time. I recommend at 1814 DHCP server would reply 100% of the time. I recommend at
1815 least 50,000 usec to be safe. The alternative is to hope 1815 least 50,000 usec to be safe. The alternative is to hope
1816 that one of the retries will be successful but note that 1816 that one of the retries will be successful but note that
1817 the DHCP timeout and retry process takes a longer than 1817 the DHCP timeout and retry process takes a longer than
1818 this delay. 1818 this delay.
1819 1819
1820 - Link-local IP address negotiation: 1820 - Link-local IP address negotiation:
1821 Negotiate with other link-local clients on the local network 1821 Negotiate with other link-local clients on the local network
1822 for an address that doesn't require explicit configuration. 1822 for an address that doesn't require explicit configuration.
1823 This is especially useful if a DHCP server cannot be guaranteed 1823 This is especially useful if a DHCP server cannot be guaranteed
1824 to exist in all environments that the device must operate. 1824 to exist in all environments that the device must operate.
1825 1825
1826 See doc/README.link-local for more information. 1826 See doc/README.link-local for more information.
1827 1827
1828 - CDP Options: 1828 - CDP Options:
1829 CONFIG_CDP_DEVICE_ID 1829 CONFIG_CDP_DEVICE_ID
1830 1830
1831 The device id used in CDP trigger frames. 1831 The device id used in CDP trigger frames.
1832 1832
1833 CONFIG_CDP_DEVICE_ID_PREFIX 1833 CONFIG_CDP_DEVICE_ID_PREFIX
1834 1834
1835 A two character string which is prefixed to the MAC address 1835 A two character string which is prefixed to the MAC address
1836 of the device. 1836 of the device.
1837 1837
1838 CONFIG_CDP_PORT_ID 1838 CONFIG_CDP_PORT_ID
1839 1839
1840 A printf format string which contains the ascii name of 1840 A printf format string which contains the ascii name of
1841 the port. Normally is set to "eth%d" which sets 1841 the port. Normally is set to "eth%d" which sets
1842 eth0 for the first Ethernet, eth1 for the second etc. 1842 eth0 for the first Ethernet, eth1 for the second etc.
1843 1843
1844 CONFIG_CDP_CAPABILITIES 1844 CONFIG_CDP_CAPABILITIES
1845 1845
1846 A 32bit integer which indicates the device capabilities; 1846 A 32bit integer which indicates the device capabilities;
1847 0x00000010 for a normal host which does not forwards. 1847 0x00000010 for a normal host which does not forwards.
1848 1848
1849 CONFIG_CDP_VERSION 1849 CONFIG_CDP_VERSION
1850 1850
1851 An ascii string containing the version of the software. 1851 An ascii string containing the version of the software.
1852 1852
1853 CONFIG_CDP_PLATFORM 1853 CONFIG_CDP_PLATFORM
1854 1854
1855 An ascii string containing the name of the platform. 1855 An ascii string containing the name of the platform.
1856 1856
1857 CONFIG_CDP_TRIGGER 1857 CONFIG_CDP_TRIGGER
1858 1858
1859 A 32bit integer sent on the trigger. 1859 A 32bit integer sent on the trigger.
1860 1860
1861 CONFIG_CDP_POWER_CONSUMPTION 1861 CONFIG_CDP_POWER_CONSUMPTION
1862 1862
1863 A 16bit integer containing the power consumption of the 1863 A 16bit integer containing the power consumption of the
1864 device in .1 of milliwatts. 1864 device in .1 of milliwatts.
1865 1865
1866 CONFIG_CDP_APPLIANCE_VLAN_TYPE 1866 CONFIG_CDP_APPLIANCE_VLAN_TYPE
1867 1867
1868 A byte containing the id of the VLAN. 1868 A byte containing the id of the VLAN.
1869 1869
1870 - Status LED: CONFIG_STATUS_LED 1870 - Status LED: CONFIG_STATUS_LED
1871 1871
1872 Several configurations allow to display the current 1872 Several configurations allow to display the current
1873 status using a LED. For instance, the LED will blink 1873 status using a LED. For instance, the LED will blink
1874 fast while running U-Boot code, stop blinking as 1874 fast while running U-Boot code, stop blinking as
1875 soon as a reply to a BOOTP request was received, and 1875 soon as a reply to a BOOTP request was received, and
1876 start blinking slow once the Linux kernel is running 1876 start blinking slow once the Linux kernel is running
1877 (supported by a status LED driver in the Linux 1877 (supported by a status LED driver in the Linux
1878 kernel). Defining CONFIG_STATUS_LED enables this 1878 kernel). Defining CONFIG_STATUS_LED enables this
1879 feature in U-Boot. 1879 feature in U-Boot.
1880 1880
1881 - CAN Support: CONFIG_CAN_DRIVER 1881 - CAN Support: CONFIG_CAN_DRIVER
1882 1882
1883 Defining CONFIG_CAN_DRIVER enables CAN driver support 1883 Defining CONFIG_CAN_DRIVER enables CAN driver support
1884 on those systems that support this (optional) 1884 on those systems that support this (optional)
1885 feature, like the TQM8xxL modules. 1885 feature, like the TQM8xxL modules.
1886 1886
1887 - I2C Support: CONFIG_HARD_I2C | CONFIG_SOFT_I2C 1887 - I2C Support: CONFIG_HARD_I2C | CONFIG_SOFT_I2C
1888 1888
1889 These enable I2C serial bus commands. Defining either of 1889 These enable I2C serial bus commands. Defining either of
1890 (but not both of) CONFIG_HARD_I2C or CONFIG_SOFT_I2C will 1890 (but not both of) CONFIG_HARD_I2C or CONFIG_SOFT_I2C will
1891 include the appropriate I2C driver for the selected CPU. 1891 include the appropriate I2C driver for the selected CPU.
1892 1892
1893 This will allow you to use i2c commands at the u-boot 1893 This will allow you to use i2c commands at the u-boot
1894 command line (as long as you set CONFIG_CMD_I2C in 1894 command line (as long as you set CONFIG_CMD_I2C in
1895 CONFIG_COMMANDS) and communicate with i2c based realtime 1895 CONFIG_COMMANDS) and communicate with i2c based realtime
1896 clock chips. See common/cmd_i2c.c for a description of the 1896 clock chips. See common/cmd_i2c.c for a description of the
1897 command line interface. 1897 command line interface.
1898 1898
1899 CONFIG_HARD_I2C selects a hardware I2C controller. 1899 CONFIG_HARD_I2C selects a hardware I2C controller.
1900 1900
1901 CONFIG_SOFT_I2C configures u-boot to use a software (aka 1901 CONFIG_SOFT_I2C configures u-boot to use a software (aka
1902 bit-banging) driver instead of CPM or similar hardware 1902 bit-banging) driver instead of CPM or similar hardware
1903 support for I2C. 1903 support for I2C.
1904 1904
1905 There are several other quantities that must also be 1905 There are several other quantities that must also be
1906 defined when you define CONFIG_HARD_I2C or CONFIG_SOFT_I2C. 1906 defined when you define CONFIG_HARD_I2C or CONFIG_SOFT_I2C.
1907 1907
1908 In both cases you will need to define CONFIG_SYS_I2C_SPEED 1908 In both cases you will need to define CONFIG_SYS_I2C_SPEED
1909 to be the frequency (in Hz) at which you wish your i2c bus 1909 to be the frequency (in Hz) at which you wish your i2c bus
1910 to run and CONFIG_SYS_I2C_SLAVE to be the address of this node (ie 1910 to run and CONFIG_SYS_I2C_SLAVE to be the address of this node (ie
1911 the CPU's i2c node address). 1911 the CPU's i2c node address).
1912 1912
1913 Now, the u-boot i2c code for the mpc8xx 1913 Now, the u-boot i2c code for the mpc8xx
1914 (arch/powerpc/cpu/mpc8xx/i2c.c) sets the CPU up as a master node 1914 (arch/powerpc/cpu/mpc8xx/i2c.c) sets the CPU up as a master node
1915 and so its address should therefore be cleared to 0 (See, 1915 and so its address should therefore be cleared to 0 (See,
1916 eg, MPC823e User's Manual p.16-473). So, set 1916 eg, MPC823e User's Manual p.16-473). So, set
1917 CONFIG_SYS_I2C_SLAVE to 0. 1917 CONFIG_SYS_I2C_SLAVE to 0.
1918 1918
1919 CONFIG_SYS_I2C_INIT_MPC5XXX 1919 CONFIG_SYS_I2C_INIT_MPC5XXX
1920 1920
1921 When a board is reset during an i2c bus transfer 1921 When a board is reset during an i2c bus transfer
1922 chips might think that the current transfer is still 1922 chips might think that the current transfer is still
1923 in progress. Reset the slave devices by sending start 1923 in progress. Reset the slave devices by sending start
1924 commands until the slave device responds. 1924 commands until the slave device responds.
1925 1925
1926 That's all that's required for CONFIG_HARD_I2C. 1926 That's all that's required for CONFIG_HARD_I2C.
1927 1927
1928 If you use the software i2c interface (CONFIG_SOFT_I2C) 1928 If you use the software i2c interface (CONFIG_SOFT_I2C)
1929 then the following macros need to be defined (examples are 1929 then the following macros need to be defined (examples are
1930 from include/configs/lwmon.h): 1930 from include/configs/lwmon.h):
1931 1931
1932 I2C_INIT 1932 I2C_INIT
1933 1933
1934 (Optional). Any commands necessary to enable the I2C 1934 (Optional). Any commands necessary to enable the I2C
1935 controller or configure ports. 1935 controller or configure ports.
1936 1936
1937 eg: #define I2C_INIT (immr->im_cpm.cp_pbdir |= PB_SCL) 1937 eg: #define I2C_INIT (immr->im_cpm.cp_pbdir |= PB_SCL)
1938 1938
1939 I2C_PORT 1939 I2C_PORT
1940 1940
1941 (Only for MPC8260 CPU). The I/O port to use (the code 1941 (Only for MPC8260 CPU). The I/O port to use (the code
1942 assumes both bits are on the same port). Valid values 1942 assumes both bits are on the same port). Valid values
1943 are 0..3 for ports A..D. 1943 are 0..3 for ports A..D.
1944 1944
1945 I2C_ACTIVE 1945 I2C_ACTIVE
1946 1946
1947 The code necessary to make the I2C data line active 1947 The code necessary to make the I2C data line active
1948 (driven). If the data line is open collector, this 1948 (driven). If the data line is open collector, this
1949 define can be null. 1949 define can be null.
1950 1950
1951 eg: #define I2C_ACTIVE (immr->im_cpm.cp_pbdir |= PB_SDA) 1951 eg: #define I2C_ACTIVE (immr->im_cpm.cp_pbdir |= PB_SDA)
1952 1952
1953 I2C_TRISTATE 1953 I2C_TRISTATE
1954 1954
1955 The code necessary to make the I2C data line tri-stated 1955 The code necessary to make the I2C data line tri-stated
1956 (inactive). If the data line is open collector, this 1956 (inactive). If the data line is open collector, this
1957 define can be null. 1957 define can be null.
1958 1958
1959 eg: #define I2C_TRISTATE (immr->im_cpm.cp_pbdir &= ~PB_SDA) 1959 eg: #define I2C_TRISTATE (immr->im_cpm.cp_pbdir &= ~PB_SDA)
1960 1960
1961 I2C_READ 1961 I2C_READ
1962 1962
1963 Code that returns true if the I2C data line is high, 1963 Code that returns true if the I2C data line is high,
1964 false if it is low. 1964 false if it is low.
1965 1965
1966 eg: #define I2C_READ ((immr->im_cpm.cp_pbdat & PB_SDA) != 0) 1966 eg: #define I2C_READ ((immr->im_cpm.cp_pbdat & PB_SDA) != 0)
1967 1967
1968 I2C_SDA(bit) 1968 I2C_SDA(bit)
1969 1969
1970 If <bit> is true, sets the I2C data line high. If it 1970 If <bit> is true, sets the I2C data line high. If it
1971 is false, it clears it (low). 1971 is false, it clears it (low).
1972 1972
1973 eg: #define I2C_SDA(bit) \ 1973 eg: #define I2C_SDA(bit) \
1974 if(bit) immr->im_cpm.cp_pbdat |= PB_SDA; \ 1974 if(bit) immr->im_cpm.cp_pbdat |= PB_SDA; \
1975 else immr->im_cpm.cp_pbdat &= ~PB_SDA 1975 else immr->im_cpm.cp_pbdat &= ~PB_SDA
1976 1976
1977 I2C_SCL(bit) 1977 I2C_SCL(bit)
1978 1978
1979 If <bit> is true, sets the I2C clock line high. If it 1979 If <bit> is true, sets the I2C clock line high. If it
1980 is false, it clears it (low). 1980 is false, it clears it (low).
1981 1981
1982 eg: #define I2C_SCL(bit) \ 1982 eg: #define I2C_SCL(bit) \
1983 if(bit) immr->im_cpm.cp_pbdat |= PB_SCL; \ 1983 if(bit) immr->im_cpm.cp_pbdat |= PB_SCL; \
1984 else immr->im_cpm.cp_pbdat &= ~PB_SCL 1984 else immr->im_cpm.cp_pbdat &= ~PB_SCL
1985 1985
1986 I2C_DELAY 1986 I2C_DELAY
1987 1987
1988 This delay is invoked four times per clock cycle so this 1988 This delay is invoked four times per clock cycle so this
1989 controls the rate of data transfer. The data rate thus 1989 controls the rate of data transfer. The data rate thus
1990 is 1 / (I2C_DELAY * 4). Often defined to be something 1990 is 1 / (I2C_DELAY * 4). Often defined to be something
1991 like: 1991 like:
1992 1992
1993 #define I2C_DELAY udelay(2) 1993 #define I2C_DELAY udelay(2)
1994 1994
1995 CONFIG_SOFT_I2C_GPIO_SCL / CONFIG_SOFT_I2C_GPIO_SDA 1995 CONFIG_SOFT_I2C_GPIO_SCL / CONFIG_SOFT_I2C_GPIO_SDA
1996 1996
1997 If your arch supports the generic GPIO framework (asm/gpio.h), 1997 If your arch supports the generic GPIO framework (asm/gpio.h),
1998 then you may alternatively define the two GPIOs that are to be 1998 then you may alternatively define the two GPIOs that are to be
1999 used as SCL / SDA. Any of the previous I2C_xxx macros will 1999 used as SCL / SDA. Any of the previous I2C_xxx macros will
2000 have GPIO-based defaults assigned to them as appropriate. 2000 have GPIO-based defaults assigned to them as appropriate.
2001 2001
2002 You should define these to the GPIO value as given directly to 2002 You should define these to the GPIO value as given directly to
2003 the generic GPIO functions. 2003 the generic GPIO functions.
2004 2004
2005 CONFIG_SYS_I2C_INIT_BOARD 2005 CONFIG_SYS_I2C_INIT_BOARD
2006 2006
2007 When a board is reset during an i2c bus transfer 2007 When a board is reset during an i2c bus transfer
2008 chips might think that the current transfer is still 2008 chips might think that the current transfer is still
2009 in progress. On some boards it is possible to access 2009 in progress. On some boards it is possible to access
2010 the i2c SCLK line directly, either by using the 2010 the i2c SCLK line directly, either by using the
2011 processor pin as a GPIO or by having a second pin 2011 processor pin as a GPIO or by having a second pin
2012 connected to the bus. If this option is defined a 2012 connected to the bus. If this option is defined a
2013 custom i2c_init_board() routine in boards/xxx/board.c 2013 custom i2c_init_board() routine in boards/xxx/board.c
2014 is run early in the boot sequence. 2014 is run early in the boot sequence.
2015 2015
2016 CONFIG_SYS_I2C_BOARD_LATE_INIT 2016 CONFIG_SYS_I2C_BOARD_LATE_INIT
2017 2017
2018 An alternative to CONFIG_SYS_I2C_INIT_BOARD. If this option is 2018 An alternative to CONFIG_SYS_I2C_INIT_BOARD. If this option is
2019 defined a custom i2c_board_late_init() routine in 2019 defined a custom i2c_board_late_init() routine in
2020 boards/xxx/board.c is run AFTER the operations in i2c_init() 2020 boards/xxx/board.c is run AFTER the operations in i2c_init()
2021 is completed. This callpoint can be used to unreset i2c bus 2021 is completed. This callpoint can be used to unreset i2c bus
2022 using CPU i2c controller register accesses for CPUs whose i2c 2022 using CPU i2c controller register accesses for CPUs whose i2c
2023 controller provide such a method. It is called at the end of 2023 controller provide such a method. It is called at the end of
2024 i2c_init() to allow i2c_init operations to setup the i2c bus 2024 i2c_init() to allow i2c_init operations to setup the i2c bus
2025 controller on the CPU (e.g. setting bus speed & slave address). 2025 controller on the CPU (e.g. setting bus speed & slave address).
2026 2026
2027 CONFIG_I2CFAST (PPC405GP|PPC405EP only) 2027 CONFIG_I2CFAST (PPC405GP|PPC405EP only)
2028 2028
2029 This option enables configuration of bi_iic_fast[] flags 2029 This option enables configuration of bi_iic_fast[] flags
2030 in u-boot bd_info structure based on u-boot environment 2030 in u-boot bd_info structure based on u-boot environment
2031 variable "i2cfast". (see also i2cfast) 2031 variable "i2cfast". (see also i2cfast)
2032 2032
2033 CONFIG_I2C_MULTI_BUS 2033 CONFIG_I2C_MULTI_BUS
2034 2034
2035 This option allows the use of multiple I2C buses, each of which 2035 This option allows the use of multiple I2C buses, each of which
2036 must have a controller. At any point in time, only one bus is 2036 must have a controller. At any point in time, only one bus is
2037 active. To switch to a different bus, use the 'i2c dev' command. 2037 active. To switch to a different bus, use the 'i2c dev' command.
2038 Note that bus numbering is zero-based. 2038 Note that bus numbering is zero-based.
2039 2039
2040 CONFIG_SYS_I2C_NOPROBES 2040 CONFIG_SYS_I2C_NOPROBES
2041 2041
2042 This option specifies a list of I2C devices that will be skipped 2042 This option specifies a list of I2C devices that will be skipped
2043 when the 'i2c probe' command is issued. If CONFIG_I2C_MULTI_BUS 2043 when the 'i2c probe' command is issued. If CONFIG_I2C_MULTI_BUS
2044 is set, specify a list of bus-device pairs. Otherwise, specify 2044 is set, specify a list of bus-device pairs. Otherwise, specify
2045 a 1D array of device addresses 2045 a 1D array of device addresses
2046 2046
2047 e.g. 2047 e.g.
2048 #undef CONFIG_I2C_MULTI_BUS 2048 #undef CONFIG_I2C_MULTI_BUS
2049 #define CONFIG_SYS_I2C_NOPROBES {0x50,0x68} 2049 #define CONFIG_SYS_I2C_NOPROBES {0x50,0x68}
2050 2050
2051 will skip addresses 0x50 and 0x68 on a board with one I2C bus 2051 will skip addresses 0x50 and 0x68 on a board with one I2C bus
2052 2052
2053 #define CONFIG_I2C_MULTI_BUS 2053 #define CONFIG_I2C_MULTI_BUS
2054 #define CONFIG_SYS_I2C_MULTI_NOPROBES {{0,0x50},{0,0x68},{1,0x54}} 2054 #define CONFIG_SYS_I2C_MULTI_NOPROBES {{0,0x50},{0,0x68},{1,0x54}}
2055 2055
2056 will skip addresses 0x50 and 0x68 on bus 0 and address 0x54 on bus 1 2056 will skip addresses 0x50 and 0x68 on bus 0 and address 0x54 on bus 1
2057 2057
2058 CONFIG_SYS_SPD_BUS_NUM 2058 CONFIG_SYS_SPD_BUS_NUM
2059 2059
2060 If defined, then this indicates the I2C bus number for DDR SPD. 2060 If defined, then this indicates the I2C bus number for DDR SPD.
2061 If not defined, then U-Boot assumes that SPD is on I2C bus 0. 2061 If not defined, then U-Boot assumes that SPD is on I2C bus 0.
2062 2062
2063 CONFIG_SYS_RTC_BUS_NUM 2063 CONFIG_SYS_RTC_BUS_NUM
2064 2064
2065 If defined, then this indicates the I2C bus number for the RTC. 2065 If defined, then this indicates the I2C bus number for the RTC.
2066 If not defined, then U-Boot assumes that RTC is on I2C bus 0. 2066 If not defined, then U-Boot assumes that RTC is on I2C bus 0.
2067 2067
2068 CONFIG_SYS_DTT_BUS_NUM 2068 CONFIG_SYS_DTT_BUS_NUM
2069 2069
2070 If defined, then this indicates the I2C bus number for the DTT. 2070 If defined, then this indicates the I2C bus number for the DTT.
2071 If not defined, then U-Boot assumes that DTT is on I2C bus 0. 2071 If not defined, then U-Boot assumes that DTT is on I2C bus 0.
2072 2072
2073 CONFIG_SYS_I2C_DTT_ADDR: 2073 CONFIG_SYS_I2C_DTT_ADDR:
2074 2074
2075 If defined, specifies the I2C address of the DTT device. 2075 If defined, specifies the I2C address of the DTT device.
2076 If not defined, then U-Boot uses predefined value for 2076 If not defined, then U-Boot uses predefined value for
2077 specified DTT device. 2077 specified DTT device.
2078 2078
2079 CONFIG_FSL_I2C 2079 CONFIG_FSL_I2C
2080 2080
2081 Define this option if you want to use Freescale's I2C driver in 2081 Define this option if you want to use Freescale's I2C driver in
2082 drivers/i2c/fsl_i2c.c. 2082 drivers/i2c/fsl_i2c.c.
2083 2083
2084 CONFIG_I2C_MUX 2084 CONFIG_I2C_MUX
2085 2085
2086 Define this option if you have I2C devices reached over 1 .. n 2086 Define this option if you have I2C devices reached over 1 .. n
2087 I2C Muxes like the pca9544a. This option addes a new I2C 2087 I2C Muxes like the pca9544a. This option addes a new I2C
2088 Command "i2c bus [muxtype:muxaddr:muxchannel]" which adds a 2088 Command "i2c bus [muxtype:muxaddr:muxchannel]" which adds a
2089 new I2C Bus to the existing I2C Busses. If you select the 2089 new I2C Bus to the existing I2C Busses. If you select the
2090 new Bus with "i2c dev", u-bbot sends first the commandos for 2090 new Bus with "i2c dev", u-bbot sends first the commandos for
2091 the muxes to activate this new "bus". 2091 the muxes to activate this new "bus".
2092 2092
2093 CONFIG_I2C_MULTI_BUS must be also defined, to use this 2093 CONFIG_I2C_MULTI_BUS must be also defined, to use this
2094 feature! 2094 feature!
2095 2095
2096 Example: 2096 Example:
2097 Adding a new I2C Bus reached over 2 pca9544a muxes 2097 Adding a new I2C Bus reached over 2 pca9544a muxes
2098 The First mux with address 70 and channel 6 2098 The First mux with address 70 and channel 6
2099 The Second mux with address 71 and channel 4 2099 The Second mux with address 71 and channel 4
2100 2100
2101 => i2c bus pca9544a:70:6:pca9544a:71:4 2101 => i2c bus pca9544a:70:6:pca9544a:71:4
2102 2102
2103 Use the "i2c bus" command without parameter, to get a list 2103 Use the "i2c bus" command without parameter, to get a list
2104 of I2C Busses with muxes: 2104 of I2C Busses with muxes:
2105 2105
2106 => i2c bus 2106 => i2c bus
2107 Busses reached over muxes: 2107 Busses reached over muxes:
2108 Bus ID: 2 2108 Bus ID: 2
2109 reached over Mux(es): 2109 reached over Mux(es):
2110 pca9544a@70 ch: 4 2110 pca9544a@70 ch: 4
2111 Bus ID: 3 2111 Bus ID: 3
2112 reached over Mux(es): 2112 reached over Mux(es):
2113 pca9544a@70 ch: 6 2113 pca9544a@70 ch: 6
2114 pca9544a@71 ch: 4 2114 pca9544a@71 ch: 4
2115 => 2115 =>
2116 2116
2117 If you now switch to the new I2C Bus 3 with "i2c dev 3" 2117 If you now switch to the new I2C Bus 3 with "i2c dev 3"
2118 u-boot first sends the command to the mux@70 to enable 2118 u-boot first sends the command to the mux@70 to enable
2119 channel 6, and then the command to the mux@71 to enable 2119 channel 6, and then the command to the mux@71 to enable
2120 the channel 4. 2120 the channel 4.
2121 2121
2122 After that, you can use the "normal" i2c commands as 2122 After that, you can use the "normal" i2c commands as
2123 usual to communicate with your I2C devices behind 2123 usual to communicate with your I2C devices behind
2124 the 2 muxes. 2124 the 2 muxes.
2125 2125
2126 This option is actually implemented for the bitbanging 2126 This option is actually implemented for the bitbanging
2127 algorithm in common/soft_i2c.c and for the Hardware I2C 2127 algorithm in common/soft_i2c.c and for the Hardware I2C
2128 Bus on the MPC8260. But it should be not so difficult 2128 Bus on the MPC8260. But it should be not so difficult
2129 to add this option to other architectures. 2129 to add this option to other architectures.
2130 2130
2131 CONFIG_SOFT_I2C_READ_REPEATED_START 2131 CONFIG_SOFT_I2C_READ_REPEATED_START
2132 2132
2133 defining this will force the i2c_read() function in 2133 defining this will force the i2c_read() function in
2134 the soft_i2c driver to perform an I2C repeated start 2134 the soft_i2c driver to perform an I2C repeated start
2135 between writing the address pointer and reading the 2135 between writing the address pointer and reading the
2136 data. If this define is omitted the default behaviour 2136 data. If this define is omitted the default behaviour
2137 of doing a stop-start sequence will be used. Most I2C 2137 of doing a stop-start sequence will be used. Most I2C
2138 devices can use either method, but some require one or 2138 devices can use either method, but some require one or
2139 the other. 2139 the other.
2140 2140
2141 - SPI Support: CONFIG_SPI 2141 - SPI Support: CONFIG_SPI
2142 2142
2143 Enables SPI driver (so far only tested with 2143 Enables SPI driver (so far only tested with
2144 SPI EEPROM, also an instance works with Crystal A/D and 2144 SPI EEPROM, also an instance works with Crystal A/D and
2145 D/As on the SACSng board) 2145 D/As on the SACSng board)
2146 2146
2147 CONFIG_SH_SPI 2147 CONFIG_SH_SPI
2148 2148
2149 Enables the driver for SPI controller on SuperH. Currently 2149 Enables the driver for SPI controller on SuperH. Currently
2150 only SH7757 is supported. 2150 only SH7757 is supported.
2151 2151
2152 CONFIG_SPI_X 2152 CONFIG_SPI_X
2153 2153
2154 Enables extended (16-bit) SPI EEPROM addressing. 2154 Enables extended (16-bit) SPI EEPROM addressing.
2155 (symmetrical to CONFIG_I2C_X) 2155 (symmetrical to CONFIG_I2C_X)
2156 2156
2157 CONFIG_SOFT_SPI 2157 CONFIG_SOFT_SPI
2158 2158
2159 Enables a software (bit-bang) SPI driver rather than 2159 Enables a software (bit-bang) SPI driver rather than
2160 using hardware support. This is a general purpose 2160 using hardware support. This is a general purpose
2161 driver that only requires three general I/O port pins 2161 driver that only requires three general I/O port pins
2162 (two outputs, one input) to function. If this is 2162 (two outputs, one input) to function. If this is
2163 defined, the board configuration must define several 2163 defined, the board configuration must define several
2164 SPI configuration items (port pins to use, etc). For 2164 SPI configuration items (port pins to use, etc). For
2165 an example, see include/configs/sacsng.h. 2165 an example, see include/configs/sacsng.h.
2166 2166
2167 CONFIG_HARD_SPI 2167 CONFIG_HARD_SPI
2168 2168
2169 Enables a hardware SPI driver for general-purpose reads 2169 Enables a hardware SPI driver for general-purpose reads
2170 and writes. As with CONFIG_SOFT_SPI, the board configuration 2170 and writes. As with CONFIG_SOFT_SPI, the board configuration
2171 must define a list of chip-select function pointers. 2171 must define a list of chip-select function pointers.
2172 Currently supported on some MPC8xxx processors. For an 2172 Currently supported on some MPC8xxx processors. For an
2173 example, see include/configs/mpc8349emds.h. 2173 example, see include/configs/mpc8349emds.h.
2174 2174
2175 CONFIG_MXC_SPI 2175 CONFIG_MXC_SPI
2176 2176
2177 Enables the driver for the SPI controllers on i.MX and MXC 2177 Enables the driver for the SPI controllers on i.MX and MXC
2178 SoCs. Currently i.MX31/35/51 are supported. 2178 SoCs. Currently i.MX31/35/51 are supported.
2179 2179
2180 - FPGA Support: CONFIG_FPGA 2180 - FPGA Support: CONFIG_FPGA
2181 2181
2182 Enables FPGA subsystem. 2182 Enables FPGA subsystem.
2183 2183
2184 CONFIG_FPGA_<vendor> 2184 CONFIG_FPGA_<vendor>
2185 2185
2186 Enables support for specific chip vendors. 2186 Enables support for specific chip vendors.
2187 (ALTERA, XILINX) 2187 (ALTERA, XILINX)
2188 2188
2189 CONFIG_FPGA_<family> 2189 CONFIG_FPGA_<family>
2190 2190
2191 Enables support for FPGA family. 2191 Enables support for FPGA family.
2192 (SPARTAN2, SPARTAN3, VIRTEX2, CYCLONE2, ACEX1K, ACEX) 2192 (SPARTAN2, SPARTAN3, VIRTEX2, CYCLONE2, ACEX1K, ACEX)
2193 2193
2194 CONFIG_FPGA_COUNT 2194 CONFIG_FPGA_COUNT
2195 2195
2196 Specify the number of FPGA devices to support. 2196 Specify the number of FPGA devices to support.
2197 2197
2198 CONFIG_SYS_FPGA_PROG_FEEDBACK 2198 CONFIG_SYS_FPGA_PROG_FEEDBACK
2199 2199
2200 Enable printing of hash marks during FPGA configuration. 2200 Enable printing of hash marks during FPGA configuration.
2201 2201
2202 CONFIG_SYS_FPGA_CHECK_BUSY 2202 CONFIG_SYS_FPGA_CHECK_BUSY
2203 2203
2204 Enable checks on FPGA configuration interface busy 2204 Enable checks on FPGA configuration interface busy
2205 status by the configuration function. This option 2205 status by the configuration function. This option
2206 will require a board or device specific function to 2206 will require a board or device specific function to
2207 be written. 2207 be written.
2208 2208
2209 CONFIG_FPGA_DELAY 2209 CONFIG_FPGA_DELAY
2210 2210
2211 If defined, a function that provides delays in the FPGA 2211 If defined, a function that provides delays in the FPGA
2212 configuration driver. 2212 configuration driver.
2213 2213
2214 CONFIG_SYS_FPGA_CHECK_CTRLC 2214 CONFIG_SYS_FPGA_CHECK_CTRLC
2215 Allow Control-C to interrupt FPGA configuration 2215 Allow Control-C to interrupt FPGA configuration
2216 2216
2217 CONFIG_SYS_FPGA_CHECK_ERROR 2217 CONFIG_SYS_FPGA_CHECK_ERROR
2218 2218
2219 Check for configuration errors during FPGA bitfile 2219 Check for configuration errors during FPGA bitfile
2220 loading. For example, abort during Virtex II 2220 loading. For example, abort during Virtex II
2221 configuration if the INIT_B line goes low (which 2221 configuration if the INIT_B line goes low (which
2222 indicated a CRC error). 2222 indicated a CRC error).
2223 2223
2224 CONFIG_SYS_FPGA_WAIT_INIT 2224 CONFIG_SYS_FPGA_WAIT_INIT
2225 2225
2226 Maximum time to wait for the INIT_B line to deassert 2226 Maximum time to wait for the INIT_B line to deassert
2227 after PROB_B has been deasserted during a Virtex II 2227 after PROB_B has been deasserted during a Virtex II
2228 FPGA configuration sequence. The default time is 500 2228 FPGA configuration sequence. The default time is 500
2229 ms. 2229 ms.
2230 2230
2231 CONFIG_SYS_FPGA_WAIT_BUSY 2231 CONFIG_SYS_FPGA_WAIT_BUSY
2232 2232
2233 Maximum time to wait for BUSY to deassert during 2233 Maximum time to wait for BUSY to deassert during
2234 Virtex II FPGA configuration. The default is 5 ms. 2234 Virtex II FPGA configuration. The default is 5 ms.
2235 2235
2236 CONFIG_SYS_FPGA_WAIT_CONFIG 2236 CONFIG_SYS_FPGA_WAIT_CONFIG
2237 2237
2238 Time to wait after FPGA configuration. The default is 2238 Time to wait after FPGA configuration. The default is
2239 200 ms. 2239 200 ms.
2240 2240
2241 - Configuration Management: 2241 - Configuration Management:
2242 CONFIG_IDENT_STRING 2242 CONFIG_IDENT_STRING
2243 2243
2244 If defined, this string will be added to the U-Boot 2244 If defined, this string will be added to the U-Boot
2245 version information (U_BOOT_VERSION) 2245 version information (U_BOOT_VERSION)
2246 2246
2247 - Vendor Parameter Protection: 2247 - Vendor Parameter Protection:
2248 2248
2249 U-Boot considers the values of the environment 2249 U-Boot considers the values of the environment
2250 variables "serial#" (Board Serial Number) and 2250 variables "serial#" (Board Serial Number) and
2251 "ethaddr" (Ethernet Address) to be parameters that 2251 "ethaddr" (Ethernet Address) to be parameters that
2252 are set once by the board vendor / manufacturer, and 2252 are set once by the board vendor / manufacturer, and
2253 protects these variables from casual modification by 2253 protects these variables from casual modification by
2254 the user. Once set, these variables are read-only, 2254 the user. Once set, these variables are read-only,
2255 and write or delete attempts are rejected. You can 2255 and write or delete attempts are rejected. You can
2256 change this behaviour: 2256 change this behaviour:
2257 2257
2258 If CONFIG_ENV_OVERWRITE is #defined in your config 2258 If CONFIG_ENV_OVERWRITE is #defined in your config
2259 file, the write protection for vendor parameters is 2259 file, the write protection for vendor parameters is
2260 completely disabled. Anybody can change or delete 2260 completely disabled. Anybody can change or delete
2261 these parameters. 2261 these parameters.
2262 2262
2263 Alternatively, if you #define _both_ CONFIG_ETHADDR 2263 Alternatively, if you #define _both_ CONFIG_ETHADDR
2264 _and_ CONFIG_OVERWRITE_ETHADDR_ONCE, a default 2264 _and_ CONFIG_OVERWRITE_ETHADDR_ONCE, a default
2265 Ethernet address is installed in the environment, 2265 Ethernet address is installed in the environment,
2266 which can be changed exactly ONCE by the user. [The 2266 which can be changed exactly ONCE by the user. [The
2267 serial# is unaffected by this, i. e. it remains 2267 serial# is unaffected by this, i. e. it remains
2268 read-only.] 2268 read-only.]
2269 2269
2270 The same can be accomplished in a more flexible way 2270 The same can be accomplished in a more flexible way
2271 for any variable by configuring the type of access 2271 for any variable by configuring the type of access
2272 to allow for those variables in the ".flags" variable 2272 to allow for those variables in the ".flags" variable
2273 or define CONFIG_ENV_FLAGS_LIST_STATIC. 2273 or define CONFIG_ENV_FLAGS_LIST_STATIC.
2274 2274
2275 - Protected RAM: 2275 - Protected RAM:
2276 CONFIG_PRAM 2276 CONFIG_PRAM
2277 2277
2278 Define this variable to enable the reservation of 2278 Define this variable to enable the reservation of
2279 "protected RAM", i. e. RAM which is not overwritten 2279 "protected RAM", i. e. RAM which is not overwritten
2280 by U-Boot. Define CONFIG_PRAM to hold the number of 2280 by U-Boot. Define CONFIG_PRAM to hold the number of
2281 kB you want to reserve for pRAM. You can overwrite 2281 kB you want to reserve for pRAM. You can overwrite
2282 this default value by defining an environment 2282 this default value by defining an environment
2283 variable "pram" to the number of kB you want to 2283 variable "pram" to the number of kB you want to
2284 reserve. Note that the board info structure will 2284 reserve. Note that the board info structure will
2285 still show the full amount of RAM. If pRAM is 2285 still show the full amount of RAM. If pRAM is
2286 reserved, a new environment variable "mem" will 2286 reserved, a new environment variable "mem" will
2287 automatically be defined to hold the amount of 2287 automatically be defined to hold the amount of
2288 remaining RAM in a form that can be passed as boot 2288 remaining RAM in a form that can be passed as boot
2289 argument to Linux, for instance like that: 2289 argument to Linux, for instance like that:
2290 2290
2291 setenv bootargs ... mem=\${mem} 2291 setenv bootargs ... mem=\${mem}
2292 saveenv 2292 saveenv
2293 2293
2294 This way you can tell Linux not to use this memory, 2294 This way you can tell Linux not to use this memory,
2295 either, which results in a memory region that will 2295 either, which results in a memory region that will
2296 not be affected by reboots. 2296 not be affected by reboots.
2297 2297
2298 *WARNING* If your board configuration uses automatic 2298 *WARNING* If your board configuration uses automatic
2299 detection of the RAM size, you must make sure that 2299 detection of the RAM size, you must make sure that
2300 this memory test is non-destructive. So far, the 2300 this memory test is non-destructive. So far, the
2301 following board configurations are known to be 2301 following board configurations are known to be
2302 "pRAM-clean": 2302 "pRAM-clean":
2303 2303
2304 IVMS8, IVML24, SPD8xx, TQM8xxL, 2304 IVMS8, IVML24, SPD8xx, TQM8xxL,
2305 HERMES, IP860, RPXlite, LWMON, 2305 HERMES, IP860, RPXlite, LWMON,
2306 FLAGADM, TQM8260 2306 FLAGADM, TQM8260
2307 2307
2308 - Access to physical memory region (> 4GB) 2308 - Access to physical memory region (> 4GB)
2309 Some basic support is provided for operations on memory not 2309 Some basic support is provided for operations on memory not
2310 normally accessible to U-Boot - e.g. some architectures 2310 normally accessible to U-Boot - e.g. some architectures
2311 support access to more than 4GB of memory on 32-bit 2311 support access to more than 4GB of memory on 32-bit
2312 machines using physical address extension or similar. 2312 machines using physical address extension or similar.
2313 Define CONFIG_PHYSMEM to access this basic support, which 2313 Define CONFIG_PHYSMEM to access this basic support, which
2314 currently only supports clearing the memory. 2314 currently only supports clearing the memory.
2315 2315
2316 - Error Recovery: 2316 - Error Recovery:
2317 CONFIG_PANIC_HANG 2317 CONFIG_PANIC_HANG
2318 2318
2319 Define this variable to stop the system in case of a 2319 Define this variable to stop the system in case of a
2320 fatal error, so that you have to reset it manually. 2320 fatal error, so that you have to reset it manually.
2321 This is probably NOT a good idea for an embedded 2321 This is probably NOT a good idea for an embedded
2322 system where you want the system to reboot 2322 system where you want the system to reboot
2323 automatically as fast as possible, but it may be 2323 automatically as fast as possible, but it may be
2324 useful during development since you can try to debug 2324 useful during development since you can try to debug
2325 the conditions that lead to the situation. 2325 the conditions that lead to the situation.
2326 2326
2327 CONFIG_NET_RETRY_COUNT 2327 CONFIG_NET_RETRY_COUNT
2328 2328
2329 This variable defines the number of retries for 2329 This variable defines the number of retries for
2330 network operations like ARP, RARP, TFTP, or BOOTP 2330 network operations like ARP, RARP, TFTP, or BOOTP
2331 before giving up the operation. If not defined, a 2331 before giving up the operation. If not defined, a
2332 default value of 5 is used. 2332 default value of 5 is used.
2333 2333
2334 CONFIG_ARP_TIMEOUT 2334 CONFIG_ARP_TIMEOUT
2335 2335
2336 Timeout waiting for an ARP reply in milliseconds. 2336 Timeout waiting for an ARP reply in milliseconds.
2337 2337
2338 CONFIG_NFS_TIMEOUT 2338 CONFIG_NFS_TIMEOUT
2339 2339
2340 Timeout in milliseconds used in NFS protocol. 2340 Timeout in milliseconds used in NFS protocol.
2341 If you encounter "ERROR: Cannot umount" in nfs command, 2341 If you encounter "ERROR: Cannot umount" in nfs command,
2342 try longer timeout such as 2342 try longer timeout such as
2343 #define CONFIG_NFS_TIMEOUT 10000UL 2343 #define CONFIG_NFS_TIMEOUT 10000UL
2344 2344
2345 - Command Interpreter: 2345 - Command Interpreter:
2346 CONFIG_AUTO_COMPLETE 2346 CONFIG_AUTO_COMPLETE
2347 2347
2348 Enable auto completion of commands using TAB. 2348 Enable auto completion of commands using TAB.
2349 2349
2350 Note that this feature has NOT been implemented yet 2350 Note that this feature has NOT been implemented yet
2351 for the "hush" shell. 2351 for the "hush" shell.
2352 2352
2353 2353
2354 CONFIG_SYS_HUSH_PARSER 2354 CONFIG_SYS_HUSH_PARSER
2355 2355
2356 Define this variable to enable the "hush" shell (from 2356 Define this variable to enable the "hush" shell (from
2357 Busybox) as command line interpreter, thus enabling 2357 Busybox) as command line interpreter, thus enabling
2358 powerful command line syntax like 2358 powerful command line syntax like
2359 if...then...else...fi conditionals or `&&' and '||' 2359 if...then...else...fi conditionals or `&&' and '||'
2360 constructs ("shell scripts"). 2360 constructs ("shell scripts").
2361 2361
2362 If undefined, you get the old, much simpler behaviour 2362 If undefined, you get the old, much simpler behaviour
2363 with a somewhat smaller memory footprint. 2363 with a somewhat smaller memory footprint.
2364 2364
2365 2365
2366 CONFIG_SYS_PROMPT_HUSH_PS2 2366 CONFIG_SYS_PROMPT_HUSH_PS2
2367 2367
2368 This defines the secondary prompt string, which is 2368 This defines the secondary prompt string, which is
2369 printed when the command interpreter needs more input 2369 printed when the command interpreter needs more input
2370 to complete a command. Usually "> ". 2370 to complete a command. Usually "> ".
2371 2371
2372 Note: 2372 Note:
2373 2373
2374 In the current implementation, the local variables 2374 In the current implementation, the local variables
2375 space and global environment variables space are 2375 space and global environment variables space are
2376 separated. Local variables are those you define by 2376 separated. Local variables are those you define by
2377 simply typing `name=value'. To access a local 2377 simply typing `name=value'. To access a local
2378 variable later on, you have write `$name' or 2378 variable later on, you have write `$name' or
2379 `${name}'; to execute the contents of a variable 2379 `${name}'; to execute the contents of a variable
2380 directly type `$name' at the command prompt. 2380 directly type `$name' at the command prompt.
2381 2381
2382 Global environment variables are those you use 2382 Global environment variables are those you use
2383 setenv/printenv to work with. To run a command stored 2383 setenv/printenv to work with. To run a command stored
2384 in such a variable, you need to use the run command, 2384 in such a variable, you need to use the run command,
2385 and you must not use the '$' sign to access them. 2385 and you must not use the '$' sign to access them.
2386 2386
2387 To store commands and special characters in a 2387 To store commands and special characters in a
2388 variable, please use double quotation marks 2388 variable, please use double quotation marks
2389 surrounding the whole text of the variable, instead 2389 surrounding the whole text of the variable, instead
2390 of the backslashes before semicolons and special 2390 of the backslashes before semicolons and special
2391 symbols. 2391 symbols.
2392 2392
2393 - Commandline Editing and History: 2393 - Commandline Editing and History:
2394 CONFIG_CMDLINE_EDITING 2394 CONFIG_CMDLINE_EDITING
2395 2395
2396 Enable editing and History functions for interactive 2396 Enable editing and History functions for interactive
2397 commandline input operations 2397 commandline input operations
2398 2398
2399 - Default Environment: 2399 - Default Environment:
2400 CONFIG_EXTRA_ENV_SETTINGS 2400 CONFIG_EXTRA_ENV_SETTINGS
2401 2401
2402 Define this to contain any number of null terminated 2402 Define this to contain any number of null terminated
2403 strings (variable = value pairs) that will be part of 2403 strings (variable = value pairs) that will be part of
2404 the default environment compiled into the boot image. 2404 the default environment compiled into the boot image.
2405 2405
2406 For example, place something like this in your 2406 For example, place something like this in your
2407 board's config file: 2407 board's config file:
2408 2408
2409 #define CONFIG_EXTRA_ENV_SETTINGS \ 2409 #define CONFIG_EXTRA_ENV_SETTINGS \
2410 "myvar1=value1\0" \ 2410 "myvar1=value1\0" \
2411 "myvar2=value2\0" 2411 "myvar2=value2\0"
2412 2412
2413 Warning: This method is based on knowledge about the 2413 Warning: This method is based on knowledge about the
2414 internal format how the environment is stored by the 2414 internal format how the environment is stored by the
2415 U-Boot code. This is NOT an official, exported 2415 U-Boot code. This is NOT an official, exported
2416 interface! Although it is unlikely that this format 2416 interface! Although it is unlikely that this format
2417 will change soon, there is no guarantee either. 2417 will change soon, there is no guarantee either.
2418 You better know what you are doing here. 2418 You better know what you are doing here.
2419 2419
2420 Note: overly (ab)use of the default environment is 2420 Note: overly (ab)use of the default environment is
2421 discouraged. Make sure to check other ways to preset 2421 discouraged. Make sure to check other ways to preset
2422 the environment like the "source" command or the 2422 the environment like the "source" command or the
2423 boot command first. 2423 boot command first.
2424 2424
2425 CONFIG_ENV_VARS_UBOOT_CONFIG 2425 CONFIG_ENV_VARS_UBOOT_CONFIG
2426 2426
2427 Define this in order to add variables describing the 2427 Define this in order to add variables describing the
2428 U-Boot build configuration to the default environment. 2428 U-Boot build configuration to the default environment.
2429 These will be named arch, cpu, board, vendor, and soc. 2429 These will be named arch, cpu, board, vendor, and soc.
2430 2430
2431 Enabling this option will cause the following to be defined: 2431 Enabling this option will cause the following to be defined:
2432 2432
2433 - CONFIG_SYS_ARCH 2433 - CONFIG_SYS_ARCH
2434 - CONFIG_SYS_CPU 2434 - CONFIG_SYS_CPU
2435 - CONFIG_SYS_BOARD 2435 - CONFIG_SYS_BOARD
2436 - CONFIG_SYS_VENDOR 2436 - CONFIG_SYS_VENDOR
2437 - CONFIG_SYS_SOC 2437 - CONFIG_SYS_SOC
2438 2438
2439 CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG 2439 CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
2440 2440
2441 Define this in order to add variables describing certain 2441 Define this in order to add variables describing certain
2442 run-time determined information about the hardware to the 2442 run-time determined information about the hardware to the
2443 environment. These will be named board_name, board_rev. 2443 environment. These will be named board_name, board_rev.
2444 2444
2445 CONFIG_DELAY_ENVIRONMENT 2445 CONFIG_DELAY_ENVIRONMENT
2446 2446
2447 Normally the environment is loaded when the board is 2447 Normally the environment is loaded when the board is
2448 intialised so that it is available to U-Boot. This inhibits 2448 intialised so that it is available to U-Boot. This inhibits
2449 that so that the environment is not available until 2449 that so that the environment is not available until
2450 explicitly loaded later by U-Boot code. With CONFIG_OF_CONTROL 2450 explicitly loaded later by U-Boot code. With CONFIG_OF_CONTROL
2451 this is instead controlled by the value of 2451 this is instead controlled by the value of
2452 /config/load-environment. 2452 /config/load-environment.
2453 2453
2454 - DataFlash Support: 2454 - DataFlash Support:
2455 CONFIG_HAS_DATAFLASH 2455 CONFIG_HAS_DATAFLASH
2456 2456
2457 Defining this option enables DataFlash features and 2457 Defining this option enables DataFlash features and
2458 allows to read/write in Dataflash via the standard 2458 allows to read/write in Dataflash via the standard
2459 commands cp, md... 2459 commands cp, md...
2460 2460
2461 - Serial Flash support 2461 - Serial Flash support
2462 CONFIG_CMD_SF 2462 CONFIG_CMD_SF
2463 2463
2464 Defining this option enables SPI flash commands 2464 Defining this option enables SPI flash commands
2465 'sf probe/read/write/erase/update'. 2465 'sf probe/read/write/erase/update'.
2466 2466
2467 Usage requires an initial 'probe' to define the serial 2467 Usage requires an initial 'probe' to define the serial
2468 flash parameters, followed by read/write/erase/update 2468 flash parameters, followed by read/write/erase/update
2469 commands. 2469 commands.
2470 2470
2471 The following defaults may be provided by the platform 2471 The following defaults may be provided by the platform
2472 to handle the common case when only a single serial 2472 to handle the common case when only a single serial
2473 flash is present on the system. 2473 flash is present on the system.
2474 2474
2475 CONFIG_SF_DEFAULT_BUS Bus identifier 2475 CONFIG_SF_DEFAULT_BUS Bus identifier
2476 CONFIG_SF_DEFAULT_CS Chip-select 2476 CONFIG_SF_DEFAULT_CS Chip-select
2477 CONFIG_SF_DEFAULT_MODE (see include/spi.h) 2477 CONFIG_SF_DEFAULT_MODE (see include/spi.h)
2478 CONFIG_SF_DEFAULT_SPEED in Hz 2478 CONFIG_SF_DEFAULT_SPEED in Hz
2479 2479
2480 CONFIG_CMD_SF_TEST 2480 CONFIG_CMD_SF_TEST
2481 2481
2482 Define this option to include a destructive SPI flash 2482 Define this option to include a destructive SPI flash
2483 test ('sf test'). 2483 test ('sf test').
2484 2484
2485 - SystemACE Support: 2485 - SystemACE Support:
2486 CONFIG_SYSTEMACE 2486 CONFIG_SYSTEMACE
2487 2487
2488 Adding this option adds support for Xilinx SystemACE 2488 Adding this option adds support for Xilinx SystemACE
2489 chips attached via some sort of local bus. The address 2489 chips attached via some sort of local bus. The address
2490 of the chip must also be defined in the 2490 of the chip must also be defined in the
2491 CONFIG_SYS_SYSTEMACE_BASE macro. For example: 2491 CONFIG_SYS_SYSTEMACE_BASE macro. For example:
2492 2492
2493 #define CONFIG_SYSTEMACE 2493 #define CONFIG_SYSTEMACE
2494 #define CONFIG_SYS_SYSTEMACE_BASE 0xf0000000 2494 #define CONFIG_SYS_SYSTEMACE_BASE 0xf0000000
2495 2495
2496 When SystemACE support is added, the "ace" device type 2496 When SystemACE support is added, the "ace" device type
2497 becomes available to the fat commands, i.e. fatls. 2497 becomes available to the fat commands, i.e. fatls.
2498 2498
2499 - TFTP Fixed UDP Port: 2499 - TFTP Fixed UDP Port:
2500 CONFIG_TFTP_PORT 2500 CONFIG_TFTP_PORT
2501 2501
2502 If this is defined, the environment variable tftpsrcp 2502 If this is defined, the environment variable tftpsrcp
2503 is used to supply the TFTP UDP source port value. 2503 is used to supply the TFTP UDP source port value.
2504 If tftpsrcp isn't defined, the normal pseudo-random port 2504 If tftpsrcp isn't defined, the normal pseudo-random port
2505 number generator is used. 2505 number generator is used.
2506 2506
2507 Also, the environment variable tftpdstp is used to supply 2507 Also, the environment variable tftpdstp is used to supply
2508 the TFTP UDP destination port value. If tftpdstp isn't 2508 the TFTP UDP destination port value. If tftpdstp isn't
2509 defined, the normal port 69 is used. 2509 defined, the normal port 69 is used.
2510 2510
2511 The purpose for tftpsrcp is to allow a TFTP server to 2511 The purpose for tftpsrcp is to allow a TFTP server to
2512 blindly start the TFTP transfer using the pre-configured 2512 blindly start the TFTP transfer using the pre-configured
2513 target IP address and UDP port. This has the effect of 2513 target IP address and UDP port. This has the effect of
2514 "punching through" the (Windows XP) firewall, allowing 2514 "punching through" the (Windows XP) firewall, allowing
2515 the remainder of the TFTP transfer to proceed normally. 2515 the remainder of the TFTP transfer to proceed normally.
2516 A better solution is to properly configure the firewall, 2516 A better solution is to properly configure the firewall,
2517 but sometimes that is not allowed. 2517 but sometimes that is not allowed.
2518 2518
2519 - Hashing support: 2519 - Hashing support:
2520 CONFIG_CMD_HASH 2520 CONFIG_CMD_HASH
2521 2521
2522 This enables a generic 'hash' command which can produce 2522 This enables a generic 'hash' command which can produce
2523 hashes / digests from a few algorithms (e.g. SHA1, SHA256). 2523 hashes / digests from a few algorithms (e.g. SHA1, SHA256).
2524 2524
2525 CONFIG_HASH_VERIFY 2525 CONFIG_HASH_VERIFY
2526 2526
2527 Enable the hash verify command (hash -v). This adds to code 2527 Enable the hash verify command (hash -v). This adds to code
2528 size a little. 2528 size a little.
2529 2529
2530 CONFIG_SHA1 - support SHA1 hashing 2530 CONFIG_SHA1 - support SHA1 hashing
2531 CONFIG_SHA256 - support SHA256 hashing 2531 CONFIG_SHA256 - support SHA256 hashing
2532 2532
2533 Note: There is also a sha1sum command, which should perhaps 2533 Note: There is also a sha1sum command, which should perhaps
2534 be deprecated in favour of 'hash sha1'. 2534 be deprecated in favour of 'hash sha1'.
2535 2535
2536 - Show boot progress: 2536 - Show boot progress:
2537 CONFIG_SHOW_BOOT_PROGRESS 2537 CONFIG_SHOW_BOOT_PROGRESS
2538 2538
2539 Defining this option allows to add some board- 2539 Defining this option allows to add some board-
2540 specific code (calling a user-provided function 2540 specific code (calling a user-provided function
2541 "show_boot_progress(int)") that enables you to show 2541 "show_boot_progress(int)") that enables you to show
2542 the system's boot progress on some display (for 2542 the system's boot progress on some display (for
2543 example, some LED's) on your board. At the moment, 2543 example, some LED's) on your board. At the moment,
2544 the following checkpoints are implemented: 2544 the following checkpoints are implemented:
2545 2545
2546 - Detailed boot stage timing 2546 - Detailed boot stage timing
2547 CONFIG_BOOTSTAGE 2547 CONFIG_BOOTSTAGE
2548 Define this option to get detailed timing of each stage 2548 Define this option to get detailed timing of each stage
2549 of the boot process. 2549 of the boot process.
2550 2550
2551 CONFIG_BOOTSTAGE_USER_COUNT 2551 CONFIG_BOOTSTAGE_USER_COUNT
2552 This is the number of available user bootstage records. 2552 This is the number of available user bootstage records.
2553 Each time you call bootstage_mark(BOOTSTAGE_ID_ALLOC, ...) 2553 Each time you call bootstage_mark(BOOTSTAGE_ID_ALLOC, ...)
2554 a new ID will be allocated from this stash. If you exceed 2554 a new ID will be allocated from this stash. If you exceed
2555 the limit, recording will stop. 2555 the limit, recording will stop.
2556 2556
2557 CONFIG_BOOTSTAGE_REPORT 2557 CONFIG_BOOTSTAGE_REPORT
2558 Define this to print a report before boot, similar to this: 2558 Define this to print a report before boot, similar to this:
2559 2559
2560 Timer summary in microseconds: 2560 Timer summary in microseconds:
2561 Mark Elapsed Stage 2561 Mark Elapsed Stage
2562 0 0 reset 2562 0 0 reset
2563 3,575,678 3,575,678 board_init_f start 2563 3,575,678 3,575,678 board_init_f start
2564 3,575,695 17 arch_cpu_init A9 2564 3,575,695 17 arch_cpu_init A9
2565 3,575,777 82 arch_cpu_init done 2565 3,575,777 82 arch_cpu_init done
2566 3,659,598 83,821 board_init_r start 2566 3,659,598 83,821 board_init_r start
2567 3,910,375 250,777 main_loop 2567 3,910,375 250,777 main_loop
2568 29,916,167 26,005,792 bootm_start 2568 29,916,167 26,005,792 bootm_start
2569 30,361,327 445,160 start_kernel 2569 30,361,327 445,160 start_kernel
2570 2570
2571 CONFIG_CMD_BOOTSTAGE 2571 CONFIG_CMD_BOOTSTAGE
2572 Add a 'bootstage' command which supports printing a report 2572 Add a 'bootstage' command which supports printing a report
2573 and un/stashing of bootstage data. 2573 and un/stashing of bootstage data.
2574 2574
2575 CONFIG_BOOTSTAGE_FDT 2575 CONFIG_BOOTSTAGE_FDT
2576 Stash the bootstage information in the FDT. A root 'bootstage' 2576 Stash the bootstage information in the FDT. A root 'bootstage'
2577 node is created with each bootstage id as a child. Each child 2577 node is created with each bootstage id as a child. Each child
2578 has a 'name' property and either 'mark' containing the 2578 has a 'name' property and either 'mark' containing the
2579 mark time in microsecond, or 'accum' containing the 2579 mark time in microsecond, or 'accum' containing the
2580 accumulated time for that bootstage id in microseconds. 2580 accumulated time for that bootstage id in microseconds.
2581 For example: 2581 For example:
2582 2582
2583 bootstage { 2583 bootstage {
2584 154 { 2584 154 {
2585 name = "board_init_f"; 2585 name = "board_init_f";
2586 mark = <3575678>; 2586 mark = <3575678>;
2587 }; 2587 };
2588 170 { 2588 170 {
2589 name = "lcd"; 2589 name = "lcd";
2590 accum = <33482>; 2590 accum = <33482>;
2591 }; 2591 };
2592 }; 2592 };
2593 2593
2594 Code in the Linux kernel can find this in /proc/devicetree. 2594 Code in the Linux kernel can find this in /proc/devicetree.
2595 2595
2596 Legacy uImage format: 2596 Legacy uImage format:
2597 2597
2598 Arg Where When 2598 Arg Where When
2599 1 common/cmd_bootm.c before attempting to boot an image 2599 1 common/cmd_bootm.c before attempting to boot an image
2600 -1 common/cmd_bootm.c Image header has bad magic number 2600 -1 common/cmd_bootm.c Image header has bad magic number
2601 2 common/cmd_bootm.c Image header has correct magic number 2601 2 common/cmd_bootm.c Image header has correct magic number
2602 -2 common/cmd_bootm.c Image header has bad checksum 2602 -2 common/cmd_bootm.c Image header has bad checksum
2603 3 common/cmd_bootm.c Image header has correct checksum 2603 3 common/cmd_bootm.c Image header has correct checksum
2604 -3 common/cmd_bootm.c Image data has bad checksum 2604 -3 common/cmd_bootm.c Image data has bad checksum
2605 4 common/cmd_bootm.c Image data has correct checksum 2605 4 common/cmd_bootm.c Image data has correct checksum
2606 -4 common/cmd_bootm.c Image is for unsupported architecture 2606 -4 common/cmd_bootm.c Image is for unsupported architecture
2607 5 common/cmd_bootm.c Architecture check OK 2607 5 common/cmd_bootm.c Architecture check OK
2608 -5 common/cmd_bootm.c Wrong Image Type (not kernel, multi) 2608 -5 common/cmd_bootm.c Wrong Image Type (not kernel, multi)
2609 6 common/cmd_bootm.c Image Type check OK 2609 6 common/cmd_bootm.c Image Type check OK
2610 -6 common/cmd_bootm.c gunzip uncompression error 2610 -6 common/cmd_bootm.c gunzip uncompression error
2611 -7 common/cmd_bootm.c Unimplemented compression type 2611 -7 common/cmd_bootm.c Unimplemented compression type
2612 7 common/cmd_bootm.c Uncompression OK 2612 7 common/cmd_bootm.c Uncompression OK
2613 8 common/cmd_bootm.c No uncompress/copy overwrite error 2613 8 common/cmd_bootm.c No uncompress/copy overwrite error
2614 -9 common/cmd_bootm.c Unsupported OS (not Linux, BSD, VxWorks, QNX) 2614 -9 common/cmd_bootm.c Unsupported OS (not Linux, BSD, VxWorks, QNX)
2615 2615
2616 9 common/image.c Start initial ramdisk verification 2616 9 common/image.c Start initial ramdisk verification
2617 -10 common/image.c Ramdisk header has bad magic number 2617 -10 common/image.c Ramdisk header has bad magic number
2618 -11 common/image.c Ramdisk header has bad checksum 2618 -11 common/image.c Ramdisk header has bad checksum
2619 10 common/image.c Ramdisk header is OK 2619 10 common/image.c Ramdisk header is OK
2620 -12 common/image.c Ramdisk data has bad checksum 2620 -12 common/image.c Ramdisk data has bad checksum
2621 11 common/image.c Ramdisk data has correct checksum 2621 11 common/image.c Ramdisk data has correct checksum
2622 12 common/image.c Ramdisk verification complete, start loading 2622 12 common/image.c Ramdisk verification complete, start loading
2623 -13 common/image.c Wrong Image Type (not PPC Linux ramdisk) 2623 -13 common/image.c Wrong Image Type (not PPC Linux ramdisk)
2624 13 common/image.c Start multifile image verification 2624 13 common/image.c Start multifile image verification
2625 14 common/image.c No initial ramdisk, no multifile, continue. 2625 14 common/image.c No initial ramdisk, no multifile, continue.
2626 2626
2627 15 arch/<arch>/lib/bootm.c All preparation done, transferring control to OS 2627 15 arch/<arch>/lib/bootm.c All preparation done, transferring control to OS
2628 2628
2629 -30 arch/powerpc/lib/board.c Fatal error, hang the system 2629 -30 arch/powerpc/lib/board.c Fatal error, hang the system
2630 -31 post/post.c POST test failed, detected by post_output_backlog() 2630 -31 post/post.c POST test failed, detected by post_output_backlog()
2631 -32 post/post.c POST test failed, detected by post_run_single() 2631 -32 post/post.c POST test failed, detected by post_run_single()
2632 2632
2633 34 common/cmd_doc.c before loading a Image from a DOC device 2633 34 common/cmd_doc.c before loading a Image from a DOC device
2634 -35 common/cmd_doc.c Bad usage of "doc" command 2634 -35 common/cmd_doc.c Bad usage of "doc" command
2635 35 common/cmd_doc.c correct usage of "doc" command 2635 35 common/cmd_doc.c correct usage of "doc" command
2636 -36 common/cmd_doc.c No boot device 2636 -36 common/cmd_doc.c No boot device
2637 36 common/cmd_doc.c correct boot device 2637 36 common/cmd_doc.c correct boot device
2638 -37 common/cmd_doc.c Unknown Chip ID on boot device 2638 -37 common/cmd_doc.c Unknown Chip ID on boot device
2639 37 common/cmd_doc.c correct chip ID found, device available 2639 37 common/cmd_doc.c correct chip ID found, device available
2640 -38 common/cmd_doc.c Read Error on boot device 2640 -38 common/cmd_doc.c Read Error on boot device
2641 38 common/cmd_doc.c reading Image header from DOC device OK 2641 38 common/cmd_doc.c reading Image header from DOC device OK
2642 -39 common/cmd_doc.c Image header has bad magic number 2642 -39 common/cmd_doc.c Image header has bad magic number
2643 39 common/cmd_doc.c Image header has correct magic number 2643 39 common/cmd_doc.c Image header has correct magic number
2644 -40 common/cmd_doc.c Error reading Image from DOC device 2644 -40 common/cmd_doc.c Error reading Image from DOC device
2645 40 common/cmd_doc.c Image header has correct magic number 2645 40 common/cmd_doc.c Image header has correct magic number
2646 41 common/cmd_ide.c before loading a Image from a IDE device 2646 41 common/cmd_ide.c before loading a Image from a IDE device
2647 -42 common/cmd_ide.c Bad usage of "ide" command 2647 -42 common/cmd_ide.c Bad usage of "ide" command
2648 42 common/cmd_ide.c correct usage of "ide" command 2648 42 common/cmd_ide.c correct usage of "ide" command
2649 -43 common/cmd_ide.c No boot device 2649 -43 common/cmd_ide.c No boot device
2650 43 common/cmd_ide.c boot device found 2650 43 common/cmd_ide.c boot device found
2651 -44 common/cmd_ide.c Device not available 2651 -44 common/cmd_ide.c Device not available
2652 44 common/cmd_ide.c Device available 2652 44 common/cmd_ide.c Device available
2653 -45 common/cmd_ide.c wrong partition selected 2653 -45 common/cmd_ide.c wrong partition selected
2654 45 common/cmd_ide.c partition selected 2654 45 common/cmd_ide.c partition selected
2655 -46 common/cmd_ide.c Unknown partition table 2655 -46 common/cmd_ide.c Unknown partition table
2656 46 common/cmd_ide.c valid partition table found 2656 46 common/cmd_ide.c valid partition table found
2657 -47 common/cmd_ide.c Invalid partition type 2657 -47 common/cmd_ide.c Invalid partition type
2658 47 common/cmd_ide.c correct partition type 2658 47 common/cmd_ide.c correct partition type
2659 -48 common/cmd_ide.c Error reading Image Header on boot device 2659 -48 common/cmd_ide.c Error reading Image Header on boot device
2660 48 common/cmd_ide.c reading Image Header from IDE device OK 2660 48 common/cmd_ide.c reading Image Header from IDE device OK
2661 -49 common/cmd_ide.c Image header has bad magic number 2661 -49 common/cmd_ide.c Image header has bad magic number
2662 49 common/cmd_ide.c Image header has correct magic number 2662 49 common/cmd_ide.c Image header has correct magic number
2663 -50 common/cmd_ide.c Image header has bad checksum 2663 -50 common/cmd_ide.c Image header has bad checksum
2664 50 common/cmd_ide.c Image header has correct checksum 2664 50 common/cmd_ide.c Image header has correct checksum
2665 -51 common/cmd_ide.c Error reading Image from IDE device 2665 -51 common/cmd_ide.c Error reading Image from IDE device
2666 51 common/cmd_ide.c reading Image from IDE device OK 2666 51 common/cmd_ide.c reading Image from IDE device OK
2667 52 common/cmd_nand.c before loading a Image from a NAND device 2667 52 common/cmd_nand.c before loading a Image from a NAND device
2668 -53 common/cmd_nand.c Bad usage of "nand" command 2668 -53 common/cmd_nand.c Bad usage of "nand" command
2669 53 common/cmd_nand.c correct usage of "nand" command 2669 53 common/cmd_nand.c correct usage of "nand" command
2670 -54 common/cmd_nand.c No boot device 2670 -54 common/cmd_nand.c No boot device
2671 54 common/cmd_nand.c boot device found 2671 54 common/cmd_nand.c boot device found
2672 -55 common/cmd_nand.c Unknown Chip ID on boot device 2672 -55 common/cmd_nand.c Unknown Chip ID on boot device
2673 55 common/cmd_nand.c correct chip ID found, device available 2673 55 common/cmd_nand.c correct chip ID found, device available
2674 -56 common/cmd_nand.c Error reading Image Header on boot device 2674 -56 common/cmd_nand.c Error reading Image Header on boot device
2675 56 common/cmd_nand.c reading Image Header from NAND device OK 2675 56 common/cmd_nand.c reading Image Header from NAND device OK
2676 -57 common/cmd_nand.c Image header has bad magic number 2676 -57 common/cmd_nand.c Image header has bad magic number
2677 57 common/cmd_nand.c Image header has correct magic number 2677 57 common/cmd_nand.c Image header has correct magic number
2678 -58 common/cmd_nand.c Error reading Image from NAND device 2678 -58 common/cmd_nand.c Error reading Image from NAND device
2679 58 common/cmd_nand.c reading Image from NAND device OK 2679 58 common/cmd_nand.c reading Image from NAND device OK
2680 2680
2681 -60 common/env_common.c Environment has a bad CRC, using default 2681 -60 common/env_common.c Environment has a bad CRC, using default
2682 2682
2683 64 net/eth.c starting with Ethernet configuration. 2683 64 net/eth.c starting with Ethernet configuration.
2684 -64 net/eth.c no Ethernet found. 2684 -64 net/eth.c no Ethernet found.
2685 65 net/eth.c Ethernet found. 2685 65 net/eth.c Ethernet found.
2686 2686
2687 -80 common/cmd_net.c usage wrong 2687 -80 common/cmd_net.c usage wrong
2688 80 common/cmd_net.c before calling NetLoop() 2688 80 common/cmd_net.c before calling NetLoop()
2689 -81 common/cmd_net.c some error in NetLoop() occurred 2689 -81 common/cmd_net.c some error in NetLoop() occurred
2690 81 common/cmd_net.c NetLoop() back without error 2690 81 common/cmd_net.c NetLoop() back without error
2691 -82 common/cmd_net.c size == 0 (File with size 0 loaded) 2691 -82 common/cmd_net.c size == 0 (File with size 0 loaded)
2692 82 common/cmd_net.c trying automatic boot 2692 82 common/cmd_net.c trying automatic boot
2693 83 common/cmd_net.c running "source" command 2693 83 common/cmd_net.c running "source" command
2694 -83 common/cmd_net.c some error in automatic boot or "source" command 2694 -83 common/cmd_net.c some error in automatic boot or "source" command
2695 84 common/cmd_net.c end without errors 2695 84 common/cmd_net.c end without errors
2696 2696
2697 FIT uImage format: 2697 FIT uImage format:
2698 2698
2699 Arg Where When 2699 Arg Where When
2700 100 common/cmd_bootm.c Kernel FIT Image has correct format 2700 100 common/cmd_bootm.c Kernel FIT Image has correct format
2701 -100 common/cmd_bootm.c Kernel FIT Image has incorrect format 2701 -100 common/cmd_bootm.c Kernel FIT Image has incorrect format
2702 101 common/cmd_bootm.c No Kernel subimage unit name, using configuration 2702 101 common/cmd_bootm.c No Kernel subimage unit name, using configuration
2703 -101 common/cmd_bootm.c Can't get configuration for kernel subimage 2703 -101 common/cmd_bootm.c Can't get configuration for kernel subimage
2704 102 common/cmd_bootm.c Kernel unit name specified 2704 102 common/cmd_bootm.c Kernel unit name specified
2705 -103 common/cmd_bootm.c Can't get kernel subimage node offset 2705 -103 common/cmd_bootm.c Can't get kernel subimage node offset
2706 103 common/cmd_bootm.c Found configuration node 2706 103 common/cmd_bootm.c Found configuration node
2707 104 common/cmd_bootm.c Got kernel subimage node offset 2707 104 common/cmd_bootm.c Got kernel subimage node offset
2708 -104 common/cmd_bootm.c Kernel subimage hash verification failed 2708 -104 common/cmd_bootm.c Kernel subimage hash verification failed
2709 105 common/cmd_bootm.c Kernel subimage hash verification OK 2709 105 common/cmd_bootm.c Kernel subimage hash verification OK
2710 -105 common/cmd_bootm.c Kernel subimage is for unsupported architecture 2710 -105 common/cmd_bootm.c Kernel subimage is for unsupported architecture
2711 106 common/cmd_bootm.c Architecture check OK 2711 106 common/cmd_bootm.c Architecture check OK
2712 -106 common/cmd_bootm.c Kernel subimage has wrong type 2712 -106 common/cmd_bootm.c Kernel subimage has wrong type
2713 107 common/cmd_bootm.c Kernel subimage type OK 2713 107 common/cmd_bootm.c Kernel subimage type OK
2714 -107 common/cmd_bootm.c Can't get kernel subimage data/size 2714 -107 common/cmd_bootm.c Can't get kernel subimage data/size
2715 108 common/cmd_bootm.c Got kernel subimage data/size 2715 108 common/cmd_bootm.c Got kernel subimage data/size
2716 -108 common/cmd_bootm.c Wrong image type (not legacy, FIT) 2716 -108 common/cmd_bootm.c Wrong image type (not legacy, FIT)
2717 -109 common/cmd_bootm.c Can't get kernel subimage type 2717 -109 common/cmd_bootm.c Can't get kernel subimage type
2718 -110 common/cmd_bootm.c Can't get kernel subimage comp 2718 -110 common/cmd_bootm.c Can't get kernel subimage comp
2719 -111 common/cmd_bootm.c Can't get kernel subimage os 2719 -111 common/cmd_bootm.c Can't get kernel subimage os
2720 -112 common/cmd_bootm.c Can't get kernel subimage load address 2720 -112 common/cmd_bootm.c Can't get kernel subimage load address
2721 -113 common/cmd_bootm.c Image uncompress/copy overwrite error 2721 -113 common/cmd_bootm.c Image uncompress/copy overwrite error
2722 2722
2723 120 common/image.c Start initial ramdisk verification 2723 120 common/image.c Start initial ramdisk verification
2724 -120 common/image.c Ramdisk FIT image has incorrect format 2724 -120 common/image.c Ramdisk FIT image has incorrect format
2725 121 common/image.c Ramdisk FIT image has correct format 2725 121 common/image.c Ramdisk FIT image has correct format
2726 122 common/image.c No ramdisk subimage unit name, using configuration 2726 122 common/image.c No ramdisk subimage unit name, using configuration
2727 -122 common/image.c Can't get configuration for ramdisk subimage 2727 -122 common/image.c Can't get configuration for ramdisk subimage
2728 123 common/image.c Ramdisk unit name specified 2728 123 common/image.c Ramdisk unit name specified
2729 -124 common/image.c Can't get ramdisk subimage node offset 2729 -124 common/image.c Can't get ramdisk subimage node offset
2730 125 common/image.c Got ramdisk subimage node offset 2730 125 common/image.c Got ramdisk subimage node offset
2731 -125 common/image.c Ramdisk subimage hash verification failed 2731 -125 common/image.c Ramdisk subimage hash verification failed
2732 126 common/image.c Ramdisk subimage hash verification OK 2732 126 common/image.c Ramdisk subimage hash verification OK
2733 -126 common/image.c Ramdisk subimage for unsupported architecture 2733 -126 common/image.c Ramdisk subimage for unsupported architecture
2734 127 common/image.c Architecture check OK 2734 127 common/image.c Architecture check OK
2735 -127 common/image.c Can't get ramdisk subimage data/size 2735 -127 common/image.c Can't get ramdisk subimage data/size
2736 128 common/image.c Got ramdisk subimage data/size 2736 128 common/image.c Got ramdisk subimage data/size
2737 129 common/image.c Can't get ramdisk load address 2737 129 common/image.c Can't get ramdisk load address
2738 -129 common/image.c Got ramdisk load address 2738 -129 common/image.c Got ramdisk load address
2739 2739
2740 -130 common/cmd_doc.c Incorrect FIT image format 2740 -130 common/cmd_doc.c Incorrect FIT image format
2741 131 common/cmd_doc.c FIT image format OK 2741 131 common/cmd_doc.c FIT image format OK
2742 2742
2743 -140 common/cmd_ide.c Incorrect FIT image format 2743 -140 common/cmd_ide.c Incorrect FIT image format
2744 141 common/cmd_ide.c FIT image format OK 2744 141 common/cmd_ide.c FIT image format OK
2745 2745
2746 -150 common/cmd_nand.c Incorrect FIT image format 2746 -150 common/cmd_nand.c Incorrect FIT image format
2747 151 common/cmd_nand.c FIT image format OK 2747 151 common/cmd_nand.c FIT image format OK
2748 2748
2749 - FIT image support: 2749 - FIT image support:
2750 CONFIG_FIT 2750 CONFIG_FIT
2751 Enable support for the FIT uImage format. 2751 Enable support for the FIT uImage format.
2752 2752
2753 CONFIG_FIT_BEST_MATCH 2753 CONFIG_FIT_BEST_MATCH
2754 When no configuration is explicitly selected, default to the 2754 When no configuration is explicitly selected, default to the
2755 one whose fdt's compatibility field best matches that of 2755 one whose fdt's compatibility field best matches that of
2756 U-Boot itself. A match is considered "best" if it matches the 2756 U-Boot itself. A match is considered "best" if it matches the
2757 most specific compatibility entry of U-Boot's fdt's root node. 2757 most specific compatibility entry of U-Boot's fdt's root node.
2758 The order of entries in the configuration's fdt is ignored. 2758 The order of entries in the configuration's fdt is ignored.
2759 2759
2760 - Standalone program support: 2760 - Standalone program support:
2761 CONFIG_STANDALONE_LOAD_ADDR 2761 CONFIG_STANDALONE_LOAD_ADDR
2762 2762
2763 This option defines a board specific value for the 2763 This option defines a board specific value for the
2764 address where standalone program gets loaded, thus 2764 address where standalone program gets loaded, thus
2765 overwriting the architecture dependent default 2765 overwriting the architecture dependent default
2766 settings. 2766 settings.
2767 2767
2768 - Frame Buffer Address: 2768 - Frame Buffer Address:
2769 CONFIG_FB_ADDR 2769 CONFIG_FB_ADDR
2770 2770
2771 Define CONFIG_FB_ADDR if you want to use specific 2771 Define CONFIG_FB_ADDR if you want to use specific
2772 address for frame buffer. This is typically the case 2772 address for frame buffer. This is typically the case
2773 when using a graphics controller has separate video 2773 when using a graphics controller has separate video
2774 memory. U-Boot will then place the frame buffer at 2774 memory. U-Boot will then place the frame buffer at
2775 the given address instead of dynamically reserving it 2775 the given address instead of dynamically reserving it
2776 in system RAM by calling lcd_setmem(), which grabs 2776 in system RAM by calling lcd_setmem(), which grabs
2777 the memory for the frame buffer depending on the 2777 the memory for the frame buffer depending on the
2778 configured panel size. 2778 configured panel size.
2779 2779
2780 Please see board_init_f function. 2780 Please see board_init_f function.
2781 2781
2782 - Automatic software updates via TFTP server 2782 - Automatic software updates via TFTP server
2783 CONFIG_UPDATE_TFTP 2783 CONFIG_UPDATE_TFTP
2784 CONFIG_UPDATE_TFTP_CNT_MAX 2784 CONFIG_UPDATE_TFTP_CNT_MAX
2785 CONFIG_UPDATE_TFTP_MSEC_MAX 2785 CONFIG_UPDATE_TFTP_MSEC_MAX
2786 2786
2787 These options enable and control the auto-update feature; 2787 These options enable and control the auto-update feature;
2788 for a more detailed description refer to doc/README.update. 2788 for a more detailed description refer to doc/README.update.
2789 2789
2790 - MTD Support (mtdparts command, UBI support) 2790 - MTD Support (mtdparts command, UBI support)
2791 CONFIG_MTD_DEVICE 2791 CONFIG_MTD_DEVICE
2792 2792
2793 Adds the MTD device infrastructure from the Linux kernel. 2793 Adds the MTD device infrastructure from the Linux kernel.
2794 Needed for mtdparts command support. 2794 Needed for mtdparts command support.
2795 2795
2796 CONFIG_MTD_PARTITIONS 2796 CONFIG_MTD_PARTITIONS
2797 2797
2798 Adds the MTD partitioning infrastructure from the Linux 2798 Adds the MTD partitioning infrastructure from the Linux
2799 kernel. Needed for UBI support. 2799 kernel. Needed for UBI support.
2800 2800
2801 - UBI support 2801 - UBI support
2802 CONFIG_CMD_UBI 2802 CONFIG_CMD_UBI
2803 2803
2804 Adds commands for interacting with MTD partitions formatted 2804 Adds commands for interacting with MTD partitions formatted
2805 with the UBI flash translation layer 2805 with the UBI flash translation layer
2806 2806
2807 Requires also defining CONFIG_RBTREE 2807 Requires also defining CONFIG_RBTREE
2808 2808
2809 CONFIG_UBI_SILENCE_MSG 2809 CONFIG_UBI_SILENCE_MSG
2810 2810
2811 Make the verbose messages from UBI stop printing. This leaves 2811 Make the verbose messages from UBI stop printing. This leaves
2812 warnings and errors enabled. 2812 warnings and errors enabled.
2813 2813
2814 - UBIFS support 2814 - UBIFS support
2815 CONFIG_CMD_UBIFS 2815 CONFIG_CMD_UBIFS
2816 2816
2817 Adds commands for interacting with UBI volumes formatted as 2817 Adds commands for interacting with UBI volumes formatted as
2818 UBIFS. UBIFS is read-only in u-boot. 2818 UBIFS. UBIFS is read-only in u-boot.
2819 2819
2820 Requires UBI support as well as CONFIG_LZO 2820 Requires UBI support as well as CONFIG_LZO
2821 2821
2822 CONFIG_UBIFS_SILENCE_MSG 2822 CONFIG_UBIFS_SILENCE_MSG
2823 2823
2824 Make the verbose messages from UBIFS stop printing. This leaves 2824 Make the verbose messages from UBIFS stop printing. This leaves
2825 warnings and errors enabled. 2825 warnings and errors enabled.
2826 2826
2827 - SPL framework 2827 - SPL framework
2828 CONFIG_SPL 2828 CONFIG_SPL
2829 Enable building of SPL globally. 2829 Enable building of SPL globally.
2830 2830
2831 CONFIG_SPL_LDSCRIPT 2831 CONFIG_SPL_LDSCRIPT
2832 LDSCRIPT for linking the SPL binary. 2832 LDSCRIPT for linking the SPL binary.
2833 2833
2834 CONFIG_SPL_MAX_FOOTPRINT 2834 CONFIG_SPL_MAX_FOOTPRINT
2835 Maximum size in memory allocated to the SPL, BSS included. 2835 Maximum size in memory allocated to the SPL, BSS included.
2836 When defined, the linker checks that the actual memory 2836 When defined, the linker checks that the actual memory
2837 used by SPL from _start to __bss_end does not exceed it. 2837 used by SPL from _start to __bss_end does not exceed it.
2838 CONFIG_SPL_MAX_FOOTPRINT and CONFIG_SPL_BSS_MAX_SIZE 2838 CONFIG_SPL_MAX_FOOTPRINT and CONFIG_SPL_BSS_MAX_SIZE
2839 must not be both defined at the same time. 2839 must not be both defined at the same time.
2840 2840
2841 CONFIG_SPL_MAX_SIZE 2841 CONFIG_SPL_MAX_SIZE
2842 Maximum size of the SPL image (text, data, rodata, and 2842 Maximum size of the SPL image (text, data, rodata, and
2843 linker lists sections), BSS excluded. 2843 linker lists sections), BSS excluded.
2844 When defined, the linker checks that the actual size does 2844 When defined, the linker checks that the actual size does
2845 not exceed it. 2845 not exceed it.
2846 2846
2847 CONFIG_SPL_TEXT_BASE 2847 CONFIG_SPL_TEXT_BASE
2848 TEXT_BASE for linking the SPL binary. 2848 TEXT_BASE for linking the SPL binary.
2849 2849
2850 CONFIG_SPL_RELOC_TEXT_BASE 2850 CONFIG_SPL_RELOC_TEXT_BASE
2851 Address to relocate to. If unspecified, this is equal to 2851 Address to relocate to. If unspecified, this is equal to
2852 CONFIG_SPL_TEXT_BASE (i.e. no relocation is done). 2852 CONFIG_SPL_TEXT_BASE (i.e. no relocation is done).
2853 2853
2854 CONFIG_SPL_BSS_START_ADDR 2854 CONFIG_SPL_BSS_START_ADDR
2855 Link address for the BSS within the SPL binary. 2855 Link address for the BSS within the SPL binary.
2856 2856
2857 CONFIG_SPL_BSS_MAX_SIZE 2857 CONFIG_SPL_BSS_MAX_SIZE
2858 Maximum size in memory allocated to the SPL BSS. 2858 Maximum size in memory allocated to the SPL BSS.
2859 When defined, the linker checks that the actual memory used 2859 When defined, the linker checks that the actual memory used
2860 by SPL from __bss_start to __bss_end does not exceed it. 2860 by SPL from __bss_start to __bss_end does not exceed it.
2861 CONFIG_SPL_MAX_FOOTPRINT and CONFIG_SPL_BSS_MAX_SIZE 2861 CONFIG_SPL_MAX_FOOTPRINT and CONFIG_SPL_BSS_MAX_SIZE
2862 must not be both defined at the same time. 2862 must not be both defined at the same time.
2863 2863
2864 CONFIG_SPL_STACK 2864 CONFIG_SPL_STACK
2865 Adress of the start of the stack SPL will use 2865 Adress of the start of the stack SPL will use
2866 2866
2867 CONFIG_SPL_RELOC_STACK 2867 CONFIG_SPL_RELOC_STACK
2868 Adress of the start of the stack SPL will use after 2868 Adress of the start of the stack SPL will use after
2869 relocation. If unspecified, this is equal to 2869 relocation. If unspecified, this is equal to
2870 CONFIG_SPL_STACK. 2870 CONFIG_SPL_STACK.
2871 2871
2872 CONFIG_SYS_SPL_MALLOC_START 2872 CONFIG_SYS_SPL_MALLOC_START
2873 Starting address of the malloc pool used in SPL. 2873 Starting address of the malloc pool used in SPL.
2874 2874
2875 CONFIG_SYS_SPL_MALLOC_SIZE 2875 CONFIG_SYS_SPL_MALLOC_SIZE
2876 The size of the malloc pool used in SPL. 2876 The size of the malloc pool used in SPL.
2877 2877
2878 CONFIG_SPL_FRAMEWORK 2878 CONFIG_SPL_FRAMEWORK
2879 Enable the SPL framework under common/. This framework 2879 Enable the SPL framework under common/. This framework
2880 supports MMC, NAND and YMODEM loading of U-Boot and NAND 2880 supports MMC, NAND and YMODEM loading of U-Boot and NAND
2881 NAND loading of the Linux Kernel. 2881 NAND loading of the Linux Kernel.
2882 2882
2883 CONFIG_SPL_DISPLAY_PRINT 2883 CONFIG_SPL_DISPLAY_PRINT
2884 For ARM, enable an optional function to print more information 2884 For ARM, enable an optional function to print more information
2885 about the running system. 2885 about the running system.
2886 2886
2887 CONFIG_SPL_INIT_MINIMAL 2887 CONFIG_SPL_INIT_MINIMAL
2888 Arch init code should be built for a very small image 2888 Arch init code should be built for a very small image
2889 2889
2890 CONFIG_SPL_LIBCOMMON_SUPPORT 2890 CONFIG_SPL_LIBCOMMON_SUPPORT
2891 Support for common/libcommon.o in SPL binary 2891 Support for common/libcommon.o in SPL binary
2892 2892
2893 CONFIG_SPL_LIBDISK_SUPPORT 2893 CONFIG_SPL_LIBDISK_SUPPORT
2894 Support for disk/libdisk.o in SPL binary 2894 Support for disk/libdisk.o in SPL binary
2895 2895
2896 CONFIG_SPL_I2C_SUPPORT 2896 CONFIG_SPL_I2C_SUPPORT
2897 Support for drivers/i2c/libi2c.o in SPL binary 2897 Support for drivers/i2c/libi2c.o in SPL binary
2898 2898
2899 CONFIG_SPL_GPIO_SUPPORT 2899 CONFIG_SPL_GPIO_SUPPORT
2900 Support for drivers/gpio/libgpio.o in SPL binary 2900 Support for drivers/gpio/libgpio.o in SPL binary
2901 2901
2902 CONFIG_SPL_MMC_SUPPORT 2902 CONFIG_SPL_MMC_SUPPORT
2903 Support for drivers/mmc/libmmc.o in SPL binary 2903 Support for drivers/mmc/libmmc.o in SPL binary
2904 2904
2905 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR, 2905 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR,
2906 CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS, 2906 CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS,
2907 CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION 2907 CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION
2908 Address, size and partition on the MMC to load U-Boot from 2908 Address, size and partition on the MMC to load U-Boot from
2909 when the MMC is being used in raw mode. 2909 when the MMC is being used in raw mode.
2910 2910
2911 CONFIG_SPL_FAT_SUPPORT 2911 CONFIG_SPL_FAT_SUPPORT
2912 Support for fs/fat/libfat.o in SPL binary 2912 Support for fs/fat/libfat.o in SPL binary
2913 2913
2914 CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME 2914 CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME
2915 Filename to read to load U-Boot when reading from FAT 2915 Filename to read to load U-Boot when reading from FAT
2916 2916
2917 CONFIG_SPL_MPC83XX_WAIT_FOR_NAND 2917 CONFIG_SPL_MPC83XX_WAIT_FOR_NAND
2918 Set this for NAND SPL on PPC mpc83xx targets, so that 2918 Set this for NAND SPL on PPC mpc83xx targets, so that
2919 start.S waits for the rest of the SPL to load before 2919 start.S waits for the rest of the SPL to load before
2920 continuing (the hardware starts execution after just 2920 continuing (the hardware starts execution after just
2921 loading the first page rather than the full 4K). 2921 loading the first page rather than the full 4K).
2922 2922
2923 CONFIG_SPL_NAND_BASE 2923 CONFIG_SPL_NAND_BASE
2924 Include nand_base.c in the SPL. Requires 2924 Include nand_base.c in the SPL. Requires
2925 CONFIG_SPL_NAND_DRIVERS. 2925 CONFIG_SPL_NAND_DRIVERS.
2926 2926
2927 CONFIG_SPL_NAND_DRIVERS 2927 CONFIG_SPL_NAND_DRIVERS
2928 SPL uses normal NAND drivers, not minimal drivers. 2928 SPL uses normal NAND drivers, not minimal drivers.
2929 2929
2930 CONFIG_SPL_NAND_ECC 2930 CONFIG_SPL_NAND_ECC
2931 Include standard software ECC in the SPL 2931 Include standard software ECC in the SPL
2932 2932
2933 CONFIG_SPL_NAND_SIMPLE 2933 CONFIG_SPL_NAND_SIMPLE
2934 Support for NAND boot using simple NAND drivers that 2934 Support for NAND boot using simple NAND drivers that
2935 expose the cmd_ctrl() interface. 2935 expose the cmd_ctrl() interface.
2936 2936
2937 CONFIG_SYS_NAND_5_ADDR_CYCLE, CONFIG_SYS_NAND_PAGE_COUNT, 2937 CONFIG_SYS_NAND_5_ADDR_CYCLE, CONFIG_SYS_NAND_PAGE_COUNT,
2938 CONFIG_SYS_NAND_PAGE_SIZE, CONFIG_SYS_NAND_OOBSIZE, 2938 CONFIG_SYS_NAND_PAGE_SIZE, CONFIG_SYS_NAND_OOBSIZE,
2939 CONFIG_SYS_NAND_BLOCK_SIZE, CONFIG_SYS_NAND_BAD_BLOCK_POS, 2939 CONFIG_SYS_NAND_BLOCK_SIZE, CONFIG_SYS_NAND_BAD_BLOCK_POS,
2940 CONFIG_SYS_NAND_ECCPOS, CONFIG_SYS_NAND_ECCSIZE, 2940 CONFIG_SYS_NAND_ECCPOS, CONFIG_SYS_NAND_ECCSIZE,
2941 CONFIG_SYS_NAND_ECCBYTES 2941 CONFIG_SYS_NAND_ECCBYTES
2942 Defines the size and behavior of the NAND that SPL uses 2942 Defines the size and behavior of the NAND that SPL uses
2943 to read U-Boot 2943 to read U-Boot
2944 2944
2945 CONFIG_SYS_NAND_U_BOOT_OFFS 2945 CONFIG_SYS_NAND_U_BOOT_OFFS
2946 Location in NAND to read U-Boot from 2946 Location in NAND to read U-Boot from
2947 2947
2948 CONFIG_SYS_NAND_U_BOOT_DST 2948 CONFIG_SYS_NAND_U_BOOT_DST
2949 Location in memory to load U-Boot to 2949 Location in memory to load U-Boot to
2950 2950
2951 CONFIG_SYS_NAND_U_BOOT_SIZE 2951 CONFIG_SYS_NAND_U_BOOT_SIZE
2952 Size of image to load 2952 Size of image to load
2953 2953
2954 CONFIG_SYS_NAND_U_BOOT_START 2954 CONFIG_SYS_NAND_U_BOOT_START
2955 Entry point in loaded image to jump to 2955 Entry point in loaded image to jump to
2956 2956
2957 CONFIG_SYS_NAND_HW_ECC_OOBFIRST 2957 CONFIG_SYS_NAND_HW_ECC_OOBFIRST
2958 Define this if you need to first read the OOB and then the 2958 Define this if you need to first read the OOB and then the
2959 data. This is used for example on davinci plattforms. 2959 data. This is used for example on davinci plattforms.
2960 2960
2961 CONFIG_SPL_OMAP3_ID_NAND 2961 CONFIG_SPL_OMAP3_ID_NAND
2962 Support for an OMAP3-specific set of functions to return the 2962 Support for an OMAP3-specific set of functions to return the
2963 ID and MFR of the first attached NAND chip, if present. 2963 ID and MFR of the first attached NAND chip, if present.
2964 2964
2965 CONFIG_SPL_SERIAL_SUPPORT 2965 CONFIG_SPL_SERIAL_SUPPORT
2966 Support for drivers/serial/libserial.o in SPL binary 2966 Support for drivers/serial/libserial.o in SPL binary
2967 2967
2968 CONFIG_SPL_SPI_FLASH_SUPPORT 2968 CONFIG_SPL_SPI_FLASH_SUPPORT
2969 Support for drivers/mtd/spi/libspi_flash.o in SPL binary 2969 Support for drivers/mtd/spi/libspi_flash.o in SPL binary
2970 2970
2971 CONFIG_SPL_SPI_SUPPORT 2971 CONFIG_SPL_SPI_SUPPORT
2972 Support for drivers/spi/libspi.o in SPL binary 2972 Support for drivers/spi/libspi.o in SPL binary
2973 2973
2974 CONFIG_SPL_RAM_DEVICE 2974 CONFIG_SPL_RAM_DEVICE
2975 Support for running image already present in ram, in SPL binary 2975 Support for running image already present in ram, in SPL binary
2976 2976
2977 CONFIG_SPL_LIBGENERIC_SUPPORT 2977 CONFIG_SPL_LIBGENERIC_SUPPORT
2978 Support for lib/libgeneric.o in SPL binary 2978 Support for lib/libgeneric.o in SPL binary
2979 2979
2980 CONFIG_SPL_PAD_TO 2980 CONFIG_SPL_PAD_TO
2981 Image offset to which the SPL should be padded before appending 2981 Image offset to which the SPL should be padded before appending
2982 the SPL payload. By default, this is defined as 2982 the SPL payload. By default, this is defined as
2983 CONFIG_SPL_MAX_SIZE, or 0 if CONFIG_SPL_MAX_SIZE is undefined. 2983 CONFIG_SPL_MAX_SIZE, or 0 if CONFIG_SPL_MAX_SIZE is undefined.
2984 CONFIG_SPL_PAD_TO must be either 0, meaning to append the SPL 2984 CONFIG_SPL_PAD_TO must be either 0, meaning to append the SPL
2985 payload without any padding, or >= CONFIG_SPL_MAX_SIZE. 2985 payload without any padding, or >= CONFIG_SPL_MAX_SIZE.
2986 2986
2987 CONFIG_SPL_TARGET 2987 CONFIG_SPL_TARGET
2988 Final target image containing SPL and payload. Some SPLs 2988 Final target image containing SPL and payload. Some SPLs
2989 use an arch-specific makefile fragment instead, for 2989 use an arch-specific makefile fragment instead, for
2990 example if more than one image needs to be produced. 2990 example if more than one image needs to be produced.
2991 2991
2992 Modem Support: 2992 Modem Support:
2993 -------------- 2993 --------------
2994 2994
2995 [so far only for SMDK2400 boards] 2995 [so far only for SMDK2400 boards]
2996 2996
2997 - Modem support enable: 2997 - Modem support enable:
2998 CONFIG_MODEM_SUPPORT 2998 CONFIG_MODEM_SUPPORT
2999 2999
3000 - RTS/CTS Flow control enable: 3000 - RTS/CTS Flow control enable:
3001 CONFIG_HWFLOW 3001 CONFIG_HWFLOW
3002 3002
3003 - Modem debug support: 3003 - Modem debug support:
3004 CONFIG_MODEM_SUPPORT_DEBUG 3004 CONFIG_MODEM_SUPPORT_DEBUG
3005 3005
3006 Enables debugging stuff (char screen[1024], dbg()) 3006 Enables debugging stuff (char screen[1024], dbg())
3007 for modem support. Useful only with BDI2000. 3007 for modem support. Useful only with BDI2000.
3008 3008
3009 - Interrupt support (PPC): 3009 - Interrupt support (PPC):
3010 3010
3011 There are common interrupt_init() and timer_interrupt() 3011 There are common interrupt_init() and timer_interrupt()
3012 for all PPC archs. interrupt_init() calls interrupt_init_cpu() 3012 for all PPC archs. interrupt_init() calls interrupt_init_cpu()
3013 for CPU specific initialization. interrupt_init_cpu() 3013 for CPU specific initialization. interrupt_init_cpu()
3014 should set decrementer_count to appropriate value. If 3014 should set decrementer_count to appropriate value. If
3015 CPU resets decrementer automatically after interrupt 3015 CPU resets decrementer automatically after interrupt
3016 (ppc4xx) it should set decrementer_count to zero. 3016 (ppc4xx) it should set decrementer_count to zero.
3017 timer_interrupt() calls timer_interrupt_cpu() for CPU 3017 timer_interrupt() calls timer_interrupt_cpu() for CPU
3018 specific handling. If board has watchdog / status_led 3018 specific handling. If board has watchdog / status_led
3019 / other_activity_monitor it works automatically from 3019 / other_activity_monitor it works automatically from
3020 general timer_interrupt(). 3020 general timer_interrupt().
3021 3021
3022 - General: 3022 - General:
3023 3023
3024 In the target system modem support is enabled when a 3024 In the target system modem support is enabled when a
3025 specific key (key combination) is pressed during 3025 specific key (key combination) is pressed during
3026 power-on. Otherwise U-Boot will boot normally 3026 power-on. Otherwise U-Boot will boot normally
3027 (autoboot). The key_pressed() function is called from 3027 (autoboot). The key_pressed() function is called from
3028 board_init(). Currently key_pressed() is a dummy 3028 board_init(). Currently key_pressed() is a dummy
3029 function, returning 1 and thus enabling modem 3029 function, returning 1 and thus enabling modem
3030 initialization. 3030 initialization.
3031 3031
3032 If there are no modem init strings in the 3032 If there are no modem init strings in the
3033 environment, U-Boot proceed to autoboot; the 3033 environment, U-Boot proceed to autoboot; the
3034 previous output (banner, info printfs) will be 3034 previous output (banner, info printfs) will be
3035 suppressed, though. 3035 suppressed, though.
3036 3036
3037 See also: doc/README.Modem 3037 See also: doc/README.Modem
3038 3038
3039 Board initialization settings: 3039 Board initialization settings:
3040 ------------------------------ 3040 ------------------------------
3041 3041
3042 During Initialization u-boot calls a number of board specific functions 3042 During Initialization u-boot calls a number of board specific functions
3043 to allow the preparation of board specific prerequisites, e.g. pin setup 3043 to allow the preparation of board specific prerequisites, e.g. pin setup
3044 before drivers are initialized. To enable these callbacks the 3044 before drivers are initialized. To enable these callbacks the
3045 following configuration macros have to be defined. Currently this is 3045 following configuration macros have to be defined. Currently this is
3046 architecture specific, so please check arch/your_architecture/lib/board.c 3046 architecture specific, so please check arch/your_architecture/lib/board.c
3047 typically in board_init_f() and board_init_r(). 3047 typically in board_init_f() and board_init_r().
3048 3048
3049 - CONFIG_BOARD_EARLY_INIT_F: Call board_early_init_f() 3049 - CONFIG_BOARD_EARLY_INIT_F: Call board_early_init_f()
3050 - CONFIG_BOARD_EARLY_INIT_R: Call board_early_init_r() 3050 - CONFIG_BOARD_EARLY_INIT_R: Call board_early_init_r()
3051 - CONFIG_BOARD_LATE_INIT: Call board_late_init() 3051 - CONFIG_BOARD_LATE_INIT: Call board_late_init()
3052 - CONFIG_BOARD_POSTCLK_INIT: Call board_postclk_init() 3052 - CONFIG_BOARD_POSTCLK_INIT: Call board_postclk_init()
3053 3053
3054 Configuration Settings: 3054 Configuration Settings:
3055 ----------------------- 3055 -----------------------
3056 3056
3057 - CONFIG_SYS_LONGHELP: Defined when you want long help messages included; 3057 - CONFIG_SYS_LONGHELP: Defined when you want long help messages included;
3058 undefine this when you're short of memory. 3058 undefine this when you're short of memory.
3059 3059
3060 - CONFIG_SYS_HELP_CMD_WIDTH: Defined when you want to override the default 3060 - CONFIG_SYS_HELP_CMD_WIDTH: Defined when you want to override the default
3061 width of the commands listed in the 'help' command output. 3061 width of the commands listed in the 'help' command output.
3062 3062
3063 - CONFIG_SYS_PROMPT: This is what U-Boot prints on the console to 3063 - CONFIG_SYS_PROMPT: This is what U-Boot prints on the console to
3064 prompt for user input. 3064 prompt for user input.
3065 3065
3066 - CONFIG_SYS_CBSIZE: Buffer size for input from the Console 3066 - CONFIG_SYS_CBSIZE: Buffer size for input from the Console
3067 3067
3068 - CONFIG_SYS_PBSIZE: Buffer size for Console output 3068 - CONFIG_SYS_PBSIZE: Buffer size for Console output
3069 3069
3070 - CONFIG_SYS_MAXARGS: max. Number of arguments accepted for monitor commands 3070 - CONFIG_SYS_MAXARGS: max. Number of arguments accepted for monitor commands
3071 3071
3072 - CONFIG_SYS_BARGSIZE: Buffer size for Boot Arguments which are passed to 3072 - CONFIG_SYS_BARGSIZE: Buffer size for Boot Arguments which are passed to
3073 the application (usually a Linux kernel) when it is 3073 the application (usually a Linux kernel) when it is
3074 booted 3074 booted
3075 3075
3076 - CONFIG_SYS_BAUDRATE_TABLE: 3076 - CONFIG_SYS_BAUDRATE_TABLE:
3077 List of legal baudrate settings for this board. 3077 List of legal baudrate settings for this board.
3078 3078
3079 - CONFIG_SYS_CONSOLE_INFO_QUIET 3079 - CONFIG_SYS_CONSOLE_INFO_QUIET
3080 Suppress display of console information at boot. 3080 Suppress display of console information at boot.
3081 3081
3082 - CONFIG_SYS_CONSOLE_IS_IN_ENV 3082 - CONFIG_SYS_CONSOLE_IS_IN_ENV
3083 If the board specific function 3083 If the board specific function
3084 extern int overwrite_console (void); 3084 extern int overwrite_console (void);
3085 returns 1, the stdin, stderr and stdout are switched to the 3085 returns 1, the stdin, stderr and stdout are switched to the
3086 serial port, else the settings in the environment are used. 3086 serial port, else the settings in the environment are used.
3087 3087
3088 - CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE 3088 - CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
3089 Enable the call to overwrite_console(). 3089 Enable the call to overwrite_console().
3090 3090
3091 - CONFIG_SYS_CONSOLE_ENV_OVERWRITE 3091 - CONFIG_SYS_CONSOLE_ENV_OVERWRITE
3092 Enable overwrite of previous console environment settings. 3092 Enable overwrite of previous console environment settings.
3093 3093
3094 - CONFIG_SYS_MEMTEST_START, CONFIG_SYS_MEMTEST_END: 3094 - CONFIG_SYS_MEMTEST_START, CONFIG_SYS_MEMTEST_END:
3095 Begin and End addresses of the area used by the 3095 Begin and End addresses of the area used by the
3096 simple memory test. 3096 simple memory test.
3097 3097
3098 - CONFIG_SYS_ALT_MEMTEST: 3098 - CONFIG_SYS_ALT_MEMTEST:
3099 Enable an alternate, more extensive memory test. 3099 Enable an alternate, more extensive memory test.
3100 3100
3101 - CONFIG_SYS_MEMTEST_SCRATCH: 3101 - CONFIG_SYS_MEMTEST_SCRATCH:
3102 Scratch address used by the alternate memory test 3102 Scratch address used by the alternate memory test
3103 You only need to set this if address zero isn't writeable 3103 You only need to set this if address zero isn't writeable
3104 3104
3105 - CONFIG_SYS_MEM_TOP_HIDE (PPC only): 3105 - CONFIG_SYS_MEM_TOP_HIDE (PPC only):
3106 If CONFIG_SYS_MEM_TOP_HIDE is defined in the board config header, 3106 If CONFIG_SYS_MEM_TOP_HIDE is defined in the board config header,
3107 this specified memory area will get subtracted from the top 3107 this specified memory area will get subtracted from the top
3108 (end) of RAM and won't get "touched" at all by U-Boot. By 3108 (end) of RAM and won't get "touched" at all by U-Boot. By
3109 fixing up gd->ram_size the Linux kernel should gets passed 3109 fixing up gd->ram_size the Linux kernel should gets passed
3110 the now "corrected" memory size and won't touch it either. 3110 the now "corrected" memory size and won't touch it either.
3111 This should work for arch/ppc and arch/powerpc. Only Linux 3111 This should work for arch/ppc and arch/powerpc. Only Linux
3112 board ports in arch/powerpc with bootwrapper support that 3112 board ports in arch/powerpc with bootwrapper support that
3113 recalculate the memory size from the SDRAM controller setup 3113 recalculate the memory size from the SDRAM controller setup
3114 will have to get fixed in Linux additionally. 3114 will have to get fixed in Linux additionally.
3115 3115
3116 This option can be used as a workaround for the 440EPx/GRx 3116 This option can be used as a workaround for the 440EPx/GRx
3117 CHIP 11 errata where the last 256 bytes in SDRAM shouldn't 3117 CHIP 11 errata where the last 256 bytes in SDRAM shouldn't
3118 be touched. 3118 be touched.
3119 3119
3120 WARNING: Please make sure that this value is a multiple of 3120 WARNING: Please make sure that this value is a multiple of
3121 the Linux page size (normally 4k). If this is not the case, 3121 the Linux page size (normally 4k). If this is not the case,
3122 then the end address of the Linux memory will be located at a 3122 then the end address of the Linux memory will be located at a
3123 non page size aligned address and this could cause major 3123 non page size aligned address and this could cause major
3124 problems. 3124 problems.
3125 3125
3126 - CONFIG_SYS_LOADS_BAUD_CHANGE: 3126 - CONFIG_SYS_LOADS_BAUD_CHANGE:
3127 Enable temporary baudrate change while serial download 3127 Enable temporary baudrate change while serial download
3128 3128
3129 - CONFIG_SYS_SDRAM_BASE: 3129 - CONFIG_SYS_SDRAM_BASE:
3130 Physical start address of SDRAM. _Must_ be 0 here. 3130 Physical start address of SDRAM. _Must_ be 0 here.
3131 3131
3132 - CONFIG_SYS_MBIO_BASE: 3132 - CONFIG_SYS_MBIO_BASE:
3133 Physical start address of Motherboard I/O (if using a 3133 Physical start address of Motherboard I/O (if using a
3134 Cogent motherboard) 3134 Cogent motherboard)
3135 3135
3136 - CONFIG_SYS_FLASH_BASE: 3136 - CONFIG_SYS_FLASH_BASE:
3137 Physical start address of Flash memory. 3137 Physical start address of Flash memory.
3138 3138
3139 - CONFIG_SYS_MONITOR_BASE: 3139 - CONFIG_SYS_MONITOR_BASE:
3140 Physical start address of boot monitor code (set by 3140 Physical start address of boot monitor code (set by
3141 make config files to be same as the text base address 3141 make config files to be same as the text base address
3142 (CONFIG_SYS_TEXT_BASE) used when linking) - same as 3142 (CONFIG_SYS_TEXT_BASE) used when linking) - same as
3143 CONFIG_SYS_FLASH_BASE when booting from flash. 3143 CONFIG_SYS_FLASH_BASE when booting from flash.
3144 3144
3145 - CONFIG_SYS_MONITOR_LEN: 3145 - CONFIG_SYS_MONITOR_LEN:
3146 Size of memory reserved for monitor code, used to 3146 Size of memory reserved for monitor code, used to
3147 determine _at_compile_time_ (!) if the environment is 3147 determine _at_compile_time_ (!) if the environment is
3148 embedded within the U-Boot image, or in a separate 3148 embedded within the U-Boot image, or in a separate
3149 flash sector. 3149 flash sector.
3150 3150
3151 - CONFIG_SYS_MALLOC_LEN: 3151 - CONFIG_SYS_MALLOC_LEN:
3152 Size of DRAM reserved for malloc() use. 3152 Size of DRAM reserved for malloc() use.
3153 3153
3154 - CONFIG_SYS_BOOTM_LEN: 3154 - CONFIG_SYS_BOOTM_LEN:
3155 Normally compressed uImages are limited to an 3155 Normally compressed uImages are limited to an
3156 uncompressed size of 8 MBytes. If this is not enough, 3156 uncompressed size of 8 MBytes. If this is not enough,
3157 you can define CONFIG_SYS_BOOTM_LEN in your board config file 3157 you can define CONFIG_SYS_BOOTM_LEN in your board config file
3158 to adjust this setting to your needs. 3158 to adjust this setting to your needs.
3159 3159
3160 - CONFIG_SYS_BOOTMAPSZ: 3160 - CONFIG_SYS_BOOTMAPSZ:
3161 Maximum size of memory mapped by the startup code of 3161 Maximum size of memory mapped by the startup code of
3162 the Linux kernel; all data that must be processed by 3162 the Linux kernel; all data that must be processed by
3163 the Linux kernel (bd_info, boot arguments, FDT blob if 3163 the Linux kernel (bd_info, boot arguments, FDT blob if
3164 used) must be put below this limit, unless "bootm_low" 3164 used) must be put below this limit, unless "bootm_low"
3165 enviroment variable is defined and non-zero. In such case 3165 enviroment variable is defined and non-zero. In such case
3166 all data for the Linux kernel must be between "bootm_low" 3166 all data for the Linux kernel must be between "bootm_low"
3167 and "bootm_low" + CONFIG_SYS_BOOTMAPSZ. The environment 3167 and "bootm_low" + CONFIG_SYS_BOOTMAPSZ. The environment
3168 variable "bootm_mapsize" will override the value of 3168 variable "bootm_mapsize" will override the value of
3169 CONFIG_SYS_BOOTMAPSZ. If CONFIG_SYS_BOOTMAPSZ is undefined, 3169 CONFIG_SYS_BOOTMAPSZ. If CONFIG_SYS_BOOTMAPSZ is undefined,
3170 then the value in "bootm_size" will be used instead. 3170 then the value in "bootm_size" will be used instead.
3171 3171
3172 - CONFIG_SYS_BOOT_RAMDISK_HIGH: 3172 - CONFIG_SYS_BOOT_RAMDISK_HIGH:
3173 Enable initrd_high functionality. If defined then the 3173 Enable initrd_high functionality. If defined then the
3174 initrd_high feature is enabled and the bootm ramdisk subcommand 3174 initrd_high feature is enabled and the bootm ramdisk subcommand
3175 is enabled. 3175 is enabled.
3176 3176
3177 - CONFIG_SYS_BOOT_GET_CMDLINE: 3177 - CONFIG_SYS_BOOT_GET_CMDLINE:
3178 Enables allocating and saving kernel cmdline in space between 3178 Enables allocating and saving kernel cmdline in space between
3179 "bootm_low" and "bootm_low" + BOOTMAPSZ. 3179 "bootm_low" and "bootm_low" + BOOTMAPSZ.
3180 3180
3181 - CONFIG_SYS_BOOT_GET_KBD: 3181 - CONFIG_SYS_BOOT_GET_KBD:
3182 Enables allocating and saving a kernel copy of the bd_info in 3182 Enables allocating and saving a kernel copy of the bd_info in
3183 space between "bootm_low" and "bootm_low" + BOOTMAPSZ. 3183 space between "bootm_low" and "bootm_low" + BOOTMAPSZ.
3184 3184
3185 - CONFIG_SYS_MAX_FLASH_BANKS: 3185 - CONFIG_SYS_MAX_FLASH_BANKS:
3186 Max number of Flash memory banks 3186 Max number of Flash memory banks
3187 3187
3188 - CONFIG_SYS_MAX_FLASH_SECT: 3188 - CONFIG_SYS_MAX_FLASH_SECT:
3189 Max number of sectors on a Flash chip 3189 Max number of sectors on a Flash chip
3190 3190
3191 - CONFIG_SYS_FLASH_ERASE_TOUT: 3191 - CONFIG_SYS_FLASH_ERASE_TOUT:
3192 Timeout for Flash erase operations (in ms) 3192 Timeout for Flash erase operations (in ms)
3193 3193
3194 - CONFIG_SYS_FLASH_WRITE_TOUT: 3194 - CONFIG_SYS_FLASH_WRITE_TOUT:
3195 Timeout for Flash write operations (in ms) 3195 Timeout for Flash write operations (in ms)
3196 3196
3197 - CONFIG_SYS_FLASH_LOCK_TOUT 3197 - CONFIG_SYS_FLASH_LOCK_TOUT
3198 Timeout for Flash set sector lock bit operation (in ms) 3198 Timeout for Flash set sector lock bit operation (in ms)
3199 3199
3200 - CONFIG_SYS_FLASH_UNLOCK_TOUT 3200 - CONFIG_SYS_FLASH_UNLOCK_TOUT
3201 Timeout for Flash clear lock bits operation (in ms) 3201 Timeout for Flash clear lock bits operation (in ms)
3202 3202
3203 - CONFIG_SYS_FLASH_PROTECTION 3203 - CONFIG_SYS_FLASH_PROTECTION
3204 If defined, hardware flash sectors protection is used 3204 If defined, hardware flash sectors protection is used
3205 instead of U-Boot software protection. 3205 instead of U-Boot software protection.
3206 3206
3207 - CONFIG_SYS_DIRECT_FLASH_TFTP: 3207 - CONFIG_SYS_DIRECT_FLASH_TFTP:
3208 3208
3209 Enable TFTP transfers directly to flash memory; 3209 Enable TFTP transfers directly to flash memory;
3210 without this option such a download has to be 3210 without this option such a download has to be
3211 performed in two steps: (1) download to RAM, and (2) 3211 performed in two steps: (1) download to RAM, and (2)
3212 copy from RAM to flash. 3212 copy from RAM to flash.
3213 3213
3214 The two-step approach is usually more reliable, since 3214 The two-step approach is usually more reliable, since
3215 you can check if the download worked before you erase 3215 you can check if the download worked before you erase
3216 the flash, but in some situations (when system RAM is 3216 the flash, but in some situations (when system RAM is
3217 too limited to allow for a temporary copy of the 3217 too limited to allow for a temporary copy of the
3218 downloaded image) this option may be very useful. 3218 downloaded image) this option may be very useful.
3219 3219
3220 - CONFIG_SYS_FLASH_CFI: 3220 - CONFIG_SYS_FLASH_CFI:
3221 Define if the flash driver uses extra elements in the 3221 Define if the flash driver uses extra elements in the
3222 common flash structure for storing flash geometry. 3222 common flash structure for storing flash geometry.
3223 3223
3224 - CONFIG_FLASH_CFI_DRIVER 3224 - CONFIG_FLASH_CFI_DRIVER
3225 This option also enables the building of the cfi_flash driver 3225 This option also enables the building of the cfi_flash driver
3226 in the drivers directory 3226 in the drivers directory
3227 3227
3228 - CONFIG_FLASH_CFI_MTD 3228 - CONFIG_FLASH_CFI_MTD
3229 This option enables the building of the cfi_mtd driver 3229 This option enables the building of the cfi_mtd driver
3230 in the drivers directory. The driver exports CFI flash 3230 in the drivers directory. The driver exports CFI flash
3231 to the MTD layer. 3231 to the MTD layer.
3232 3232
3233 - CONFIG_SYS_FLASH_USE_BUFFER_WRITE 3233 - CONFIG_SYS_FLASH_USE_BUFFER_WRITE
3234 Use buffered writes to flash. 3234 Use buffered writes to flash.
3235 3235
3236 - CONFIG_FLASH_SPANSION_S29WS_N 3236 - CONFIG_FLASH_SPANSION_S29WS_N
3237 s29ws-n MirrorBit flash has non-standard addresses for buffered 3237 s29ws-n MirrorBit flash has non-standard addresses for buffered
3238 write commands. 3238 write commands.
3239 3239
3240 - CONFIG_SYS_FLASH_QUIET_TEST 3240 - CONFIG_SYS_FLASH_QUIET_TEST
3241 If this option is defined, the common CFI flash doesn't 3241 If this option is defined, the common CFI flash doesn't
3242 print it's warning upon not recognized FLASH banks. This 3242 print it's warning upon not recognized FLASH banks. This
3243 is useful, if some of the configured banks are only 3243 is useful, if some of the configured banks are only
3244 optionally available. 3244 optionally available.
3245 3245
3246 - CONFIG_FLASH_SHOW_PROGRESS 3246 - CONFIG_FLASH_SHOW_PROGRESS
3247 If defined (must be an integer), print out countdown 3247 If defined (must be an integer), print out countdown
3248 digits and dots. Recommended value: 45 (9..1) for 80 3248 digits and dots. Recommended value: 45 (9..1) for 80
3249 column displays, 15 (3..1) for 40 column displays. 3249 column displays, 15 (3..1) for 40 column displays.
3250 3250
3251 - CONFIG_SYS_RX_ETH_BUFFER: 3251 - CONFIG_SYS_RX_ETH_BUFFER:
3252 Defines the number of Ethernet receive buffers. On some 3252 Defines the number of Ethernet receive buffers. On some
3253 Ethernet controllers it is recommended to set this value 3253 Ethernet controllers it is recommended to set this value
3254 to 8 or even higher (EEPRO100 or 405 EMAC), since all 3254 to 8 or even higher (EEPRO100 or 405 EMAC), since all
3255 buffers can be full shortly after enabling the interface 3255 buffers can be full shortly after enabling the interface
3256 on high Ethernet traffic. 3256 on high Ethernet traffic.
3257 Defaults to 4 if not defined. 3257 Defaults to 4 if not defined.
3258 3258
3259 - CONFIG_ENV_MAX_ENTRIES 3259 - CONFIG_ENV_MAX_ENTRIES
3260 3260
3261 Maximum number of entries in the hash table that is used 3261 Maximum number of entries in the hash table that is used
3262 internally to store the environment settings. The default 3262 internally to store the environment settings. The default
3263 setting is supposed to be generous and should work in most 3263 setting is supposed to be generous and should work in most
3264 cases. This setting can be used to tune behaviour; see 3264 cases. This setting can be used to tune behaviour; see
3265 lib/hashtable.c for details. 3265 lib/hashtable.c for details.
3266 3266
3267 - CONFIG_ENV_FLAGS_LIST_DEFAULT 3267 - CONFIG_ENV_FLAGS_LIST_DEFAULT
3268 - CONFIG_ENV_FLAGS_LIST_STATIC 3268 - CONFIG_ENV_FLAGS_LIST_STATIC
3269 Enable validation of the values given to enviroment variables when 3269 Enable validation of the values given to enviroment variables when
3270 calling env set. Variables can be restricted to only decimal, 3270 calling env set. Variables can be restricted to only decimal,
3271 hexadecimal, or boolean. If CONFIG_CMD_NET is also defined, 3271 hexadecimal, or boolean. If CONFIG_CMD_NET is also defined,
3272 the variables can also be restricted to IP address or MAC address. 3272 the variables can also be restricted to IP address or MAC address.
3273 3273
3274 The format of the list is: 3274 The format of the list is:
3275 type_attribute = [s|d|x|b|i|m] 3275 type_attribute = [s|d|x|b|i|m]
3276 access_atribute = [a|r|o|c] 3276 access_atribute = [a|r|o|c]
3277 attributes = type_attribute[access_atribute] 3277 attributes = type_attribute[access_atribute]
3278 entry = variable_name[:attributes] 3278 entry = variable_name[:attributes]
3279 list = entry[,list] 3279 list = entry[,list]
3280 3280
3281 The type attributes are: 3281 The type attributes are:
3282 s - String (default) 3282 s - String (default)
3283 d - Decimal 3283 d - Decimal
3284 x - Hexadecimal 3284 x - Hexadecimal
3285 b - Boolean ([1yYtT|0nNfF]) 3285 b - Boolean ([1yYtT|0nNfF])
3286 i - IP address 3286 i - IP address
3287 m - MAC address 3287 m - MAC address
3288 3288
3289 The access attributes are: 3289 The access attributes are:
3290 a - Any (default) 3290 a - Any (default)
3291 r - Read-only 3291 r - Read-only
3292 o - Write-once 3292 o - Write-once
3293 c - Change-default 3293 c - Change-default
3294 3294
3295 - CONFIG_ENV_FLAGS_LIST_DEFAULT 3295 - CONFIG_ENV_FLAGS_LIST_DEFAULT
3296 Define this to a list (string) to define the ".flags" 3296 Define this to a list (string) to define the ".flags"
3297 envirnoment variable in the default or embedded environment. 3297 envirnoment variable in the default or embedded environment.
3298 3298
3299 - CONFIG_ENV_FLAGS_LIST_STATIC 3299 - CONFIG_ENV_FLAGS_LIST_STATIC
3300 Define this to a list (string) to define validation that 3300 Define this to a list (string) to define validation that
3301 should be done if an entry is not found in the ".flags" 3301 should be done if an entry is not found in the ".flags"
3302 environment variable. To override a setting in the static 3302 environment variable. To override a setting in the static
3303 list, simply add an entry for the same variable name to the 3303 list, simply add an entry for the same variable name to the
3304 ".flags" variable. 3304 ".flags" variable.
3305 3305
3306 - CONFIG_ENV_ACCESS_IGNORE_FORCE 3306 - CONFIG_ENV_ACCESS_IGNORE_FORCE
3307 If defined, don't allow the -f switch to env set override variable 3307 If defined, don't allow the -f switch to env set override variable
3308 access flags. 3308 access flags.
3309 3309
3310 - CONFIG_SYS_GENERIC_BOARD 3310 - CONFIG_SYS_GENERIC_BOARD
3311 This selects the architecture-generic board system instead of the 3311 This selects the architecture-generic board system instead of the
3312 architecture-specific board files. It is intended to move boards 3312 architecture-specific board files. It is intended to move boards
3313 to this new framework over time. Defining this will disable the 3313 to this new framework over time. Defining this will disable the
3314 arch/foo/lib/board.c file and use common/board_f.c and 3314 arch/foo/lib/board.c file and use common/board_f.c and
3315 common/board_r.c instead. To use this option your architecture 3315 common/board_r.c instead. To use this option your architecture
3316 must support it (i.e. must define __HAVE_ARCH_GENERIC_BOARD in 3316 must support it (i.e. must define __HAVE_ARCH_GENERIC_BOARD in
3317 its config.mk file). If you find problems enabling this option on 3317 its config.mk file). If you find problems enabling this option on
3318 your board please report the problem and send patches! 3318 your board please report the problem and send patches!
3319 3319
3320 - CONFIG_SYS_SYM_OFFSETS 3320 - CONFIG_SYS_SYM_OFFSETS
3321 This is set by architectures that use offsets for link symbols 3321 This is set by architectures that use offsets for link symbols
3322 instead of absolute values. So bss_start is obtained using an 3322 instead of absolute values. So bss_start is obtained using an
3323 offset _bss_start_ofs from CONFIG_SYS_TEXT_BASE, rather than 3323 offset _bss_start_ofs from CONFIG_SYS_TEXT_BASE, rather than
3324 directly. You should not need to touch this setting. 3324 directly. You should not need to touch this setting.
3325 3325
3326 - CONFIG_OMAP_PLATFORM_RESET_TIME_MAX_USEC (OMAP only)
3327 This is set by OMAP boards for the max time that reset should
3328 be asserted. See doc/README.omap-reset-time for details on how
3329 the value can be calulated on a given board.
3326 3330
3327 The following definitions that deal with the placement and management 3331 The following definitions that deal with the placement and management
3328 of environment data (variable area); in general, we support the 3332 of environment data (variable area); in general, we support the
3329 following configurations: 3333 following configurations:
3330 3334
3331 - CONFIG_BUILD_ENVCRC: 3335 - CONFIG_BUILD_ENVCRC:
3332 3336
3333 Builds up envcrc with the target environment so that external utils 3337 Builds up envcrc with the target environment so that external utils
3334 may easily extract it and embed it in final U-Boot images. 3338 may easily extract it and embed it in final U-Boot images.
3335 3339
3336 - CONFIG_ENV_IS_IN_FLASH: 3340 - CONFIG_ENV_IS_IN_FLASH:
3337 3341
3338 Define this if the environment is in flash memory. 3342 Define this if the environment is in flash memory.
3339 3343
3340 a) The environment occupies one whole flash sector, which is 3344 a) The environment occupies one whole flash sector, which is
3341 "embedded" in the text segment with the U-Boot code. This 3345 "embedded" in the text segment with the U-Boot code. This
3342 happens usually with "bottom boot sector" or "top boot 3346 happens usually with "bottom boot sector" or "top boot
3343 sector" type flash chips, which have several smaller 3347 sector" type flash chips, which have several smaller
3344 sectors at the start or the end. For instance, such a 3348 sectors at the start or the end. For instance, such a
3345 layout can have sector sizes of 8, 2x4, 16, Nx32 kB. In 3349 layout can have sector sizes of 8, 2x4, 16, Nx32 kB. In
3346 such a case you would place the environment in one of the 3350 such a case you would place the environment in one of the
3347 4 kB sectors - with U-Boot code before and after it. With 3351 4 kB sectors - with U-Boot code before and after it. With
3348 "top boot sector" type flash chips, you would put the 3352 "top boot sector" type flash chips, you would put the
3349 environment in one of the last sectors, leaving a gap 3353 environment in one of the last sectors, leaving a gap
3350 between U-Boot and the environment. 3354 between U-Boot and the environment.
3351 3355
3352 - CONFIG_ENV_OFFSET: 3356 - CONFIG_ENV_OFFSET:
3353 3357
3354 Offset of environment data (variable area) to the 3358 Offset of environment data (variable area) to the
3355 beginning of flash memory; for instance, with bottom boot 3359 beginning of flash memory; for instance, with bottom boot
3356 type flash chips the second sector can be used: the offset 3360 type flash chips the second sector can be used: the offset
3357 for this sector is given here. 3361 for this sector is given here.
3358 3362
3359 CONFIG_ENV_OFFSET is used relative to CONFIG_SYS_FLASH_BASE. 3363 CONFIG_ENV_OFFSET is used relative to CONFIG_SYS_FLASH_BASE.
3360 3364
3361 - CONFIG_ENV_ADDR: 3365 - CONFIG_ENV_ADDR:
3362 3366
3363 This is just another way to specify the start address of 3367 This is just another way to specify the start address of
3364 the flash sector containing the environment (instead of 3368 the flash sector containing the environment (instead of
3365 CONFIG_ENV_OFFSET). 3369 CONFIG_ENV_OFFSET).
3366 3370
3367 - CONFIG_ENV_SECT_SIZE: 3371 - CONFIG_ENV_SECT_SIZE:
3368 3372
3369 Size of the sector containing the environment. 3373 Size of the sector containing the environment.
3370 3374
3371 3375
3372 b) Sometimes flash chips have few, equal sized, BIG sectors. 3376 b) Sometimes flash chips have few, equal sized, BIG sectors.
3373 In such a case you don't want to spend a whole sector for 3377 In such a case you don't want to spend a whole sector for
3374 the environment. 3378 the environment.
3375 3379
3376 - CONFIG_ENV_SIZE: 3380 - CONFIG_ENV_SIZE:
3377 3381
3378 If you use this in combination with CONFIG_ENV_IS_IN_FLASH 3382 If you use this in combination with CONFIG_ENV_IS_IN_FLASH
3379 and CONFIG_ENV_SECT_SIZE, you can specify to use only a part 3383 and CONFIG_ENV_SECT_SIZE, you can specify to use only a part
3380 of this flash sector for the environment. This saves 3384 of this flash sector for the environment. This saves
3381 memory for the RAM copy of the environment. 3385 memory for the RAM copy of the environment.
3382 3386
3383 It may also save flash memory if you decide to use this 3387 It may also save flash memory if you decide to use this
3384 when your environment is "embedded" within U-Boot code, 3388 when your environment is "embedded" within U-Boot code,
3385 since then the remainder of the flash sector could be used 3389 since then the remainder of the flash sector could be used
3386 for U-Boot code. It should be pointed out that this is 3390 for U-Boot code. It should be pointed out that this is
3387 STRONGLY DISCOURAGED from a robustness point of view: 3391 STRONGLY DISCOURAGED from a robustness point of view:
3388 updating the environment in flash makes it always 3392 updating the environment in flash makes it always
3389 necessary to erase the WHOLE sector. If something goes 3393 necessary to erase the WHOLE sector. If something goes
3390 wrong before the contents has been restored from a copy in 3394 wrong before the contents has been restored from a copy in
3391 RAM, your target system will be dead. 3395 RAM, your target system will be dead.
3392 3396
3393 - CONFIG_ENV_ADDR_REDUND 3397 - CONFIG_ENV_ADDR_REDUND
3394 CONFIG_ENV_SIZE_REDUND 3398 CONFIG_ENV_SIZE_REDUND
3395 3399
3396 These settings describe a second storage area used to hold 3400 These settings describe a second storage area used to hold
3397 a redundant copy of the environment data, so that there is 3401 a redundant copy of the environment data, so that there is
3398 a valid backup copy in case there is a power failure during 3402 a valid backup copy in case there is a power failure during
3399 a "saveenv" operation. 3403 a "saveenv" operation.
3400 3404
3401 BE CAREFUL! Any changes to the flash layout, and some changes to the 3405 BE CAREFUL! Any changes to the flash layout, and some changes to the
3402 source code will make it necessary to adapt <board>/u-boot.lds* 3406 source code will make it necessary to adapt <board>/u-boot.lds*
3403 accordingly! 3407 accordingly!
3404 3408
3405 3409
3406 - CONFIG_ENV_IS_IN_NVRAM: 3410 - CONFIG_ENV_IS_IN_NVRAM:
3407 3411
3408 Define this if you have some non-volatile memory device 3412 Define this if you have some non-volatile memory device
3409 (NVRAM, battery buffered SRAM) which you want to use for the 3413 (NVRAM, battery buffered SRAM) which you want to use for the
3410 environment. 3414 environment.
3411 3415
3412 - CONFIG_ENV_ADDR: 3416 - CONFIG_ENV_ADDR:
3413 - CONFIG_ENV_SIZE: 3417 - CONFIG_ENV_SIZE:
3414 3418
3415 These two #defines are used to determine the memory area you 3419 These two #defines are used to determine the memory area you
3416 want to use for environment. It is assumed that this memory 3420 want to use for environment. It is assumed that this memory
3417 can just be read and written to, without any special 3421 can just be read and written to, without any special
3418 provision. 3422 provision.
3419 3423
3420 BE CAREFUL! The first access to the environment happens quite early 3424 BE CAREFUL! The first access to the environment happens quite early
3421 in U-Boot initalization (when we try to get the setting of for the 3425 in U-Boot initalization (when we try to get the setting of for the
3422 console baudrate). You *MUST* have mapped your NVRAM area then, or 3426 console baudrate). You *MUST* have mapped your NVRAM area then, or
3423 U-Boot will hang. 3427 U-Boot will hang.
3424 3428
3425 Please note that even with NVRAM we still use a copy of the 3429 Please note that even with NVRAM we still use a copy of the
3426 environment in RAM: we could work on NVRAM directly, but we want to 3430 environment in RAM: we could work on NVRAM directly, but we want to
3427 keep settings there always unmodified except somebody uses "saveenv" 3431 keep settings there always unmodified except somebody uses "saveenv"
3428 to save the current settings. 3432 to save the current settings.
3429 3433
3430 3434
3431 - CONFIG_ENV_IS_IN_EEPROM: 3435 - CONFIG_ENV_IS_IN_EEPROM:
3432 3436
3433 Use this if you have an EEPROM or similar serial access 3437 Use this if you have an EEPROM or similar serial access
3434 device and a driver for it. 3438 device and a driver for it.
3435 3439
3436 - CONFIG_ENV_OFFSET: 3440 - CONFIG_ENV_OFFSET:
3437 - CONFIG_ENV_SIZE: 3441 - CONFIG_ENV_SIZE:
3438 3442
3439 These two #defines specify the offset and size of the 3443 These two #defines specify the offset and size of the
3440 environment area within the total memory of your EEPROM. 3444 environment area within the total memory of your EEPROM.
3441 3445
3442 - CONFIG_SYS_I2C_EEPROM_ADDR: 3446 - CONFIG_SYS_I2C_EEPROM_ADDR:
3443 If defined, specified the chip address of the EEPROM device. 3447 If defined, specified the chip address of the EEPROM device.
3444 The default address is zero. 3448 The default address is zero.
3445 3449
3446 - CONFIG_SYS_EEPROM_PAGE_WRITE_BITS: 3450 - CONFIG_SYS_EEPROM_PAGE_WRITE_BITS:
3447 If defined, the number of bits used to address bytes in a 3451 If defined, the number of bits used to address bytes in a
3448 single page in the EEPROM device. A 64 byte page, for example 3452 single page in the EEPROM device. A 64 byte page, for example
3449 would require six bits. 3453 would require six bits.
3450 3454
3451 - CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS: 3455 - CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS:
3452 If defined, the number of milliseconds to delay between 3456 If defined, the number of milliseconds to delay between
3453 page writes. The default is zero milliseconds. 3457 page writes. The default is zero milliseconds.
3454 3458
3455 - CONFIG_SYS_I2C_EEPROM_ADDR_LEN: 3459 - CONFIG_SYS_I2C_EEPROM_ADDR_LEN:
3456 The length in bytes of the EEPROM memory array address. Note 3460 The length in bytes of the EEPROM memory array address. Note
3457 that this is NOT the chip address length! 3461 that this is NOT the chip address length!
3458 3462
3459 - CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW: 3463 - CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW:
3460 EEPROM chips that implement "address overflow" are ones 3464 EEPROM chips that implement "address overflow" are ones
3461 like Catalyst 24WC04/08/16 which has 9/10/11 bits of 3465 like Catalyst 24WC04/08/16 which has 9/10/11 bits of
3462 address and the extra bits end up in the "chip address" bit 3466 address and the extra bits end up in the "chip address" bit
3463 slots. This makes a 24WC08 (1Kbyte) chip look like four 256 3467 slots. This makes a 24WC08 (1Kbyte) chip look like four 256
3464 byte chips. 3468 byte chips.
3465 3469
3466 Note that we consider the length of the address field to 3470 Note that we consider the length of the address field to
3467 still be one byte because the extra address bits are hidden 3471 still be one byte because the extra address bits are hidden
3468 in the chip address. 3472 in the chip address.
3469 3473
3470 - CONFIG_SYS_EEPROM_SIZE: 3474 - CONFIG_SYS_EEPROM_SIZE:
3471 The size in bytes of the EEPROM device. 3475 The size in bytes of the EEPROM device.
3472 3476
3473 - CONFIG_ENV_EEPROM_IS_ON_I2C 3477 - CONFIG_ENV_EEPROM_IS_ON_I2C
3474 define this, if you have I2C and SPI activated, and your 3478 define this, if you have I2C and SPI activated, and your
3475 EEPROM, which holds the environment, is on the I2C bus. 3479 EEPROM, which holds the environment, is on the I2C bus.
3476 3480
3477 - CONFIG_I2C_ENV_EEPROM_BUS 3481 - CONFIG_I2C_ENV_EEPROM_BUS
3478 if you have an Environment on an EEPROM reached over 3482 if you have an Environment on an EEPROM reached over
3479 I2C muxes, you can define here, how to reach this 3483 I2C muxes, you can define here, how to reach this
3480 EEPROM. For example: 3484 EEPROM. For example:
3481 3485
3482 #define CONFIG_I2C_ENV_EEPROM_BUS "pca9547:70:d\0" 3486 #define CONFIG_I2C_ENV_EEPROM_BUS "pca9547:70:d\0"
3483 3487
3484 EEPROM which holds the environment, is reached over 3488 EEPROM which holds the environment, is reached over
3485 a pca9547 i2c mux with address 0x70, channel 3. 3489 a pca9547 i2c mux with address 0x70, channel 3.
3486 3490
3487 - CONFIG_ENV_IS_IN_DATAFLASH: 3491 - CONFIG_ENV_IS_IN_DATAFLASH:
3488 3492
3489 Define this if you have a DataFlash memory device which you 3493 Define this if you have a DataFlash memory device which you
3490 want to use for the environment. 3494 want to use for the environment.
3491 3495
3492 - CONFIG_ENV_OFFSET: 3496 - CONFIG_ENV_OFFSET:
3493 - CONFIG_ENV_ADDR: 3497 - CONFIG_ENV_ADDR:
3494 - CONFIG_ENV_SIZE: 3498 - CONFIG_ENV_SIZE:
3495 3499
3496 These three #defines specify the offset and size of the 3500 These three #defines specify the offset and size of the
3497 environment area within the total memory of your DataFlash placed 3501 environment area within the total memory of your DataFlash placed
3498 at the specified address. 3502 at the specified address.
3499 3503
3500 - CONFIG_ENV_IS_IN_REMOTE: 3504 - CONFIG_ENV_IS_IN_REMOTE:
3501 3505
3502 Define this if you have a remote memory space which you 3506 Define this if you have a remote memory space which you
3503 want to use for the local device's environment. 3507 want to use for the local device's environment.
3504 3508
3505 - CONFIG_ENV_ADDR: 3509 - CONFIG_ENV_ADDR:
3506 - CONFIG_ENV_SIZE: 3510 - CONFIG_ENV_SIZE:
3507 3511
3508 These two #defines specify the address and size of the 3512 These two #defines specify the address and size of the
3509 environment area within the remote memory space. The 3513 environment area within the remote memory space. The
3510 local device can get the environment from remote memory 3514 local device can get the environment from remote memory
3511 space by SRIO or PCIE links. 3515 space by SRIO or PCIE links.
3512 3516
3513 BE CAREFUL! For some special cases, the local device can not use 3517 BE CAREFUL! For some special cases, the local device can not use
3514 "saveenv" command. For example, the local device will get the 3518 "saveenv" command. For example, the local device will get the
3515 environment stored in a remote NOR flash by SRIO or PCIE link, 3519 environment stored in a remote NOR flash by SRIO or PCIE link,
3516 but it can not erase, write this NOR flash by SRIO or PCIE interface. 3520 but it can not erase, write this NOR flash by SRIO or PCIE interface.
3517 3521
3518 - CONFIG_ENV_IS_IN_NAND: 3522 - CONFIG_ENV_IS_IN_NAND:
3519 3523
3520 Define this if you have a NAND device which you want to use 3524 Define this if you have a NAND device which you want to use
3521 for the environment. 3525 for the environment.
3522 3526
3523 - CONFIG_ENV_OFFSET: 3527 - CONFIG_ENV_OFFSET:
3524 - CONFIG_ENV_SIZE: 3528 - CONFIG_ENV_SIZE:
3525 3529
3526 These two #defines specify the offset and size of the environment 3530 These two #defines specify the offset and size of the environment
3527 area within the first NAND device. CONFIG_ENV_OFFSET must be 3531 area within the first NAND device. CONFIG_ENV_OFFSET must be
3528 aligned to an erase block boundary. 3532 aligned to an erase block boundary.
3529 3533
3530 - CONFIG_ENV_OFFSET_REDUND (optional): 3534 - CONFIG_ENV_OFFSET_REDUND (optional):
3531 3535
3532 This setting describes a second storage area of CONFIG_ENV_SIZE 3536 This setting describes a second storage area of CONFIG_ENV_SIZE
3533 size used to hold a redundant copy of the environment data, so 3537 size used to hold a redundant copy of the environment data, so
3534 that there is a valid backup copy in case there is a power failure 3538 that there is a valid backup copy in case there is a power failure
3535 during a "saveenv" operation. CONFIG_ENV_OFFSET_RENDUND must be 3539 during a "saveenv" operation. CONFIG_ENV_OFFSET_RENDUND must be
3536 aligned to an erase block boundary. 3540 aligned to an erase block boundary.
3537 3541
3538 - CONFIG_ENV_RANGE (optional): 3542 - CONFIG_ENV_RANGE (optional):
3539 3543
3540 Specifies the length of the region in which the environment 3544 Specifies the length of the region in which the environment
3541 can be written. This should be a multiple of the NAND device's 3545 can be written. This should be a multiple of the NAND device's
3542 block size. Specifying a range with more erase blocks than 3546 block size. Specifying a range with more erase blocks than
3543 are needed to hold CONFIG_ENV_SIZE allows bad blocks within 3547 are needed to hold CONFIG_ENV_SIZE allows bad blocks within
3544 the range to be avoided. 3548 the range to be avoided.
3545 3549
3546 - CONFIG_ENV_OFFSET_OOB (optional): 3550 - CONFIG_ENV_OFFSET_OOB (optional):
3547 3551
3548 Enables support for dynamically retrieving the offset of the 3552 Enables support for dynamically retrieving the offset of the
3549 environment from block zero's out-of-band data. The 3553 environment from block zero's out-of-band data. The
3550 "nand env.oob" command can be used to record this offset. 3554 "nand env.oob" command can be used to record this offset.
3551 Currently, CONFIG_ENV_OFFSET_REDUND is not supported when 3555 Currently, CONFIG_ENV_OFFSET_REDUND is not supported when
3552 using CONFIG_ENV_OFFSET_OOB. 3556 using CONFIG_ENV_OFFSET_OOB.
3553 3557
3554 - CONFIG_NAND_ENV_DST 3558 - CONFIG_NAND_ENV_DST
3555 3559
3556 Defines address in RAM to which the nand_spl code should copy the 3560 Defines address in RAM to which the nand_spl code should copy the
3557 environment. If redundant environment is used, it will be copied to 3561 environment. If redundant environment is used, it will be copied to
3558 CONFIG_NAND_ENV_DST + CONFIG_ENV_SIZE. 3562 CONFIG_NAND_ENV_DST + CONFIG_ENV_SIZE.
3559 3563
3560 - CONFIG_ENV_IS_IN_UBI: 3564 - CONFIG_ENV_IS_IN_UBI:
3561 3565
3562 Define this if you have an UBI volume that you want to use for the 3566 Define this if you have an UBI volume that you want to use for the
3563 environment. This has the benefit of wear-leveling the environment 3567 environment. This has the benefit of wear-leveling the environment
3564 accesses, which is important on NAND. 3568 accesses, which is important on NAND.
3565 3569
3566 - CONFIG_ENV_UBI_PART: 3570 - CONFIG_ENV_UBI_PART:
3567 3571
3568 Define this to a string that is the mtd partition containing the UBI. 3572 Define this to a string that is the mtd partition containing the UBI.
3569 3573
3570 - CONFIG_ENV_UBI_VOLUME: 3574 - CONFIG_ENV_UBI_VOLUME:
3571 3575
3572 Define this to the name of the volume that you want to store the 3576 Define this to the name of the volume that you want to store the
3573 environment in. 3577 environment in.
3574 3578
3575 - CONFIG_ENV_UBI_VOLUME_REDUND: 3579 - CONFIG_ENV_UBI_VOLUME_REDUND:
3576 3580
3577 Define this to the name of another volume to store a second copy of 3581 Define this to the name of another volume to store a second copy of
3578 the environment in. This will enable redundant environments in UBI. 3582 the environment in. This will enable redundant environments in UBI.
3579 It is assumed that both volumes are in the same MTD partition. 3583 It is assumed that both volumes are in the same MTD partition.
3580 3584
3581 - CONFIG_UBI_SILENCE_MSG 3585 - CONFIG_UBI_SILENCE_MSG
3582 - CONFIG_UBIFS_SILENCE_MSG 3586 - CONFIG_UBIFS_SILENCE_MSG
3583 3587
3584 You will probably want to define these to avoid a really noisy system 3588 You will probably want to define these to avoid a really noisy system
3585 when storing the env in UBI. 3589 when storing the env in UBI.
3586 3590
3587 - CONFIG_SYS_SPI_INIT_OFFSET 3591 - CONFIG_SYS_SPI_INIT_OFFSET
3588 3592
3589 Defines offset to the initial SPI buffer area in DPRAM. The 3593 Defines offset to the initial SPI buffer area in DPRAM. The
3590 area is used at an early stage (ROM part) if the environment 3594 area is used at an early stage (ROM part) if the environment
3591 is configured to reside in the SPI EEPROM: We need a 520 byte 3595 is configured to reside in the SPI EEPROM: We need a 520 byte
3592 scratch DPRAM area. It is used between the two initialization 3596 scratch DPRAM area. It is used between the two initialization
3593 calls (spi_init_f() and spi_init_r()). A value of 0xB00 seems 3597 calls (spi_init_f() and spi_init_r()). A value of 0xB00 seems
3594 to be a good choice since it makes it far enough from the 3598 to be a good choice since it makes it far enough from the
3595 start of the data area as well as from the stack pointer. 3599 start of the data area as well as from the stack pointer.
3596 3600
3597 Please note that the environment is read-only until the monitor 3601 Please note that the environment is read-only until the monitor
3598 has been relocated to RAM and a RAM copy of the environment has been 3602 has been relocated to RAM and a RAM copy of the environment has been
3599 created; also, when using EEPROM you will have to use getenv_f() 3603 created; also, when using EEPROM you will have to use getenv_f()
3600 until then to read environment variables. 3604 until then to read environment variables.
3601 3605
3602 The environment is protected by a CRC32 checksum. Before the monitor 3606 The environment is protected by a CRC32 checksum. Before the monitor
3603 is relocated into RAM, as a result of a bad CRC you will be working 3607 is relocated into RAM, as a result of a bad CRC you will be working
3604 with the compiled-in default environment - *silently*!!! [This is 3608 with the compiled-in default environment - *silently*!!! [This is
3605 necessary, because the first environment variable we need is the 3609 necessary, because the first environment variable we need is the
3606 "baudrate" setting for the console - if we have a bad CRC, we don't 3610 "baudrate" setting for the console - if we have a bad CRC, we don't
3607 have any device yet where we could complain.] 3611 have any device yet where we could complain.]
3608 3612
3609 Note: once the monitor has been relocated, then it will complain if 3613 Note: once the monitor has been relocated, then it will complain if
3610 the default environment is used; a new CRC is computed as soon as you 3614 the default environment is used; a new CRC is computed as soon as you
3611 use the "saveenv" command to store a valid environment. 3615 use the "saveenv" command to store a valid environment.
3612 3616
3613 - CONFIG_SYS_FAULT_ECHO_LINK_DOWN: 3617 - CONFIG_SYS_FAULT_ECHO_LINK_DOWN:
3614 Echo the inverted Ethernet link state to the fault LED. 3618 Echo the inverted Ethernet link state to the fault LED.
3615 3619
3616 Note: If this option is active, then CONFIG_SYS_FAULT_MII_ADDR 3620 Note: If this option is active, then CONFIG_SYS_FAULT_MII_ADDR
3617 also needs to be defined. 3621 also needs to be defined.
3618 3622
3619 - CONFIG_SYS_FAULT_MII_ADDR: 3623 - CONFIG_SYS_FAULT_MII_ADDR:
3620 MII address of the PHY to check for the Ethernet link state. 3624 MII address of the PHY to check for the Ethernet link state.
3621 3625
3622 - CONFIG_NS16550_MIN_FUNCTIONS: 3626 - CONFIG_NS16550_MIN_FUNCTIONS:
3623 Define this if you desire to only have use of the NS16550_init 3627 Define this if you desire to only have use of the NS16550_init
3624 and NS16550_putc functions for the serial driver located at 3628 and NS16550_putc functions for the serial driver located at
3625 drivers/serial/ns16550.c. This option is useful for saving 3629 drivers/serial/ns16550.c. This option is useful for saving
3626 space for already greatly restricted images, including but not 3630 space for already greatly restricted images, including but not
3627 limited to NAND_SPL configurations. 3631 limited to NAND_SPL configurations.
3628 3632
3629 - CONFIG_DISPLAY_BOARDINFO 3633 - CONFIG_DISPLAY_BOARDINFO
3630 Display information about the board that U-Boot is running on 3634 Display information about the board that U-Boot is running on
3631 when U-Boot starts up. The board function checkboard() is called 3635 when U-Boot starts up. The board function checkboard() is called
3632 to do this. 3636 to do this.
3633 3637
3634 - CONFIG_DISPLAY_BOARDINFO_LATE 3638 - CONFIG_DISPLAY_BOARDINFO_LATE
3635 Similar to the previous option, but display this information 3639 Similar to the previous option, but display this information
3636 later, once stdio is running and output goes to the LCD, if 3640 later, once stdio is running and output goes to the LCD, if
3637 present. 3641 present.
3638 3642
3639 Low Level (hardware related) configuration options: 3643 Low Level (hardware related) configuration options:
3640 --------------------------------------------------- 3644 ---------------------------------------------------
3641 3645
3642 - CONFIG_SYS_CACHELINE_SIZE: 3646 - CONFIG_SYS_CACHELINE_SIZE:
3643 Cache Line Size of the CPU. 3647 Cache Line Size of the CPU.
3644 3648
3645 - CONFIG_SYS_DEFAULT_IMMR: 3649 - CONFIG_SYS_DEFAULT_IMMR:
3646 Default address of the IMMR after system reset. 3650 Default address of the IMMR after system reset.
3647 3651
3648 Needed on some 8260 systems (MPC8260ADS, PQ2FADS-ZU, 3652 Needed on some 8260 systems (MPC8260ADS, PQ2FADS-ZU,
3649 and RPXsuper) to be able to adjust the position of 3653 and RPXsuper) to be able to adjust the position of
3650 the IMMR register after a reset. 3654 the IMMR register after a reset.
3651 3655
3652 - CONFIG_SYS_CCSRBAR_DEFAULT: 3656 - CONFIG_SYS_CCSRBAR_DEFAULT:
3653 Default (power-on reset) physical address of CCSR on Freescale 3657 Default (power-on reset) physical address of CCSR on Freescale
3654 PowerPC SOCs. 3658 PowerPC SOCs.
3655 3659
3656 - CONFIG_SYS_CCSRBAR: 3660 - CONFIG_SYS_CCSRBAR:
3657 Virtual address of CCSR. On a 32-bit build, this is typically 3661 Virtual address of CCSR. On a 32-bit build, this is typically
3658 the same value as CONFIG_SYS_CCSRBAR_DEFAULT. 3662 the same value as CONFIG_SYS_CCSRBAR_DEFAULT.
3659 3663
3660 CONFIG_SYS_DEFAULT_IMMR must also be set to this value, 3664 CONFIG_SYS_DEFAULT_IMMR must also be set to this value,
3661 for cross-platform code that uses that macro instead. 3665 for cross-platform code that uses that macro instead.
3662 3666
3663 - CONFIG_SYS_CCSRBAR_PHYS: 3667 - CONFIG_SYS_CCSRBAR_PHYS:
3664 Physical address of CCSR. CCSR can be relocated to a new 3668 Physical address of CCSR. CCSR can be relocated to a new
3665 physical address, if desired. In this case, this macro should 3669 physical address, if desired. In this case, this macro should
3666 be set to that address. Otherwise, it should be set to the 3670 be set to that address. Otherwise, it should be set to the
3667 same value as CONFIG_SYS_CCSRBAR_DEFAULT. For example, CCSR 3671 same value as CONFIG_SYS_CCSRBAR_DEFAULT. For example, CCSR
3668 is typically relocated on 36-bit builds. It is recommended 3672 is typically relocated on 36-bit builds. It is recommended
3669 that this macro be defined via the _HIGH and _LOW macros: 3673 that this macro be defined via the _HIGH and _LOW macros:
3670 3674
3671 #define CONFIG_SYS_CCSRBAR_PHYS ((CONFIG_SYS_CCSRBAR_PHYS_HIGH 3675 #define CONFIG_SYS_CCSRBAR_PHYS ((CONFIG_SYS_CCSRBAR_PHYS_HIGH
3672 * 1ull) << 32 | CONFIG_SYS_CCSRBAR_PHYS_LOW) 3676 * 1ull) << 32 | CONFIG_SYS_CCSRBAR_PHYS_LOW)
3673 3677
3674 - CONFIG_SYS_CCSRBAR_PHYS_HIGH: 3678 - CONFIG_SYS_CCSRBAR_PHYS_HIGH:
3675 Bits 33-36 of CONFIG_SYS_CCSRBAR_PHYS. This value is typically 3679 Bits 33-36 of CONFIG_SYS_CCSRBAR_PHYS. This value is typically
3676 either 0 (32-bit build) or 0xF (36-bit build). This macro is 3680 either 0 (32-bit build) or 0xF (36-bit build). This macro is
3677 used in assembly code, so it must not contain typecasts or 3681 used in assembly code, so it must not contain typecasts or
3678 integer size suffixes (e.g. "ULL"). 3682 integer size suffixes (e.g. "ULL").
3679 3683
3680 - CONFIG_SYS_CCSRBAR_PHYS_LOW: 3684 - CONFIG_SYS_CCSRBAR_PHYS_LOW:
3681 Lower 32-bits of CONFIG_SYS_CCSRBAR_PHYS. This macro is 3685 Lower 32-bits of CONFIG_SYS_CCSRBAR_PHYS. This macro is
3682 used in assembly code, so it must not contain typecasts or 3686 used in assembly code, so it must not contain typecasts or
3683 integer size suffixes (e.g. "ULL"). 3687 integer size suffixes (e.g. "ULL").
3684 3688
3685 - CONFIG_SYS_CCSR_DO_NOT_RELOCATE: 3689 - CONFIG_SYS_CCSR_DO_NOT_RELOCATE:
3686 If this macro is defined, then CONFIG_SYS_CCSRBAR_PHYS will be 3690 If this macro is defined, then CONFIG_SYS_CCSRBAR_PHYS will be
3687 forced to a value that ensures that CCSR is not relocated. 3691 forced to a value that ensures that CCSR is not relocated.
3688 3692
3689 - Floppy Disk Support: 3693 - Floppy Disk Support:
3690 CONFIG_SYS_FDC_DRIVE_NUMBER 3694 CONFIG_SYS_FDC_DRIVE_NUMBER
3691 3695
3692 the default drive number (default value 0) 3696 the default drive number (default value 0)
3693 3697
3694 CONFIG_SYS_ISA_IO_STRIDE 3698 CONFIG_SYS_ISA_IO_STRIDE
3695 3699
3696 defines the spacing between FDC chipset registers 3700 defines the spacing between FDC chipset registers
3697 (default value 1) 3701 (default value 1)
3698 3702
3699 CONFIG_SYS_ISA_IO_OFFSET 3703 CONFIG_SYS_ISA_IO_OFFSET
3700 3704
3701 defines the offset of register from address. It 3705 defines the offset of register from address. It
3702 depends on which part of the data bus is connected to 3706 depends on which part of the data bus is connected to
3703 the FDC chipset. (default value 0) 3707 the FDC chipset. (default value 0)
3704 3708
3705 If CONFIG_SYS_ISA_IO_STRIDE CONFIG_SYS_ISA_IO_OFFSET and 3709 If CONFIG_SYS_ISA_IO_STRIDE CONFIG_SYS_ISA_IO_OFFSET and
3706 CONFIG_SYS_FDC_DRIVE_NUMBER are undefined, they take their 3710 CONFIG_SYS_FDC_DRIVE_NUMBER are undefined, they take their
3707 default value. 3711 default value.
3708 3712
3709 if CONFIG_SYS_FDC_HW_INIT is defined, then the function 3713 if CONFIG_SYS_FDC_HW_INIT is defined, then the function
3710 fdc_hw_init() is called at the beginning of the FDC 3714 fdc_hw_init() is called at the beginning of the FDC
3711 setup. fdc_hw_init() must be provided by the board 3715 setup. fdc_hw_init() must be provided by the board
3712 source code. It is used to make hardware dependant 3716 source code. It is used to make hardware dependant
3713 initializations. 3717 initializations.
3714 3718
3715 - CONFIG_IDE_AHB: 3719 - CONFIG_IDE_AHB:
3716 Most IDE controllers were designed to be connected with PCI 3720 Most IDE controllers were designed to be connected with PCI
3717 interface. Only few of them were designed for AHB interface. 3721 interface. Only few of them were designed for AHB interface.
3718 When software is doing ATA command and data transfer to 3722 When software is doing ATA command and data transfer to
3719 IDE devices through IDE-AHB controller, some additional 3723 IDE devices through IDE-AHB controller, some additional
3720 registers accessing to these kind of IDE-AHB controller 3724 registers accessing to these kind of IDE-AHB controller
3721 is requierd. 3725 is requierd.
3722 3726
3723 - CONFIG_SYS_IMMR: Physical address of the Internal Memory. 3727 - CONFIG_SYS_IMMR: Physical address of the Internal Memory.
3724 DO NOT CHANGE unless you know exactly what you're 3728 DO NOT CHANGE unless you know exactly what you're
3725 doing! (11-4) [MPC8xx/82xx systems only] 3729 doing! (11-4) [MPC8xx/82xx systems only]
3726 3730
3727 - CONFIG_SYS_INIT_RAM_ADDR: 3731 - CONFIG_SYS_INIT_RAM_ADDR:
3728 3732
3729 Start address of memory area that can be used for 3733 Start address of memory area that can be used for
3730 initial data and stack; please note that this must be 3734 initial data and stack; please note that this must be
3731 writable memory that is working WITHOUT special 3735 writable memory that is working WITHOUT special
3732 initialization, i. e. you CANNOT use normal RAM which 3736 initialization, i. e. you CANNOT use normal RAM which
3733 will become available only after programming the 3737 will become available only after programming the
3734 memory controller and running certain initialization 3738 memory controller and running certain initialization
3735 sequences. 3739 sequences.
3736 3740
3737 U-Boot uses the following memory types: 3741 U-Boot uses the following memory types:
3738 - MPC8xx and MPC8260: IMMR (internal memory of the CPU) 3742 - MPC8xx and MPC8260: IMMR (internal memory of the CPU)
3739 - MPC824X: data cache 3743 - MPC824X: data cache
3740 - PPC4xx: data cache 3744 - PPC4xx: data cache
3741 3745
3742 - CONFIG_SYS_GBL_DATA_OFFSET: 3746 - CONFIG_SYS_GBL_DATA_OFFSET:
3743 3747
3744 Offset of the initial data structure in the memory 3748 Offset of the initial data structure in the memory
3745 area defined by CONFIG_SYS_INIT_RAM_ADDR. Usually 3749 area defined by CONFIG_SYS_INIT_RAM_ADDR. Usually
3746 CONFIG_SYS_GBL_DATA_OFFSET is chosen such that the initial 3750 CONFIG_SYS_GBL_DATA_OFFSET is chosen such that the initial
3747 data is located at the end of the available space 3751 data is located at the end of the available space
3748 (sometimes written as (CONFIG_SYS_INIT_RAM_SIZE - 3752 (sometimes written as (CONFIG_SYS_INIT_RAM_SIZE -
3749 CONFIG_SYS_INIT_DATA_SIZE), and the initial stack is just 3753 CONFIG_SYS_INIT_DATA_SIZE), and the initial stack is just
3750 below that area (growing from (CONFIG_SYS_INIT_RAM_ADDR + 3754 below that area (growing from (CONFIG_SYS_INIT_RAM_ADDR +
3751 CONFIG_SYS_GBL_DATA_OFFSET) downward. 3755 CONFIG_SYS_GBL_DATA_OFFSET) downward.
3752 3756
3753 Note: 3757 Note:
3754 On the MPC824X (or other systems that use the data 3758 On the MPC824X (or other systems that use the data
3755 cache for initial memory) the address chosen for 3759 cache for initial memory) the address chosen for
3756 CONFIG_SYS_INIT_RAM_ADDR is basically arbitrary - it must 3760 CONFIG_SYS_INIT_RAM_ADDR is basically arbitrary - it must
3757 point to an otherwise UNUSED address space between 3761 point to an otherwise UNUSED address space between
3758 the top of RAM and the start of the PCI space. 3762 the top of RAM and the start of the PCI space.
3759 3763
3760 - CONFIG_SYS_SIUMCR: SIU Module Configuration (11-6) 3764 - CONFIG_SYS_SIUMCR: SIU Module Configuration (11-6)
3761 3765
3762 - CONFIG_SYS_SYPCR: System Protection Control (11-9) 3766 - CONFIG_SYS_SYPCR: System Protection Control (11-9)
3763 3767
3764 - CONFIG_SYS_TBSCR: Time Base Status and Control (11-26) 3768 - CONFIG_SYS_TBSCR: Time Base Status and Control (11-26)
3765 3769
3766 - CONFIG_SYS_PISCR: Periodic Interrupt Status and Control (11-31) 3770 - CONFIG_SYS_PISCR: Periodic Interrupt Status and Control (11-31)
3767 3771
3768 - CONFIG_SYS_PLPRCR: PLL, Low-Power, and Reset Control Register (15-30) 3772 - CONFIG_SYS_PLPRCR: PLL, Low-Power, and Reset Control Register (15-30)
3769 3773
3770 - CONFIG_SYS_SCCR: System Clock and reset Control Register (15-27) 3774 - CONFIG_SYS_SCCR: System Clock and reset Control Register (15-27)
3771 3775
3772 - CONFIG_SYS_OR_TIMING_SDRAM: 3776 - CONFIG_SYS_OR_TIMING_SDRAM:
3773 SDRAM timing 3777 SDRAM timing
3774 3778
3775 - CONFIG_SYS_MAMR_PTA: 3779 - CONFIG_SYS_MAMR_PTA:
3776 periodic timer for refresh 3780 periodic timer for refresh
3777 3781
3778 - CONFIG_SYS_DER: Debug Event Register (37-47) 3782 - CONFIG_SYS_DER: Debug Event Register (37-47)
3779 3783
3780 - FLASH_BASE0_PRELIM, FLASH_BASE1_PRELIM, CONFIG_SYS_REMAP_OR_AM, 3784 - FLASH_BASE0_PRELIM, FLASH_BASE1_PRELIM, CONFIG_SYS_REMAP_OR_AM,
3781 CONFIG_SYS_PRELIM_OR_AM, CONFIG_SYS_OR_TIMING_FLASH, CONFIG_SYS_OR0_REMAP, 3785 CONFIG_SYS_PRELIM_OR_AM, CONFIG_SYS_OR_TIMING_FLASH, CONFIG_SYS_OR0_REMAP,
3782 CONFIG_SYS_OR0_PRELIM, CONFIG_SYS_BR0_PRELIM, CONFIG_SYS_OR1_REMAP, CONFIG_SYS_OR1_PRELIM, 3786 CONFIG_SYS_OR0_PRELIM, CONFIG_SYS_BR0_PRELIM, CONFIG_SYS_OR1_REMAP, CONFIG_SYS_OR1_PRELIM,
3783 CONFIG_SYS_BR1_PRELIM: 3787 CONFIG_SYS_BR1_PRELIM:
3784 Memory Controller Definitions: BR0/1 and OR0/1 (FLASH) 3788 Memory Controller Definitions: BR0/1 and OR0/1 (FLASH)
3785 3789
3786 - SDRAM_BASE2_PRELIM, SDRAM_BASE3_PRELIM, SDRAM_MAX_SIZE, 3790 - SDRAM_BASE2_PRELIM, SDRAM_BASE3_PRELIM, SDRAM_MAX_SIZE,
3787 CONFIG_SYS_OR_TIMING_SDRAM, CONFIG_SYS_OR2_PRELIM, CONFIG_SYS_BR2_PRELIM, 3791 CONFIG_SYS_OR_TIMING_SDRAM, CONFIG_SYS_OR2_PRELIM, CONFIG_SYS_BR2_PRELIM,
3788 CONFIG_SYS_OR3_PRELIM, CONFIG_SYS_BR3_PRELIM: 3792 CONFIG_SYS_OR3_PRELIM, CONFIG_SYS_BR3_PRELIM:
3789 Memory Controller Definitions: BR2/3 and OR2/3 (SDRAM) 3793 Memory Controller Definitions: BR2/3 and OR2/3 (SDRAM)
3790 3794
3791 - CONFIG_SYS_MAMR_PTA, CONFIG_SYS_MPTPR_2BK_4K, CONFIG_SYS_MPTPR_1BK_4K, CONFIG_SYS_MPTPR_2BK_8K, 3795 - CONFIG_SYS_MAMR_PTA, CONFIG_SYS_MPTPR_2BK_4K, CONFIG_SYS_MPTPR_1BK_4K, CONFIG_SYS_MPTPR_2BK_8K,
3792 CONFIG_SYS_MPTPR_1BK_8K, CONFIG_SYS_MAMR_8COL, CONFIG_SYS_MAMR_9COL: 3796 CONFIG_SYS_MPTPR_1BK_8K, CONFIG_SYS_MAMR_8COL, CONFIG_SYS_MAMR_9COL:
3793 Machine Mode Register and Memory Periodic Timer 3797 Machine Mode Register and Memory Periodic Timer
3794 Prescaler definitions (SDRAM timing) 3798 Prescaler definitions (SDRAM timing)
3795 3799
3796 - CONFIG_SYS_I2C_UCODE_PATCH, CONFIG_SYS_I2C_DPMEM_OFFSET [0x1FC0]: 3800 - CONFIG_SYS_I2C_UCODE_PATCH, CONFIG_SYS_I2C_DPMEM_OFFSET [0x1FC0]:
3797 enable I2C microcode relocation patch (MPC8xx); 3801 enable I2C microcode relocation patch (MPC8xx);
3798 define relocation offset in DPRAM [DSP2] 3802 define relocation offset in DPRAM [DSP2]
3799 3803
3800 - CONFIG_SYS_SMC_UCODE_PATCH, CONFIG_SYS_SMC_DPMEM_OFFSET [0x1FC0]: 3804 - CONFIG_SYS_SMC_UCODE_PATCH, CONFIG_SYS_SMC_DPMEM_OFFSET [0x1FC0]:
3801 enable SMC microcode relocation patch (MPC8xx); 3805 enable SMC microcode relocation patch (MPC8xx);
3802 define relocation offset in DPRAM [SMC1] 3806 define relocation offset in DPRAM [SMC1]
3803 3807
3804 - CONFIG_SYS_SPI_UCODE_PATCH, CONFIG_SYS_SPI_DPMEM_OFFSET [0x1FC0]: 3808 - CONFIG_SYS_SPI_UCODE_PATCH, CONFIG_SYS_SPI_DPMEM_OFFSET [0x1FC0]:
3805 enable SPI microcode relocation patch (MPC8xx); 3809 enable SPI microcode relocation patch (MPC8xx);
3806 define relocation offset in DPRAM [SCC4] 3810 define relocation offset in DPRAM [SCC4]
3807 3811
3808 - CONFIG_SYS_USE_OSCCLK: 3812 - CONFIG_SYS_USE_OSCCLK:
3809 Use OSCM clock mode on MBX8xx board. Be careful, 3813 Use OSCM clock mode on MBX8xx board. Be careful,
3810 wrong setting might damage your board. Read 3814 wrong setting might damage your board. Read
3811 doc/README.MBX before setting this variable! 3815 doc/README.MBX before setting this variable!
3812 3816
3813 - CONFIG_SYS_CPM_POST_WORD_ADDR: (MPC8xx, MPC8260 only) 3817 - CONFIG_SYS_CPM_POST_WORD_ADDR: (MPC8xx, MPC8260 only)
3814 Offset of the bootmode word in DPRAM used by post 3818 Offset of the bootmode word in DPRAM used by post
3815 (Power On Self Tests). This definition overrides 3819 (Power On Self Tests). This definition overrides
3816 #define'd default value in commproc.h resp. 3820 #define'd default value in commproc.h resp.
3817 cpm_8260.h. 3821 cpm_8260.h.
3818 3822
3819 - CONFIG_SYS_PCI_SLV_MEM_LOCAL, CONFIG_SYS_PCI_SLV_MEM_BUS, CONFIG_SYS_PICMR0_MASK_ATTRIB, 3823 - CONFIG_SYS_PCI_SLV_MEM_LOCAL, CONFIG_SYS_PCI_SLV_MEM_BUS, CONFIG_SYS_PICMR0_MASK_ATTRIB,
3820 CONFIG_SYS_PCI_MSTR0_LOCAL, CONFIG_SYS_PCIMSK0_MASK, CONFIG_SYS_PCI_MSTR1_LOCAL, 3824 CONFIG_SYS_PCI_MSTR0_LOCAL, CONFIG_SYS_PCIMSK0_MASK, CONFIG_SYS_PCI_MSTR1_LOCAL,
3821 CONFIG_SYS_PCIMSK1_MASK, CONFIG_SYS_PCI_MSTR_MEM_LOCAL, CONFIG_SYS_PCI_MSTR_MEM_BUS, 3825 CONFIG_SYS_PCIMSK1_MASK, CONFIG_SYS_PCI_MSTR_MEM_LOCAL, CONFIG_SYS_PCI_MSTR_MEM_BUS,
3822 CONFIG_SYS_CPU_PCI_MEM_START, CONFIG_SYS_PCI_MSTR_MEM_SIZE, CONFIG_SYS_POCMR0_MASK_ATTRIB, 3826 CONFIG_SYS_CPU_PCI_MEM_START, CONFIG_SYS_PCI_MSTR_MEM_SIZE, CONFIG_SYS_POCMR0_MASK_ATTRIB,
3823 CONFIG_SYS_PCI_MSTR_MEMIO_LOCAL, CONFIG_SYS_PCI_MSTR_MEMIO_BUS, CPU_PCI_MEMIO_START, 3827 CONFIG_SYS_PCI_MSTR_MEMIO_LOCAL, CONFIG_SYS_PCI_MSTR_MEMIO_BUS, CPU_PCI_MEMIO_START,
3824 CONFIG_SYS_PCI_MSTR_MEMIO_SIZE, CONFIG_SYS_POCMR1_MASK_ATTRIB, CONFIG_SYS_PCI_MSTR_IO_LOCAL, 3828 CONFIG_SYS_PCI_MSTR_MEMIO_SIZE, CONFIG_SYS_POCMR1_MASK_ATTRIB, CONFIG_SYS_PCI_MSTR_IO_LOCAL,
3825 CONFIG_SYS_PCI_MSTR_IO_BUS, CONFIG_SYS_CPU_PCI_IO_START, CONFIG_SYS_PCI_MSTR_IO_SIZE, 3829 CONFIG_SYS_PCI_MSTR_IO_BUS, CONFIG_SYS_CPU_PCI_IO_START, CONFIG_SYS_PCI_MSTR_IO_SIZE,
3826 CONFIG_SYS_POCMR2_MASK_ATTRIB: (MPC826x only) 3830 CONFIG_SYS_POCMR2_MASK_ATTRIB: (MPC826x only)
3827 Overrides the default PCI memory map in arch/powerpc/cpu/mpc8260/pci.c if set. 3831 Overrides the default PCI memory map in arch/powerpc/cpu/mpc8260/pci.c if set.
3828 3832
3829 - CONFIG_PCI_DISABLE_PCIE: 3833 - CONFIG_PCI_DISABLE_PCIE:
3830 Disable PCI-Express on systems where it is supported but not 3834 Disable PCI-Express on systems where it is supported but not
3831 required. 3835 required.
3832 3836
3833 - CONFIG_PCI_ENUM_ONLY 3837 - CONFIG_PCI_ENUM_ONLY
3834 Only scan through and get the devices on the busses. 3838 Only scan through and get the devices on the busses.
3835 Don't do any setup work, presumably because someone or 3839 Don't do any setup work, presumably because someone or
3836 something has already done it, and we don't need to do it 3840 something has already done it, and we don't need to do it
3837 a second time. Useful for platforms that are pre-booted 3841 a second time. Useful for platforms that are pre-booted
3838 by coreboot or similar. 3842 by coreboot or similar.
3839 3843
3840 - CONFIG_SYS_SRIO: 3844 - CONFIG_SYS_SRIO:
3841 Chip has SRIO or not 3845 Chip has SRIO or not
3842 3846
3843 - CONFIG_SRIO1: 3847 - CONFIG_SRIO1:
3844 Board has SRIO 1 port available 3848 Board has SRIO 1 port available
3845 3849
3846 - CONFIG_SRIO2: 3850 - CONFIG_SRIO2:
3847 Board has SRIO 2 port available 3851 Board has SRIO 2 port available
3848 3852
3849 - CONFIG_SYS_SRIOn_MEM_VIRT: 3853 - CONFIG_SYS_SRIOn_MEM_VIRT:
3850 Virtual Address of SRIO port 'n' memory region 3854 Virtual Address of SRIO port 'n' memory region
3851 3855
3852 - CONFIG_SYS_SRIOn_MEM_PHYS: 3856 - CONFIG_SYS_SRIOn_MEM_PHYS:
3853 Physical Address of SRIO port 'n' memory region 3857 Physical Address of SRIO port 'n' memory region
3854 3858
3855 - CONFIG_SYS_SRIOn_MEM_SIZE: 3859 - CONFIG_SYS_SRIOn_MEM_SIZE:
3856 Size of SRIO port 'n' memory region 3860 Size of SRIO port 'n' memory region
3857 3861
3858 - CONFIG_SYS_NAND_BUSWIDTH_16BIT 3862 - CONFIG_SYS_NAND_BUSWIDTH_16BIT
3859 Defined to tell the NAND controller that the NAND chip is using 3863 Defined to tell the NAND controller that the NAND chip is using
3860 a 16 bit bus. 3864 a 16 bit bus.
3861 Not all NAND drivers use this symbol. 3865 Not all NAND drivers use this symbol.
3862 Example of drivers that use it: 3866 Example of drivers that use it:
3863 - drivers/mtd/nand/ndfc.c 3867 - drivers/mtd/nand/ndfc.c
3864 - drivers/mtd/nand/mxc_nand.c 3868 - drivers/mtd/nand/mxc_nand.c
3865 3869
3866 - CONFIG_SYS_NDFC_EBC0_CFG 3870 - CONFIG_SYS_NDFC_EBC0_CFG
3867 Sets the EBC0_CFG register for the NDFC. If not defined 3871 Sets the EBC0_CFG register for the NDFC. If not defined
3868 a default value will be used. 3872 a default value will be used.
3869 3873
3870 - CONFIG_SPD_EEPROM 3874 - CONFIG_SPD_EEPROM
3871 Get DDR timing information from an I2C EEPROM. Common 3875 Get DDR timing information from an I2C EEPROM. Common
3872 with pluggable memory modules such as SODIMMs 3876 with pluggable memory modules such as SODIMMs
3873 3877
3874 SPD_EEPROM_ADDRESS 3878 SPD_EEPROM_ADDRESS
3875 I2C address of the SPD EEPROM 3879 I2C address of the SPD EEPROM
3876 3880
3877 - CONFIG_SYS_SPD_BUS_NUM 3881 - CONFIG_SYS_SPD_BUS_NUM
3878 If SPD EEPROM is on an I2C bus other than the first 3882 If SPD EEPROM is on an I2C bus other than the first
3879 one, specify here. Note that the value must resolve 3883 one, specify here. Note that the value must resolve
3880 to something your driver can deal with. 3884 to something your driver can deal with.
3881 3885
3882 - CONFIG_SYS_DDR_RAW_TIMING 3886 - CONFIG_SYS_DDR_RAW_TIMING
3883 Get DDR timing information from other than SPD. Common with 3887 Get DDR timing information from other than SPD. Common with
3884 soldered DDR chips onboard without SPD. DDR raw timing 3888 soldered DDR chips onboard without SPD. DDR raw timing
3885 parameters are extracted from datasheet and hard-coded into 3889 parameters are extracted from datasheet and hard-coded into
3886 header files or board specific files. 3890 header files or board specific files.
3887 3891
3888 - CONFIG_FSL_DDR_INTERACTIVE 3892 - CONFIG_FSL_DDR_INTERACTIVE
3889 Enable interactive DDR debugging. See doc/README.fsl-ddr. 3893 Enable interactive DDR debugging. See doc/README.fsl-ddr.
3890 3894
3891 - CONFIG_SYS_83XX_DDR_USES_CS0 3895 - CONFIG_SYS_83XX_DDR_USES_CS0
3892 Only for 83xx systems. If specified, then DDR should 3896 Only for 83xx systems. If specified, then DDR should
3893 be configured using CS0 and CS1 instead of CS2 and CS3. 3897 be configured using CS0 and CS1 instead of CS2 and CS3.
3894 3898
3895 - CONFIG_ETHER_ON_FEC[12] 3899 - CONFIG_ETHER_ON_FEC[12]
3896 Define to enable FEC[12] on a 8xx series processor. 3900 Define to enable FEC[12] on a 8xx series processor.
3897 3901
3898 - CONFIG_FEC[12]_PHY 3902 - CONFIG_FEC[12]_PHY
3899 Define to the hardcoded PHY address which corresponds 3903 Define to the hardcoded PHY address which corresponds
3900 to the given FEC; i. e. 3904 to the given FEC; i. e.
3901 #define CONFIG_FEC1_PHY 4 3905 #define CONFIG_FEC1_PHY 4
3902 means that the PHY with address 4 is connected to FEC1 3906 means that the PHY with address 4 is connected to FEC1
3903 3907
3904 When set to -1, means to probe for first available. 3908 When set to -1, means to probe for first available.
3905 3909
3906 - CONFIG_FEC[12]_PHY_NORXERR 3910 - CONFIG_FEC[12]_PHY_NORXERR
3907 The PHY does not have a RXERR line (RMII only). 3911 The PHY does not have a RXERR line (RMII only).
3908 (so program the FEC to ignore it). 3912 (so program the FEC to ignore it).
3909 3913
3910 - CONFIG_RMII 3914 - CONFIG_RMII
3911 Enable RMII mode for all FECs. 3915 Enable RMII mode for all FECs.
3912 Note that this is a global option, we can't 3916 Note that this is a global option, we can't
3913 have one FEC in standard MII mode and another in RMII mode. 3917 have one FEC in standard MII mode and another in RMII mode.
3914 3918
3915 - CONFIG_CRC32_VERIFY 3919 - CONFIG_CRC32_VERIFY
3916 Add a verify option to the crc32 command. 3920 Add a verify option to the crc32 command.
3917 The syntax is: 3921 The syntax is:
3918 3922
3919 => crc32 -v <address> <count> <crc32> 3923 => crc32 -v <address> <count> <crc32>
3920 3924
3921 Where address/count indicate a memory area 3925 Where address/count indicate a memory area
3922 and crc32 is the correct crc32 which the 3926 and crc32 is the correct crc32 which the
3923 area should have. 3927 area should have.
3924 3928
3925 - CONFIG_LOOPW 3929 - CONFIG_LOOPW
3926 Add the "loopw" memory command. This only takes effect if 3930 Add the "loopw" memory command. This only takes effect if
3927 the memory commands are activated globally (CONFIG_CMD_MEM). 3931 the memory commands are activated globally (CONFIG_CMD_MEM).
3928 3932
3929 - CONFIG_MX_CYCLIC 3933 - CONFIG_MX_CYCLIC
3930 Add the "mdc" and "mwc" memory commands. These are cyclic 3934 Add the "mdc" and "mwc" memory commands. These are cyclic
3931 "md/mw" commands. 3935 "md/mw" commands.
3932 Examples: 3936 Examples:
3933 3937
3934 => mdc.b 10 4 500 3938 => mdc.b 10 4 500
3935 This command will print 4 bytes (10,11,12,13) each 500 ms. 3939 This command will print 4 bytes (10,11,12,13) each 500 ms.
3936 3940
3937 => mwc.l 100 12345678 10 3941 => mwc.l 100 12345678 10
3938 This command will write 12345678 to address 100 all 10 ms. 3942 This command will write 12345678 to address 100 all 10 ms.
3939 3943
3940 This only takes effect if the memory commands are activated 3944 This only takes effect if the memory commands are activated
3941 globally (CONFIG_CMD_MEM). 3945 globally (CONFIG_CMD_MEM).
3942 3946
3943 - CONFIG_SKIP_LOWLEVEL_INIT 3947 - CONFIG_SKIP_LOWLEVEL_INIT
3944 [ARM, NDS32, MIPS only] If this variable is defined, then certain 3948 [ARM, NDS32, MIPS only] If this variable is defined, then certain
3945 low level initializations (like setting up the memory 3949 low level initializations (like setting up the memory
3946 controller) are omitted and/or U-Boot does not 3950 controller) are omitted and/or U-Boot does not
3947 relocate itself into RAM. 3951 relocate itself into RAM.
3948 3952
3949 Normally this variable MUST NOT be defined. The only 3953 Normally this variable MUST NOT be defined. The only
3950 exception is when U-Boot is loaded (to RAM) by some 3954 exception is when U-Boot is loaded (to RAM) by some
3951 other boot loader or by a debugger which performs 3955 other boot loader or by a debugger which performs
3952 these initializations itself. 3956 these initializations itself.
3953 3957
3954 - CONFIG_SPL_BUILD 3958 - CONFIG_SPL_BUILD
3955 Modifies the behaviour of start.S when compiling a loader 3959 Modifies the behaviour of start.S when compiling a loader
3956 that is executed before the actual U-Boot. E.g. when 3960 that is executed before the actual U-Boot. E.g. when
3957 compiling a NAND SPL. 3961 compiling a NAND SPL.
3958 3962
3959 - CONFIG_ARCH_MAP_SYSMEM 3963 - CONFIG_ARCH_MAP_SYSMEM
3960 Generally U-Boot (and in particular the md command) uses 3964 Generally U-Boot (and in particular the md command) uses
3961 effective address. It is therefore not necessary to regard 3965 effective address. It is therefore not necessary to regard
3962 U-Boot address as virtual addresses that need to be translated 3966 U-Boot address as virtual addresses that need to be translated
3963 to physical addresses. However, sandbox requires this, since 3967 to physical addresses. However, sandbox requires this, since
3964 it maintains its own little RAM buffer which contains all 3968 it maintains its own little RAM buffer which contains all
3965 addressable memory. This option causes some memory accesses 3969 addressable memory. This option causes some memory accesses
3966 to be mapped through map_sysmem() / unmap_sysmem(). 3970 to be mapped through map_sysmem() / unmap_sysmem().
3967 3971
3968 - CONFIG_USE_ARCH_MEMCPY 3972 - CONFIG_USE_ARCH_MEMCPY
3969 CONFIG_USE_ARCH_MEMSET 3973 CONFIG_USE_ARCH_MEMSET
3970 If these options are used a optimized version of memcpy/memset will 3974 If these options are used a optimized version of memcpy/memset will
3971 be used if available. These functions may be faster under some 3975 be used if available. These functions may be faster under some
3972 conditions but may increase the binary size. 3976 conditions but may increase the binary size.
3973 3977
3974 - CONFIG_X86_RESET_VECTOR 3978 - CONFIG_X86_RESET_VECTOR
3975 If defined, the x86 reset vector code is included. This is not 3979 If defined, the x86 reset vector code is included. This is not
3976 needed when U-Boot is running from Coreboot. 3980 needed when U-Boot is running from Coreboot.
3977 3981
3978 - CONFIG_SYS_MPUCLK 3982 - CONFIG_SYS_MPUCLK
3979 Defines the MPU clock speed (in MHz). 3983 Defines the MPU clock speed (in MHz).
3980 3984
3981 NOTE : currently only supported on AM335x platforms. 3985 NOTE : currently only supported on AM335x platforms.
3982 3986
3983 Freescale QE/FMAN Firmware Support: 3987 Freescale QE/FMAN Firmware Support:
3984 ----------------------------------- 3988 -----------------------------------
3985 3989
3986 The Freescale QUICCEngine (QE) and Frame Manager (FMAN) both support the 3990 The Freescale QUICCEngine (QE) and Frame Manager (FMAN) both support the
3987 loading of "firmware", which is encoded in the QE firmware binary format. 3991 loading of "firmware", which is encoded in the QE firmware binary format.
3988 This firmware often needs to be loaded during U-Boot booting, so macros 3992 This firmware often needs to be loaded during U-Boot booting, so macros
3989 are used to identify the storage device (NOR flash, SPI, etc) and the address 3993 are used to identify the storage device (NOR flash, SPI, etc) and the address
3990 within that device. 3994 within that device.
3991 3995
3992 - CONFIG_SYS_QE_FMAN_FW_ADDR 3996 - CONFIG_SYS_QE_FMAN_FW_ADDR
3993 The address in the storage device where the firmware is located. The 3997 The address in the storage device where the firmware is located. The
3994 meaning of this address depends on which CONFIG_SYS_QE_FW_IN_xxx macro 3998 meaning of this address depends on which CONFIG_SYS_QE_FW_IN_xxx macro
3995 is also specified. 3999 is also specified.
3996 4000
3997 - CONFIG_SYS_QE_FMAN_FW_LENGTH 4001 - CONFIG_SYS_QE_FMAN_FW_LENGTH
3998 The maximum possible size of the firmware. The firmware binary format 4002 The maximum possible size of the firmware. The firmware binary format
3999 has a field that specifies the actual size of the firmware, but it 4003 has a field that specifies the actual size of the firmware, but it
4000 might not be possible to read any part of the firmware unless some 4004 might not be possible to read any part of the firmware unless some
4001 local storage is allocated to hold the entire firmware first. 4005 local storage is allocated to hold the entire firmware first.
4002 4006
4003 - CONFIG_SYS_QE_FMAN_FW_IN_NOR 4007 - CONFIG_SYS_QE_FMAN_FW_IN_NOR
4004 Specifies that QE/FMAN firmware is located in NOR flash, mapped as 4008 Specifies that QE/FMAN firmware is located in NOR flash, mapped as
4005 normal addressable memory via the LBC. CONFIG_SYS_FMAN_FW_ADDR is the 4009 normal addressable memory via the LBC. CONFIG_SYS_FMAN_FW_ADDR is the
4006 virtual address in NOR flash. 4010 virtual address in NOR flash.
4007 4011
4008 - CONFIG_SYS_QE_FMAN_FW_IN_NAND 4012 - CONFIG_SYS_QE_FMAN_FW_IN_NAND
4009 Specifies that QE/FMAN firmware is located in NAND flash. 4013 Specifies that QE/FMAN firmware is located in NAND flash.
4010 CONFIG_SYS_FMAN_FW_ADDR is the offset within NAND flash. 4014 CONFIG_SYS_FMAN_FW_ADDR is the offset within NAND flash.
4011 4015
4012 - CONFIG_SYS_QE_FMAN_FW_IN_MMC 4016 - CONFIG_SYS_QE_FMAN_FW_IN_MMC
4013 Specifies that QE/FMAN firmware is located on the primary SD/MMC 4017 Specifies that QE/FMAN firmware is located on the primary SD/MMC
4014 device. CONFIG_SYS_FMAN_FW_ADDR is the byte offset on that device. 4018 device. CONFIG_SYS_FMAN_FW_ADDR is the byte offset on that device.
4015 4019
4016 - CONFIG_SYS_QE_FMAN_FW_IN_SPIFLASH 4020 - CONFIG_SYS_QE_FMAN_FW_IN_SPIFLASH
4017 Specifies that QE/FMAN firmware is located on the primary SPI 4021 Specifies that QE/FMAN firmware is located on the primary SPI
4018 device. CONFIG_SYS_FMAN_FW_ADDR is the byte offset on that device. 4022 device. CONFIG_SYS_FMAN_FW_ADDR is the byte offset on that device.
4019 4023
4020 - CONFIG_SYS_QE_FMAN_FW_IN_REMOTE 4024 - CONFIG_SYS_QE_FMAN_FW_IN_REMOTE
4021 Specifies that QE/FMAN firmware is located in the remote (master) 4025 Specifies that QE/FMAN firmware is located in the remote (master)
4022 memory space. CONFIG_SYS_FMAN_FW_ADDR is a virtual address which 4026 memory space. CONFIG_SYS_FMAN_FW_ADDR is a virtual address which
4023 can be mapped from slave TLB->slave LAW->slave SRIO or PCIE outbound 4027 can be mapped from slave TLB->slave LAW->slave SRIO or PCIE outbound
4024 window->master inbound window->master LAW->the ucode address in 4028 window->master inbound window->master LAW->the ucode address in
4025 master's memory space. 4029 master's memory space.
4026 4030
4027 Building the Software: 4031 Building the Software:
4028 ====================== 4032 ======================
4029 4033
4030 Building U-Boot has been tested in several native build environments 4034 Building U-Boot has been tested in several native build environments
4031 and in many different cross environments. Of course we cannot support 4035 and in many different cross environments. Of course we cannot support
4032 all possibly existing versions of cross development tools in all 4036 all possibly existing versions of cross development tools in all
4033 (potentially obsolete) versions. In case of tool chain problems we 4037 (potentially obsolete) versions. In case of tool chain problems we
4034 recommend to use the ELDK (see http://www.denx.de/wiki/DULG/ELDK) 4038 recommend to use the ELDK (see http://www.denx.de/wiki/DULG/ELDK)
4035 which is extensively used to build and test U-Boot. 4039 which is extensively used to build and test U-Boot.
4036 4040
4037 If you are not using a native environment, it is assumed that you 4041 If you are not using a native environment, it is assumed that you
4038 have GNU cross compiling tools available in your path. In this case, 4042 have GNU cross compiling tools available in your path. In this case,
4039 you must set the environment variable CROSS_COMPILE in your shell. 4043 you must set the environment variable CROSS_COMPILE in your shell.
4040 Note that no changes to the Makefile or any other source files are 4044 Note that no changes to the Makefile or any other source files are
4041 necessary. For example using the ELDK on a 4xx CPU, please enter: 4045 necessary. For example using the ELDK on a 4xx CPU, please enter:
4042 4046
4043 $ CROSS_COMPILE=ppc_4xx- 4047 $ CROSS_COMPILE=ppc_4xx-
4044 $ export CROSS_COMPILE 4048 $ export CROSS_COMPILE
4045 4049
4046 Note: If you wish to generate Windows versions of the utilities in 4050 Note: If you wish to generate Windows versions of the utilities in
4047 the tools directory you can use the MinGW toolchain 4051 the tools directory you can use the MinGW toolchain
4048 (http://www.mingw.org). Set your HOST tools to the MinGW 4052 (http://www.mingw.org). Set your HOST tools to the MinGW
4049 toolchain and execute 'make tools'. For example: 4053 toolchain and execute 'make tools'. For example:
4050 4054
4051 $ make HOSTCC=i586-mingw32msvc-gcc HOSTSTRIP=i586-mingw32msvc-strip tools 4055 $ make HOSTCC=i586-mingw32msvc-gcc HOSTSTRIP=i586-mingw32msvc-strip tools
4052 4056
4053 Binaries such as tools/mkimage.exe will be created which can 4057 Binaries such as tools/mkimage.exe will be created which can
4054 be executed on computers running Windows. 4058 be executed on computers running Windows.
4055 4059
4056 U-Boot is intended to be simple to build. After installing the 4060 U-Boot is intended to be simple to build. After installing the
4057 sources you must configure U-Boot for one specific board type. This 4061 sources you must configure U-Boot for one specific board type. This
4058 is done by typing: 4062 is done by typing:
4059 4063
4060 make NAME_config 4064 make NAME_config
4061 4065
4062 where "NAME_config" is the name of one of the existing configu- 4066 where "NAME_config" is the name of one of the existing configu-
4063 rations; see boards.cfg for supported names. 4067 rations; see boards.cfg for supported names.
4064 4068
4065 Note: for some board special configuration names may exist; check if 4069 Note: for some board special configuration names may exist; check if
4066 additional information is available from the board vendor; for 4070 additional information is available from the board vendor; for
4067 instance, the TQM823L systems are available without (standard) 4071 instance, the TQM823L systems are available without (standard)
4068 or with LCD support. You can select such additional "features" 4072 or with LCD support. You can select such additional "features"
4069 when choosing the configuration, i. e. 4073 when choosing the configuration, i. e.
4070 4074
4071 make TQM823L_config 4075 make TQM823L_config
4072 - will configure for a plain TQM823L, i. e. no LCD support 4076 - will configure for a plain TQM823L, i. e. no LCD support
4073 4077
4074 make TQM823L_LCD_config 4078 make TQM823L_LCD_config
4075 - will configure for a TQM823L with U-Boot console on LCD 4079 - will configure for a TQM823L with U-Boot console on LCD
4076 4080
4077 etc. 4081 etc.
4078 4082
4079 4083
4080 Finally, type "make all", and you should get some working U-Boot 4084 Finally, type "make all", and you should get some working U-Boot
4081 images ready for download to / installation on your system: 4085 images ready for download to / installation on your system:
4082 4086
4083 - "u-boot.bin" is a raw binary image 4087 - "u-boot.bin" is a raw binary image
4084 - "u-boot" is an image in ELF binary format 4088 - "u-boot" is an image in ELF binary format
4085 - "u-boot.srec" is in Motorola S-Record format 4089 - "u-boot.srec" is in Motorola S-Record format
4086 4090
4087 By default the build is performed locally and the objects are saved 4091 By default the build is performed locally and the objects are saved
4088 in the source directory. One of the two methods can be used to change 4092 in the source directory. One of the two methods can be used to change
4089 this behavior and build U-Boot to some external directory: 4093 this behavior and build U-Boot to some external directory:
4090 4094
4091 1. Add O= to the make command line invocations: 4095 1. Add O= to the make command line invocations:
4092 4096
4093 make O=/tmp/build distclean 4097 make O=/tmp/build distclean
4094 make O=/tmp/build NAME_config 4098 make O=/tmp/build NAME_config
4095 make O=/tmp/build all 4099 make O=/tmp/build all
4096 4100
4097 2. Set environment variable BUILD_DIR to point to the desired location: 4101 2. Set environment variable BUILD_DIR to point to the desired location:
4098 4102
4099 export BUILD_DIR=/tmp/build 4103 export BUILD_DIR=/tmp/build
4100 make distclean 4104 make distclean
4101 make NAME_config 4105 make NAME_config
4102 make all 4106 make all
4103 4107
4104 Note that the command line "O=" setting overrides the BUILD_DIR environment 4108 Note that the command line "O=" setting overrides the BUILD_DIR environment
4105 variable. 4109 variable.
4106 4110
4107 4111
4108 Please be aware that the Makefiles assume you are using GNU make, so 4112 Please be aware that the Makefiles assume you are using GNU make, so
4109 for instance on NetBSD you might need to use "gmake" instead of 4113 for instance on NetBSD you might need to use "gmake" instead of
4110 native "make". 4114 native "make".
4111 4115
4112 4116
4113 If the system board that you have is not listed, then you will need 4117 If the system board that you have is not listed, then you will need
4114 to port U-Boot to your hardware platform. To do this, follow these 4118 to port U-Boot to your hardware platform. To do this, follow these
4115 steps: 4119 steps:
4116 4120
4117 1. Add a new configuration option for your board to the toplevel 4121 1. Add a new configuration option for your board to the toplevel
4118 "boards.cfg" file, using the existing entries as examples. 4122 "boards.cfg" file, using the existing entries as examples.
4119 Follow the instructions there to keep the boards in order. 4123 Follow the instructions there to keep the boards in order.
4120 2. Create a new directory to hold your board specific code. Add any 4124 2. Create a new directory to hold your board specific code. Add any
4121 files you need. In your board directory, you will need at least 4125 files you need. In your board directory, you will need at least
4122 the "Makefile", a "<board>.c", "flash.c" and "u-boot.lds". 4126 the "Makefile", a "<board>.c", "flash.c" and "u-boot.lds".
4123 3. Create a new configuration file "include/configs/<board>.h" for 4127 3. Create a new configuration file "include/configs/<board>.h" for
4124 your board 4128 your board
4125 3. If you're porting U-Boot to a new CPU, then also create a new 4129 3. If you're porting U-Boot to a new CPU, then also create a new
4126 directory to hold your CPU specific code. Add any files you need. 4130 directory to hold your CPU specific code. Add any files you need.
4127 4. Run "make <board>_config" with your new name. 4131 4. Run "make <board>_config" with your new name.
4128 5. Type "make", and you should get a working "u-boot.srec" file 4132 5. Type "make", and you should get a working "u-boot.srec" file
4129 to be installed on your target system. 4133 to be installed on your target system.
4130 6. Debug and solve any problems that might arise. 4134 6. Debug and solve any problems that might arise.
4131 [Of course, this last step is much harder than it sounds.] 4135 [Of course, this last step is much harder than it sounds.]
4132 4136
4133 4137
4134 Testing of U-Boot Modifications, Ports to New Hardware, etc.: 4138 Testing of U-Boot Modifications, Ports to New Hardware, etc.:
4135 ============================================================== 4139 ==============================================================
4136 4140
4137 If you have modified U-Boot sources (for instance added a new board 4141 If you have modified U-Boot sources (for instance added a new board
4138 or support for new devices, a new CPU, etc.) you are expected to 4142 or support for new devices, a new CPU, etc.) you are expected to
4139 provide feedback to the other developers. The feedback normally takes 4143 provide feedback to the other developers. The feedback normally takes
4140 the form of a "patch", i. e. a context diff against a certain (latest 4144 the form of a "patch", i. e. a context diff against a certain (latest
4141 official or latest in the git repository) version of U-Boot sources. 4145 official or latest in the git repository) version of U-Boot sources.
4142 4146
4143 But before you submit such a patch, please verify that your modifi- 4147 But before you submit such a patch, please verify that your modifi-
4144 cation did not break existing code. At least make sure that *ALL* of 4148 cation did not break existing code. At least make sure that *ALL* of
4145 the supported boards compile WITHOUT ANY compiler warnings. To do so, 4149 the supported boards compile WITHOUT ANY compiler warnings. To do so,
4146 just run the "MAKEALL" script, which will configure and build U-Boot 4150 just run the "MAKEALL" script, which will configure and build U-Boot
4147 for ALL supported system. Be warned, this will take a while. You can 4151 for ALL supported system. Be warned, this will take a while. You can
4148 select which (cross) compiler to use by passing a `CROSS_COMPILE' 4152 select which (cross) compiler to use by passing a `CROSS_COMPILE'
4149 environment variable to the script, i. e. to use the ELDK cross tools 4153 environment variable to the script, i. e. to use the ELDK cross tools
4150 you can type 4154 you can type
4151 4155
4152 CROSS_COMPILE=ppc_8xx- MAKEALL 4156 CROSS_COMPILE=ppc_8xx- MAKEALL
4153 4157
4154 or to build on a native PowerPC system you can type 4158 or to build on a native PowerPC system you can type
4155 4159
4156 CROSS_COMPILE=' ' MAKEALL 4160 CROSS_COMPILE=' ' MAKEALL
4157 4161
4158 When using the MAKEALL script, the default behaviour is to build 4162 When using the MAKEALL script, the default behaviour is to build
4159 U-Boot in the source directory. This location can be changed by 4163 U-Boot in the source directory. This location can be changed by
4160 setting the BUILD_DIR environment variable. Also, for each target 4164 setting the BUILD_DIR environment variable. Also, for each target
4161 built, the MAKEALL script saves two log files (<target>.ERR and 4165 built, the MAKEALL script saves two log files (<target>.ERR and
4162 <target>.MAKEALL) in the <source dir>/LOG directory. This default 4166 <target>.MAKEALL) in the <source dir>/LOG directory. This default
4163 location can be changed by setting the MAKEALL_LOGDIR environment 4167 location can be changed by setting the MAKEALL_LOGDIR environment
4164 variable. For example: 4168 variable. For example:
4165 4169
4166 export BUILD_DIR=/tmp/build 4170 export BUILD_DIR=/tmp/build
4167 export MAKEALL_LOGDIR=/tmp/log 4171 export MAKEALL_LOGDIR=/tmp/log
4168 CROSS_COMPILE=ppc_8xx- MAKEALL 4172 CROSS_COMPILE=ppc_8xx- MAKEALL
4169 4173
4170 With the above settings build objects are saved in the /tmp/build, 4174 With the above settings build objects are saved in the /tmp/build,
4171 log files are saved in the /tmp/log and the source tree remains clean 4175 log files are saved in the /tmp/log and the source tree remains clean
4172 during the whole build process. 4176 during the whole build process.
4173 4177
4174 4178
4175 See also "U-Boot Porting Guide" below. 4179 See also "U-Boot Porting Guide" below.
4176 4180
4177 4181
4178 Monitor Commands - Overview: 4182 Monitor Commands - Overview:
4179 ============================ 4183 ============================
4180 4184
4181 go - start application at address 'addr' 4185 go - start application at address 'addr'
4182 run - run commands in an environment variable 4186 run - run commands in an environment variable
4183 bootm - boot application image from memory 4187 bootm - boot application image from memory
4184 bootp - boot image via network using BootP/TFTP protocol 4188 bootp - boot image via network using BootP/TFTP protocol
4185 bootz - boot zImage from memory 4189 bootz - boot zImage from memory
4186 tftpboot- boot image via network using TFTP protocol 4190 tftpboot- boot image via network using TFTP protocol
4187 and env variables "ipaddr" and "serverip" 4191 and env variables "ipaddr" and "serverip"
4188 (and eventually "gatewayip") 4192 (and eventually "gatewayip")
4189 tftpput - upload a file via network using TFTP protocol 4193 tftpput - upload a file via network using TFTP protocol
4190 rarpboot- boot image via network using RARP/TFTP protocol 4194 rarpboot- boot image via network using RARP/TFTP protocol
4191 diskboot- boot from IDE devicebootd - boot default, i.e., run 'bootcmd' 4195 diskboot- boot from IDE devicebootd - boot default, i.e., run 'bootcmd'
4192 loads - load S-Record file over serial line 4196 loads - load S-Record file over serial line
4193 loadb - load binary file over serial line (kermit mode) 4197 loadb - load binary file over serial line (kermit mode)
4194 md - memory display 4198 md - memory display
4195 mm - memory modify (auto-incrementing) 4199 mm - memory modify (auto-incrementing)
4196 nm - memory modify (constant address) 4200 nm - memory modify (constant address)
4197 mw - memory write (fill) 4201 mw - memory write (fill)
4198 cp - memory copy 4202 cp - memory copy
4199 cmp - memory compare 4203 cmp - memory compare
4200 crc32 - checksum calculation 4204 crc32 - checksum calculation
4201 i2c - I2C sub-system 4205 i2c - I2C sub-system
4202 sspi - SPI utility commands 4206 sspi - SPI utility commands
4203 base - print or set address offset 4207 base - print or set address offset
4204 printenv- print environment variables 4208 printenv- print environment variables
4205 setenv - set environment variables 4209 setenv - set environment variables
4206 saveenv - save environment variables to persistent storage 4210 saveenv - save environment variables to persistent storage
4207 protect - enable or disable FLASH write protection 4211 protect - enable or disable FLASH write protection
4208 erase - erase FLASH memory 4212 erase - erase FLASH memory
4209 flinfo - print FLASH memory information 4213 flinfo - print FLASH memory information
4210 nand - NAND memory operations (see doc/README.nand) 4214 nand - NAND memory operations (see doc/README.nand)
4211 bdinfo - print Board Info structure 4215 bdinfo - print Board Info structure
4212 iminfo - print header information for application image 4216 iminfo - print header information for application image
4213 coninfo - print console devices and informations 4217 coninfo - print console devices and informations
4214 ide - IDE sub-system 4218 ide - IDE sub-system
4215 loop - infinite loop on address range 4219 loop - infinite loop on address range
4216 loopw - infinite write loop on address range 4220 loopw - infinite write loop on address range
4217 mtest - simple RAM test 4221 mtest - simple RAM test
4218 icache - enable or disable instruction cache 4222 icache - enable or disable instruction cache
4219 dcache - enable or disable data cache 4223 dcache - enable or disable data cache
4220 reset - Perform RESET of the CPU 4224 reset - Perform RESET of the CPU
4221 echo - echo args to console 4225 echo - echo args to console
4222 version - print monitor version 4226 version - print monitor version
4223 help - print online help 4227 help - print online help
4224 ? - alias for 'help' 4228 ? - alias for 'help'
4225 4229
4226 4230
4227 Monitor Commands - Detailed Description: 4231 Monitor Commands - Detailed Description:
4228 ======================================== 4232 ========================================
4229 4233
4230 TODO. 4234 TODO.
4231 4235
4232 For now: just type "help <command>". 4236 For now: just type "help <command>".
4233 4237
4234 4238
4235 Environment Variables: 4239 Environment Variables:
4236 ====================== 4240 ======================
4237 4241
4238 U-Boot supports user configuration using Environment Variables which 4242 U-Boot supports user configuration using Environment Variables which
4239 can be made persistent by saving to Flash memory. 4243 can be made persistent by saving to Flash memory.
4240 4244
4241 Environment Variables are set using "setenv", printed using 4245 Environment Variables are set using "setenv", printed using
4242 "printenv", and saved to Flash using "saveenv". Using "setenv" 4246 "printenv", and saved to Flash using "saveenv". Using "setenv"
4243 without a value can be used to delete a variable from the 4247 without a value can be used to delete a variable from the
4244 environment. As long as you don't save the environment you are 4248 environment. As long as you don't save the environment you are
4245 working with an in-memory copy. In case the Flash area containing the 4249 working with an in-memory copy. In case the Flash area containing the
4246 environment is erased by accident, a default environment is provided. 4250 environment is erased by accident, a default environment is provided.
4247 4251
4248 Some configuration options can be set using Environment Variables. 4252 Some configuration options can be set using Environment Variables.
4249 4253
4250 List of environment variables (most likely not complete): 4254 List of environment variables (most likely not complete):
4251 4255
4252 baudrate - see CONFIG_BAUDRATE 4256 baudrate - see CONFIG_BAUDRATE
4253 4257
4254 bootdelay - see CONFIG_BOOTDELAY 4258 bootdelay - see CONFIG_BOOTDELAY
4255 4259
4256 bootcmd - see CONFIG_BOOTCOMMAND 4260 bootcmd - see CONFIG_BOOTCOMMAND
4257 4261
4258 bootargs - Boot arguments when booting an RTOS image 4262 bootargs - Boot arguments when booting an RTOS image
4259 4263
4260 bootfile - Name of the image to load with TFTP 4264 bootfile - Name of the image to load with TFTP
4261 4265
4262 bootm_low - Memory range available for image processing in the bootm 4266 bootm_low - Memory range available for image processing in the bootm
4263 command can be restricted. This variable is given as 4267 command can be restricted. This variable is given as
4264 a hexadecimal number and defines lowest address allowed 4268 a hexadecimal number and defines lowest address allowed
4265 for use by the bootm command. See also "bootm_size" 4269 for use by the bootm command. See also "bootm_size"
4266 environment variable. Address defined by "bootm_low" is 4270 environment variable. Address defined by "bootm_low" is
4267 also the base of the initial memory mapping for the Linux 4271 also the base of the initial memory mapping for the Linux
4268 kernel -- see the description of CONFIG_SYS_BOOTMAPSZ and 4272 kernel -- see the description of CONFIG_SYS_BOOTMAPSZ and
4269 bootm_mapsize. 4273 bootm_mapsize.
4270 4274
4271 bootm_mapsize - Size of the initial memory mapping for the Linux kernel. 4275 bootm_mapsize - Size of the initial memory mapping for the Linux kernel.
4272 This variable is given as a hexadecimal number and it 4276 This variable is given as a hexadecimal number and it
4273 defines the size of the memory region starting at base 4277 defines the size of the memory region starting at base
4274 address bootm_low that is accessible by the Linux kernel 4278 address bootm_low that is accessible by the Linux kernel
4275 during early boot. If unset, CONFIG_SYS_BOOTMAPSZ is used 4279 during early boot. If unset, CONFIG_SYS_BOOTMAPSZ is used
4276 as the default value if it is defined, and bootm_size is 4280 as the default value if it is defined, and bootm_size is
4277 used otherwise. 4281 used otherwise.
4278 4282
4279 bootm_size - Memory range available for image processing in the bootm 4283 bootm_size - Memory range available for image processing in the bootm
4280 command can be restricted. This variable is given as 4284 command can be restricted. This variable is given as
4281 a hexadecimal number and defines the size of the region 4285 a hexadecimal number and defines the size of the region
4282 allowed for use by the bootm command. See also "bootm_low" 4286 allowed for use by the bootm command. See also "bootm_low"
4283 environment variable. 4287 environment variable.
4284 4288
4285 updatefile - Location of the software update file on a TFTP server, used 4289 updatefile - Location of the software update file on a TFTP server, used
4286 by the automatic software update feature. Please refer to 4290 by the automatic software update feature. Please refer to
4287 documentation in doc/README.update for more details. 4291 documentation in doc/README.update for more details.
4288 4292
4289 autoload - if set to "no" (any string beginning with 'n'), 4293 autoload - if set to "no" (any string beginning with 'n'),
4290 "bootp" will just load perform a lookup of the 4294 "bootp" will just load perform a lookup of the
4291 configuration from the BOOTP server, but not try to 4295 configuration from the BOOTP server, but not try to
4292 load any image using TFTP 4296 load any image using TFTP
4293 4297
4294 autostart - if set to "yes", an image loaded using the "bootp", 4298 autostart - if set to "yes", an image loaded using the "bootp",
4295 "rarpboot", "tftpboot" or "diskboot" commands will 4299 "rarpboot", "tftpboot" or "diskboot" commands will
4296 be automatically started (by internally calling 4300 be automatically started (by internally calling
4297 "bootm") 4301 "bootm")
4298 4302
4299 If set to "no", a standalone image passed to the 4303 If set to "no", a standalone image passed to the
4300 "bootm" command will be copied to the load address 4304 "bootm" command will be copied to the load address
4301 (and eventually uncompressed), but NOT be started. 4305 (and eventually uncompressed), but NOT be started.
4302 This can be used to load and uncompress arbitrary 4306 This can be used to load and uncompress arbitrary
4303 data. 4307 data.
4304 4308
4305 fdt_high - if set this restricts the maximum address that the 4309 fdt_high - if set this restricts the maximum address that the
4306 flattened device tree will be copied into upon boot. 4310 flattened device tree will be copied into upon boot.
4307 For example, if you have a system with 1 GB memory 4311 For example, if you have a system with 1 GB memory
4308 at physical address 0x10000000, while Linux kernel 4312 at physical address 0x10000000, while Linux kernel
4309 only recognizes the first 704 MB as low memory, you 4313 only recognizes the first 704 MB as low memory, you
4310 may need to set fdt_high as 0x3C000000 to have the 4314 may need to set fdt_high as 0x3C000000 to have the
4311 device tree blob be copied to the maximum address 4315 device tree blob be copied to the maximum address
4312 of the 704 MB low memory, so that Linux kernel can 4316 of the 704 MB low memory, so that Linux kernel can
4313 access it during the boot procedure. 4317 access it during the boot procedure.
4314 4318
4315 If this is set to the special value 0xFFFFFFFF then 4319 If this is set to the special value 0xFFFFFFFF then
4316 the fdt will not be copied at all on boot. For this 4320 the fdt will not be copied at all on boot. For this
4317 to work it must reside in writable memory, have 4321 to work it must reside in writable memory, have
4318 sufficient padding on the end of it for u-boot to 4322 sufficient padding on the end of it for u-boot to
4319 add the information it needs into it, and the memory 4323 add the information it needs into it, and the memory
4320 must be accessible by the kernel. 4324 must be accessible by the kernel.
4321 4325
4322 fdtcontroladdr- if set this is the address of the control flattened 4326 fdtcontroladdr- if set this is the address of the control flattened
4323 device tree used by U-Boot when CONFIG_OF_CONTROL is 4327 device tree used by U-Boot when CONFIG_OF_CONTROL is
4324 defined. 4328 defined.
4325 4329
4326 i2cfast - (PPC405GP|PPC405EP only) 4330 i2cfast - (PPC405GP|PPC405EP only)
4327 if set to 'y' configures Linux I2C driver for fast 4331 if set to 'y' configures Linux I2C driver for fast
4328 mode (400kHZ). This environment variable is used in 4332 mode (400kHZ). This environment variable is used in
4329 initialization code. So, for changes to be effective 4333 initialization code. So, for changes to be effective
4330 it must be saved and board must be reset. 4334 it must be saved and board must be reset.
4331 4335
4332 initrd_high - restrict positioning of initrd images: 4336 initrd_high - restrict positioning of initrd images:
4333 If this variable is not set, initrd images will be 4337 If this variable is not set, initrd images will be
4334 copied to the highest possible address in RAM; this 4338 copied to the highest possible address in RAM; this
4335 is usually what you want since it allows for 4339 is usually what you want since it allows for
4336 maximum initrd size. If for some reason you want to 4340 maximum initrd size. If for some reason you want to
4337 make sure that the initrd image is loaded below the 4341 make sure that the initrd image is loaded below the
4338 CONFIG_SYS_BOOTMAPSZ limit, you can set this environment 4342 CONFIG_SYS_BOOTMAPSZ limit, you can set this environment
4339 variable to a value of "no" or "off" or "0". 4343 variable to a value of "no" or "off" or "0".
4340 Alternatively, you can set it to a maximum upper 4344 Alternatively, you can set it to a maximum upper
4341 address to use (U-Boot will still check that it 4345 address to use (U-Boot will still check that it
4342 does not overwrite the U-Boot stack and data). 4346 does not overwrite the U-Boot stack and data).
4343 4347
4344 For instance, when you have a system with 16 MB 4348 For instance, when you have a system with 16 MB
4345 RAM, and want to reserve 4 MB from use by Linux, 4349 RAM, and want to reserve 4 MB from use by Linux,
4346 you can do this by adding "mem=12M" to the value of 4350 you can do this by adding "mem=12M" to the value of
4347 the "bootargs" variable. However, now you must make 4351 the "bootargs" variable. However, now you must make
4348 sure that the initrd image is placed in the first 4352 sure that the initrd image is placed in the first
4349 12 MB as well - this can be done with 4353 12 MB as well - this can be done with
4350 4354
4351 setenv initrd_high 00c00000 4355 setenv initrd_high 00c00000
4352 4356
4353 If you set initrd_high to 0xFFFFFFFF, this is an 4357 If you set initrd_high to 0xFFFFFFFF, this is an
4354 indication to U-Boot that all addresses are legal 4358 indication to U-Boot that all addresses are legal
4355 for the Linux kernel, including addresses in flash 4359 for the Linux kernel, including addresses in flash
4356 memory. In this case U-Boot will NOT COPY the 4360 memory. In this case U-Boot will NOT COPY the
4357 ramdisk at all. This may be useful to reduce the 4361 ramdisk at all. This may be useful to reduce the
4358 boot time on your system, but requires that this 4362 boot time on your system, but requires that this
4359 feature is supported by your Linux kernel. 4363 feature is supported by your Linux kernel.
4360 4364
4361 ipaddr - IP address; needed for tftpboot command 4365 ipaddr - IP address; needed for tftpboot command
4362 4366
4363 loadaddr - Default load address for commands like "bootp", 4367 loadaddr - Default load address for commands like "bootp",
4364 "rarpboot", "tftpboot", "loadb" or "diskboot" 4368 "rarpboot", "tftpboot", "loadb" or "diskboot"
4365 4369
4366 loads_echo - see CONFIG_LOADS_ECHO 4370 loads_echo - see CONFIG_LOADS_ECHO
4367 4371
4368 serverip - TFTP server IP address; needed for tftpboot command 4372 serverip - TFTP server IP address; needed for tftpboot command
4369 4373
4370 bootretry - see CONFIG_BOOT_RETRY_TIME 4374 bootretry - see CONFIG_BOOT_RETRY_TIME
4371 4375
4372 bootdelaykey - see CONFIG_AUTOBOOT_DELAY_STR 4376 bootdelaykey - see CONFIG_AUTOBOOT_DELAY_STR
4373 4377
4374 bootstopkey - see CONFIG_AUTOBOOT_STOP_STR 4378 bootstopkey - see CONFIG_AUTOBOOT_STOP_STR
4375 4379
4376 ethprime - controls which interface is used first. 4380 ethprime - controls which interface is used first.
4377 4381
4378 ethact - controls which interface is currently active. 4382 ethact - controls which interface is currently active.
4379 For example you can do the following 4383 For example you can do the following
4380 4384
4381 => setenv ethact FEC 4385 => setenv ethact FEC
4382 => ping 192.168.0.1 # traffic sent on FEC 4386 => ping 192.168.0.1 # traffic sent on FEC
4383 => setenv ethact SCC 4387 => setenv ethact SCC
4384 => ping 10.0.0.1 # traffic sent on SCC 4388 => ping 10.0.0.1 # traffic sent on SCC
4385 4389
4386 ethrotate - When set to "no" U-Boot does not go through all 4390 ethrotate - When set to "no" U-Boot does not go through all
4387 available network interfaces. 4391 available network interfaces.
4388 It just stays at the currently selected interface. 4392 It just stays at the currently selected interface.
4389 4393
4390 netretry - When set to "no" each network operation will 4394 netretry - When set to "no" each network operation will
4391 either succeed or fail without retrying. 4395 either succeed or fail without retrying.
4392 When set to "once" the network operation will 4396 When set to "once" the network operation will
4393 fail when all the available network interfaces 4397 fail when all the available network interfaces
4394 are tried once without success. 4398 are tried once without success.
4395 Useful on scripts which control the retry operation 4399 Useful on scripts which control the retry operation
4396 themselves. 4400 themselves.
4397 4401
4398 npe_ucode - set load address for the NPE microcode 4402 npe_ucode - set load address for the NPE microcode
4399 4403
4400 tftpsrcport - If this is set, the value is used for TFTP's 4404 tftpsrcport - If this is set, the value is used for TFTP's
4401 UDP source port. 4405 UDP source port.
4402 4406
4403 tftpdstport - If this is set, the value is used for TFTP's UDP 4407 tftpdstport - If this is set, the value is used for TFTP's UDP
4404 destination port instead of the Well Know Port 69. 4408 destination port instead of the Well Know Port 69.
4405 4409
4406 tftpblocksize - Block size to use for TFTP transfers; if not set, 4410 tftpblocksize - Block size to use for TFTP transfers; if not set,
4407 we use the TFTP server's default block size 4411 we use the TFTP server's default block size
4408 4412
4409 tftptimeout - Retransmission timeout for TFTP packets (in milli- 4413 tftptimeout - Retransmission timeout for TFTP packets (in milli-
4410 seconds, minimum value is 1000 = 1 second). Defines 4414 seconds, minimum value is 1000 = 1 second). Defines
4411 when a packet is considered to be lost so it has to 4415 when a packet is considered to be lost so it has to
4412 be retransmitted. The default is 5000 = 5 seconds. 4416 be retransmitted. The default is 5000 = 5 seconds.
4413 Lowering this value may make downloads succeed 4417 Lowering this value may make downloads succeed
4414 faster in networks with high packet loss rates or 4418 faster in networks with high packet loss rates or
4415 with unreliable TFTP servers. 4419 with unreliable TFTP servers.
4416 4420
4417 vlan - When set to a value < 4095 the traffic over 4421 vlan - When set to a value < 4095 the traffic over
4418 Ethernet is encapsulated/received over 802.1q 4422 Ethernet is encapsulated/received over 802.1q
4419 VLAN tagged frames. 4423 VLAN tagged frames.
4420 4424
4421 The following image location variables contain the location of images 4425 The following image location variables contain the location of images
4422 used in booting. The "Image" column gives the role of the image and is 4426 used in booting. The "Image" column gives the role of the image and is
4423 not an environment variable name. The other columns are environment 4427 not an environment variable name. The other columns are environment
4424 variable names. "File Name" gives the name of the file on a TFTP 4428 variable names. "File Name" gives the name of the file on a TFTP
4425 server, "RAM Address" gives the location in RAM the image will be 4429 server, "RAM Address" gives the location in RAM the image will be
4426 loaded to, and "Flash Location" gives the image's address in NOR 4430 loaded to, and "Flash Location" gives the image's address in NOR
4427 flash or offset in NAND flash. 4431 flash or offset in NAND flash.
4428 4432
4429 *Note* - these variables don't have to be defined for all boards, some 4433 *Note* - these variables don't have to be defined for all boards, some
4430 boards currenlty use other variables for these purposes, and some 4434 boards currenlty use other variables for these purposes, and some
4431 boards use these variables for other purposes. 4435 boards use these variables for other purposes.
4432 4436
4433 Image File Name RAM Address Flash Location 4437 Image File Name RAM Address Flash Location
4434 ----- --------- ----------- -------------- 4438 ----- --------- ----------- --------------
4435 u-boot u-boot u-boot_addr_r u-boot_addr 4439 u-boot u-boot u-boot_addr_r u-boot_addr
4436 Linux kernel bootfile kernel_addr_r kernel_addr 4440 Linux kernel bootfile kernel_addr_r kernel_addr
4437 device tree blob fdtfile fdt_addr_r fdt_addr 4441 device tree blob fdtfile fdt_addr_r fdt_addr
4438 ramdisk ramdiskfile ramdisk_addr_r ramdisk_addr 4442 ramdisk ramdiskfile ramdisk_addr_r ramdisk_addr
4439 4443
4440 The following environment variables may be used and automatically 4444 The following environment variables may be used and automatically
4441 updated by the network boot commands ("bootp" and "rarpboot"), 4445 updated by the network boot commands ("bootp" and "rarpboot"),
4442 depending the information provided by your boot server: 4446 depending the information provided by your boot server:
4443 4447
4444 bootfile - see above 4448 bootfile - see above
4445 dnsip - IP address of your Domain Name Server 4449 dnsip - IP address of your Domain Name Server
4446 dnsip2 - IP address of your secondary Domain Name Server 4450 dnsip2 - IP address of your secondary Domain Name Server
4447 gatewayip - IP address of the Gateway (Router) to use 4451 gatewayip - IP address of the Gateway (Router) to use
4448 hostname - Target hostname 4452 hostname - Target hostname
4449 ipaddr - see above 4453 ipaddr - see above
4450 netmask - Subnet Mask 4454 netmask - Subnet Mask
4451 rootpath - Pathname of the root filesystem on the NFS server 4455 rootpath - Pathname of the root filesystem on the NFS server
4452 serverip - see above 4456 serverip - see above
4453 4457
4454 4458
4455 There are two special Environment Variables: 4459 There are two special Environment Variables:
4456 4460
4457 serial# - contains hardware identification information such 4461 serial# - contains hardware identification information such
4458 as type string and/or serial number 4462 as type string and/or serial number
4459 ethaddr - Ethernet address 4463 ethaddr - Ethernet address
4460 4464
4461 These variables can be set only once (usually during manufacturing of 4465 These variables can be set only once (usually during manufacturing of
4462 the board). U-Boot refuses to delete or overwrite these variables 4466 the board). U-Boot refuses to delete or overwrite these variables
4463 once they have been set once. 4467 once they have been set once.
4464 4468
4465 4469
4466 Further special Environment Variables: 4470 Further special Environment Variables:
4467 4471
4468 ver - Contains the U-Boot version string as printed 4472 ver - Contains the U-Boot version string as printed
4469 with the "version" command. This variable is 4473 with the "version" command. This variable is
4470 readonly (see CONFIG_VERSION_VARIABLE). 4474 readonly (see CONFIG_VERSION_VARIABLE).
4471 4475
4472 4476
4473 Please note that changes to some configuration parameters may take 4477 Please note that changes to some configuration parameters may take
4474 only effect after the next boot (yes, that's just like Windoze :-). 4478 only effect after the next boot (yes, that's just like Windoze :-).
4475 4479
4476 4480
4477 Callback functions for environment variables: 4481 Callback functions for environment variables:
4478 --------------------------------------------- 4482 ---------------------------------------------
4479 4483
4480 For some environment variables, the behavior of u-boot needs to change 4484 For some environment variables, the behavior of u-boot needs to change
4481 when their values are changed. This functionailty allows functions to 4485 when their values are changed. This functionailty allows functions to
4482 be associated with arbitrary variables. On creation, overwrite, or 4486 be associated with arbitrary variables. On creation, overwrite, or
4483 deletion, the callback will provide the opportunity for some side 4487 deletion, the callback will provide the opportunity for some side
4484 effect to happen or for the change to be rejected. 4488 effect to happen or for the change to be rejected.
4485 4489
4486 The callbacks are named and associated with a function using the 4490 The callbacks are named and associated with a function using the
4487 U_BOOT_ENV_CALLBACK macro in your board or driver code. 4491 U_BOOT_ENV_CALLBACK macro in your board or driver code.
4488 4492
4489 These callbacks are associated with variables in one of two ways. The 4493 These callbacks are associated with variables in one of two ways. The
4490 static list can be added to by defining CONFIG_ENV_CALLBACK_LIST_STATIC 4494 static list can be added to by defining CONFIG_ENV_CALLBACK_LIST_STATIC
4491 in the board configuration to a string that defines a list of 4495 in the board configuration to a string that defines a list of
4492 associations. The list must be in the following format: 4496 associations. The list must be in the following format:
4493 4497
4494 entry = variable_name[:callback_name] 4498 entry = variable_name[:callback_name]
4495 list = entry[,list] 4499 list = entry[,list]
4496 4500
4497 If the callback name is not specified, then the callback is deleted. 4501 If the callback name is not specified, then the callback is deleted.
4498 Spaces are also allowed anywhere in the list. 4502 Spaces are also allowed anywhere in the list.
4499 4503
4500 Callbacks can also be associated by defining the ".callbacks" variable 4504 Callbacks can also be associated by defining the ".callbacks" variable
4501 with the same list format above. Any association in ".callbacks" will 4505 with the same list format above. Any association in ".callbacks" will
4502 override any association in the static list. You can define 4506 override any association in the static list. You can define
4503 CONFIG_ENV_CALLBACK_LIST_DEFAULT to a list (string) to define the 4507 CONFIG_ENV_CALLBACK_LIST_DEFAULT to a list (string) to define the
4504 ".callbacks" envirnoment variable in the default or embedded environment. 4508 ".callbacks" envirnoment variable in the default or embedded environment.
4505 4509
4506 4510
4507 Command Line Parsing: 4511 Command Line Parsing:
4508 ===================== 4512 =====================
4509 4513
4510 There are two different command line parsers available with U-Boot: 4514 There are two different command line parsers available with U-Boot:
4511 the old "simple" one, and the much more powerful "hush" shell: 4515 the old "simple" one, and the much more powerful "hush" shell:
4512 4516
4513 Old, simple command line parser: 4517 Old, simple command line parser:
4514 -------------------------------- 4518 --------------------------------
4515 4519
4516 - supports environment variables (through setenv / saveenv commands) 4520 - supports environment variables (through setenv / saveenv commands)
4517 - several commands on one line, separated by ';' 4521 - several commands on one line, separated by ';'
4518 - variable substitution using "... ${name} ..." syntax 4522 - variable substitution using "... ${name} ..." syntax
4519 - special characters ('$', ';') can be escaped by prefixing with '\', 4523 - special characters ('$', ';') can be escaped by prefixing with '\',
4520 for example: 4524 for example:
4521 setenv bootcmd bootm \${address} 4525 setenv bootcmd bootm \${address}
4522 - You can also escape text by enclosing in single apostrophes, for example: 4526 - You can also escape text by enclosing in single apostrophes, for example:
4523 setenv addip 'setenv bootargs $bootargs ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname::off' 4527 setenv addip 'setenv bootargs $bootargs ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname::off'
4524 4528
4525 Hush shell: 4529 Hush shell:
4526 ----------- 4530 -----------
4527 4531
4528 - similar to Bourne shell, with control structures like 4532 - similar to Bourne shell, with control structures like
4529 if...then...else...fi, for...do...done; while...do...done, 4533 if...then...else...fi, for...do...done; while...do...done,
4530 until...do...done, ... 4534 until...do...done, ...
4531 - supports environment ("global") variables (through setenv / saveenv 4535 - supports environment ("global") variables (through setenv / saveenv
4532 commands) and local shell variables (through standard shell syntax 4536 commands) and local shell variables (through standard shell syntax
4533 "name=value"); only environment variables can be used with "run" 4537 "name=value"); only environment variables can be used with "run"
4534 command 4538 command
4535 4539
4536 General rules: 4540 General rules:
4537 -------------- 4541 --------------
4538 4542
4539 (1) If a command line (or an environment variable executed by a "run" 4543 (1) If a command line (or an environment variable executed by a "run"
4540 command) contains several commands separated by semicolon, and 4544 command) contains several commands separated by semicolon, and
4541 one of these commands fails, then the remaining commands will be 4545 one of these commands fails, then the remaining commands will be
4542 executed anyway. 4546 executed anyway.
4543 4547
4544 (2) If you execute several variables with one call to run (i. e. 4548 (2) If you execute several variables with one call to run (i. e.
4545 calling run with a list of variables as arguments), any failing 4549 calling run with a list of variables as arguments), any failing
4546 command will cause "run" to terminate, i. e. the remaining 4550 command will cause "run" to terminate, i. e. the remaining
4547 variables are not executed. 4551 variables are not executed.
4548 4552
4549 Note for Redundant Ethernet Interfaces: 4553 Note for Redundant Ethernet Interfaces:
4550 ======================================= 4554 =======================================
4551 4555
4552 Some boards come with redundant Ethernet interfaces; U-Boot supports 4556 Some boards come with redundant Ethernet interfaces; U-Boot supports
4553 such configurations and is capable of automatic selection of a 4557 such configurations and is capable of automatic selection of a
4554 "working" interface when needed. MAC assignment works as follows: 4558 "working" interface when needed. MAC assignment works as follows:
4555 4559
4556 Network interfaces are numbered eth0, eth1, eth2, ... Corresponding 4560 Network interfaces are numbered eth0, eth1, eth2, ... Corresponding
4557 MAC addresses can be stored in the environment as "ethaddr" (=>eth0), 4561 MAC addresses can be stored in the environment as "ethaddr" (=>eth0),
4558 "eth1addr" (=>eth1), "eth2addr", ... 4562 "eth1addr" (=>eth1), "eth2addr", ...
4559 4563
4560 If the network interface stores some valid MAC address (for instance 4564 If the network interface stores some valid MAC address (for instance
4561 in SROM), this is used as default address if there is NO correspon- 4565 in SROM), this is used as default address if there is NO correspon-
4562 ding setting in the environment; if the corresponding environment 4566 ding setting in the environment; if the corresponding environment
4563 variable is set, this overrides the settings in the card; that means: 4567 variable is set, this overrides the settings in the card; that means:
4564 4568
4565 o If the SROM has a valid MAC address, and there is no address in the 4569 o If the SROM has a valid MAC address, and there is no address in the
4566 environment, the SROM's address is used. 4570 environment, the SROM's address is used.
4567 4571
4568 o If there is no valid address in the SROM, and a definition in the 4572 o If there is no valid address in the SROM, and a definition in the
4569 environment exists, then the value from the environment variable is 4573 environment exists, then the value from the environment variable is
4570 used. 4574 used.
4571 4575
4572 o If both the SROM and the environment contain a MAC address, and 4576 o If both the SROM and the environment contain a MAC address, and
4573 both addresses are the same, this MAC address is used. 4577 both addresses are the same, this MAC address is used.
4574 4578
4575 o If both the SROM and the environment contain a MAC address, and the 4579 o If both the SROM and the environment contain a MAC address, and the
4576 addresses differ, the value from the environment is used and a 4580 addresses differ, the value from the environment is used and a
4577 warning is printed. 4581 warning is printed.
4578 4582
4579 o If neither SROM nor the environment contain a MAC address, an error 4583 o If neither SROM nor the environment contain a MAC address, an error
4580 is raised. 4584 is raised.
4581 4585
4582 If Ethernet drivers implement the 'write_hwaddr' function, valid MAC addresses 4586 If Ethernet drivers implement the 'write_hwaddr' function, valid MAC addresses
4583 will be programmed into hardware as part of the initialization process. This 4587 will be programmed into hardware as part of the initialization process. This
4584 may be skipped by setting the appropriate 'ethmacskip' environment variable. 4588 may be skipped by setting the appropriate 'ethmacskip' environment variable.
4585 The naming convention is as follows: 4589 The naming convention is as follows:
4586 "ethmacskip" (=>eth0), "eth1macskip" (=>eth1) etc. 4590 "ethmacskip" (=>eth0), "eth1macskip" (=>eth1) etc.
4587 4591
4588 Image Formats: 4592 Image Formats:
4589 ============== 4593 ==============
4590 4594
4591 U-Boot is capable of booting (and performing other auxiliary operations on) 4595 U-Boot is capable of booting (and performing other auxiliary operations on)
4592 images in two formats: 4596 images in two formats:
4593 4597
4594 New uImage format (FIT) 4598 New uImage format (FIT)
4595 ----------------------- 4599 -----------------------
4596 4600
4597 Flexible and powerful format based on Flattened Image Tree -- FIT (similar 4601 Flexible and powerful format based on Flattened Image Tree -- FIT (similar
4598 to Flattened Device Tree). It allows the use of images with multiple 4602 to Flattened Device Tree). It allows the use of images with multiple
4599 components (several kernels, ramdisks, etc.), with contents protected by 4603 components (several kernels, ramdisks, etc.), with contents protected by
4600 SHA1, MD5 or CRC32. More details are found in the doc/uImage.FIT directory. 4604 SHA1, MD5 or CRC32. More details are found in the doc/uImage.FIT directory.
4601 4605
4602 4606
4603 Old uImage format 4607 Old uImage format
4604 ----------------- 4608 -----------------
4605 4609
4606 Old image format is based on binary files which can be basically anything, 4610 Old image format is based on binary files which can be basically anything,
4607 preceded by a special header; see the definitions in include/image.h for 4611 preceded by a special header; see the definitions in include/image.h for
4608 details; basically, the header defines the following image properties: 4612 details; basically, the header defines the following image properties:
4609 4613
4610 * Target Operating System (Provisions for OpenBSD, NetBSD, FreeBSD, 4614 * Target Operating System (Provisions for OpenBSD, NetBSD, FreeBSD,
4611 4.4BSD, Linux, SVR4, Esix, Solaris, Irix, SCO, Dell, NCR, VxWorks, 4615 4.4BSD, Linux, SVR4, Esix, Solaris, Irix, SCO, Dell, NCR, VxWorks,
4612 LynxOS, pSOS, QNX, RTEMS, INTEGRITY; 4616 LynxOS, pSOS, QNX, RTEMS, INTEGRITY;
4613 Currently supported: Linux, NetBSD, VxWorks, QNX, RTEMS, LynxOS, 4617 Currently supported: Linux, NetBSD, VxWorks, QNX, RTEMS, LynxOS,
4614 INTEGRITY). 4618 INTEGRITY).
4615 * Target CPU Architecture (Provisions for Alpha, ARM, AVR32, Intel x86, 4619 * Target CPU Architecture (Provisions for Alpha, ARM, AVR32, Intel x86,
4616 IA64, MIPS, NDS32, Nios II, PowerPC, IBM S390, SuperH, Sparc, Sparc 64 Bit; 4620 IA64, MIPS, NDS32, Nios II, PowerPC, IBM S390, SuperH, Sparc, Sparc 64 Bit;
4617 Currently supported: ARM, AVR32, Intel x86, MIPS, NDS32, Nios II, PowerPC). 4621 Currently supported: ARM, AVR32, Intel x86, MIPS, NDS32, Nios II, PowerPC).
4618 * Compression Type (uncompressed, gzip, bzip2) 4622 * Compression Type (uncompressed, gzip, bzip2)
4619 * Load Address 4623 * Load Address
4620 * Entry Point 4624 * Entry Point
4621 * Image Name 4625 * Image Name
4622 * Image Timestamp 4626 * Image Timestamp
4623 4627
4624 The header is marked by a special Magic Number, and both the header 4628 The header is marked by a special Magic Number, and both the header
4625 and the data portions of the image are secured against corruption by 4629 and the data portions of the image are secured against corruption by
4626 CRC32 checksums. 4630 CRC32 checksums.
4627 4631
4628 4632
4629 Linux Support: 4633 Linux Support:
4630 ============== 4634 ==============
4631 4635
4632 Although U-Boot should support any OS or standalone application 4636 Although U-Boot should support any OS or standalone application
4633 easily, the main focus has always been on Linux during the design of 4637 easily, the main focus has always been on Linux during the design of
4634 U-Boot. 4638 U-Boot.
4635 4639
4636 U-Boot includes many features that so far have been part of some 4640 U-Boot includes many features that so far have been part of some
4637 special "boot loader" code within the Linux kernel. Also, any 4641 special "boot loader" code within the Linux kernel. Also, any
4638 "initrd" images to be used are no longer part of one big Linux image; 4642 "initrd" images to be used are no longer part of one big Linux image;
4639 instead, kernel and "initrd" are separate images. This implementation 4643 instead, kernel and "initrd" are separate images. This implementation
4640 serves several purposes: 4644 serves several purposes:
4641 4645
4642 - the same features can be used for other OS or standalone 4646 - the same features can be used for other OS or standalone
4643 applications (for instance: using compressed images to reduce the 4647 applications (for instance: using compressed images to reduce the
4644 Flash memory footprint) 4648 Flash memory footprint)
4645 4649
4646 - it becomes much easier to port new Linux kernel versions because 4650 - it becomes much easier to port new Linux kernel versions because
4647 lots of low-level, hardware dependent stuff are done by U-Boot 4651 lots of low-level, hardware dependent stuff are done by U-Boot
4648 4652
4649 - the same Linux kernel image can now be used with different "initrd" 4653 - the same Linux kernel image can now be used with different "initrd"
4650 images; of course this also means that different kernel images can 4654 images; of course this also means that different kernel images can
4651 be run with the same "initrd". This makes testing easier (you don't 4655 be run with the same "initrd". This makes testing easier (you don't
4652 have to build a new "zImage.initrd" Linux image when you just 4656 have to build a new "zImage.initrd" Linux image when you just
4653 change a file in your "initrd"). Also, a field-upgrade of the 4657 change a file in your "initrd"). Also, a field-upgrade of the
4654 software is easier now. 4658 software is easier now.
4655 4659
4656 4660
4657 Linux HOWTO: 4661 Linux HOWTO:
4658 ============ 4662 ============
4659 4663
4660 Porting Linux to U-Boot based systems: 4664 Porting Linux to U-Boot based systems:
4661 --------------------------------------- 4665 ---------------------------------------
4662 4666
4663 U-Boot cannot save you from doing all the necessary modifications to 4667 U-Boot cannot save you from doing all the necessary modifications to
4664 configure the Linux device drivers for use with your target hardware 4668 configure the Linux device drivers for use with your target hardware
4665 (no, we don't intend to provide a full virtual machine interface to 4669 (no, we don't intend to provide a full virtual machine interface to
4666 Linux :-). 4670 Linux :-).
4667 4671
4668 But now you can ignore ALL boot loader code (in arch/powerpc/mbxboot). 4672 But now you can ignore ALL boot loader code (in arch/powerpc/mbxboot).
4669 4673
4670 Just make sure your machine specific header file (for instance 4674 Just make sure your machine specific header file (for instance
4671 include/asm-ppc/tqm8xx.h) includes the same definition of the Board 4675 include/asm-ppc/tqm8xx.h) includes the same definition of the Board
4672 Information structure as we define in include/asm-<arch>/u-boot.h, 4676 Information structure as we define in include/asm-<arch>/u-boot.h,
4673 and make sure that your definition of IMAP_ADDR uses the same value 4677 and make sure that your definition of IMAP_ADDR uses the same value
4674 as your U-Boot configuration in CONFIG_SYS_IMMR. 4678 as your U-Boot configuration in CONFIG_SYS_IMMR.
4675 4679
4676 4680
4677 Configuring the Linux kernel: 4681 Configuring the Linux kernel:
4678 ----------------------------- 4682 -----------------------------
4679 4683
4680 No specific requirements for U-Boot. Make sure you have some root 4684 No specific requirements for U-Boot. Make sure you have some root
4681 device (initial ramdisk, NFS) for your target system. 4685 device (initial ramdisk, NFS) for your target system.
4682 4686
4683 4687
4684 Building a Linux Image: 4688 Building a Linux Image:
4685 ----------------------- 4689 -----------------------
4686 4690
4687 With U-Boot, "normal" build targets like "zImage" or "bzImage" are 4691 With U-Boot, "normal" build targets like "zImage" or "bzImage" are
4688 not used. If you use recent kernel source, a new build target 4692 not used. If you use recent kernel source, a new build target
4689 "uImage" will exist which automatically builds an image usable by 4693 "uImage" will exist which automatically builds an image usable by
4690 U-Boot. Most older kernels also have support for a "pImage" target, 4694 U-Boot. Most older kernels also have support for a "pImage" target,
4691 which was introduced for our predecessor project PPCBoot and uses a 4695 which was introduced for our predecessor project PPCBoot and uses a
4692 100% compatible format. 4696 100% compatible format.
4693 4697
4694 Example: 4698 Example:
4695 4699
4696 make TQM850L_config 4700 make TQM850L_config
4697 make oldconfig 4701 make oldconfig
4698 make dep 4702 make dep
4699 make uImage 4703 make uImage
4700 4704
4701 The "uImage" build target uses a special tool (in 'tools/mkimage') to 4705 The "uImage" build target uses a special tool (in 'tools/mkimage') to
4702 encapsulate a compressed Linux kernel image with header information, 4706 encapsulate a compressed Linux kernel image with header information,
4703 CRC32 checksum etc. for use with U-Boot. This is what we are doing: 4707 CRC32 checksum etc. for use with U-Boot. This is what we are doing:
4704 4708
4705 * build a standard "vmlinux" kernel image (in ELF binary format): 4709 * build a standard "vmlinux" kernel image (in ELF binary format):
4706 4710
4707 * convert the kernel into a raw binary image: 4711 * convert the kernel into a raw binary image:
4708 4712
4709 ${CROSS_COMPILE}-objcopy -O binary \ 4713 ${CROSS_COMPILE}-objcopy -O binary \
4710 -R .note -R .comment \ 4714 -R .note -R .comment \
4711 -S vmlinux linux.bin 4715 -S vmlinux linux.bin
4712 4716
4713 * compress the binary image: 4717 * compress the binary image:
4714 4718
4715 gzip -9 linux.bin 4719 gzip -9 linux.bin
4716 4720
4717 * package compressed binary image for U-Boot: 4721 * package compressed binary image for U-Boot:
4718 4722
4719 mkimage -A ppc -O linux -T kernel -C gzip \ 4723 mkimage -A ppc -O linux -T kernel -C gzip \
4720 -a 0 -e 0 -n "Linux Kernel Image" \ 4724 -a 0 -e 0 -n "Linux Kernel Image" \
4721 -d linux.bin.gz uImage 4725 -d linux.bin.gz uImage
4722 4726
4723 4727
4724 The "mkimage" tool can also be used to create ramdisk images for use 4728 The "mkimage" tool can also be used to create ramdisk images for use
4725 with U-Boot, either separated from the Linux kernel image, or 4729 with U-Boot, either separated from the Linux kernel image, or
4726 combined into one file. "mkimage" encapsulates the images with a 64 4730 combined into one file. "mkimage" encapsulates the images with a 64
4727 byte header containing information about target architecture, 4731 byte header containing information about target architecture,
4728 operating system, image type, compression method, entry points, time 4732 operating system, image type, compression method, entry points, time
4729 stamp, CRC32 checksums, etc. 4733 stamp, CRC32 checksums, etc.
4730 4734
4731 "mkimage" can be called in two ways: to verify existing images and 4735 "mkimage" can be called in two ways: to verify existing images and
4732 print the header information, or to build new images. 4736 print the header information, or to build new images.
4733 4737
4734 In the first form (with "-l" option) mkimage lists the information 4738 In the first form (with "-l" option) mkimage lists the information
4735 contained in the header of an existing U-Boot image; this includes 4739 contained in the header of an existing U-Boot image; this includes
4736 checksum verification: 4740 checksum verification:
4737 4741
4738 tools/mkimage -l image 4742 tools/mkimage -l image
4739 -l ==> list image header information 4743 -l ==> list image header information
4740 4744
4741 The second form (with "-d" option) is used to build a U-Boot image 4745 The second form (with "-d" option) is used to build a U-Boot image
4742 from a "data file" which is used as image payload: 4746 from a "data file" which is used as image payload:
4743 4747
4744 tools/mkimage -A arch -O os -T type -C comp -a addr -e ep \ 4748 tools/mkimage -A arch -O os -T type -C comp -a addr -e ep \
4745 -n name -d data_file image 4749 -n name -d data_file image
4746 -A ==> set architecture to 'arch' 4750 -A ==> set architecture to 'arch'
4747 -O ==> set operating system to 'os' 4751 -O ==> set operating system to 'os'
4748 -T ==> set image type to 'type' 4752 -T ==> set image type to 'type'
4749 -C ==> set compression type 'comp' 4753 -C ==> set compression type 'comp'
4750 -a ==> set load address to 'addr' (hex) 4754 -a ==> set load address to 'addr' (hex)
4751 -e ==> set entry point to 'ep' (hex) 4755 -e ==> set entry point to 'ep' (hex)
4752 -n ==> set image name to 'name' 4756 -n ==> set image name to 'name'
4753 -d ==> use image data from 'datafile' 4757 -d ==> use image data from 'datafile'
4754 4758
4755 Right now, all Linux kernels for PowerPC systems use the same load 4759 Right now, all Linux kernels for PowerPC systems use the same load
4756 address (0x00000000), but the entry point address depends on the 4760 address (0x00000000), but the entry point address depends on the
4757 kernel version: 4761 kernel version:
4758 4762
4759 - 2.2.x kernels have the entry point at 0x0000000C, 4763 - 2.2.x kernels have the entry point at 0x0000000C,
4760 - 2.3.x and later kernels have the entry point at 0x00000000. 4764 - 2.3.x and later kernels have the entry point at 0x00000000.
4761 4765
4762 So a typical call to build a U-Boot image would read: 4766 So a typical call to build a U-Boot image would read:
4763 4767
4764 -> tools/mkimage -n '2.4.4 kernel for TQM850L' \ 4768 -> tools/mkimage -n '2.4.4 kernel for TQM850L' \
4765 > -A ppc -O linux -T kernel -C gzip -a 0 -e 0 \ 4769 > -A ppc -O linux -T kernel -C gzip -a 0 -e 0 \
4766 > -d /opt/elsk/ppc_8xx/usr/src/linux-2.4.4/arch/powerpc/coffboot/vmlinux.gz \ 4770 > -d /opt/elsk/ppc_8xx/usr/src/linux-2.4.4/arch/powerpc/coffboot/vmlinux.gz \
4767 > examples/uImage.TQM850L 4771 > examples/uImage.TQM850L
4768 Image Name: 2.4.4 kernel for TQM850L 4772 Image Name: 2.4.4 kernel for TQM850L
4769 Created: Wed Jul 19 02:34:59 2000 4773 Created: Wed Jul 19 02:34:59 2000
4770 Image Type: PowerPC Linux Kernel Image (gzip compressed) 4774 Image Type: PowerPC Linux Kernel Image (gzip compressed)
4771 Data Size: 335725 Bytes = 327.86 kB = 0.32 MB 4775 Data Size: 335725 Bytes = 327.86 kB = 0.32 MB
4772 Load Address: 0x00000000 4776 Load Address: 0x00000000
4773 Entry Point: 0x00000000 4777 Entry Point: 0x00000000
4774 4778
4775 To verify the contents of the image (or check for corruption): 4779 To verify the contents of the image (or check for corruption):
4776 4780
4777 -> tools/mkimage -l examples/uImage.TQM850L 4781 -> tools/mkimage -l examples/uImage.TQM850L
4778 Image Name: 2.4.4 kernel for TQM850L 4782 Image Name: 2.4.4 kernel for TQM850L
4779 Created: Wed Jul 19 02:34:59 2000 4783 Created: Wed Jul 19 02:34:59 2000
4780 Image Type: PowerPC Linux Kernel Image (gzip compressed) 4784 Image Type: PowerPC Linux Kernel Image (gzip compressed)
4781 Data Size: 335725 Bytes = 327.86 kB = 0.32 MB 4785 Data Size: 335725 Bytes = 327.86 kB = 0.32 MB
4782 Load Address: 0x00000000 4786 Load Address: 0x00000000
4783 Entry Point: 0x00000000 4787 Entry Point: 0x00000000
4784 4788
4785 NOTE: for embedded systems where boot time is critical you can trade 4789 NOTE: for embedded systems where boot time is critical you can trade
4786 speed for memory and install an UNCOMPRESSED image instead: this 4790 speed for memory and install an UNCOMPRESSED image instead: this
4787 needs more space in Flash, but boots much faster since it does not 4791 needs more space in Flash, but boots much faster since it does not
4788 need to be uncompressed: 4792 need to be uncompressed:
4789 4793
4790 -> gunzip /opt/elsk/ppc_8xx/usr/src/linux-2.4.4/arch/powerpc/coffboot/vmlinux.gz 4794 -> gunzip /opt/elsk/ppc_8xx/usr/src/linux-2.4.4/arch/powerpc/coffboot/vmlinux.gz
4791 -> tools/mkimage -n '2.4.4 kernel for TQM850L' \ 4795 -> tools/mkimage -n '2.4.4 kernel for TQM850L' \
4792 > -A ppc -O linux -T kernel -C none -a 0 -e 0 \ 4796 > -A ppc -O linux -T kernel -C none -a 0 -e 0 \
4793 > -d /opt/elsk/ppc_8xx/usr/src/linux-2.4.4/arch/powerpc/coffboot/vmlinux \ 4797 > -d /opt/elsk/ppc_8xx/usr/src/linux-2.4.4/arch/powerpc/coffboot/vmlinux \
4794 > examples/uImage.TQM850L-uncompressed 4798 > examples/uImage.TQM850L-uncompressed
4795 Image Name: 2.4.4 kernel for TQM850L 4799 Image Name: 2.4.4 kernel for TQM850L
4796 Created: Wed Jul 19 02:34:59 2000 4800 Created: Wed Jul 19 02:34:59 2000
4797 Image Type: PowerPC Linux Kernel Image (uncompressed) 4801 Image Type: PowerPC Linux Kernel Image (uncompressed)
4798 Data Size: 792160 Bytes = 773.59 kB = 0.76 MB 4802 Data Size: 792160 Bytes = 773.59 kB = 0.76 MB
4799 Load Address: 0x00000000 4803 Load Address: 0x00000000
4800 Entry Point: 0x00000000 4804 Entry Point: 0x00000000
4801 4805
4802 4806
4803 Similar you can build U-Boot images from a 'ramdisk.image.gz' file 4807 Similar you can build U-Boot images from a 'ramdisk.image.gz' file
4804 when your kernel is intended to use an initial ramdisk: 4808 when your kernel is intended to use an initial ramdisk:
4805 4809
4806 -> tools/mkimage -n 'Simple Ramdisk Image' \ 4810 -> tools/mkimage -n 'Simple Ramdisk Image' \
4807 > -A ppc -O linux -T ramdisk -C gzip \ 4811 > -A ppc -O linux -T ramdisk -C gzip \
4808 > -d /LinuxPPC/images/SIMPLE-ramdisk.image.gz examples/simple-initrd 4812 > -d /LinuxPPC/images/SIMPLE-ramdisk.image.gz examples/simple-initrd
4809 Image Name: Simple Ramdisk Image 4813 Image Name: Simple Ramdisk Image
4810 Created: Wed Jan 12 14:01:50 2000 4814 Created: Wed Jan 12 14:01:50 2000
4811 Image Type: PowerPC Linux RAMDisk Image (gzip compressed) 4815 Image Type: PowerPC Linux RAMDisk Image (gzip compressed)
4812 Data Size: 566530 Bytes = 553.25 kB = 0.54 MB 4816 Data Size: 566530 Bytes = 553.25 kB = 0.54 MB
4813 Load Address: 0x00000000 4817 Load Address: 0x00000000
4814 Entry Point: 0x00000000 4818 Entry Point: 0x00000000
4815 4819
4816 4820
4817 Installing a Linux Image: 4821 Installing a Linux Image:
4818 ------------------------- 4822 -------------------------
4819 4823
4820 To downloading a U-Boot image over the serial (console) interface, 4824 To downloading a U-Boot image over the serial (console) interface,
4821 you must convert the image to S-Record format: 4825 you must convert the image to S-Record format:
4822 4826
4823 objcopy -I binary -O srec examples/image examples/image.srec 4827 objcopy -I binary -O srec examples/image examples/image.srec
4824 4828
4825 The 'objcopy' does not understand the information in the U-Boot 4829 The 'objcopy' does not understand the information in the U-Boot
4826 image header, so the resulting S-Record file will be relative to 4830 image header, so the resulting S-Record file will be relative to
4827 address 0x00000000. To load it to a given address, you need to 4831 address 0x00000000. To load it to a given address, you need to
4828 specify the target address as 'offset' parameter with the 'loads' 4832 specify the target address as 'offset' parameter with the 'loads'
4829 command. 4833 command.
4830 4834
4831 Example: install the image to address 0x40100000 (which on the 4835 Example: install the image to address 0x40100000 (which on the
4832 TQM8xxL is in the first Flash bank): 4836 TQM8xxL is in the first Flash bank):
4833 4837
4834 => erase 40100000 401FFFFF 4838 => erase 40100000 401FFFFF
4835 4839
4836 .......... done 4840 .......... done
4837 Erased 8 sectors 4841 Erased 8 sectors
4838 4842
4839 => loads 40100000 4843 => loads 40100000
4840 ## Ready for S-Record download ... 4844 ## Ready for S-Record download ...
4841 ~>examples/image.srec 4845 ~>examples/image.srec
4842 1 2 3 4 5 6 7 8 9 10 11 12 13 ... 4846 1 2 3 4 5 6 7 8 9 10 11 12 13 ...
4843 ... 4847 ...
4844 15989 15990 15991 15992 4848 15989 15990 15991 15992
4845 [file transfer complete] 4849 [file transfer complete]
4846 [connected] 4850 [connected]
4847 ## Start Addr = 0x00000000 4851 ## Start Addr = 0x00000000
4848 4852
4849 4853
4850 You can check the success of the download using the 'iminfo' command; 4854 You can check the success of the download using the 'iminfo' command;
4851 this includes a checksum verification so you can be sure no data 4855 this includes a checksum verification so you can be sure no data
4852 corruption happened: 4856 corruption happened:
4853 4857
4854 => imi 40100000 4858 => imi 40100000
4855 4859
4856 ## Checking Image at 40100000 ... 4860 ## Checking Image at 40100000 ...
4857 Image Name: 2.2.13 for initrd on TQM850L 4861 Image Name: 2.2.13 for initrd on TQM850L
4858 Image Type: PowerPC Linux Kernel Image (gzip compressed) 4862 Image Type: PowerPC Linux Kernel Image (gzip compressed)
4859 Data Size: 335725 Bytes = 327 kB = 0 MB 4863 Data Size: 335725 Bytes = 327 kB = 0 MB
4860 Load Address: 00000000 4864 Load Address: 00000000
4861 Entry Point: 0000000c 4865 Entry Point: 0000000c
4862 Verifying Checksum ... OK 4866 Verifying Checksum ... OK
4863 4867
4864 4868
4865 Boot Linux: 4869 Boot Linux:
4866 ----------- 4870 -----------
4867 4871
4868 The "bootm" command is used to boot an application that is stored in 4872 The "bootm" command is used to boot an application that is stored in
4869 memory (RAM or Flash). In case of a Linux kernel image, the contents 4873 memory (RAM or Flash). In case of a Linux kernel image, the contents
4870 of the "bootargs" environment variable is passed to the kernel as 4874 of the "bootargs" environment variable is passed to the kernel as
4871 parameters. You can check and modify this variable using the 4875 parameters. You can check and modify this variable using the
4872 "printenv" and "setenv" commands: 4876 "printenv" and "setenv" commands:
4873 4877
4874 4878
4875 => printenv bootargs 4879 => printenv bootargs
4876 bootargs=root=/dev/ram 4880 bootargs=root=/dev/ram
4877 4881
4878 => setenv bootargs root=/dev/nfs rw nfsroot=10.0.0.2:/LinuxPPC nfsaddrs=10.0.0.99:10.0.0.2 4882 => setenv bootargs root=/dev/nfs rw nfsroot=10.0.0.2:/LinuxPPC nfsaddrs=10.0.0.99:10.0.0.2
4879 4883
4880 => printenv bootargs 4884 => printenv bootargs
4881 bootargs=root=/dev/nfs rw nfsroot=10.0.0.2:/LinuxPPC nfsaddrs=10.0.0.99:10.0.0.2 4885 bootargs=root=/dev/nfs rw nfsroot=10.0.0.2:/LinuxPPC nfsaddrs=10.0.0.99:10.0.0.2
4882 4886
4883 => bootm 40020000 4887 => bootm 40020000
4884 ## Booting Linux kernel at 40020000 ... 4888 ## Booting Linux kernel at 40020000 ...
4885 Image Name: 2.2.13 for NFS on TQM850L 4889 Image Name: 2.2.13 for NFS on TQM850L
4886 Image Type: PowerPC Linux Kernel Image (gzip compressed) 4890 Image Type: PowerPC Linux Kernel Image (gzip compressed)
4887 Data Size: 381681 Bytes = 372 kB = 0 MB 4891 Data Size: 381681 Bytes = 372 kB = 0 MB
4888 Load Address: 00000000 4892 Load Address: 00000000
4889 Entry Point: 0000000c 4893 Entry Point: 0000000c
4890 Verifying Checksum ... OK 4894 Verifying Checksum ... OK
4891 Uncompressing Kernel Image ... OK 4895 Uncompressing Kernel Image ... OK
4892 Linux version 2.2.13 (wd@denx.local.net) (gcc version 2.95.2 19991024 (release)) #1 Wed Jul 19 02:35:17 MEST 2000 4896 Linux version 2.2.13 (wd@denx.local.net) (gcc version 2.95.2 19991024 (release)) #1 Wed Jul 19 02:35:17 MEST 2000
4893 Boot arguments: root=/dev/nfs rw nfsroot=10.0.0.2:/LinuxPPC nfsaddrs=10.0.0.99:10.0.0.2 4897 Boot arguments: root=/dev/nfs rw nfsroot=10.0.0.2:/LinuxPPC nfsaddrs=10.0.0.99:10.0.0.2
4894 time_init: decrementer frequency = 187500000/60 4898 time_init: decrementer frequency = 187500000/60
4895 Calibrating delay loop... 49.77 BogoMIPS 4899 Calibrating delay loop... 49.77 BogoMIPS
4896 Memory: 15208k available (700k kernel code, 444k data, 32k init) [c0000000,c1000000] 4900 Memory: 15208k available (700k kernel code, 444k data, 32k init) [c0000000,c1000000]
4897 ... 4901 ...
4898 4902
4899 If you want to boot a Linux kernel with initial RAM disk, you pass 4903 If you want to boot a Linux kernel with initial RAM disk, you pass
4900 the memory addresses of both the kernel and the initrd image (PPBCOOT 4904 the memory addresses of both the kernel and the initrd image (PPBCOOT
4901 format!) to the "bootm" command: 4905 format!) to the "bootm" command:
4902 4906
4903 => imi 40100000 40200000 4907 => imi 40100000 40200000
4904 4908
4905 ## Checking Image at 40100000 ... 4909 ## Checking Image at 40100000 ...
4906 Image Name: 2.2.13 for initrd on TQM850L 4910 Image Name: 2.2.13 for initrd on TQM850L
4907 Image Type: PowerPC Linux Kernel Image (gzip compressed) 4911 Image Type: PowerPC Linux Kernel Image (gzip compressed)
4908 Data Size: 335725 Bytes = 327 kB = 0 MB 4912 Data Size: 335725 Bytes = 327 kB = 0 MB
4909 Load Address: 00000000 4913 Load Address: 00000000
4910 Entry Point: 0000000c 4914 Entry Point: 0000000c
4911 Verifying Checksum ... OK 4915 Verifying Checksum ... OK
4912 4916
4913 ## Checking Image at 40200000 ... 4917 ## Checking Image at 40200000 ...
4914 Image Name: Simple Ramdisk Image 4918 Image Name: Simple Ramdisk Image
4915 Image Type: PowerPC Linux RAMDisk Image (gzip compressed) 4919 Image Type: PowerPC Linux RAMDisk Image (gzip compressed)
4916 Data Size: 566530 Bytes = 553 kB = 0 MB 4920 Data Size: 566530 Bytes = 553 kB = 0 MB
4917 Load Address: 00000000 4921 Load Address: 00000000
4918 Entry Point: 00000000 4922 Entry Point: 00000000
4919 Verifying Checksum ... OK 4923 Verifying Checksum ... OK
4920 4924
4921 => bootm 40100000 40200000 4925 => bootm 40100000 40200000
4922 ## Booting Linux kernel at 40100000 ... 4926 ## Booting Linux kernel at 40100000 ...
4923 Image Name: 2.2.13 for initrd on TQM850L 4927 Image Name: 2.2.13 for initrd on TQM850L
4924 Image Type: PowerPC Linux Kernel Image (gzip compressed) 4928 Image Type: PowerPC Linux Kernel Image (gzip compressed)
4925 Data Size: 335725 Bytes = 327 kB = 0 MB 4929 Data Size: 335725 Bytes = 327 kB = 0 MB
4926 Load Address: 00000000 4930 Load Address: 00000000
4927 Entry Point: 0000000c 4931 Entry Point: 0000000c
4928 Verifying Checksum ... OK 4932 Verifying Checksum ... OK
4929 Uncompressing Kernel Image ... OK 4933 Uncompressing Kernel Image ... OK
4930 ## Loading RAMDisk Image at 40200000 ... 4934 ## Loading RAMDisk Image at 40200000 ...
4931 Image Name: Simple Ramdisk Image 4935 Image Name: Simple Ramdisk Image
4932 Image Type: PowerPC Linux RAMDisk Image (gzip compressed) 4936 Image Type: PowerPC Linux RAMDisk Image (gzip compressed)
4933 Data Size: 566530 Bytes = 553 kB = 0 MB 4937 Data Size: 566530 Bytes = 553 kB = 0 MB
4934 Load Address: 00000000 4938 Load Address: 00000000
4935 Entry Point: 00000000 4939 Entry Point: 00000000
4936 Verifying Checksum ... OK 4940 Verifying Checksum ... OK
4937 Loading Ramdisk ... OK 4941 Loading Ramdisk ... OK
4938 Linux version 2.2.13 (wd@denx.local.net) (gcc version 2.95.2 19991024 (release)) #1 Wed Jul 19 02:32:08 MEST 2000 4942 Linux version 2.2.13 (wd@denx.local.net) (gcc version 2.95.2 19991024 (release)) #1 Wed Jul 19 02:32:08 MEST 2000
4939 Boot arguments: root=/dev/ram 4943 Boot arguments: root=/dev/ram
4940 time_init: decrementer frequency = 187500000/60 4944 time_init: decrementer frequency = 187500000/60
4941 Calibrating delay loop... 49.77 BogoMIPS 4945 Calibrating delay loop... 49.77 BogoMIPS
4942 ... 4946 ...
4943 RAMDISK: Compressed image found at block 0 4947 RAMDISK: Compressed image found at block 0
4944 VFS: Mounted root (ext2 filesystem). 4948 VFS: Mounted root (ext2 filesystem).
4945 4949
4946 bash# 4950 bash#
4947 4951
4948 Boot Linux and pass a flat device tree: 4952 Boot Linux and pass a flat device tree:
4949 ----------- 4953 -----------
4950 4954
4951 First, U-Boot must be compiled with the appropriate defines. See the section 4955 First, U-Boot must be compiled with the appropriate defines. See the section
4952 titled "Linux Kernel Interface" above for a more in depth explanation. The 4956 titled "Linux Kernel Interface" above for a more in depth explanation. The
4953 following is an example of how to start a kernel and pass an updated 4957 following is an example of how to start a kernel and pass an updated
4954 flat device tree: 4958 flat device tree:
4955 4959
4956 => print oftaddr 4960 => print oftaddr
4957 oftaddr=0x300000 4961 oftaddr=0x300000
4958 => print oft 4962 => print oft
4959 oft=oftrees/mpc8540ads.dtb 4963 oft=oftrees/mpc8540ads.dtb
4960 => tftp $oftaddr $oft 4964 => tftp $oftaddr $oft
4961 Speed: 1000, full duplex 4965 Speed: 1000, full duplex
4962 Using TSEC0 device 4966 Using TSEC0 device
4963 TFTP from server 192.168.1.1; our IP address is 192.168.1.101 4967 TFTP from server 192.168.1.1; our IP address is 192.168.1.101
4964 Filename 'oftrees/mpc8540ads.dtb'. 4968 Filename 'oftrees/mpc8540ads.dtb'.
4965 Load address: 0x300000 4969 Load address: 0x300000
4966 Loading: # 4970 Loading: #
4967 done 4971 done
4968 Bytes transferred = 4106 (100a hex) 4972 Bytes transferred = 4106 (100a hex)
4969 => tftp $loadaddr $bootfile 4973 => tftp $loadaddr $bootfile
4970 Speed: 1000, full duplex 4974 Speed: 1000, full duplex
4971 Using TSEC0 device 4975 Using TSEC0 device
4972 TFTP from server 192.168.1.1; our IP address is 192.168.1.2 4976 TFTP from server 192.168.1.1; our IP address is 192.168.1.2
4973 Filename 'uImage'. 4977 Filename 'uImage'.
4974 Load address: 0x200000 4978 Load address: 0x200000
4975 Loading:############ 4979 Loading:############
4976 done 4980 done
4977 Bytes transferred = 1029407 (fb51f hex) 4981 Bytes transferred = 1029407 (fb51f hex)
4978 => print loadaddr 4982 => print loadaddr
4979 loadaddr=200000 4983 loadaddr=200000
4980 => print oftaddr 4984 => print oftaddr
4981 oftaddr=0x300000 4985 oftaddr=0x300000
4982 => bootm $loadaddr - $oftaddr 4986 => bootm $loadaddr - $oftaddr
4983 ## Booting image at 00200000 ... 4987 ## Booting image at 00200000 ...
4984 Image Name: Linux-2.6.17-dirty 4988 Image Name: Linux-2.6.17-dirty
4985 Image Type: PowerPC Linux Kernel Image (gzip compressed) 4989 Image Type: PowerPC Linux Kernel Image (gzip compressed)
4986 Data Size: 1029343 Bytes = 1005.2 kB 4990 Data Size: 1029343 Bytes = 1005.2 kB
4987 Load Address: 00000000 4991 Load Address: 00000000
4988 Entry Point: 00000000 4992 Entry Point: 00000000
4989 Verifying Checksum ... OK 4993 Verifying Checksum ... OK
4990 Uncompressing Kernel Image ... OK 4994 Uncompressing Kernel Image ... OK
4991 Booting using flat device tree at 0x300000 4995 Booting using flat device tree at 0x300000
4992 Using MPC85xx ADS machine description 4996 Using MPC85xx ADS machine description
4993 Memory CAM mapping: CAM0=256Mb, CAM1=256Mb, CAM2=0Mb residual: 0Mb 4997 Memory CAM mapping: CAM0=256Mb, CAM1=256Mb, CAM2=0Mb residual: 0Mb
4994 [snip] 4998 [snip]
4995 4999
4996 5000
4997 More About U-Boot Image Types: 5001 More About U-Boot Image Types:
4998 ------------------------------ 5002 ------------------------------
4999 5003
5000 U-Boot supports the following image types: 5004 U-Boot supports the following image types:
5001 5005
5002 "Standalone Programs" are directly runnable in the environment 5006 "Standalone Programs" are directly runnable in the environment
5003 provided by U-Boot; it is expected that (if they behave 5007 provided by U-Boot; it is expected that (if they behave
5004 well) you can continue to work in U-Boot after return from 5008 well) you can continue to work in U-Boot after return from
5005 the Standalone Program. 5009 the Standalone Program.
5006 "OS Kernel Images" are usually images of some Embedded OS which 5010 "OS Kernel Images" are usually images of some Embedded OS which
5007 will take over control completely. Usually these programs 5011 will take over control completely. Usually these programs
5008 will install their own set of exception handlers, device 5012 will install their own set of exception handlers, device
5009 drivers, set up the MMU, etc. - this means, that you cannot 5013 drivers, set up the MMU, etc. - this means, that you cannot
5010 expect to re-enter U-Boot except by resetting the CPU. 5014 expect to re-enter U-Boot except by resetting the CPU.
5011 "RAMDisk Images" are more or less just data blocks, and their 5015 "RAMDisk Images" are more or less just data blocks, and their
5012 parameters (address, size) are passed to an OS kernel that is 5016 parameters (address, size) are passed to an OS kernel that is
5013 being started. 5017 being started.
5014 "Multi-File Images" contain several images, typically an OS 5018 "Multi-File Images" contain several images, typically an OS
5015 (Linux) kernel image and one or more data images like 5019 (Linux) kernel image and one or more data images like
5016 RAMDisks. This construct is useful for instance when you want 5020 RAMDisks. This construct is useful for instance when you want
5017 to boot over the network using BOOTP etc., where the boot 5021 to boot over the network using BOOTP etc., where the boot
5018 server provides just a single image file, but you want to get 5022 server provides just a single image file, but you want to get
5019 for instance an OS kernel and a RAMDisk image. 5023 for instance an OS kernel and a RAMDisk image.
5020 5024
5021 "Multi-File Images" start with a list of image sizes, each 5025 "Multi-File Images" start with a list of image sizes, each
5022 image size (in bytes) specified by an "uint32_t" in network 5026 image size (in bytes) specified by an "uint32_t" in network
5023 byte order. This list is terminated by an "(uint32_t)0". 5027 byte order. This list is terminated by an "(uint32_t)0".
5024 Immediately after the terminating 0 follow the images, one by 5028 Immediately after the terminating 0 follow the images, one by
5025 one, all aligned on "uint32_t" boundaries (size rounded up to 5029 one, all aligned on "uint32_t" boundaries (size rounded up to
5026 a multiple of 4 bytes). 5030 a multiple of 4 bytes).
5027 5031
5028 "Firmware Images" are binary images containing firmware (like 5032 "Firmware Images" are binary images containing firmware (like
5029 U-Boot or FPGA images) which usually will be programmed to 5033 U-Boot or FPGA images) which usually will be programmed to
5030 flash memory. 5034 flash memory.
5031 5035
5032 "Script files" are command sequences that will be executed by 5036 "Script files" are command sequences that will be executed by
5033 U-Boot's command interpreter; this feature is especially 5037 U-Boot's command interpreter; this feature is especially
5034 useful when you configure U-Boot to use a real shell (hush) 5038 useful when you configure U-Boot to use a real shell (hush)
5035 as command interpreter. 5039 as command interpreter.
5036 5040
5037 Booting the Linux zImage: 5041 Booting the Linux zImage:
5038 ------------------------- 5042 -------------------------
5039 5043
5040 On some platforms, it's possible to boot Linux zImage. This is done 5044 On some platforms, it's possible to boot Linux zImage. This is done
5041 using the "bootz" command. The syntax of "bootz" command is the same 5045 using the "bootz" command. The syntax of "bootz" command is the same
5042 as the syntax of "bootm" command. 5046 as the syntax of "bootm" command.
5043 5047
5044 Note, defining the CONFIG_SUPPORT_INITRD_RAW allows user to supply 5048 Note, defining the CONFIG_SUPPORT_INITRD_RAW allows user to supply
5045 kernel with raw initrd images. The syntax is slightly different, the 5049 kernel with raw initrd images. The syntax is slightly different, the
5046 address of the initrd must be augmented by it's size, in the following 5050 address of the initrd must be augmented by it's size, in the following
5047 format: "<initrd addres>:<initrd size>". 5051 format: "<initrd addres>:<initrd size>".
5048 5052
5049 5053
5050 Standalone HOWTO: 5054 Standalone HOWTO:
5051 ================= 5055 =================
5052 5056
5053 One of the features of U-Boot is that you can dynamically load and 5057 One of the features of U-Boot is that you can dynamically load and
5054 run "standalone" applications, which can use some resources of 5058 run "standalone" applications, which can use some resources of
5055 U-Boot like console I/O functions or interrupt services. 5059 U-Boot like console I/O functions or interrupt services.
5056 5060
5057 Two simple examples are included with the sources: 5061 Two simple examples are included with the sources:
5058 5062
5059 "Hello World" Demo: 5063 "Hello World" Demo:
5060 ------------------- 5064 -------------------
5061 5065
5062 'examples/hello_world.c' contains a small "Hello World" Demo 5066 'examples/hello_world.c' contains a small "Hello World" Demo
5063 application; it is automatically compiled when you build U-Boot. 5067 application; it is automatically compiled when you build U-Boot.
5064 It's configured to run at address 0x00040004, so you can play with it 5068 It's configured to run at address 0x00040004, so you can play with it
5065 like that: 5069 like that:
5066 5070
5067 => loads 5071 => loads
5068 ## Ready for S-Record download ... 5072 ## Ready for S-Record download ...
5069 ~>examples/hello_world.srec 5073 ~>examples/hello_world.srec
5070 1 2 3 4 5 6 7 8 9 10 11 ... 5074 1 2 3 4 5 6 7 8 9 10 11 ...
5071 [file transfer complete] 5075 [file transfer complete]
5072 [connected] 5076 [connected]
5073 ## Start Addr = 0x00040004 5077 ## Start Addr = 0x00040004
5074 5078
5075 => go 40004 Hello World! This is a test. 5079 => go 40004 Hello World! This is a test.
5076 ## Starting application at 0x00040004 ... 5080 ## Starting application at 0x00040004 ...
5077 Hello World 5081 Hello World
5078 argc = 7 5082 argc = 7
5079 argv[0] = "40004" 5083 argv[0] = "40004"
5080 argv[1] = "Hello" 5084 argv[1] = "Hello"
5081 argv[2] = "World!" 5085 argv[2] = "World!"
5082 argv[3] = "This" 5086 argv[3] = "This"
5083 argv[4] = "is" 5087 argv[4] = "is"
5084 argv[5] = "a" 5088 argv[5] = "a"
5085 argv[6] = "test." 5089 argv[6] = "test."
5086 argv[7] = "<NULL>" 5090 argv[7] = "<NULL>"
5087 Hit any key to exit ... 5091 Hit any key to exit ...
5088 5092
5089 ## Application terminated, rc = 0x0 5093 ## Application terminated, rc = 0x0
5090 5094
5091 Another example, which demonstrates how to register a CPM interrupt 5095 Another example, which demonstrates how to register a CPM interrupt
5092 handler with the U-Boot code, can be found in 'examples/timer.c'. 5096 handler with the U-Boot code, can be found in 'examples/timer.c'.
5093 Here, a CPM timer is set up to generate an interrupt every second. 5097 Here, a CPM timer is set up to generate an interrupt every second.
5094 The interrupt service routine is trivial, just printing a '.' 5098 The interrupt service routine is trivial, just printing a '.'
5095 character, but this is just a demo program. The application can be 5099 character, but this is just a demo program. The application can be
5096 controlled by the following keys: 5100 controlled by the following keys:
5097 5101
5098 ? - print current values og the CPM Timer registers 5102 ? - print current values og the CPM Timer registers
5099 b - enable interrupts and start timer 5103 b - enable interrupts and start timer
5100 e - stop timer and disable interrupts 5104 e - stop timer and disable interrupts
5101 q - quit application 5105 q - quit application
5102 5106
5103 => loads 5107 => loads
5104 ## Ready for S-Record download ... 5108 ## Ready for S-Record download ...
5105 ~>examples/timer.srec 5109 ~>examples/timer.srec
5106 1 2 3 4 5 6 7 8 9 10 11 ... 5110 1 2 3 4 5 6 7 8 9 10 11 ...
5107 [file transfer complete] 5111 [file transfer complete]
5108 [connected] 5112 [connected]
5109 ## Start Addr = 0x00040004 5113 ## Start Addr = 0x00040004
5110 5114
5111 => go 40004 5115 => go 40004
5112 ## Starting application at 0x00040004 ... 5116 ## Starting application at 0x00040004 ...
5113 TIMERS=0xfff00980 5117 TIMERS=0xfff00980
5114 Using timer 1 5118 Using timer 1
5115 tgcr @ 0xfff00980, tmr @ 0xfff00990, trr @ 0xfff00994, tcr @ 0xfff00998, tcn @ 0xfff0099c, ter @ 0xfff009b0 5119 tgcr @ 0xfff00980, tmr @ 0xfff00990, trr @ 0xfff00994, tcr @ 0xfff00998, tcn @ 0xfff0099c, ter @ 0xfff009b0
5116 5120
5117 Hit 'b': 5121 Hit 'b':
5118 [q, b, e, ?] Set interval 1000000 us 5122 [q, b, e, ?] Set interval 1000000 us
5119 Enabling timer 5123 Enabling timer
5120 Hit '?': 5124 Hit '?':
5121 [q, b, e, ?] ........ 5125 [q, b, e, ?] ........
5122 tgcr=0x1, tmr=0xff1c, trr=0x3d09, tcr=0x0, tcn=0xef6, ter=0x0 5126 tgcr=0x1, tmr=0xff1c, trr=0x3d09, tcr=0x0, tcn=0xef6, ter=0x0
5123 Hit '?': 5127 Hit '?':
5124 [q, b, e, ?] . 5128 [q, b, e, ?] .
5125 tgcr=0x1, tmr=0xff1c, trr=0x3d09, tcr=0x0, tcn=0x2ad4, ter=0x0 5129 tgcr=0x1, tmr=0xff1c, trr=0x3d09, tcr=0x0, tcn=0x2ad4, ter=0x0
5126 Hit '?': 5130 Hit '?':
5127 [q, b, e, ?] . 5131 [q, b, e, ?] .
5128 tgcr=0x1, tmr=0xff1c, trr=0x3d09, tcr=0x0, tcn=0x1efc, ter=0x0 5132 tgcr=0x1, tmr=0xff1c, trr=0x3d09, tcr=0x0, tcn=0x1efc, ter=0x0
5129 Hit '?': 5133 Hit '?':
5130 [q, b, e, ?] . 5134 [q, b, e, ?] .
5131 tgcr=0x1, tmr=0xff1c, trr=0x3d09, tcr=0x0, tcn=0x169d, ter=0x0 5135 tgcr=0x1, tmr=0xff1c, trr=0x3d09, tcr=0x0, tcn=0x169d, ter=0x0
5132 Hit 'e': 5136 Hit 'e':
5133 [q, b, e, ?] ...Stopping timer 5137 [q, b, e, ?] ...Stopping timer
5134 Hit 'q': 5138 Hit 'q':
5135 [q, b, e, ?] ## Application terminated, rc = 0x0 5139 [q, b, e, ?] ## Application terminated, rc = 0x0
5136 5140
5137 5141
5138 Minicom warning: 5142 Minicom warning:
5139 ================ 5143 ================
5140 5144
5141 Over time, many people have reported problems when trying to use the 5145 Over time, many people have reported problems when trying to use the
5142 "minicom" terminal emulation program for serial download. I (wd) 5146 "minicom" terminal emulation program for serial download. I (wd)
5143 consider minicom to be broken, and recommend not to use it. Under 5147 consider minicom to be broken, and recommend not to use it. Under
5144 Unix, I recommend to use C-Kermit for general purpose use (and 5148 Unix, I recommend to use C-Kermit for general purpose use (and
5145 especially for kermit binary protocol download ("loadb" command), and 5149 especially for kermit binary protocol download ("loadb" command), and
5146 use "cu" for S-Record download ("loads" command). See 5150 use "cu" for S-Record download ("loads" command). See
5147 http://www.denx.de/wiki/view/DULG/SystemSetup#Section_4.3. 5151 http://www.denx.de/wiki/view/DULG/SystemSetup#Section_4.3.
5148 for help with kermit. 5152 for help with kermit.
5149 5153
5150 5154
5151 Nevertheless, if you absolutely want to use it try adding this 5155 Nevertheless, if you absolutely want to use it try adding this
5152 configuration to your "File transfer protocols" section: 5156 configuration to your "File transfer protocols" section:
5153 5157
5154 Name Program Name U/D FullScr IO-Red. Multi 5158 Name Program Name U/D FullScr IO-Red. Multi
5155 X kermit /usr/bin/kermit -i -l %l -s Y U Y N N 5159 X kermit /usr/bin/kermit -i -l %l -s Y U Y N N
5156 Y kermit /usr/bin/kermit -i -l %l -r N D Y N N 5160 Y kermit /usr/bin/kermit -i -l %l -r N D Y N N
5157 5161
5158 5162
5159 NetBSD Notes: 5163 NetBSD Notes:
5160 ============= 5164 =============
5161 5165
5162 Starting at version 0.9.2, U-Boot supports NetBSD both as host 5166 Starting at version 0.9.2, U-Boot supports NetBSD both as host
5163 (build U-Boot) and target system (boots NetBSD/mpc8xx). 5167 (build U-Boot) and target system (boots NetBSD/mpc8xx).
5164 5168
5165 Building requires a cross environment; it is known to work on 5169 Building requires a cross environment; it is known to work on
5166 NetBSD/i386 with the cross-powerpc-netbsd-1.3 package (you will also 5170 NetBSD/i386 with the cross-powerpc-netbsd-1.3 package (you will also
5167 need gmake since the Makefiles are not compatible with BSD make). 5171 need gmake since the Makefiles are not compatible with BSD make).
5168 Note that the cross-powerpc package does not install include files; 5172 Note that the cross-powerpc package does not install include files;
5169 attempting to build U-Boot will fail because <machine/ansi.h> is 5173 attempting to build U-Boot will fail because <machine/ansi.h> is
5170 missing. This file has to be installed and patched manually: 5174 missing. This file has to be installed and patched manually:
5171 5175
5172 # cd /usr/pkg/cross/powerpc-netbsd/include 5176 # cd /usr/pkg/cross/powerpc-netbsd/include
5173 # mkdir powerpc 5177 # mkdir powerpc
5174 # ln -s powerpc machine 5178 # ln -s powerpc machine
5175 # cp /usr/src/sys/arch/powerpc/include/ansi.h powerpc/ansi.h 5179 # cp /usr/src/sys/arch/powerpc/include/ansi.h powerpc/ansi.h
5176 # ${EDIT} powerpc/ansi.h ## must remove __va_list, _BSD_VA_LIST 5180 # ${EDIT} powerpc/ansi.h ## must remove __va_list, _BSD_VA_LIST
5177 5181
5178 Native builds *don't* work due to incompatibilities between native 5182 Native builds *don't* work due to incompatibilities between native
5179 and U-Boot include files. 5183 and U-Boot include files.
5180 5184
5181 Booting assumes that (the first part of) the image booted is a 5185 Booting assumes that (the first part of) the image booted is a
5182 stage-2 loader which in turn loads and then invokes the kernel 5186 stage-2 loader which in turn loads and then invokes the kernel
5183 proper. Loader sources will eventually appear in the NetBSD source 5187 proper. Loader sources will eventually appear in the NetBSD source
5184 tree (probably in sys/arc/mpc8xx/stand/u-boot_stage2/); in the 5188 tree (probably in sys/arc/mpc8xx/stand/u-boot_stage2/); in the
5185 meantime, see ftp://ftp.denx.de/pub/u-boot/ppcboot_stage2.tar.gz 5189 meantime, see ftp://ftp.denx.de/pub/u-boot/ppcboot_stage2.tar.gz
5186 5190
5187 5191
5188 Implementation Internals: 5192 Implementation Internals:
5189 ========================= 5193 =========================
5190 5194
5191 The following is not intended to be a complete description of every 5195 The following is not intended to be a complete description of every
5192 implementation detail. However, it should help to understand the 5196 implementation detail. However, it should help to understand the
5193 inner workings of U-Boot and make it easier to port it to custom 5197 inner workings of U-Boot and make it easier to port it to custom
5194 hardware. 5198 hardware.
5195 5199
5196 5200
5197 Initial Stack, Global Data: 5201 Initial Stack, Global Data:
5198 --------------------------- 5202 ---------------------------
5199 5203
5200 The implementation of U-Boot is complicated by the fact that U-Boot 5204 The implementation of U-Boot is complicated by the fact that U-Boot
5201 starts running out of ROM (flash memory), usually without access to 5205 starts running out of ROM (flash memory), usually without access to
5202 system RAM (because the memory controller is not initialized yet). 5206 system RAM (because the memory controller is not initialized yet).
5203 This means that we don't have writable Data or BSS segments, and BSS 5207 This means that we don't have writable Data or BSS segments, and BSS
5204 is not initialized as zero. To be able to get a C environment working 5208 is not initialized as zero. To be able to get a C environment working
5205 at all, we have to allocate at least a minimal stack. Implementation 5209 at all, we have to allocate at least a minimal stack. Implementation
5206 options for this are defined and restricted by the CPU used: Some CPU 5210 options for this are defined and restricted by the CPU used: Some CPU
5207 models provide on-chip memory (like the IMMR area on MPC8xx and 5211 models provide on-chip memory (like the IMMR area on MPC8xx and
5208 MPC826x processors), on others (parts of) the data cache can be 5212 MPC826x processors), on others (parts of) the data cache can be
5209 locked as (mis-) used as memory, etc. 5213 locked as (mis-) used as memory, etc.
5210 5214
5211 Chris Hallinan posted a good summary of these issues to the 5215 Chris Hallinan posted a good summary of these issues to the
5212 U-Boot mailing list: 5216 U-Boot mailing list:
5213 5217
5214 Subject: RE: [U-Boot-Users] RE: More On Memory Bank x (nothingness)? 5218 Subject: RE: [U-Boot-Users] RE: More On Memory Bank x (nothingness)?
5215 From: "Chris Hallinan" <clh@net1plus.com> 5219 From: "Chris Hallinan" <clh@net1plus.com>
5216 Date: Mon, 10 Feb 2003 16:43:46 -0500 (22:43 MET) 5220 Date: Mon, 10 Feb 2003 16:43:46 -0500 (22:43 MET)
5217 ... 5221 ...
5218 5222
5219 Correct me if I'm wrong, folks, but the way I understand it 5223 Correct me if I'm wrong, folks, but the way I understand it
5220 is this: Using DCACHE as initial RAM for Stack, etc, does not 5224 is this: Using DCACHE as initial RAM for Stack, etc, does not
5221 require any physical RAM backing up the cache. The cleverness 5225 require any physical RAM backing up the cache. The cleverness
5222 is that the cache is being used as a temporary supply of 5226 is that the cache is being used as a temporary supply of
5223 necessary storage before the SDRAM controller is setup. It's 5227 necessary storage before the SDRAM controller is setup. It's
5224 beyond the scope of this list to explain the details, but you 5228 beyond the scope of this list to explain the details, but you
5225 can see how this works by studying the cache architecture and 5229 can see how this works by studying the cache architecture and
5226 operation in the architecture and processor-specific manuals. 5230 operation in the architecture and processor-specific manuals.
5227 5231
5228 OCM is On Chip Memory, which I believe the 405GP has 4K. It 5232 OCM is On Chip Memory, which I believe the 405GP has 4K. It
5229 is another option for the system designer to use as an 5233 is another option for the system designer to use as an
5230 initial stack/RAM area prior to SDRAM being available. Either 5234 initial stack/RAM area prior to SDRAM being available. Either
5231 option should work for you. Using CS 4 should be fine if your 5235 option should work for you. Using CS 4 should be fine if your
5232 board designers haven't used it for something that would 5236 board designers haven't used it for something that would
5233 cause you grief during the initial boot! It is frequently not 5237 cause you grief during the initial boot! It is frequently not
5234 used. 5238 used.
5235 5239
5236 CONFIG_SYS_INIT_RAM_ADDR should be somewhere that won't interfere 5240 CONFIG_SYS_INIT_RAM_ADDR should be somewhere that won't interfere
5237 with your processor/board/system design. The default value 5241 with your processor/board/system design. The default value
5238 you will find in any recent u-boot distribution in 5242 you will find in any recent u-boot distribution in
5239 walnut.h should work for you. I'd set it to a value larger 5243 walnut.h should work for you. I'd set it to a value larger
5240 than your SDRAM module. If you have a 64MB SDRAM module, set 5244 than your SDRAM module. If you have a 64MB SDRAM module, set
5241 it above 400_0000. Just make sure your board has no resources 5245 it above 400_0000. Just make sure your board has no resources
5242 that are supposed to respond to that address! That code in 5246 that are supposed to respond to that address! That code in
5243 start.S has been around a while and should work as is when 5247 start.S has been around a while and should work as is when
5244 you get the config right. 5248 you get the config right.
5245 5249
5246 -Chris Hallinan 5250 -Chris Hallinan
5247 DS4.COM, Inc. 5251 DS4.COM, Inc.
5248 5252
5249 It is essential to remember this, since it has some impact on the C 5253 It is essential to remember this, since it has some impact on the C
5250 code for the initialization procedures: 5254 code for the initialization procedures:
5251 5255
5252 * Initialized global data (data segment) is read-only. Do not attempt 5256 * Initialized global data (data segment) is read-only. Do not attempt
5253 to write it. 5257 to write it.
5254 5258
5255 * Do not use any uninitialized global data (or implicitely initialized 5259 * Do not use any uninitialized global data (or implicitely initialized
5256 as zero data - BSS segment) at all - this is undefined, initiali- 5260 as zero data - BSS segment) at all - this is undefined, initiali-
5257 zation is performed later (when relocating to RAM). 5261 zation is performed later (when relocating to RAM).
5258 5262
5259 * Stack space is very limited. Avoid big data buffers or things like 5263 * Stack space is very limited. Avoid big data buffers or things like
5260 that. 5264 that.
5261 5265
5262 Having only the stack as writable memory limits means we cannot use 5266 Having only the stack as writable memory limits means we cannot use
5263 normal global data to share information beween the code. But it 5267 normal global data to share information beween the code. But it
5264 turned out that the implementation of U-Boot can be greatly 5268 turned out that the implementation of U-Boot can be greatly
5265 simplified by making a global data structure (gd_t) available to all 5269 simplified by making a global data structure (gd_t) available to all
5266 functions. We could pass a pointer to this data as argument to _all_ 5270 functions. We could pass a pointer to this data as argument to _all_
5267 functions, but this would bloat the code. Instead we use a feature of 5271 functions, but this would bloat the code. Instead we use a feature of
5268 the GCC compiler (Global Register Variables) to share the data: we 5272 the GCC compiler (Global Register Variables) to share the data: we
5269 place a pointer (gd) to the global data into a register which we 5273 place a pointer (gd) to the global data into a register which we
5270 reserve for this purpose. 5274 reserve for this purpose.
5271 5275
5272 When choosing a register for such a purpose we are restricted by the 5276 When choosing a register for such a purpose we are restricted by the
5273 relevant (E)ABI specifications for the current architecture, and by 5277 relevant (E)ABI specifications for the current architecture, and by
5274 GCC's implementation. 5278 GCC's implementation.
5275 5279
5276 For PowerPC, the following registers have specific use: 5280 For PowerPC, the following registers have specific use:
5277 R1: stack pointer 5281 R1: stack pointer
5278 R2: reserved for system use 5282 R2: reserved for system use
5279 R3-R4: parameter passing and return values 5283 R3-R4: parameter passing and return values
5280 R5-R10: parameter passing 5284 R5-R10: parameter passing
5281 R13: small data area pointer 5285 R13: small data area pointer
5282 R30: GOT pointer 5286 R30: GOT pointer
5283 R31: frame pointer 5287 R31: frame pointer
5284 5288
5285 (U-Boot also uses R12 as internal GOT pointer. r12 5289 (U-Boot also uses R12 as internal GOT pointer. r12
5286 is a volatile register so r12 needs to be reset when 5290 is a volatile register so r12 needs to be reset when
5287 going back and forth between asm and C) 5291 going back and forth between asm and C)
5288 5292
5289 ==> U-Boot will use R2 to hold a pointer to the global data 5293 ==> U-Boot will use R2 to hold a pointer to the global data
5290 5294
5291 Note: on PPC, we could use a static initializer (since the 5295 Note: on PPC, we could use a static initializer (since the
5292 address of the global data structure is known at compile time), 5296 address of the global data structure is known at compile time),
5293 but it turned out that reserving a register results in somewhat 5297 but it turned out that reserving a register results in somewhat
5294 smaller code - although the code savings are not that big (on 5298 smaller code - although the code savings are not that big (on
5295 average for all boards 752 bytes for the whole U-Boot image, 5299 average for all boards 752 bytes for the whole U-Boot image,
5296 624 text + 127 data). 5300 624 text + 127 data).
5297 5301
5298 On Blackfin, the normal C ABI (except for P3) is followed as documented here: 5302 On Blackfin, the normal C ABI (except for P3) is followed as documented here:
5299 http://docs.blackfin.uclinux.org/doku.php?id=application_binary_interface 5303 http://docs.blackfin.uclinux.org/doku.php?id=application_binary_interface
5300 5304
5301 ==> U-Boot will use P3 to hold a pointer to the global data 5305 ==> U-Boot will use P3 to hold a pointer to the global data
5302 5306
5303 On ARM, the following registers are used: 5307 On ARM, the following registers are used:
5304 5308
5305 R0: function argument word/integer result 5309 R0: function argument word/integer result
5306 R1-R3: function argument word 5310 R1-R3: function argument word
5307 R9: GOT pointer 5311 R9: GOT pointer
5308 R10: stack limit (used only if stack checking if enabled) 5312 R10: stack limit (used only if stack checking if enabled)
5309 R11: argument (frame) pointer 5313 R11: argument (frame) pointer
5310 R12: temporary workspace 5314 R12: temporary workspace
5311 R13: stack pointer 5315 R13: stack pointer
5312 R14: link register 5316 R14: link register
5313 R15: program counter 5317 R15: program counter
5314 5318
5315 ==> U-Boot will use R8 to hold a pointer to the global data 5319 ==> U-Boot will use R8 to hold a pointer to the global data
5316 5320
5317 On Nios II, the ABI is documented here: 5321 On Nios II, the ABI is documented here:
5318 http://www.altera.com/literature/hb/nios2/n2cpu_nii51016.pdf 5322 http://www.altera.com/literature/hb/nios2/n2cpu_nii51016.pdf
5319 5323
5320 ==> U-Boot will use gp to hold a pointer to the global data 5324 ==> U-Boot will use gp to hold a pointer to the global data
5321 5325
5322 Note: on Nios II, we give "-G0" option to gcc and don't use gp 5326 Note: on Nios II, we give "-G0" option to gcc and don't use gp
5323 to access small data sections, so gp is free. 5327 to access small data sections, so gp is free.
5324 5328
5325 On NDS32, the following registers are used: 5329 On NDS32, the following registers are used:
5326 5330
5327 R0-R1: argument/return 5331 R0-R1: argument/return
5328 R2-R5: argument 5332 R2-R5: argument
5329 R15: temporary register for assembler 5333 R15: temporary register for assembler
5330 R16: trampoline register 5334 R16: trampoline register
5331 R28: frame pointer (FP) 5335 R28: frame pointer (FP)
5332 R29: global pointer (GP) 5336 R29: global pointer (GP)
5333 R30: link register (LP) 5337 R30: link register (LP)
5334 R31: stack pointer (SP) 5338 R31: stack pointer (SP)
5335 PC: program counter (PC) 5339 PC: program counter (PC)
5336 5340
5337 ==> U-Boot will use R10 to hold a pointer to the global data 5341 ==> U-Boot will use R10 to hold a pointer to the global data
5338 5342
5339 NOTE: DECLARE_GLOBAL_DATA_PTR must be used with file-global scope, 5343 NOTE: DECLARE_GLOBAL_DATA_PTR must be used with file-global scope,
5340 or current versions of GCC may "optimize" the code too much. 5344 or current versions of GCC may "optimize" the code too much.
5341 5345
5342 Memory Management: 5346 Memory Management:
5343 ------------------ 5347 ------------------
5344 5348
5345 U-Boot runs in system state and uses physical addresses, i.e. the 5349 U-Boot runs in system state and uses physical addresses, i.e. the
5346 MMU is not used either for address mapping nor for memory protection. 5350 MMU is not used either for address mapping nor for memory protection.
5347 5351
5348 The available memory is mapped to fixed addresses using the memory 5352 The available memory is mapped to fixed addresses using the memory
5349 controller. In this process, a contiguous block is formed for each 5353 controller. In this process, a contiguous block is formed for each
5350 memory type (Flash, SDRAM, SRAM), even when it consists of several 5354 memory type (Flash, SDRAM, SRAM), even when it consists of several
5351 physical memory banks. 5355 physical memory banks.
5352 5356
5353 U-Boot is installed in the first 128 kB of the first Flash bank (on 5357 U-Boot is installed in the first 128 kB of the first Flash bank (on
5354 TQM8xxL modules this is the range 0x40000000 ... 0x4001FFFF). After 5358 TQM8xxL modules this is the range 0x40000000 ... 0x4001FFFF). After
5355 booting and sizing and initializing DRAM, the code relocates itself 5359 booting and sizing and initializing DRAM, the code relocates itself
5356 to the upper end of DRAM. Immediately below the U-Boot code some 5360 to the upper end of DRAM. Immediately below the U-Boot code some
5357 memory is reserved for use by malloc() [see CONFIG_SYS_MALLOC_LEN 5361 memory is reserved for use by malloc() [see CONFIG_SYS_MALLOC_LEN
5358 configuration setting]. Below that, a structure with global Board 5362 configuration setting]. Below that, a structure with global Board
5359 Info data is placed, followed by the stack (growing downward). 5363 Info data is placed, followed by the stack (growing downward).
5360 5364
5361 Additionally, some exception handler code is copied to the low 8 kB 5365 Additionally, some exception handler code is copied to the low 8 kB
5362 of DRAM (0x00000000 ... 0x00001FFF). 5366 of DRAM (0x00000000 ... 0x00001FFF).
5363 5367
5364 So a typical memory configuration with 16 MB of DRAM could look like 5368 So a typical memory configuration with 16 MB of DRAM could look like
5365 this: 5369 this:
5366 5370
5367 0x0000 0000 Exception Vector code 5371 0x0000 0000 Exception Vector code
5368 : 5372 :
5369 0x0000 1FFF 5373 0x0000 1FFF
5370 0x0000 2000 Free for Application Use 5374 0x0000 2000 Free for Application Use
5371 : 5375 :
5372 : 5376 :
5373 5377
5374 : 5378 :
5375 : 5379 :
5376 0x00FB FF20 Monitor Stack (Growing downward) 5380 0x00FB FF20 Monitor Stack (Growing downward)
5377 0x00FB FFAC Board Info Data and permanent copy of global data 5381 0x00FB FFAC Board Info Data and permanent copy of global data
5378 0x00FC 0000 Malloc Arena 5382 0x00FC 0000 Malloc Arena
5379 : 5383 :
5380 0x00FD FFFF 5384 0x00FD FFFF
5381 0x00FE 0000 RAM Copy of Monitor Code 5385 0x00FE 0000 RAM Copy of Monitor Code
5382 ... eventually: LCD or video framebuffer 5386 ... eventually: LCD or video framebuffer
5383 ... eventually: pRAM (Protected RAM - unchanged by reset) 5387 ... eventually: pRAM (Protected RAM - unchanged by reset)
5384 0x00FF FFFF [End of RAM] 5388 0x00FF FFFF [End of RAM]
5385 5389
5386 5390
5387 System Initialization: 5391 System Initialization:
5388 ---------------------- 5392 ----------------------
5389 5393
5390 In the reset configuration, U-Boot starts at the reset entry point 5394 In the reset configuration, U-Boot starts at the reset entry point
5391 (on most PowerPC systems at address 0x00000100). Because of the reset 5395 (on most PowerPC systems at address 0x00000100). Because of the reset
5392 configuration for CS0# this is a mirror of the onboard Flash memory. 5396 configuration for CS0# this is a mirror of the onboard Flash memory.
5393 To be able to re-map memory U-Boot then jumps to its link address. 5397 To be able to re-map memory U-Boot then jumps to its link address.
5394 To be able to implement the initialization code in C, a (small!) 5398 To be able to implement the initialization code in C, a (small!)
5395 initial stack is set up in the internal Dual Ported RAM (in case CPUs 5399 initial stack is set up in the internal Dual Ported RAM (in case CPUs
5396 which provide such a feature like MPC8xx or MPC8260), or in a locked 5400 which provide such a feature like MPC8xx or MPC8260), or in a locked
5397 part of the data cache. After that, U-Boot initializes the CPU core, 5401 part of the data cache. After that, U-Boot initializes the CPU core,
5398 the caches and the SIU. 5402 the caches and the SIU.
5399 5403
5400 Next, all (potentially) available memory banks are mapped using a 5404 Next, all (potentially) available memory banks are mapped using a
5401 preliminary mapping. For example, we put them on 512 MB boundaries 5405 preliminary mapping. For example, we put them on 512 MB boundaries
5402 (multiples of 0x20000000: SDRAM on 0x00000000 and 0x20000000, Flash 5406 (multiples of 0x20000000: SDRAM on 0x00000000 and 0x20000000, Flash
5403 on 0x40000000 and 0x60000000, SRAM on 0x80000000). Then UPM A is 5407 on 0x40000000 and 0x60000000, SRAM on 0x80000000). Then UPM A is
5404 programmed for SDRAM access. Using the temporary configuration, a 5408 programmed for SDRAM access. Using the temporary configuration, a
5405 simple memory test is run that determines the size of the SDRAM 5409 simple memory test is run that determines the size of the SDRAM
5406 banks. 5410 banks.
5407 5411
5408 When there is more than one SDRAM bank, and the banks are of 5412 When there is more than one SDRAM bank, and the banks are of
5409 different size, the largest is mapped first. For equal size, the first 5413 different size, the largest is mapped first. For equal size, the first
5410 bank (CS2#) is mapped first. The first mapping is always for address 5414 bank (CS2#) is mapped first. The first mapping is always for address
5411 0x00000000, with any additional banks following immediately to create 5415 0x00000000, with any additional banks following immediately to create
5412 contiguous memory starting from 0. 5416 contiguous memory starting from 0.
5413 5417
5414 Then, the monitor installs itself at the upper end of the SDRAM area 5418 Then, the monitor installs itself at the upper end of the SDRAM area
5415 and allocates memory for use by malloc() and for the global Board 5419 and allocates memory for use by malloc() and for the global Board
5416 Info data; also, the exception vector code is copied to the low RAM 5420 Info data; also, the exception vector code is copied to the low RAM
5417 pages, and the final stack is set up. 5421 pages, and the final stack is set up.
5418 5422
5419 Only after this relocation will you have a "normal" C environment; 5423 Only after this relocation will you have a "normal" C environment;
5420 until that you are restricted in several ways, mostly because you are 5424 until that you are restricted in several ways, mostly because you are
5421 running from ROM, and because the code will have to be relocated to a 5425 running from ROM, and because the code will have to be relocated to a
5422 new address in RAM. 5426 new address in RAM.
5423 5427
5424 5428
5425 U-Boot Porting Guide: 5429 U-Boot Porting Guide:
5426 ---------------------- 5430 ----------------------
5427 5431
5428 [Based on messages by Jerry Van Baren in the U-Boot-Users mailing 5432 [Based on messages by Jerry Van Baren in the U-Boot-Users mailing
5429 list, October 2002] 5433 list, October 2002]
5430 5434
5431 5435
5432 int main(int argc, char *argv[]) 5436 int main(int argc, char *argv[])
5433 { 5437 {
5434 sighandler_t no_more_time; 5438 sighandler_t no_more_time;
5435 5439
5436 signal(SIGALRM, no_more_time); 5440 signal(SIGALRM, no_more_time);
5437 alarm(PROJECT_DEADLINE - toSec (3 * WEEK)); 5441 alarm(PROJECT_DEADLINE - toSec (3 * WEEK));
5438 5442
5439 if (available_money > available_manpower) { 5443 if (available_money > available_manpower) {
5440 Pay consultant to port U-Boot; 5444 Pay consultant to port U-Boot;
5441 return 0; 5445 return 0;
5442 } 5446 }
5443 5447
5444 Download latest U-Boot source; 5448 Download latest U-Boot source;
5445 5449
5446 Subscribe to u-boot mailing list; 5450 Subscribe to u-boot mailing list;
5447 5451
5448 if (clueless) 5452 if (clueless)
5449 email("Hi, I am new to U-Boot, how do I get started?"); 5453 email("Hi, I am new to U-Boot, how do I get started?");
5450 5454
5451 while (learning) { 5455 while (learning) {
5452 Read the README file in the top level directory; 5456 Read the README file in the top level directory;
5453 Read http://www.denx.de/twiki/bin/view/DULG/Manual; 5457 Read http://www.denx.de/twiki/bin/view/DULG/Manual;
5454 Read applicable doc/*.README; 5458 Read applicable doc/*.README;
5455 Read the source, Luke; 5459 Read the source, Luke;
5456 /* find . -name "*.[chS]" | xargs grep -i <keyword> */ 5460 /* find . -name "*.[chS]" | xargs grep -i <keyword> */
5457 } 5461 }
5458 5462
5459 if (available_money > toLocalCurrency ($2500)) 5463 if (available_money > toLocalCurrency ($2500))
5460 Buy a BDI3000; 5464 Buy a BDI3000;
5461 else 5465 else
5462 Add a lot of aggravation and time; 5466 Add a lot of aggravation and time;
5463 5467
5464 if (a similar board exists) { /* hopefully... */ 5468 if (a similar board exists) { /* hopefully... */
5465 cp -a board/<similar> board/<myboard> 5469 cp -a board/<similar> board/<myboard>
5466 cp include/configs/<similar>.h include/configs/<myboard>.h 5470 cp include/configs/<similar>.h include/configs/<myboard>.h
5467 } else { 5471 } else {
5468 Create your own board support subdirectory; 5472 Create your own board support subdirectory;
5469 Create your own board include/configs/<myboard>.h file; 5473 Create your own board include/configs/<myboard>.h file;
5470 } 5474 }
5471 Edit new board/<myboard> files 5475 Edit new board/<myboard> files
5472 Edit new include/configs/<myboard>.h 5476 Edit new include/configs/<myboard>.h
5473 5477
5474 while (!accepted) { 5478 while (!accepted) {
5475 while (!running) { 5479 while (!running) {
5476 do { 5480 do {
5477 Add / modify source code; 5481 Add / modify source code;
5478 } until (compiles); 5482 } until (compiles);
5479 Debug; 5483 Debug;
5480 if (clueless) 5484 if (clueless)
5481 email("Hi, I am having problems..."); 5485 email("Hi, I am having problems...");
5482 } 5486 }
5483 Send patch file to the U-Boot email list; 5487 Send patch file to the U-Boot email list;
5484 if (reasonable critiques) 5488 if (reasonable critiques)
5485 Incorporate improvements from email list code review; 5489 Incorporate improvements from email list code review;
5486 else 5490 else
5487 Defend code as written; 5491 Defend code as written;
5488 } 5492 }
5489 5493
5490 return 0; 5494 return 0;
5491 } 5495 }
5492 5496
5493 void no_more_time (int sig) 5497 void no_more_time (int sig)
5494 { 5498 {
5495 hire_a_guru(); 5499 hire_a_guru();
5496 } 5500 }
5497 5501
5498 5502
5499 Coding Standards: 5503 Coding Standards:
5500 ----------------- 5504 -----------------
5501 5505
5502 All contributions to U-Boot should conform to the Linux kernel 5506 All contributions to U-Boot should conform to the Linux kernel
5503 coding style; see the file "Documentation/CodingStyle" and the script 5507 coding style; see the file "Documentation/CodingStyle" and the script
5504 "scripts/Lindent" in your Linux kernel source directory. 5508 "scripts/Lindent" in your Linux kernel source directory.
5505 5509
5506 Source files originating from a different project (for example the 5510 Source files originating from a different project (for example the
5507 MTD subsystem) are generally exempt from these guidelines and are not 5511 MTD subsystem) are generally exempt from these guidelines and are not
5508 reformated to ease subsequent migration to newer versions of those 5512 reformated to ease subsequent migration to newer versions of those
5509 sources. 5513 sources.
5510 5514
5511 Please note that U-Boot is implemented in C (and to some small parts in 5515 Please note that U-Boot is implemented in C (and to some small parts in
5512 Assembler); no C++ is used, so please do not use C++ style comments (//) 5516 Assembler); no C++ is used, so please do not use C++ style comments (//)
5513 in your code. 5517 in your code.
5514 5518
5515 Please also stick to the following formatting rules: 5519 Please also stick to the following formatting rules:
5516 - remove any trailing white space 5520 - remove any trailing white space
5517 - use TAB characters for indentation and vertical alignment, not spaces 5521 - use TAB characters for indentation and vertical alignment, not spaces
5518 - make sure NOT to use DOS '\r\n' line feeds 5522 - make sure NOT to use DOS '\r\n' line feeds
5519 - do not add more than 2 consecutive empty lines to source files 5523 - do not add more than 2 consecutive empty lines to source files
5520 - do not add trailing empty lines to source files 5524 - do not add trailing empty lines to source files
5521 5525
5522 Submissions which do not conform to the standards may be returned 5526 Submissions which do not conform to the standards may be returned
5523 with a request to reformat the changes. 5527 with a request to reformat the changes.
5524 5528
5525 5529
5526 Submitting Patches: 5530 Submitting Patches:
5527 ------------------- 5531 -------------------
5528 5532
5529 Since the number of patches for U-Boot is growing, we need to 5533 Since the number of patches for U-Boot is growing, we need to
5530 establish some rules. Submissions which do not conform to these rules 5534 establish some rules. Submissions which do not conform to these rules
5531 may be rejected, even when they contain important and valuable stuff. 5535 may be rejected, even when they contain important and valuable stuff.
5532 5536
5533 Please see http://www.denx.de/wiki/U-Boot/Patches for details. 5537 Please see http://www.denx.de/wiki/U-Boot/Patches for details.
5534 5538
5535 Patches shall be sent to the u-boot mailing list <u-boot@lists.denx.de>; 5539 Patches shall be sent to the u-boot mailing list <u-boot@lists.denx.de>;
5536 see http://lists.denx.de/mailman/listinfo/u-boot 5540 see http://lists.denx.de/mailman/listinfo/u-boot
5537 5541
5538 When you send a patch, please include the following information with 5542 When you send a patch, please include the following information with
5539 it: 5543 it:
5540 5544
5541 * For bug fixes: a description of the bug and how your patch fixes 5545 * For bug fixes: a description of the bug and how your patch fixes
5542 this bug. Please try to include a way of demonstrating that the 5546 this bug. Please try to include a way of demonstrating that the
5543 patch actually fixes something. 5547 patch actually fixes something.
5544 5548
5545 * For new features: a description of the feature and your 5549 * For new features: a description of the feature and your
5546 implementation. 5550 implementation.
5547 5551
5548 * A CHANGELOG entry as plaintext (separate from the patch) 5552 * A CHANGELOG entry as plaintext (separate from the patch)
5549 5553
5550 * For major contributions, your entry to the CREDITS file 5554 * For major contributions, your entry to the CREDITS file
5551 5555
5552 * When you add support for a new board, don't forget to add this 5556 * When you add support for a new board, don't forget to add this
5553 board to the MAINTAINERS file, too. 5557 board to the MAINTAINERS file, too.
5554 5558
5555 * If your patch adds new configuration options, don't forget to 5559 * If your patch adds new configuration options, don't forget to
5556 document these in the README file. 5560 document these in the README file.
5557 5561
5558 * The patch itself. If you are using git (which is *strongly* 5562 * The patch itself. If you are using git (which is *strongly*
5559 recommended) you can easily generate the patch using the 5563 recommended) you can easily generate the patch using the
5560 "git format-patch". If you then use "git send-email" to send it to 5564 "git format-patch". If you then use "git send-email" to send it to
5561 the U-Boot mailing list, you will avoid most of the common problems 5565 the U-Boot mailing list, you will avoid most of the common problems
5562 with some other mail clients. 5566 with some other mail clients.
5563 5567
5564 If you cannot use git, use "diff -purN OLD NEW". If your version of 5568 If you cannot use git, use "diff -purN OLD NEW". If your version of
5565 diff does not support these options, then get the latest version of 5569 diff does not support these options, then get the latest version of
5566 GNU diff. 5570 GNU diff.
5567 5571
5568 The current directory when running this command shall be the parent 5572 The current directory when running this command shall be the parent
5569 directory of the U-Boot source tree (i. e. please make sure that 5573 directory of the U-Boot source tree (i. e. please make sure that
5570 your patch includes sufficient directory information for the 5574 your patch includes sufficient directory information for the
5571 affected files). 5575 affected files).
5572 5576
5573 We prefer patches as plain text. MIME attachments are discouraged, 5577 We prefer patches as plain text. MIME attachments are discouraged,
5574 and compressed attachments must not be used. 5578 and compressed attachments must not be used.
5575 5579
5576 * If one logical set of modifications affects or creates several 5580 * If one logical set of modifications affects or creates several
5577 files, all these changes shall be submitted in a SINGLE patch file. 5581 files, all these changes shall be submitted in a SINGLE patch file.
5578 5582
5579 * Changesets that contain different, unrelated modifications shall be 5583 * Changesets that contain different, unrelated modifications shall be
5580 submitted as SEPARATE patches, one patch per changeset. 5584 submitted as SEPARATE patches, one patch per changeset.
5581 5585
5582 5586
5583 Notes: 5587 Notes:
5584 5588
5585 * Before sending the patch, run the MAKEALL script on your patched 5589 * Before sending the patch, run the MAKEALL script on your patched
5586 source tree and make sure that no errors or warnings are reported 5590 source tree and make sure that no errors or warnings are reported
5587 for any of the boards. 5591 for any of the boards.
5588 5592
5589 * Keep your modifications to the necessary minimum: A patch 5593 * Keep your modifications to the necessary minimum: A patch
5590 containing several unrelated changes or arbitrary reformats will be 5594 containing several unrelated changes or arbitrary reformats will be
5591 returned with a request to re-formatting / split it. 5595 returned with a request to re-formatting / split it.
5592 5596
5593 * If you modify existing code, make sure that your new code does not 5597 * If you modify existing code, make sure that your new code does not
5594 add to the memory footprint of the code ;-) Small is beautiful! 5598 add to the memory footprint of the code ;-) Small is beautiful!
5595 When adding new features, these should compile conditionally only 5599 When adding new features, these should compile conditionally only
5596 (using #ifdef), and the resulting code with the new feature 5600 (using #ifdef), and the resulting code with the new feature
5597 disabled must not need more memory than the old code without your 5601 disabled must not need more memory than the old code without your
5598 modification. 5602 modification.
5599 5603
5600 * Remember that there is a size limit of 100 kB per message on the 5604 * Remember that there is a size limit of 100 kB per message on the
5601 u-boot mailing list. Bigger patches will be moderated. If they are 5605 u-boot mailing list. Bigger patches will be moderated. If they are
5602 reasonable and not too big, they will be acknowledged. But patches 5606 reasonable and not too big, they will be acknowledged. But patches
5603 bigger than the size limit should be avoided. 5607 bigger than the size limit should be avoided.
5604 5608
arch/arm/cpu/armv7/omap-common/clocks-common.c
Diff comments   View file @ 0b1b60c
1 /* 1 /*
2 * 2 *
3 * Clock initialization for OMAP4 3 * Clock initialization for OMAP4
4 * 4 *
5 * (C) Copyright 2010 5 * (C) Copyright 2010
6 * Texas Instruments, <www.ti.com> 6 * Texas Instruments, <www.ti.com>
7 * 7 *
8 * Aneesh V <aneesh@ti.com> 8 * Aneesh V <aneesh@ti.com>
9 * 9 *
10 * Based on previous work by: 10 * Based on previous work by:
11 * Santosh Shilimkar <santosh.shilimkar@ti.com> 11 * Santosh Shilimkar <santosh.shilimkar@ti.com>
12 * Rajendra Nayak <rnayak@ti.com> 12 * Rajendra Nayak <rnayak@ti.com>
13 * 13 *
14 * See file CREDITS for list of people who contributed to this 14 * See file CREDITS for list of people who contributed to this
15 * project. 15 * project.
16 * 16 *
17 * This program is free software; you can redistribute it and/or 17 * This program is free software; you can redistribute it and/or
18 * modify it under the terms of the GNU General Public License as 18 * modify it under the terms of the GNU General Public License as
19 * published by the Free Software Foundation; either version 2 of 19 * published by the Free Software Foundation; either version 2 of
20 * the License, or (at your option) any later version. 20 * the License, or (at your option) any later version.
21 * 21 *
22 * This program is distributed in the hope that it will be useful, 22 * This program is distributed in the hope that it will be useful,
23 * but WITHOUT ANY WARRANTY; without even the implied warranty of 23 * but WITHOUT ANY WARRANTY; without even the implied warranty of
24 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 24 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
25 * GNU General Public License for more details. 25 * GNU General Public License for more details.
26 * 26 *
27 * You should have received a copy of the GNU General Public License 27 * You should have received a copy of the GNU General Public License
28 * along with this program; if not, write to the Free Software 28 * along with this program; if not, write to the Free Software
29 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 29 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
30 * MA 02111-1307 USA 30 * MA 02111-1307 USA
31 */ 31 */
32 #include <common.h> 32 #include <common.h>
33 #include <asm/omap_common.h> 33 #include <asm/omap_common.h>
34 #include <asm/gpio.h> 34 #include <asm/gpio.h>
35 #include <asm/arch/clocks.h> 35 #include <asm/arch/clocks.h>
36 #include <asm/arch/sys_proto.h> 36 #include <asm/arch/sys_proto.h>
37 #include <asm/utils.h> 37 #include <asm/utils.h>
38 #include <asm/omap_gpio.h> 38 #include <asm/omap_gpio.h>
39 #include <asm/emif.h> 39 #include <asm/emif.h>
40 40
41 #ifndef CONFIG_SPL_BUILD 41 #ifndef CONFIG_SPL_BUILD
42 /* 42 /*
43 * printing to console doesn't work unless 43 * printing to console doesn't work unless
44 * this code is executed from SPL 44 * this code is executed from SPL
45 */ 45 */
46 #define printf(fmt, args...) 46 #define printf(fmt, args...)
47 #define puts(s) 47 #define puts(s)
48 #endif 48 #endif
49 49
50 const u32 sys_clk_array[8] = { 50 const u32 sys_clk_array[8] = {
51 12000000, /* 12 MHz */ 51 12000000, /* 12 MHz */
52 13000000, /* 13 MHz */ 52 13000000, /* 13 MHz */
53 16800000, /* 16.8 MHz */ 53 16800000, /* 16.8 MHz */
54 19200000, /* 19.2 MHz */ 54 19200000, /* 19.2 MHz */
55 26000000, /* 26 MHz */ 55 26000000, /* 26 MHz */
56 27000000, /* 27 MHz */ 56 27000000, /* 27 MHz */
57 38400000, /* 38.4 MHz */ 57 38400000, /* 38.4 MHz */
58 20000000, /* 20 MHz */ 58 20000000, /* 20 MHz */
59 }; 59 };
60 60
61 static inline u32 __get_sys_clk_index(void) 61 static inline u32 __get_sys_clk_index(void)
62 { 62 {
63 s8 ind; 63 s8 ind;
64 /* 64 /*
65 * For ES1 the ROM code calibration of sys clock is not reliable 65 * For ES1 the ROM code calibration of sys clock is not reliable
66 * due to hw issue. So, use hard-coded value. If this value is not 66 * due to hw issue. So, use hard-coded value. If this value is not
67 * correct for any board over-ride this function in board file 67 * correct for any board over-ride this function in board file
68 * From ES2.0 onwards you will get this information from 68 * From ES2.0 onwards you will get this information from
69 * CM_SYS_CLKSEL 69 * CM_SYS_CLKSEL
70 */ 70 */
71 if (omap_revision() == OMAP4430_ES1_0) 71 if (omap_revision() == OMAP4430_ES1_0)
72 ind = OMAP_SYS_CLK_IND_38_4_MHZ; 72 ind = OMAP_SYS_CLK_IND_38_4_MHZ;
73 else { 73 else {
74 /* SYS_CLKSEL - 1 to match the dpll param array indices */ 74 /* SYS_CLKSEL - 1 to match the dpll param array indices */
75 ind = (readl((*prcm)->cm_sys_clksel) & 75 ind = (readl((*prcm)->cm_sys_clksel) &
76 CM_SYS_CLKSEL_SYS_CLKSEL_MASK) - 1; 76 CM_SYS_CLKSEL_SYS_CLKSEL_MASK) - 1;
77 /* 77 /*
78 * SYS_CLKSEL value for 20MHz is 0. This is introduced newly 78 * SYS_CLKSEL value for 20MHz is 0. This is introduced newly
79 * in DRA7XX socs. SYS_CLKSEL -1 will be greater than 79 * in DRA7XX socs. SYS_CLKSEL -1 will be greater than
80 * NUM_SYS_CLK. So considering the last 3 bits as the index 80 * NUM_SYS_CLK. So considering the last 3 bits as the index
81 * for the dpll param array. 81 * for the dpll param array.
82 */ 82 */
83 ind &= CM_SYS_CLKSEL_SYS_CLKSEL_MASK; 83 ind &= CM_SYS_CLKSEL_SYS_CLKSEL_MASK;
84 } 84 }
85 return ind; 85 return ind;
86 } 86 }
87 87
88 u32 get_sys_clk_index(void) 88 u32 get_sys_clk_index(void)
89 __attribute__ ((weak, alias("__get_sys_clk_index"))); 89 __attribute__ ((weak, alias("__get_sys_clk_index")));
90 90
91 u32 get_sys_clk_freq(void) 91 u32 get_sys_clk_freq(void)
92 { 92 {
93 u8 index = get_sys_clk_index(); 93 u8 index = get_sys_clk_index();
94 return sys_clk_array[index]; 94 return sys_clk_array[index];
95 } 95 }
96 96
97 void setup_post_dividers(u32 const base, const struct dpll_params *params) 97 void setup_post_dividers(u32 const base, const struct dpll_params *params)
98 { 98 {
99 struct dpll_regs *const dpll_regs = (struct dpll_regs *)base; 99 struct dpll_regs *const dpll_regs = (struct dpll_regs *)base;
100 100
101 /* Setup post-dividers */ 101 /* Setup post-dividers */
102 if (params->m2 >= 0) 102 if (params->m2 >= 0)
103 writel(params->m2, &dpll_regs->cm_div_m2_dpll); 103 writel(params->m2, &dpll_regs->cm_div_m2_dpll);
104 if (params->m3 >= 0) 104 if (params->m3 >= 0)
105 writel(params->m3, &dpll_regs->cm_div_m3_dpll); 105 writel(params->m3, &dpll_regs->cm_div_m3_dpll);
106 if (params->m4_h11 >= 0) 106 if (params->m4_h11 >= 0)
107 writel(params->m4_h11, &dpll_regs->cm_div_m4_h11_dpll); 107 writel(params->m4_h11, &dpll_regs->cm_div_m4_h11_dpll);
108 if (params->m5_h12 >= 0) 108 if (params->m5_h12 >= 0)
109 writel(params->m5_h12, &dpll_regs->cm_div_m5_h12_dpll); 109 writel(params->m5_h12, &dpll_regs->cm_div_m5_h12_dpll);
110 if (params->m6_h13 >= 0) 110 if (params->m6_h13 >= 0)
111 writel(params->m6_h13, &dpll_regs->cm_div_m6_h13_dpll); 111 writel(params->m6_h13, &dpll_regs->cm_div_m6_h13_dpll);
112 if (params->m7_h14 >= 0) 112 if (params->m7_h14 >= 0)
113 writel(params->m7_h14, &dpll_regs->cm_div_m7_h14_dpll); 113 writel(params->m7_h14, &dpll_regs->cm_div_m7_h14_dpll);
114 if (params->h21 >= 0) 114 if (params->h21 >= 0)
115 writel(params->h21, &dpll_regs->cm_div_h21_dpll); 115 writel(params->h21, &dpll_regs->cm_div_h21_dpll);
116 if (params->h22 >= 0) 116 if (params->h22 >= 0)
117 writel(params->h22, &dpll_regs->cm_div_h22_dpll); 117 writel(params->h22, &dpll_regs->cm_div_h22_dpll);
118 if (params->h23 >= 0) 118 if (params->h23 >= 0)
119 writel(params->h23, &dpll_regs->cm_div_h23_dpll); 119 writel(params->h23, &dpll_regs->cm_div_h23_dpll);
120 if (params->h24 >= 0) 120 if (params->h24 >= 0)
121 writel(params->h24, &dpll_regs->cm_div_h24_dpll); 121 writel(params->h24, &dpll_regs->cm_div_h24_dpll);
122 } 122 }
123 123
124 static inline void do_bypass_dpll(u32 const base) 124 static inline void do_bypass_dpll(u32 const base)
125 { 125 {
126 struct dpll_regs *dpll_regs = (struct dpll_regs *)base; 126 struct dpll_regs *dpll_regs = (struct dpll_regs *)base;
127 127
128 clrsetbits_le32(&dpll_regs->cm_clkmode_dpll, 128 clrsetbits_le32(&dpll_regs->cm_clkmode_dpll,
129 CM_CLKMODE_DPLL_DPLL_EN_MASK, 129 CM_CLKMODE_DPLL_DPLL_EN_MASK,
130 DPLL_EN_FAST_RELOCK_BYPASS << 130 DPLL_EN_FAST_RELOCK_BYPASS <<
131 CM_CLKMODE_DPLL_EN_SHIFT); 131 CM_CLKMODE_DPLL_EN_SHIFT);
132 } 132 }
133 133
134 static inline void wait_for_bypass(u32 const base) 134 static inline void wait_for_bypass(u32 const base)
135 { 135 {
136 struct dpll_regs *const dpll_regs = (struct dpll_regs *)base; 136 struct dpll_regs *const dpll_regs = (struct dpll_regs *)base;
137 137
138 if (!wait_on_value(ST_DPLL_CLK_MASK, 0, &dpll_regs->cm_idlest_dpll, 138 if (!wait_on_value(ST_DPLL_CLK_MASK, 0, &dpll_regs->cm_idlest_dpll,
139 LDELAY)) { 139 LDELAY)) {
140 printf("Bypassing DPLL failed %x\n", base); 140 printf("Bypassing DPLL failed %x\n", base);
141 } 141 }
142 } 142 }
143 143
144 static inline void do_lock_dpll(u32 const base) 144 static inline void do_lock_dpll(u32 const base)
145 { 145 {
146 struct dpll_regs *const dpll_regs = (struct dpll_regs *)base; 146 struct dpll_regs *const dpll_regs = (struct dpll_regs *)base;
147 147
148 clrsetbits_le32(&dpll_regs->cm_clkmode_dpll, 148 clrsetbits_le32(&dpll_regs->cm_clkmode_dpll,
149 CM_CLKMODE_DPLL_DPLL_EN_MASK, 149 CM_CLKMODE_DPLL_DPLL_EN_MASK,
150 DPLL_EN_LOCK << CM_CLKMODE_DPLL_EN_SHIFT); 150 DPLL_EN_LOCK << CM_CLKMODE_DPLL_EN_SHIFT);
151 } 151 }
152 152
153 static inline void wait_for_lock(u32 const base) 153 static inline void wait_for_lock(u32 const base)
154 { 154 {
155 struct dpll_regs *const dpll_regs = (struct dpll_regs *)base; 155 struct dpll_regs *const dpll_regs = (struct dpll_regs *)base;
156 156
157 if (!wait_on_value(ST_DPLL_CLK_MASK, ST_DPLL_CLK_MASK, 157 if (!wait_on_value(ST_DPLL_CLK_MASK, ST_DPLL_CLK_MASK,
158 &dpll_regs->cm_idlest_dpll, LDELAY)) { 158 &dpll_regs->cm_idlest_dpll, LDELAY)) {
159 printf("DPLL locking failed for %x\n", base); 159 printf("DPLL locking failed for %x\n", base);
160 hang(); 160 hang();
161 } 161 }
162 } 162 }
163 163
164 inline u32 check_for_lock(u32 const base) 164 inline u32 check_for_lock(u32 const base)
165 { 165 {
166 struct dpll_regs *const dpll_regs = (struct dpll_regs *)base; 166 struct dpll_regs *const dpll_regs = (struct dpll_regs *)base;
167 u32 lock = readl(&dpll_regs->cm_idlest_dpll) & ST_DPLL_CLK_MASK; 167 u32 lock = readl(&dpll_regs->cm_idlest_dpll) & ST_DPLL_CLK_MASK;
168 168
169 return lock; 169 return lock;
170 } 170 }
171 171
172 const struct dpll_params *get_mpu_dpll_params(struct dplls const *dpll_data) 172 const struct dpll_params *get_mpu_dpll_params(struct dplls const *dpll_data)
173 { 173 {
174 u32 sysclk_ind = get_sys_clk_index(); 174 u32 sysclk_ind = get_sys_clk_index();
175 return &dpll_data->mpu[sysclk_ind]; 175 return &dpll_data->mpu[sysclk_ind];
176 } 176 }
177 177
178 const struct dpll_params *get_core_dpll_params(struct dplls const *dpll_data) 178 const struct dpll_params *get_core_dpll_params(struct dplls const *dpll_data)
179 { 179 {
180 u32 sysclk_ind = get_sys_clk_index(); 180 u32 sysclk_ind = get_sys_clk_index();
181 return &dpll_data->core[sysclk_ind]; 181 return &dpll_data->core[sysclk_ind];
182 } 182 }
183 183
184 const struct dpll_params *get_per_dpll_params(struct dplls const *dpll_data) 184 const struct dpll_params *get_per_dpll_params(struct dplls const *dpll_data)
185 { 185 {
186 u32 sysclk_ind = get_sys_clk_index(); 186 u32 sysclk_ind = get_sys_clk_index();
187 return &dpll_data->per[sysclk_ind]; 187 return &dpll_data->per[sysclk_ind];
188 } 188 }
189 189
190 const struct dpll_params *get_iva_dpll_params(struct dplls const *dpll_data) 190 const struct dpll_params *get_iva_dpll_params(struct dplls const *dpll_data)
191 { 191 {
192 u32 sysclk_ind = get_sys_clk_index(); 192 u32 sysclk_ind = get_sys_clk_index();
193 return &dpll_data->iva[sysclk_ind]; 193 return &dpll_data->iva[sysclk_ind];
194 } 194 }
195 195
196 const struct dpll_params *get_usb_dpll_params(struct dplls const *dpll_data) 196 const struct dpll_params *get_usb_dpll_params(struct dplls const *dpll_data)
197 { 197 {
198 u32 sysclk_ind = get_sys_clk_index(); 198 u32 sysclk_ind = get_sys_clk_index();
199 return &dpll_data->usb[sysclk_ind]; 199 return &dpll_data->usb[sysclk_ind];
200 } 200 }
201 201
202 const struct dpll_params *get_abe_dpll_params(struct dplls const *dpll_data) 202 const struct dpll_params *get_abe_dpll_params(struct dplls const *dpll_data)
203 { 203 {
204 #ifdef CONFIG_SYS_OMAP_ABE_SYSCK 204 #ifdef CONFIG_SYS_OMAP_ABE_SYSCK
205 u32 sysclk_ind = get_sys_clk_index(); 205 u32 sysclk_ind = get_sys_clk_index();
206 return &dpll_data->abe[sysclk_ind]; 206 return &dpll_data->abe[sysclk_ind];
207 #else 207 #else
208 return dpll_data->abe; 208 return dpll_data->abe;
209 #endif 209 #endif
210 } 210 }
211 211
212 static const struct dpll_params *get_ddr_dpll_params 212 static const struct dpll_params *get_ddr_dpll_params
213 (struct dplls const *dpll_data) 213 (struct dplls const *dpll_data)
214 { 214 {
215 u32 sysclk_ind = get_sys_clk_index(); 215 u32 sysclk_ind = get_sys_clk_index();
216 216
217 if (!dpll_data->ddr) 217 if (!dpll_data->ddr)
218 return NULL; 218 return NULL;
219 return &dpll_data->ddr[sysclk_ind]; 219 return &dpll_data->ddr[sysclk_ind];
220 } 220 }
221 221
222 static void do_setup_dpll(u32 const base, const struct dpll_params *params, 222 static void do_setup_dpll(u32 const base, const struct dpll_params *params,
223 u8 lock, char *dpll) 223 u8 lock, char *dpll)
224 { 224 {
225 u32 temp, M, N; 225 u32 temp, M, N;
226 struct dpll_regs *const dpll_regs = (struct dpll_regs *)base; 226 struct dpll_regs *const dpll_regs = (struct dpll_regs *)base;
227 227
228 if (!params) 228 if (!params)
229 return; 229 return;
230 230
231 temp = readl(&dpll_regs->cm_clksel_dpll); 231 temp = readl(&dpll_regs->cm_clksel_dpll);
232 232
233 if (check_for_lock(base)) { 233 if (check_for_lock(base)) {
234 /* 234 /*
235 * The Dpll has already been locked by rom code using CH. 235 * The Dpll has already been locked by rom code using CH.
236 * Check if M,N are matching with Ideal nominal opp values. 236 * Check if M,N are matching with Ideal nominal opp values.
237 * If matches, skip the rest otherwise relock. 237 * If matches, skip the rest otherwise relock.
238 */ 238 */
239 M = (temp & CM_CLKSEL_DPLL_M_MASK) >> CM_CLKSEL_DPLL_M_SHIFT; 239 M = (temp & CM_CLKSEL_DPLL_M_MASK) >> CM_CLKSEL_DPLL_M_SHIFT;
240 N = (temp & CM_CLKSEL_DPLL_N_MASK) >> CM_CLKSEL_DPLL_N_SHIFT; 240 N = (temp & CM_CLKSEL_DPLL_N_MASK) >> CM_CLKSEL_DPLL_N_SHIFT;
241 if ((M != (params->m)) || (N != (params->n))) { 241 if ((M != (params->m)) || (N != (params->n))) {
242 debug("\n %s Dpll locked, but not for ideal M = %d," 242 debug("\n %s Dpll locked, but not for ideal M = %d,"
243 "N = %d values, current values are M = %d," 243 "N = %d values, current values are M = %d,"
244 "N= %d" , dpll, params->m, params->n, 244 "N= %d" , dpll, params->m, params->n,
245 M, N); 245 M, N);
246 } else { 246 } else {
247 /* Dpll locked with ideal values for nominal opps. */ 247 /* Dpll locked with ideal values for nominal opps. */
248 debug("\n %s Dpll already locked with ideal" 248 debug("\n %s Dpll already locked with ideal"
249 "nominal opp values", dpll); 249 "nominal opp values", dpll);
250 goto setup_post_dividers; 250 goto setup_post_dividers;
251 } 251 }
252 } 252 }
253 253
254 bypass_dpll(base); 254 bypass_dpll(base);
255 255
256 /* Set M & N */ 256 /* Set M & N */
257 temp &= ~CM_CLKSEL_DPLL_M_MASK; 257 temp &= ~CM_CLKSEL_DPLL_M_MASK;
258 temp |= (params->m << CM_CLKSEL_DPLL_M_SHIFT) & CM_CLKSEL_DPLL_M_MASK; 258 temp |= (params->m << CM_CLKSEL_DPLL_M_SHIFT) & CM_CLKSEL_DPLL_M_MASK;
259 259
260 temp &= ~CM_CLKSEL_DPLL_N_MASK; 260 temp &= ~CM_CLKSEL_DPLL_N_MASK;
261 temp |= (params->n << CM_CLKSEL_DPLL_N_SHIFT) & CM_CLKSEL_DPLL_N_MASK; 261 temp |= (params->n << CM_CLKSEL_DPLL_N_SHIFT) & CM_CLKSEL_DPLL_N_MASK;
262 262
263 writel(temp, &dpll_regs->cm_clksel_dpll); 263 writel(temp, &dpll_regs->cm_clksel_dpll);
264 264
265 /* Lock */ 265 /* Lock */
266 if (lock) 266 if (lock)
267 do_lock_dpll(base); 267 do_lock_dpll(base);
268 268
269 setup_post_dividers: 269 setup_post_dividers:
270 setup_post_dividers(base, params); 270 setup_post_dividers(base, params);
271 271
272 /* Wait till the DPLL locks */ 272 /* Wait till the DPLL locks */
273 if (lock) 273 if (lock)
274 wait_for_lock(base); 274 wait_for_lock(base);
275 } 275 }
276 276
277 u32 omap_ddr_clk(void) 277 u32 omap_ddr_clk(void)
278 { 278 {
279 u32 ddr_clk, sys_clk_khz, omap_rev, divider; 279 u32 ddr_clk, sys_clk_khz, omap_rev, divider;
280 const struct dpll_params *core_dpll_params; 280 const struct dpll_params *core_dpll_params;
281 281
282 omap_rev = omap_revision(); 282 omap_rev = omap_revision();
283 sys_clk_khz = get_sys_clk_freq() / 1000; 283 sys_clk_khz = get_sys_clk_freq() / 1000;
284 284
285 core_dpll_params = get_core_dpll_params(*dplls_data); 285 core_dpll_params = get_core_dpll_params(*dplls_data);
286 286
287 debug("sys_clk %d\n ", sys_clk_khz * 1000); 287 debug("sys_clk %d\n ", sys_clk_khz * 1000);
288 288
289 /* Find Core DPLL locked frequency first */ 289 /* Find Core DPLL locked frequency first */
290 ddr_clk = sys_clk_khz * 2 * core_dpll_params->m / 290 ddr_clk = sys_clk_khz * 2 * core_dpll_params->m /
291 (core_dpll_params->n + 1); 291 (core_dpll_params->n + 1);
292 292
293 if (omap_rev < OMAP5430_ES1_0) { 293 if (omap_rev < OMAP5430_ES1_0) {
294 /* 294 /*
295 * DDR frequency is PHY_ROOT_CLK/2 295 * DDR frequency is PHY_ROOT_CLK/2
296 * PHY_ROOT_CLK = Fdpll/2/M2 296 * PHY_ROOT_CLK = Fdpll/2/M2
297 */ 297 */
298 divider = 4; 298 divider = 4;
299 } else { 299 } else {
300 /* 300 /*
301 * DDR frequency is PHY_ROOT_CLK 301 * DDR frequency is PHY_ROOT_CLK
302 * PHY_ROOT_CLK = Fdpll/2/M2 302 * PHY_ROOT_CLK = Fdpll/2/M2
303 */ 303 */
304 divider = 2; 304 divider = 2;
305 } 305 }
306 306
307 ddr_clk = ddr_clk / divider / core_dpll_params->m2; 307 ddr_clk = ddr_clk / divider / core_dpll_params->m2;
308 ddr_clk *= 1000; /* convert to Hz */ 308 ddr_clk *= 1000; /* convert to Hz */
309 debug("ddr_clk %d\n ", ddr_clk); 309 debug("ddr_clk %d\n ", ddr_clk);
310 310
311 return ddr_clk; 311 return ddr_clk;
312 } 312 }
313 313
314 /* 314 /*
315 * Lock MPU dpll 315 * Lock MPU dpll
316 * 316 *
317 * Resulting MPU frequencies: 317 * Resulting MPU frequencies:
318 * 4430 ES1.0 : 600 MHz 318 * 4430 ES1.0 : 600 MHz
319 * 4430 ES2.x : 792 MHz (OPP Turbo) 319 * 4430 ES2.x : 792 MHz (OPP Turbo)
320 * 4460 : 920 MHz (OPP Turbo) - DCC disabled 320 * 4460 : 920 MHz (OPP Turbo) - DCC disabled
321 */ 321 */
322 void configure_mpu_dpll(void) 322 void configure_mpu_dpll(void)
323 { 323 {
324 const struct dpll_params *params; 324 const struct dpll_params *params;
325 struct dpll_regs *mpu_dpll_regs; 325 struct dpll_regs *mpu_dpll_regs;
326 u32 omap_rev; 326 u32 omap_rev;
327 omap_rev = omap_revision(); 327 omap_rev = omap_revision();
328 328
329 /* 329 /*
330 * DCC and clock divider settings for 4460. 330 * DCC and clock divider settings for 4460.
331 * DCC is required, if more than a certain frequency is required. 331 * DCC is required, if more than a certain frequency is required.
332 * For, 4460 > 1GHZ. 332 * For, 4460 > 1GHZ.
333 * 5430 > 1.4GHZ. 333 * 5430 > 1.4GHZ.
334 */ 334 */
335 if ((omap_rev >= OMAP4460_ES1_0) && (omap_rev < OMAP5430_ES1_0)) { 335 if ((omap_rev >= OMAP4460_ES1_0) && (omap_rev < OMAP5430_ES1_0)) {
336 mpu_dpll_regs = 336 mpu_dpll_regs =
337 (struct dpll_regs *)((*prcm)->cm_clkmode_dpll_mpu); 337 (struct dpll_regs *)((*prcm)->cm_clkmode_dpll_mpu);
338 bypass_dpll((*prcm)->cm_clkmode_dpll_mpu); 338 bypass_dpll((*prcm)->cm_clkmode_dpll_mpu);
339 clrbits_le32((*prcm)->cm_mpu_mpu_clkctrl, 339 clrbits_le32((*prcm)->cm_mpu_mpu_clkctrl,
340 MPU_CLKCTRL_CLKSEL_EMIF_DIV_MODE_MASK); 340 MPU_CLKCTRL_CLKSEL_EMIF_DIV_MODE_MASK);
341 setbits_le32((*prcm)->cm_mpu_mpu_clkctrl, 341 setbits_le32((*prcm)->cm_mpu_mpu_clkctrl,
342 MPU_CLKCTRL_CLKSEL_ABE_DIV_MODE_MASK); 342 MPU_CLKCTRL_CLKSEL_ABE_DIV_MODE_MASK);
343 clrbits_le32(&mpu_dpll_regs->cm_clksel_dpll, 343 clrbits_le32(&mpu_dpll_regs->cm_clksel_dpll,
344 CM_CLKSEL_DCC_EN_MASK); 344 CM_CLKSEL_DCC_EN_MASK);
345 } 345 }
346 346
347 params = get_mpu_dpll_params(*dplls_data); 347 params = get_mpu_dpll_params(*dplls_data);
348 348
349 do_setup_dpll((*prcm)->cm_clkmode_dpll_mpu, params, DPLL_LOCK, "mpu"); 349 do_setup_dpll((*prcm)->cm_clkmode_dpll_mpu, params, DPLL_LOCK, "mpu");
350 debug("MPU DPLL locked\n"); 350 debug("MPU DPLL locked\n");
351 } 351 }
352 352
353 #ifdef CONFIG_USB_EHCI_OMAP 353 #ifdef CONFIG_USB_EHCI_OMAP
354 static void setup_usb_dpll(void) 354 static void setup_usb_dpll(void)
355 { 355 {
356 const struct dpll_params *params; 356 const struct dpll_params *params;
357 u32 sys_clk_khz, sd_div, num, den; 357 u32 sys_clk_khz, sd_div, num, den;
358 358
359 sys_clk_khz = get_sys_clk_freq() / 1000; 359 sys_clk_khz = get_sys_clk_freq() / 1000;
360 /* 360 /*
361 * USB: 361 * USB:
362 * USB dpll is J-type. Need to set DPLL_SD_DIV for jitter correction 362 * USB dpll is J-type. Need to set DPLL_SD_DIV for jitter correction
363 * DPLL_SD_DIV = CEILING ([DPLL_MULT/(DPLL_DIV+1)]* CLKINP / 250) 363 * DPLL_SD_DIV = CEILING ([DPLL_MULT/(DPLL_DIV+1)]* CLKINP / 250)
364 * - where CLKINP is sys_clk in MHz 364 * - where CLKINP is sys_clk in MHz
365 * Use CLKINP in KHz and adjust the denominator accordingly so 365 * Use CLKINP in KHz and adjust the denominator accordingly so
366 * that we have enough accuracy and at the same time no overflow 366 * that we have enough accuracy and at the same time no overflow
367 */ 367 */
368 params = get_usb_dpll_params(*dplls_data); 368 params = get_usb_dpll_params(*dplls_data);
369 num = params->m * sys_clk_khz; 369 num = params->m * sys_clk_khz;
370 den = (params->n + 1) * 250 * 1000; 370 den = (params->n + 1) * 250 * 1000;
371 num += den - 1; 371 num += den - 1;
372 sd_div = num / den; 372 sd_div = num / den;
373 clrsetbits_le32((*prcm)->cm_clksel_dpll_usb, 373 clrsetbits_le32((*prcm)->cm_clksel_dpll_usb,
374 CM_CLKSEL_DPLL_DPLL_SD_DIV_MASK, 374 CM_CLKSEL_DPLL_DPLL_SD_DIV_MASK,
375 sd_div << CM_CLKSEL_DPLL_DPLL_SD_DIV_SHIFT); 375 sd_div << CM_CLKSEL_DPLL_DPLL_SD_DIV_SHIFT);
376 376
377 /* Now setup the dpll with the regular function */ 377 /* Now setup the dpll with the regular function */
378 do_setup_dpll((*prcm)->cm_clkmode_dpll_usb, params, DPLL_LOCK, "usb"); 378 do_setup_dpll((*prcm)->cm_clkmode_dpll_usb, params, DPLL_LOCK, "usb");
379 } 379 }
380 #endif 380 #endif
381 381
382 static void setup_dplls(void) 382 static void setup_dplls(void)
383 { 383 {
384 u32 temp; 384 u32 temp;
385 const struct dpll_params *params; 385 const struct dpll_params *params;
386 386
387 debug("setup_dplls\n"); 387 debug("setup_dplls\n");
388 388
389 /* CORE dpll */ 389 /* CORE dpll */
390 params = get_core_dpll_params(*dplls_data); /* default - safest */ 390 params = get_core_dpll_params(*dplls_data); /* default - safest */
391 /* 391 /*
392 * Do not lock the core DPLL now. Just set it up. 392 * Do not lock the core DPLL now. Just set it up.
393 * Core DPLL will be locked after setting up EMIF 393 * Core DPLL will be locked after setting up EMIF
394 * using the FREQ_UPDATE method(freq_update_core()) 394 * using the FREQ_UPDATE method(freq_update_core())
395 */ 395 */
396 if (emif_sdram_type() == EMIF_SDRAM_TYPE_LPDDR2) 396 if (emif_sdram_type() == EMIF_SDRAM_TYPE_LPDDR2)
397 do_setup_dpll((*prcm)->cm_clkmode_dpll_core, params, 397 do_setup_dpll((*prcm)->cm_clkmode_dpll_core, params,
398 DPLL_NO_LOCK, "core"); 398 DPLL_NO_LOCK, "core");
399 else 399 else
400 do_setup_dpll((*prcm)->cm_clkmode_dpll_core, params, 400 do_setup_dpll((*prcm)->cm_clkmode_dpll_core, params,
401 DPLL_LOCK, "core"); 401 DPLL_LOCK, "core");
402 /* Set the ratios for CORE_CLK, L3_CLK, L4_CLK */ 402 /* Set the ratios for CORE_CLK, L3_CLK, L4_CLK */
403 temp = (CLKSEL_CORE_X2_DIV_1 << CLKSEL_CORE_SHIFT) | 403 temp = (CLKSEL_CORE_X2_DIV_1 << CLKSEL_CORE_SHIFT) |
404 (CLKSEL_L3_CORE_DIV_2 << CLKSEL_L3_SHIFT) | 404 (CLKSEL_L3_CORE_DIV_2 << CLKSEL_L3_SHIFT) |
405 (CLKSEL_L4_L3_DIV_2 << CLKSEL_L4_SHIFT); 405 (CLKSEL_L4_L3_DIV_2 << CLKSEL_L4_SHIFT);
406 writel(temp, (*prcm)->cm_clksel_core); 406 writel(temp, (*prcm)->cm_clksel_core);
407 debug("Core DPLL configured\n"); 407 debug("Core DPLL configured\n");
408 408
409 /* lock PER dpll */ 409 /* lock PER dpll */
410 params = get_per_dpll_params(*dplls_data); 410 params = get_per_dpll_params(*dplls_data);
411 do_setup_dpll((*prcm)->cm_clkmode_dpll_per, 411 do_setup_dpll((*prcm)->cm_clkmode_dpll_per,
412 params, DPLL_LOCK, "per"); 412 params, DPLL_LOCK, "per");
413 debug("PER DPLL locked\n"); 413 debug("PER DPLL locked\n");
414 414
415 /* MPU dpll */ 415 /* MPU dpll */
416 configure_mpu_dpll(); 416 configure_mpu_dpll();
417 417
418 #ifdef CONFIG_USB_EHCI_OMAP 418 #ifdef CONFIG_USB_EHCI_OMAP
419 setup_usb_dpll(); 419 setup_usb_dpll();
420 #endif 420 #endif
421 params = get_ddr_dpll_params(*dplls_data); 421 params = get_ddr_dpll_params(*dplls_data);
422 do_setup_dpll((*prcm)->cm_clkmode_dpll_ddrphy, 422 do_setup_dpll((*prcm)->cm_clkmode_dpll_ddrphy,
423 params, DPLL_LOCK, "ddr"); 423 params, DPLL_LOCK, "ddr");
424 } 424 }
425 425
426 #ifdef CONFIG_SYS_CLOCKS_ENABLE_ALL 426 #ifdef CONFIG_SYS_CLOCKS_ENABLE_ALL
427 static void setup_non_essential_dplls(void) 427 static void setup_non_essential_dplls(void)
428 { 428 {
429 u32 abe_ref_clk; 429 u32 abe_ref_clk;
430 const struct dpll_params *params; 430 const struct dpll_params *params;
431 431
432 /* IVA */ 432 /* IVA */
433 clrsetbits_le32((*prcm)->cm_bypclk_dpll_iva, 433 clrsetbits_le32((*prcm)->cm_bypclk_dpll_iva,
434 CM_BYPCLK_DPLL_IVA_CLKSEL_MASK, DPLL_IVA_CLKSEL_CORE_X2_DIV_2); 434 CM_BYPCLK_DPLL_IVA_CLKSEL_MASK, DPLL_IVA_CLKSEL_CORE_X2_DIV_2);
435 435
436 params = get_iva_dpll_params(*dplls_data); 436 params = get_iva_dpll_params(*dplls_data);
437 do_setup_dpll((*prcm)->cm_clkmode_dpll_iva, params, DPLL_LOCK, "iva"); 437 do_setup_dpll((*prcm)->cm_clkmode_dpll_iva, params, DPLL_LOCK, "iva");
438 438
439 /* Configure ABE dpll */ 439 /* Configure ABE dpll */
440 params = get_abe_dpll_params(*dplls_data); 440 params = get_abe_dpll_params(*dplls_data);
441 #ifdef CONFIG_SYS_OMAP_ABE_SYSCK 441 #ifdef CONFIG_SYS_OMAP_ABE_SYSCK
442 abe_ref_clk = CM_ABE_PLL_REF_CLKSEL_CLKSEL_SYSCLK; 442 abe_ref_clk = CM_ABE_PLL_REF_CLKSEL_CLKSEL_SYSCLK;
443 #else 443 #else
444 abe_ref_clk = CM_ABE_PLL_REF_CLKSEL_CLKSEL_32KCLK; 444 abe_ref_clk = CM_ABE_PLL_REF_CLKSEL_CLKSEL_32KCLK;
445 /* 445 /*
446 * We need to enable some additional options to achieve 446 * We need to enable some additional options to achieve
447 * 196.608MHz from 32768 Hz 447 * 196.608MHz from 32768 Hz
448 */ 448 */
449 setbits_le32((*prcm)->cm_clkmode_dpll_abe, 449 setbits_le32((*prcm)->cm_clkmode_dpll_abe,
450 CM_CLKMODE_DPLL_DRIFTGUARD_EN_MASK| 450 CM_CLKMODE_DPLL_DRIFTGUARD_EN_MASK|
451 CM_CLKMODE_DPLL_RELOCK_RAMP_EN_MASK| 451 CM_CLKMODE_DPLL_RELOCK_RAMP_EN_MASK|
452 CM_CLKMODE_DPLL_LPMODE_EN_MASK| 452 CM_CLKMODE_DPLL_LPMODE_EN_MASK|
453 CM_CLKMODE_DPLL_REGM4XEN_MASK); 453 CM_CLKMODE_DPLL_REGM4XEN_MASK);
454 /* Spend 4 REFCLK cycles at each stage */ 454 /* Spend 4 REFCLK cycles at each stage */
455 clrsetbits_le32((*prcm)->cm_clkmode_dpll_abe, 455 clrsetbits_le32((*prcm)->cm_clkmode_dpll_abe,
456 CM_CLKMODE_DPLL_RAMP_RATE_MASK, 456 CM_CLKMODE_DPLL_RAMP_RATE_MASK,
457 1 << CM_CLKMODE_DPLL_RAMP_RATE_SHIFT); 457 1 << CM_CLKMODE_DPLL_RAMP_RATE_SHIFT);
458 #endif 458 #endif
459 459
460 /* Select the right reference clk */ 460 /* Select the right reference clk */
461 clrsetbits_le32((*prcm)->cm_abe_pll_ref_clksel, 461 clrsetbits_le32((*prcm)->cm_abe_pll_ref_clksel,
462 CM_ABE_PLL_REF_CLKSEL_CLKSEL_MASK, 462 CM_ABE_PLL_REF_CLKSEL_CLKSEL_MASK,
463 abe_ref_clk << CM_ABE_PLL_REF_CLKSEL_CLKSEL_SHIFT); 463 abe_ref_clk << CM_ABE_PLL_REF_CLKSEL_CLKSEL_SHIFT);
464 /* Lock the dpll */ 464 /* Lock the dpll */
465 do_setup_dpll((*prcm)->cm_clkmode_dpll_abe, params, DPLL_LOCK, "abe"); 465 do_setup_dpll((*prcm)->cm_clkmode_dpll_abe, params, DPLL_LOCK, "abe");
466 } 466 }
467 #endif 467 #endif
468 468
469 u32 get_offset_code(u32 volt_offset, struct pmic_data *pmic) 469 u32 get_offset_code(u32 volt_offset, struct pmic_data *pmic)
470 { 470 {
471 u32 offset_code; 471 u32 offset_code;
472 472
473 volt_offset -= pmic->base_offset; 473 volt_offset -= pmic->base_offset;
474 474
475 offset_code = (volt_offset + pmic->step - 1) / pmic->step; 475 offset_code = (volt_offset + pmic->step - 1) / pmic->step;
476 476
477 /* 477 /*
478 * Offset codes 1-6 all give the base voltage in Palmas 478 * Offset codes 1-6 all give the base voltage in Palmas
479 * Offset code 0 switches OFF the SMPS 479 * Offset code 0 switches OFF the SMPS
480 */ 480 */
481 return offset_code + pmic->start_code; 481 return offset_code + pmic->start_code;
482 } 482 }
483 483
484 void do_scale_vcore(u32 vcore_reg, u32 volt_mv, struct pmic_data *pmic) 484 void do_scale_vcore(u32 vcore_reg, u32 volt_mv, struct pmic_data *pmic)
485 { 485 {
486 u32 offset_code; 486 u32 offset_code;
487 u32 offset = volt_mv; 487 u32 offset = volt_mv;
488 int ret = 0; 488 int ret = 0;
489 489
490 /* See if we can first get the GPIO if needed */ 490 /* See if we can first get the GPIO if needed */
491 if (pmic->gpio_en) 491 if (pmic->gpio_en)
492 ret = gpio_request(pmic->gpio, "PMIC_GPIO"); 492 ret = gpio_request(pmic->gpio, "PMIC_GPIO");
493 493
494 if (ret < 0) { 494 if (ret < 0) {
495 printf("%s: gpio %d request failed %d\n", __func__, 495 printf("%s: gpio %d request failed %d\n", __func__,
496 pmic->gpio, ret); 496 pmic->gpio, ret);
497 return; 497 return;
498 } 498 }
499 499
500 /* Pull the GPIO low to select SET0 register, while we program SET1 */ 500 /* Pull the GPIO low to select SET0 register, while we program SET1 */
501 if (pmic->gpio_en) 501 if (pmic->gpio_en)
502 gpio_direction_output(pmic->gpio, 0); 502 gpio_direction_output(pmic->gpio, 0);
503 503
504 /* convert to uV for better accuracy in the calculations */ 504 /* convert to uV for better accuracy in the calculations */
505 offset *= 1000; 505 offset *= 1000;
506 506
507 offset_code = get_offset_code(offset, pmic); 507 offset_code = get_offset_code(offset, pmic);
508 508
509 debug("do_scale_vcore: volt - %d offset_code - 0x%x\n", volt_mv, 509 debug("do_scale_vcore: volt - %d offset_code - 0x%x\n", volt_mv,
510 offset_code); 510 offset_code);
511 511
512 if (omap_vc_bypass_send_value(SMPS_I2C_SLAVE_ADDR, 512 if (omap_vc_bypass_send_value(SMPS_I2C_SLAVE_ADDR,
513 vcore_reg, offset_code)) 513 vcore_reg, offset_code))
514 printf("Scaling voltage failed for 0x%x\n", vcore_reg); 514 printf("Scaling voltage failed for 0x%x\n", vcore_reg);
515 515
516 if (pmic->gpio_en) 516 if (pmic->gpio_en)
517 gpio_direction_output(pmic->gpio, 1); 517 gpio_direction_output(pmic->gpio, 1);
518 } 518 }
519 519
520 /* 520 /*
521 * Setup the voltages for vdd_mpu, vdd_core, and vdd_iva 521 * Setup the voltages for vdd_mpu, vdd_core, and vdd_iva
522 * We set the maximum voltages allowed here because Smart-Reflex is not 522 * We set the maximum voltages allowed here because Smart-Reflex is not
523 * enabled in bootloader. Voltage initialization in the kernel will set 523 * enabled in bootloader. Voltage initialization in the kernel will set
524 * these to the nominal values after enabling Smart-Reflex 524 * these to the nominal values after enabling Smart-Reflex
525 */ 525 */
526 void scale_vcores(struct vcores_data const *vcores) 526 void scale_vcores(struct vcores_data const *vcores)
527 { 527 {
528 omap_vc_init(PRM_VC_I2C_CHANNEL_FREQ_KHZ); 528 omap_vc_init(PRM_VC_I2C_CHANNEL_FREQ_KHZ);
529 529
530 do_scale_vcore(vcores->core.addr, vcores->core.value, 530 do_scale_vcore(vcores->core.addr, vcores->core.value,
531 vcores->core.pmic); 531 vcores->core.pmic);
532 532
533 do_scale_vcore(vcores->mpu.addr, vcores->mpu.value, 533 do_scale_vcore(vcores->mpu.addr, vcores->mpu.value,
534 vcores->mpu.pmic); 534 vcores->mpu.pmic);
535 535
536 do_scale_vcore(vcores->mm.addr, vcores->mm.value, 536 do_scale_vcore(vcores->mm.addr, vcores->mm.value,
537 vcores->mm.pmic); 537 vcores->mm.pmic);
538 538
539 if (emif_sdram_type() == EMIF_SDRAM_TYPE_DDR3) { 539 if (emif_sdram_type() == EMIF_SDRAM_TYPE_DDR3) {
540 /* Configure LDO SRAM "magic" bits */ 540 /* Configure LDO SRAM "magic" bits */
541 writel(2, (*prcm)->prm_sldo_core_setup); 541 writel(2, (*prcm)->prm_sldo_core_setup);
542 writel(2, (*prcm)->prm_sldo_mpu_setup); 542 writel(2, (*prcm)->prm_sldo_mpu_setup);
543 writel(2, (*prcm)->prm_sldo_mm_setup); 543 writel(2, (*prcm)->prm_sldo_mm_setup);
544 } 544 }
545 } 545 }
546 546
547 static inline void enable_clock_domain(u32 const clkctrl_reg, u32 enable_mode) 547 static inline void enable_clock_domain(u32 const clkctrl_reg, u32 enable_mode)
548 { 548 {
549 clrsetbits_le32(clkctrl_reg, CD_CLKCTRL_CLKTRCTRL_MASK, 549 clrsetbits_le32(clkctrl_reg, CD_CLKCTRL_CLKTRCTRL_MASK,
550 enable_mode << CD_CLKCTRL_CLKTRCTRL_SHIFT); 550 enable_mode << CD_CLKCTRL_CLKTRCTRL_SHIFT);
551 debug("Enable clock domain - %x\n", clkctrl_reg); 551 debug("Enable clock domain - %x\n", clkctrl_reg);
552 } 552 }
553 553
554 static inline void wait_for_clk_enable(u32 clkctrl_addr) 554 static inline void wait_for_clk_enable(u32 clkctrl_addr)
555 { 555 {
556 u32 clkctrl, idlest = MODULE_CLKCTRL_IDLEST_DISABLED; 556 u32 clkctrl, idlest = MODULE_CLKCTRL_IDLEST_DISABLED;
557 u32 bound = LDELAY; 557 u32 bound = LDELAY;
558 558
559 while ((idlest == MODULE_CLKCTRL_IDLEST_DISABLED) || 559 while ((idlest == MODULE_CLKCTRL_IDLEST_DISABLED) ||
560 (idlest == MODULE_CLKCTRL_IDLEST_TRANSITIONING)) { 560 (idlest == MODULE_CLKCTRL_IDLEST_TRANSITIONING)) {
561 561
562 clkctrl = readl(clkctrl_addr); 562 clkctrl = readl(clkctrl_addr);
563 idlest = (clkctrl & MODULE_CLKCTRL_IDLEST_MASK) >> 563 idlest = (clkctrl & MODULE_CLKCTRL_IDLEST_MASK) >>
564 MODULE_CLKCTRL_IDLEST_SHIFT; 564 MODULE_CLKCTRL_IDLEST_SHIFT;
565 if (--bound == 0) { 565 if (--bound == 0) {
566 printf("Clock enable failed for 0x%x idlest 0x%x\n", 566 printf("Clock enable failed for 0x%x idlest 0x%x\n",
567 clkctrl_addr, clkctrl); 567 clkctrl_addr, clkctrl);
568 return; 568 return;
569 } 569 }
570 } 570 }
571 } 571 }
572 572
573 static inline void enable_clock_module(u32 const clkctrl_addr, u32 enable_mode, 573 static inline void enable_clock_module(u32 const clkctrl_addr, u32 enable_mode,
574 u32 wait_for_enable) 574 u32 wait_for_enable)
575 { 575 {
576 clrsetbits_le32(clkctrl_addr, MODULE_CLKCTRL_MODULEMODE_MASK, 576 clrsetbits_le32(clkctrl_addr, MODULE_CLKCTRL_MODULEMODE_MASK,
577 enable_mode << MODULE_CLKCTRL_MODULEMODE_SHIFT); 577 enable_mode << MODULE_CLKCTRL_MODULEMODE_SHIFT);
578 debug("Enable clock module - %x\n", clkctrl_addr); 578 debug("Enable clock module - %x\n", clkctrl_addr);
579 if (wait_for_enable) 579 if (wait_for_enable)
580 wait_for_clk_enable(clkctrl_addr); 580 wait_for_clk_enable(clkctrl_addr);
581 } 581 }
582 582
583 void freq_update_core(void) 583 void freq_update_core(void)
584 { 584 {
585 u32 freq_config1 = 0; 585 u32 freq_config1 = 0;
586 const struct dpll_params *core_dpll_params; 586 const struct dpll_params *core_dpll_params;
587 u32 omap_rev = omap_revision(); 587 u32 omap_rev = omap_revision();
588 588
589 core_dpll_params = get_core_dpll_params(*dplls_data); 589 core_dpll_params = get_core_dpll_params(*dplls_data);
590 /* Put EMIF clock domain in sw wakeup mode */ 590 /* Put EMIF clock domain in sw wakeup mode */
591 enable_clock_domain((*prcm)->cm_memif_clkstctrl, 591 enable_clock_domain((*prcm)->cm_memif_clkstctrl,
592 CD_CLKCTRL_CLKTRCTRL_SW_WKUP); 592 CD_CLKCTRL_CLKTRCTRL_SW_WKUP);
593 wait_for_clk_enable((*prcm)->cm_memif_emif_1_clkctrl); 593 wait_for_clk_enable((*prcm)->cm_memif_emif_1_clkctrl);
594 wait_for_clk_enable((*prcm)->cm_memif_emif_2_clkctrl); 594 wait_for_clk_enable((*prcm)->cm_memif_emif_2_clkctrl);
595 595
596 freq_config1 = SHADOW_FREQ_CONFIG1_FREQ_UPDATE_MASK | 596 freq_config1 = SHADOW_FREQ_CONFIG1_FREQ_UPDATE_MASK |
597 SHADOW_FREQ_CONFIG1_DLL_RESET_MASK; 597 SHADOW_FREQ_CONFIG1_DLL_RESET_MASK;
598 598
599 freq_config1 |= (DPLL_EN_LOCK << SHADOW_FREQ_CONFIG1_DPLL_EN_SHIFT) & 599 freq_config1 |= (DPLL_EN_LOCK << SHADOW_FREQ_CONFIG1_DPLL_EN_SHIFT) &
600 SHADOW_FREQ_CONFIG1_DPLL_EN_MASK; 600 SHADOW_FREQ_CONFIG1_DPLL_EN_MASK;
601 601
602 freq_config1 |= (core_dpll_params->m2 << 602 freq_config1 |= (core_dpll_params->m2 <<
603 SHADOW_FREQ_CONFIG1_M2_DIV_SHIFT) & 603 SHADOW_FREQ_CONFIG1_M2_DIV_SHIFT) &
604 SHADOW_FREQ_CONFIG1_M2_DIV_MASK; 604 SHADOW_FREQ_CONFIG1_M2_DIV_MASK;
605 605
606 writel(freq_config1, (*prcm)->cm_shadow_freq_config1); 606 writel(freq_config1, (*prcm)->cm_shadow_freq_config1);
607 if (!wait_on_value(SHADOW_FREQ_CONFIG1_FREQ_UPDATE_MASK, 0, 607 if (!wait_on_value(SHADOW_FREQ_CONFIG1_FREQ_UPDATE_MASK, 0,
608 (u32 *) (*prcm)->cm_shadow_freq_config1, LDELAY)) { 608 (u32 *) (*prcm)->cm_shadow_freq_config1, LDELAY)) {
609 puts("FREQ UPDATE procedure failed!!"); 609 puts("FREQ UPDATE procedure failed!!");
610 hang(); 610 hang();
611 } 611 }
612 612
613 /* 613 /*
614 * Putting EMIF in HW_AUTO is seen to be causing issues with 614 * Putting EMIF in HW_AUTO is seen to be causing issues with
615 * EMIF clocks and the master DLL. Keep EMIF in SW_WKUP 615 * EMIF clocks and the master DLL. Keep EMIF in SW_WKUP
616 * in OMAP5430 ES1.0 silicon 616 * in OMAP5430 ES1.0 silicon
617 */ 617 */
618 if (omap_rev != OMAP5430_ES1_0) { 618 if (omap_rev != OMAP5430_ES1_0) {
619 /* Put EMIF clock domain back in hw auto mode */ 619 /* Put EMIF clock domain back in hw auto mode */
620 enable_clock_domain((*prcm)->cm_memif_clkstctrl, 620 enable_clock_domain((*prcm)->cm_memif_clkstctrl,
621 CD_CLKCTRL_CLKTRCTRL_HW_AUTO); 621 CD_CLKCTRL_CLKTRCTRL_HW_AUTO);
622 wait_for_clk_enable((*prcm)->cm_memif_emif_1_clkctrl); 622 wait_for_clk_enable((*prcm)->cm_memif_emif_1_clkctrl);
623 wait_for_clk_enable((*prcm)->cm_memif_emif_2_clkctrl); 623 wait_for_clk_enable((*prcm)->cm_memif_emif_2_clkctrl);
624 } 624 }
625 } 625 }
626 626
627 void bypass_dpll(u32 const base) 627 void bypass_dpll(u32 const base)
628 { 628 {
629 do_bypass_dpll(base); 629 do_bypass_dpll(base);
630 wait_for_bypass(base); 630 wait_for_bypass(base);
631 } 631 }
632 632
633 void lock_dpll(u32 const base) 633 void lock_dpll(u32 const base)
634 { 634 {
635 do_lock_dpll(base); 635 do_lock_dpll(base);
636 wait_for_lock(base); 636 wait_for_lock(base);
637 } 637 }
638 638
639 void setup_clocks_for_console(void) 639 void setup_clocks_for_console(void)
640 { 640 {
641 /* Do not add any spl_debug prints in this function */ 641 /* Do not add any spl_debug prints in this function */
642 clrsetbits_le32((*prcm)->cm_l4per_clkstctrl, CD_CLKCTRL_CLKTRCTRL_MASK, 642 clrsetbits_le32((*prcm)->cm_l4per_clkstctrl, CD_CLKCTRL_CLKTRCTRL_MASK,
643 CD_CLKCTRL_CLKTRCTRL_SW_WKUP << 643 CD_CLKCTRL_CLKTRCTRL_SW_WKUP <<
644 CD_CLKCTRL_CLKTRCTRL_SHIFT); 644 CD_CLKCTRL_CLKTRCTRL_SHIFT);
645 645
646 /* Enable all UARTs - console will be on one of them */ 646 /* Enable all UARTs - console will be on one of them */
647 clrsetbits_le32((*prcm)->cm_l4per_uart1_clkctrl, 647 clrsetbits_le32((*prcm)->cm_l4per_uart1_clkctrl,
648 MODULE_CLKCTRL_MODULEMODE_MASK, 648 MODULE_CLKCTRL_MODULEMODE_MASK,
649 MODULE_CLKCTRL_MODULEMODE_SW_EXPLICIT_EN << 649 MODULE_CLKCTRL_MODULEMODE_SW_EXPLICIT_EN <<
650 MODULE_CLKCTRL_MODULEMODE_SHIFT); 650 MODULE_CLKCTRL_MODULEMODE_SHIFT);
651 651
652 clrsetbits_le32((*prcm)->cm_l4per_uart2_clkctrl, 652 clrsetbits_le32((*prcm)->cm_l4per_uart2_clkctrl,
653 MODULE_CLKCTRL_MODULEMODE_MASK, 653 MODULE_CLKCTRL_MODULEMODE_MASK,
654 MODULE_CLKCTRL_MODULEMODE_SW_EXPLICIT_EN << 654 MODULE_CLKCTRL_MODULEMODE_SW_EXPLICIT_EN <<
655 MODULE_CLKCTRL_MODULEMODE_SHIFT); 655 MODULE_CLKCTRL_MODULEMODE_SHIFT);
656 656
657 clrsetbits_le32((*prcm)->cm_l4per_uart3_clkctrl, 657 clrsetbits_le32((*prcm)->cm_l4per_uart3_clkctrl,
658 MODULE_CLKCTRL_MODULEMODE_MASK, 658 MODULE_CLKCTRL_MODULEMODE_MASK,
659 MODULE_CLKCTRL_MODULEMODE_SW_EXPLICIT_EN << 659 MODULE_CLKCTRL_MODULEMODE_SW_EXPLICIT_EN <<
660 MODULE_CLKCTRL_MODULEMODE_SHIFT); 660 MODULE_CLKCTRL_MODULEMODE_SHIFT);
661 661
662 clrsetbits_le32((*prcm)->cm_l4per_uart4_clkctrl, 662 clrsetbits_le32((*prcm)->cm_l4per_uart4_clkctrl,
663 MODULE_CLKCTRL_MODULEMODE_MASK, 663 MODULE_CLKCTRL_MODULEMODE_MASK,
664 MODULE_CLKCTRL_MODULEMODE_SW_EXPLICIT_EN << 664 MODULE_CLKCTRL_MODULEMODE_SW_EXPLICIT_EN <<
665 MODULE_CLKCTRL_MODULEMODE_SHIFT); 665 MODULE_CLKCTRL_MODULEMODE_SHIFT);
666 666
667 clrsetbits_le32((*prcm)->cm_l4per_clkstctrl, CD_CLKCTRL_CLKTRCTRL_MASK, 667 clrsetbits_le32((*prcm)->cm_l4per_clkstctrl, CD_CLKCTRL_CLKTRCTRL_MASK,
668 CD_CLKCTRL_CLKTRCTRL_HW_AUTO << 668 CD_CLKCTRL_CLKTRCTRL_HW_AUTO <<
669 CD_CLKCTRL_CLKTRCTRL_SHIFT); 669 CD_CLKCTRL_CLKTRCTRL_SHIFT);
670 } 670 }
671 671
672 void do_enable_clocks(u32 const *clk_domains, 672 void do_enable_clocks(u32 const *clk_domains,
673 u32 const *clk_modules_hw_auto, 673 u32 const *clk_modules_hw_auto,
674 u32 const *clk_modules_explicit_en, 674 u32 const *clk_modules_explicit_en,
675 u8 wait_for_enable) 675 u8 wait_for_enable)
676 { 676 {
677 u32 i, max = 100; 677 u32 i, max = 100;
678 678
679 /* Put the clock domains in SW_WKUP mode */ 679 /* Put the clock domains in SW_WKUP mode */
680 for (i = 0; (i < max) && clk_domains[i]; i++) { 680 for (i = 0; (i < max) && clk_domains[i]; i++) {
681 enable_clock_domain(clk_domains[i], 681 enable_clock_domain(clk_domains[i],
682 CD_CLKCTRL_CLKTRCTRL_SW_WKUP); 682 CD_CLKCTRL_CLKTRCTRL_SW_WKUP);
683 } 683 }
684 684
685 /* Clock modules that need to be put in HW_AUTO */ 685 /* Clock modules that need to be put in HW_AUTO */
686 for (i = 0; (i < max) && clk_modules_hw_auto[i]; i++) { 686 for (i = 0; (i < max) && clk_modules_hw_auto[i]; i++) {
687 enable_clock_module(clk_modules_hw_auto[i], 687 enable_clock_module(clk_modules_hw_auto[i],
688 MODULE_CLKCTRL_MODULEMODE_HW_AUTO, 688 MODULE_CLKCTRL_MODULEMODE_HW_AUTO,
689 wait_for_enable); 689 wait_for_enable);
690 }; 690 };
691 691
692 /* Clock modules that need to be put in SW_EXPLICIT_EN mode */ 692 /* Clock modules that need to be put in SW_EXPLICIT_EN mode */
693 for (i = 0; (i < max) && clk_modules_explicit_en[i]; i++) { 693 for (i = 0; (i < max) && clk_modules_explicit_en[i]; i++) {
694 enable_clock_module(clk_modules_explicit_en[i], 694 enable_clock_module(clk_modules_explicit_en[i],
695 MODULE_CLKCTRL_MODULEMODE_SW_EXPLICIT_EN, 695 MODULE_CLKCTRL_MODULEMODE_SW_EXPLICIT_EN,
696 wait_for_enable); 696 wait_for_enable);
697 }; 697 };
698 698
699 /* Put the clock domains in HW_AUTO mode now */ 699 /* Put the clock domains in HW_AUTO mode now */
700 for (i = 0; (i < max) && clk_domains[i]; i++) { 700 for (i = 0; (i < max) && clk_domains[i]; i++) {
701 enable_clock_domain(clk_domains[i], 701 enable_clock_domain(clk_domains[i],
702 CD_CLKCTRL_CLKTRCTRL_HW_AUTO); 702 CD_CLKCTRL_CLKTRCTRL_HW_AUTO);
703 } 703 }
704 } 704 }
705 705
706 void prcm_init(void) 706 void prcm_init(void)
707 { 707 {
708 switch (omap_hw_init_context()) { 708 switch (omap_hw_init_context()) {
709 case OMAP_INIT_CONTEXT_SPL: 709 case OMAP_INIT_CONTEXT_SPL:
710 case OMAP_INIT_CONTEXT_UBOOT_FROM_NOR: 710 case OMAP_INIT_CONTEXT_UBOOT_FROM_NOR:
711 case OMAP_INIT_CONTEXT_UBOOT_AFTER_CH: 711 case OMAP_INIT_CONTEXT_UBOOT_AFTER_CH:
712 enable_basic_clocks(); 712 enable_basic_clocks();
713 scale_vcores(*omap_vcores); 713 scale_vcores(*omap_vcores);
714 setup_dplls(); 714 setup_dplls();
715 #ifdef CONFIG_SYS_CLOCKS_ENABLE_ALL 715 #ifdef CONFIG_SYS_CLOCKS_ENABLE_ALL
716 setup_non_essential_dplls(); 716 setup_non_essential_dplls();
717 enable_non_essential_clocks(); 717 enable_non_essential_clocks();
718 #endif 718 #endif
719 setup_warmreset_time();
719 break; 720 break;
720 default: 721 default:
721 break; 722 break;
722 } 723 }
723 724
724 if (OMAP_INIT_CONTEXT_SPL != omap_hw_init_context()) 725 if (OMAP_INIT_CONTEXT_SPL != omap_hw_init_context())
725 enable_basic_uboot_clocks(); 726 enable_basic_uboot_clocks();
726 } 727 }
727 728
arch/arm/cpu/armv7/omap-common/reset.c
Diff comments   View file @ 0b1b60c
1 /* 1 /*
2 * 2 *
3 * Common layer for reset related functionality of OMAP based socs. 3 * Common layer for reset related functionality of OMAP based socs.
4 * 4 *
5 * (C) Copyright 2012 5 * (C) Copyright 2012
6 * Texas Instruments, <www.ti.com> 6 * Texas Instruments, <www.ti.com>
7 * 7 *
8 * Sricharan R <r.sricharan@ti.com> 8 * Sricharan R <r.sricharan@ti.com>
9 * 9 *
10 * See file CREDITS for list of people who contributed to this 10 * See file CREDITS for list of people who contributed to this
11 * project. 11 * project.
12 * 12 *
13 * This program is free software; you can redistribute it and/or 13 * This program is free software; you can redistribute it and/or
14 * modify it under the terms of the GNU General Public License as 14 * modify it under the terms of the GNU General Public License as
15 * published by the Free Software Foundation; either version 2 of 15 * published by the Free Software Foundation; either version 2 of
16 * the License, or (at your option) any later version. 16 * the License, or (at your option) any later version.
17 * 17 *
18 * This program is distributed in the hope that it will be useful, 18 * This program is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of 19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU General Public License for more details. 21 * GNU General Public License for more details.
22 * 22 *
23 * You should have received a copy of the GNU General Public License 23 * You should have received a copy of the GNU General Public License
24 * along with this program; if not, write to the Free Software 24 * along with this program; if not, write to the Free Software
25 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 25 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
26 * MA 02111-1307 USA 26 * MA 02111-1307 USA
27 */ 27 */
28 #include <config.h> 28 #include <config.h>
29 #include <asm/io.h> 29 #include <asm/io.h>
30 #include <asm/arch/cpu.h> 30 #include <asm/arch/cpu.h>
31 #include <linux/compiler.h> 31 #include <linux/compiler.h>
32 32
33 void __weak reset_cpu(unsigned long ignored) 33 void __weak reset_cpu(unsigned long ignored)
34 { 34 {
35 writel(PRM_RSTCTRL_RESET, PRM_RSTCTRL); 35 writel(PRM_RSTCTRL_RESET, PRM_RSTCTRL);
36 } 36 }
37 37
38 u32 __weak warm_reset(void) 38 u32 __weak warm_reset(void)
39 { 39 {
40 return (readl(PRM_RSTST) & PRM_RSTST_WARM_RESET_MASK); 40 return (readl(PRM_RSTST) & PRM_RSTST_WARM_RESET_MASK);
41 } 41 }
42
43 void __weak setup_warmreset_time(void)
44 {
45 }
42 46
arch/arm/cpu/armv7/omap5/hwinit.c
Diff comments   View file @ 0b1b60c
1 /* 1 /*
2 * 2 *
3 * Functions for omap5 based boards. 3 * Functions for omap5 based boards.
4 * 4 *
5 * (C) Copyright 2011 5 * (C) Copyright 2011
6 * Texas Instruments, <www.ti.com> 6 * Texas Instruments, <www.ti.com>
7 * 7 *
8 * Author : 8 * Author :
9 * Aneesh V <aneesh@ti.com> 9 * Aneesh V <aneesh@ti.com>
10 * Steve Sakoman <steve@sakoman.com> 10 * Steve Sakoman <steve@sakoman.com>
11 * Sricharan <r.sricharan@ti.com> 11 * Sricharan <r.sricharan@ti.com>
12 * 12 *
13 * See file CREDITS for list of people who contributed to this 13 * See file CREDITS for list of people who contributed to this
14 * project. 14 * project.
15 * 15 *
16 * This program is free software; you can redistribute it and/or 16 * This program is free software; you can redistribute it and/or
17 * modify it under the terms of the GNU General Public License as 17 * modify it under the terms of the GNU General Public License as
18 * published by the Free Software Foundation; either version 2 of 18 * published by the Free Software Foundation; either version 2 of
19 * the License, or (at your option) any later version. 19 * the License, or (at your option) any later version.
20 * 20 *
21 * This program is distributed in the hope that it will be useful, 21 * This program is distributed in the hope that it will be useful,
22 * but WITHOUT ANY WARRANTY; without even the implied warranty of 22 * but WITHOUT ANY WARRANTY; without even the implied warranty of
23 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 23 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
24 * GNU General Public License for more details. 24 * GNU General Public License for more details.
25 * 25 *
26 * You should have received a copy of the GNU General Public License 26 * You should have received a copy of the GNU General Public License
27 * along with this program; if not, write to the Free Software 27 * along with this program; if not, write to the Free Software
28 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 28 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
29 * MA 02111-1307 USA 29 * MA 02111-1307 USA
30 */ 30 */
31 #include <common.h> 31 #include <common.h>
32 #include <asm/armv7.h> 32 #include <asm/armv7.h>
33 #include <asm/arch/cpu.h> 33 #include <asm/arch/cpu.h>
34 #include <asm/arch/sys_proto.h> 34 #include <asm/arch/sys_proto.h>
35 #include <asm/arch/clocks.h> 35 #include <asm/arch/clocks.h>
36 #include <asm/sizes.h> 36 #include <asm/sizes.h>
37 #include <asm/utils.h> 37 #include <asm/utils.h>
38 #include <asm/arch/gpio.h> 38 #include <asm/arch/gpio.h>
39 #include <asm/emif.h> 39 #include <asm/emif.h>
40 40
41 DECLARE_GLOBAL_DATA_PTR; 41 DECLARE_GLOBAL_DATA_PTR;
42 42
43 u32 *const omap_si_rev = (u32 *)OMAP5_SRAM_SCRATCH_OMAP5_REV; 43 u32 *const omap_si_rev = (u32 *)OMAP5_SRAM_SCRATCH_OMAP5_REV;
44 44
45 static struct gpio_bank gpio_bank_54xx[6] = { 45 static struct gpio_bank gpio_bank_54xx[6] = {
46 { (void *)OMAP54XX_GPIO1_BASE, METHOD_GPIO_24XX }, 46 { (void *)OMAP54XX_GPIO1_BASE, METHOD_GPIO_24XX },
47 { (void *)OMAP54XX_GPIO2_BASE, METHOD_GPIO_24XX }, 47 { (void *)OMAP54XX_GPIO2_BASE, METHOD_GPIO_24XX },
48 { (void *)OMAP54XX_GPIO3_BASE, METHOD_GPIO_24XX }, 48 { (void *)OMAP54XX_GPIO3_BASE, METHOD_GPIO_24XX },
49 { (void *)OMAP54XX_GPIO4_BASE, METHOD_GPIO_24XX }, 49 { (void *)OMAP54XX_GPIO4_BASE, METHOD_GPIO_24XX },
50 { (void *)OMAP54XX_GPIO5_BASE, METHOD_GPIO_24XX }, 50 { (void *)OMAP54XX_GPIO5_BASE, METHOD_GPIO_24XX },
51 { (void *)OMAP54XX_GPIO6_BASE, METHOD_GPIO_24XX }, 51 { (void *)OMAP54XX_GPIO6_BASE, METHOD_GPIO_24XX },
52 }; 52 };
53 53
54 const struct gpio_bank *const omap_gpio_bank = gpio_bank_54xx; 54 const struct gpio_bank *const omap_gpio_bank = gpio_bank_54xx;
55 55
56 #ifdef CONFIG_SPL_BUILD 56 #ifdef CONFIG_SPL_BUILD
57 /* LPDDR2 specific IO settings */ 57 /* LPDDR2 specific IO settings */
58 static void io_settings_lpddr2(void) 58 static void io_settings_lpddr2(void)
59 { 59 {
60 const struct ctrl_ioregs *ioregs; 60 const struct ctrl_ioregs *ioregs;
61 61
62 get_ioregs(&ioregs); 62 get_ioregs(&ioregs);
63 writel(ioregs->ctrl_ddrch, (*ctrl)->control_ddrch1_0); 63 writel(ioregs->ctrl_ddrch, (*ctrl)->control_ddrch1_0);
64 writel(ioregs->ctrl_ddrch, (*ctrl)->control_ddrch1_1); 64 writel(ioregs->ctrl_ddrch, (*ctrl)->control_ddrch1_1);
65 writel(ioregs->ctrl_ddrch, (*ctrl)->control_ddrch2_0); 65 writel(ioregs->ctrl_ddrch, (*ctrl)->control_ddrch2_0);
66 writel(ioregs->ctrl_ddrch, (*ctrl)->control_ddrch2_1); 66 writel(ioregs->ctrl_ddrch, (*ctrl)->control_ddrch2_1);
67 writel(ioregs->ctrl_lpddr2ch, (*ctrl)->control_lpddr2ch1_0); 67 writel(ioregs->ctrl_lpddr2ch, (*ctrl)->control_lpddr2ch1_0);
68 writel(ioregs->ctrl_lpddr2ch, (*ctrl)->control_lpddr2ch1_1); 68 writel(ioregs->ctrl_lpddr2ch, (*ctrl)->control_lpddr2ch1_1);
69 writel(ioregs->ctrl_ddrio_0, (*ctrl)->control_ddrio_0); 69 writel(ioregs->ctrl_ddrio_0, (*ctrl)->control_ddrio_0);
70 writel(ioregs->ctrl_ddrio_1, (*ctrl)->control_ddrio_1); 70 writel(ioregs->ctrl_ddrio_1, (*ctrl)->control_ddrio_1);
71 writel(ioregs->ctrl_ddrio_2, (*ctrl)->control_ddrio_2); 71 writel(ioregs->ctrl_ddrio_2, (*ctrl)->control_ddrio_2);
72 } 72 }
73 73
74 /* DDR3 specific IO settings */ 74 /* DDR3 specific IO settings */
75 static void io_settings_ddr3(void) 75 static void io_settings_ddr3(void)
76 { 76 {
77 u32 io_settings = 0; 77 u32 io_settings = 0;
78 const struct ctrl_ioregs *ioregs; 78 const struct ctrl_ioregs *ioregs;
79 79
80 get_ioregs(&ioregs); 80 get_ioregs(&ioregs);
81 writel(ioregs->ctrl_ddr3ch, (*ctrl)->control_ddr3ch1_0); 81 writel(ioregs->ctrl_ddr3ch, (*ctrl)->control_ddr3ch1_0);
82 writel(ioregs->ctrl_ddrch, (*ctrl)->control_ddrch1_0); 82 writel(ioregs->ctrl_ddrch, (*ctrl)->control_ddrch1_0);
83 writel(ioregs->ctrl_ddrch, (*ctrl)->control_ddrch1_1); 83 writel(ioregs->ctrl_ddrch, (*ctrl)->control_ddrch1_1);
84 84
85 writel(ioregs->ctrl_ddr3ch, (*ctrl)->control_ddr3ch2_0); 85 writel(ioregs->ctrl_ddr3ch, (*ctrl)->control_ddr3ch2_0);
86 writel(ioregs->ctrl_ddrch, (*ctrl)->control_ddrch2_0); 86 writel(ioregs->ctrl_ddrch, (*ctrl)->control_ddrch2_0);
87 writel(ioregs->ctrl_ddrch, (*ctrl)->control_ddrch2_1); 87 writel(ioregs->ctrl_ddrch, (*ctrl)->control_ddrch2_1);
88 88
89 writel(ioregs->ctrl_ddrio_0, (*ctrl)->control_ddrio_0); 89 writel(ioregs->ctrl_ddrio_0, (*ctrl)->control_ddrio_0);
90 writel(ioregs->ctrl_ddrio_1, (*ctrl)->control_ddrio_1); 90 writel(ioregs->ctrl_ddrio_1, (*ctrl)->control_ddrio_1);
91 writel(ioregs->ctrl_ddrio_2, (*ctrl)->control_ddrio_2); 91 writel(ioregs->ctrl_ddrio_2, (*ctrl)->control_ddrio_2);
92 92
93 /* omap5432 does not use lpddr2 */ 93 /* omap5432 does not use lpddr2 */
94 writel(ioregs->ctrl_lpddr2ch, (*ctrl)->control_lpddr2ch1_0); 94 writel(ioregs->ctrl_lpddr2ch, (*ctrl)->control_lpddr2ch1_0);
95 writel(ioregs->ctrl_lpddr2ch, (*ctrl)->control_lpddr2ch1_1); 95 writel(ioregs->ctrl_lpddr2ch, (*ctrl)->control_lpddr2ch1_1);
96 96
97 writel(ioregs->ctrl_emif_sdram_config_ext, 97 writel(ioregs->ctrl_emif_sdram_config_ext,
98 (*ctrl)->control_emif1_sdram_config_ext); 98 (*ctrl)->control_emif1_sdram_config_ext);
99 writel(ioregs->ctrl_emif_sdram_config_ext, 99 writel(ioregs->ctrl_emif_sdram_config_ext,
100 (*ctrl)->control_emif2_sdram_config_ext); 100 (*ctrl)->control_emif2_sdram_config_ext);
101 101
102 /* Disable DLL select */ 102 /* Disable DLL select */
103 io_settings = (readl((*ctrl)->control_port_emif1_sdram_config) 103 io_settings = (readl((*ctrl)->control_port_emif1_sdram_config)
104 & 0xFFEFFFFF); 104 & 0xFFEFFFFF);
105 writel(io_settings, 105 writel(io_settings,
106 (*ctrl)->control_port_emif1_sdram_config); 106 (*ctrl)->control_port_emif1_sdram_config);
107 107
108 io_settings = (readl((*ctrl)->control_port_emif2_sdram_config) 108 io_settings = (readl((*ctrl)->control_port_emif2_sdram_config)
109 & 0xFFEFFFFF); 109 & 0xFFEFFFFF);
110 writel(io_settings, 110 writel(io_settings,
111 (*ctrl)->control_port_emif2_sdram_config); 111 (*ctrl)->control_port_emif2_sdram_config);
112 } 112 }
113 113
114 /* 114 /*
115 * Some tuning of IOs for optimal power and performance 115 * Some tuning of IOs for optimal power and performance
116 */ 116 */
117 void do_io_settings(void) 117 void do_io_settings(void)
118 { 118 {
119 u32 io_settings = 0, mask = 0; 119 u32 io_settings = 0, mask = 0;
120 120
121 /* Impedance settings EMMC, C2C 1,2, hsi2 */ 121 /* Impedance settings EMMC, C2C 1,2, hsi2 */
122 mask = (ds_mask << 2) | (ds_mask << 8) | 122 mask = (ds_mask << 2) | (ds_mask << 8) |
123 (ds_mask << 16) | (ds_mask << 18); 123 (ds_mask << 16) | (ds_mask << 18);
124 io_settings = readl((*ctrl)->control_smart1io_padconf_0) & 124 io_settings = readl((*ctrl)->control_smart1io_padconf_0) &
125 (~mask); 125 (~mask);
126 io_settings |= (ds_60_ohm << 8) | (ds_45_ohm << 16) | 126 io_settings |= (ds_60_ohm << 8) | (ds_45_ohm << 16) |
127 (ds_45_ohm << 18) | (ds_60_ohm << 2); 127 (ds_45_ohm << 18) | (ds_60_ohm << 2);
128 writel(io_settings, (*ctrl)->control_smart1io_padconf_0); 128 writel(io_settings, (*ctrl)->control_smart1io_padconf_0);
129 129
130 /* Impedance settings Mcspi2 */ 130 /* Impedance settings Mcspi2 */
131 mask = (ds_mask << 30); 131 mask = (ds_mask << 30);
132 io_settings = readl((*ctrl)->control_smart1io_padconf_1) & 132 io_settings = readl((*ctrl)->control_smart1io_padconf_1) &
133 (~mask); 133 (~mask);
134 io_settings |= (ds_60_ohm << 30); 134 io_settings |= (ds_60_ohm << 30);
135 writel(io_settings, (*ctrl)->control_smart1io_padconf_1); 135 writel(io_settings, (*ctrl)->control_smart1io_padconf_1);
136 136
137 /* Impedance settings C2C 3,4 */ 137 /* Impedance settings C2C 3,4 */
138 mask = (ds_mask << 14) | (ds_mask << 16); 138 mask = (ds_mask << 14) | (ds_mask << 16);
139 io_settings = readl((*ctrl)->control_smart1io_padconf_2) & 139 io_settings = readl((*ctrl)->control_smart1io_padconf_2) &
140 (~mask); 140 (~mask);
141 io_settings |= (ds_45_ohm << 14) | (ds_45_ohm << 16); 141 io_settings |= (ds_45_ohm << 14) | (ds_45_ohm << 16);
142 writel(io_settings, (*ctrl)->control_smart1io_padconf_2); 142 writel(io_settings, (*ctrl)->control_smart1io_padconf_2);
143 143
144 /* Slew rate settings EMMC, C2C 1,2 */ 144 /* Slew rate settings EMMC, C2C 1,2 */
145 mask = (sc_mask << 8) | (sc_mask << 16) | (sc_mask << 18); 145 mask = (sc_mask << 8) | (sc_mask << 16) | (sc_mask << 18);
146 io_settings = readl((*ctrl)->control_smart2io_padconf_0) & 146 io_settings = readl((*ctrl)->control_smart2io_padconf_0) &
147 (~mask); 147 (~mask);
148 io_settings |= (sc_fast << 8) | (sc_na << 16) | (sc_na << 18); 148 io_settings |= (sc_fast << 8) | (sc_na << 16) | (sc_na << 18);
149 writel(io_settings, (*ctrl)->control_smart2io_padconf_0); 149 writel(io_settings, (*ctrl)->control_smart2io_padconf_0);
150 150
151 /* Slew rate settings hsi2, Mcspi2 */ 151 /* Slew rate settings hsi2, Mcspi2 */
152 mask = (sc_mask << 24) | (sc_mask << 28); 152 mask = (sc_mask << 24) | (sc_mask << 28);
153 io_settings = readl((*ctrl)->control_smart2io_padconf_1) & 153 io_settings = readl((*ctrl)->control_smart2io_padconf_1) &
154 (~mask); 154 (~mask);
155 io_settings |= (sc_fast << 28) | (sc_fast << 24); 155 io_settings |= (sc_fast << 28) | (sc_fast << 24);
156 writel(io_settings, (*ctrl)->control_smart2io_padconf_1); 156 writel(io_settings, (*ctrl)->control_smart2io_padconf_1);
157 157
158 /* Slew rate settings C2C 3,4 */ 158 /* Slew rate settings C2C 3,4 */
159 mask = (sc_mask << 16) | (sc_mask << 18); 159 mask = (sc_mask << 16) | (sc_mask << 18);
160 io_settings = readl((*ctrl)->control_smart2io_padconf_2) & 160 io_settings = readl((*ctrl)->control_smart2io_padconf_2) &
161 (~mask); 161 (~mask);
162 io_settings |= (sc_na << 16) | (sc_na << 18); 162 io_settings |= (sc_na << 16) | (sc_na << 18);
163 writel(io_settings, (*ctrl)->control_smart2io_padconf_2); 163 writel(io_settings, (*ctrl)->control_smart2io_padconf_2);
164 164
165 /* impedance and slew rate settings for usb */ 165 /* impedance and slew rate settings for usb */
166 mask = (usb_i_mask << 29) | (usb_i_mask << 26) | (usb_i_mask << 23) | 166 mask = (usb_i_mask << 29) | (usb_i_mask << 26) | (usb_i_mask << 23) |
167 (usb_i_mask << 20) | (usb_i_mask << 17) | (usb_i_mask << 14); 167 (usb_i_mask << 20) | (usb_i_mask << 17) | (usb_i_mask << 14);
168 io_settings = readl((*ctrl)->control_smart3io_padconf_1) & 168 io_settings = readl((*ctrl)->control_smart3io_padconf_1) &
169 (~mask); 169 (~mask);
170 io_settings |= (ds_60_ohm << 29) | (ds_60_ohm << 26) | 170 io_settings |= (ds_60_ohm << 29) | (ds_60_ohm << 26) |
171 (ds_60_ohm << 23) | (sc_fast << 20) | 171 (ds_60_ohm << 23) | (sc_fast << 20) |
172 (sc_fast << 17) | (sc_fast << 14); 172 (sc_fast << 17) | (sc_fast << 14);
173 writel(io_settings, (*ctrl)->control_smart3io_padconf_1); 173 writel(io_settings, (*ctrl)->control_smart3io_padconf_1);
174 174
175 if (emif_sdram_type() == EMIF_SDRAM_TYPE_LPDDR2) 175 if (emif_sdram_type() == EMIF_SDRAM_TYPE_LPDDR2)
176 io_settings_lpddr2(); 176 io_settings_lpddr2();
177 else 177 else
178 io_settings_ddr3(); 178 io_settings_ddr3();
179 179
180 /* Efuse settings */ 180 /* Efuse settings */
181 writel(EFUSE_1, (*ctrl)->control_efuse_1); 181 writel(EFUSE_1, (*ctrl)->control_efuse_1);
182 writel(EFUSE_2, (*ctrl)->control_efuse_2); 182 writel(EFUSE_2, (*ctrl)->control_efuse_2);
183 writel(EFUSE_3, (*ctrl)->control_efuse_3); 183 writel(EFUSE_3, (*ctrl)->control_efuse_3);
184 writel(EFUSE_4, (*ctrl)->control_efuse_4); 184 writel(EFUSE_4, (*ctrl)->control_efuse_4);
185 } 185 }
186 186
187 static const struct srcomp_params srcomp_parameters[NUM_SYS_CLKS] = { 187 static const struct srcomp_params srcomp_parameters[NUM_SYS_CLKS] = {
188 {0x45, 0x1}, /* 12 MHz */ 188 {0x45, 0x1}, /* 12 MHz */
189 {-1, -1}, /* 13 MHz */ 189 {-1, -1}, /* 13 MHz */
190 {0x63, 0x2}, /* 16.8 MHz */ 190 {0x63, 0x2}, /* 16.8 MHz */
191 {0x57, 0x2}, /* 19.2 MHz */ 191 {0x57, 0x2}, /* 19.2 MHz */
192 {0x20, 0x1}, /* 26 MHz */ 192 {0x20, 0x1}, /* 26 MHz */
193 {-1, -1}, /* 27 MHz */ 193 {-1, -1}, /* 27 MHz */
194 {0x41, 0x3} /* 38.4 MHz */ 194 {0x41, 0x3} /* 38.4 MHz */
195 }; 195 };
196 196
197 void srcomp_enable(void) 197 void srcomp_enable(void)
198 { 198 {
199 u32 srcomp_value, mul_factor, div_factor, clk_val, i; 199 u32 srcomp_value, mul_factor, div_factor, clk_val, i;
200 u32 sysclk_ind = get_sys_clk_index(); 200 u32 sysclk_ind = get_sys_clk_index();
201 u32 omap_rev = omap_revision(); 201 u32 omap_rev = omap_revision();
202 202
203 mul_factor = srcomp_parameters[sysclk_ind].multiply_factor; 203 mul_factor = srcomp_parameters[sysclk_ind].multiply_factor;
204 div_factor = srcomp_parameters[sysclk_ind].divide_factor; 204 div_factor = srcomp_parameters[sysclk_ind].divide_factor;
205 205
206 for (i = 0; i < 4; i++) { 206 for (i = 0; i < 4; i++) {
207 srcomp_value = readl((*ctrl)->control_srcomp_north_side + i*4); 207 srcomp_value = readl((*ctrl)->control_srcomp_north_side + i*4);
208 srcomp_value &= 208 srcomp_value &=
209 ~(MULTIPLY_FACTOR_XS_MASK | DIVIDE_FACTOR_XS_MASK); 209 ~(MULTIPLY_FACTOR_XS_MASK | DIVIDE_FACTOR_XS_MASK);
210 srcomp_value |= (mul_factor << MULTIPLY_FACTOR_XS_SHIFT) | 210 srcomp_value |= (mul_factor << MULTIPLY_FACTOR_XS_SHIFT) |
211 (div_factor << DIVIDE_FACTOR_XS_SHIFT); 211 (div_factor << DIVIDE_FACTOR_XS_SHIFT);
212 writel(srcomp_value, (*ctrl)->control_srcomp_north_side + i*4); 212 writel(srcomp_value, (*ctrl)->control_srcomp_north_side + i*4);
213 } 213 }
214 214
215 if ((omap_rev == OMAP5430_ES1_0) || (omap_rev == OMAP5432_ES1_0)) { 215 if ((omap_rev == OMAP5430_ES1_0) || (omap_rev == OMAP5432_ES1_0)) {
216 clk_val = readl((*prcm)->cm_coreaon_io_srcomp_clkctrl); 216 clk_val = readl((*prcm)->cm_coreaon_io_srcomp_clkctrl);
217 clk_val |= OPTFCLKEN_SRCOMP_FCLK_MASK; 217 clk_val |= OPTFCLKEN_SRCOMP_FCLK_MASK;
218 writel(clk_val, (*prcm)->cm_coreaon_io_srcomp_clkctrl); 218 writel(clk_val, (*prcm)->cm_coreaon_io_srcomp_clkctrl);
219 219
220 for (i = 0; i < 4; i++) { 220 for (i = 0; i < 4; i++) {
221 srcomp_value = 221 srcomp_value =
222 readl((*ctrl)->control_srcomp_north_side + i*4); 222 readl((*ctrl)->control_srcomp_north_side + i*4);
223 srcomp_value &= ~PWRDWN_XS_MASK; 223 srcomp_value &= ~PWRDWN_XS_MASK;
224 writel(srcomp_value, 224 writel(srcomp_value,
225 (*ctrl)->control_srcomp_north_side + i*4); 225 (*ctrl)->control_srcomp_north_side + i*4);
226 226
227 while (((readl((*ctrl)->control_srcomp_north_side + i*4) 227 while (((readl((*ctrl)->control_srcomp_north_side + i*4)
228 & SRCODE_READ_XS_MASK) >> 228 & SRCODE_READ_XS_MASK) >>
229 SRCODE_READ_XS_SHIFT) == 0) 229 SRCODE_READ_XS_SHIFT) == 0)
230 ; 230 ;
231 231
232 srcomp_value = 232 srcomp_value =
233 readl((*ctrl)->control_srcomp_north_side + i*4); 233 readl((*ctrl)->control_srcomp_north_side + i*4);
234 srcomp_value &= ~OVERRIDE_XS_MASK; 234 srcomp_value &= ~OVERRIDE_XS_MASK;
235 writel(srcomp_value, 235 writel(srcomp_value,
236 (*ctrl)->control_srcomp_north_side + i*4); 236 (*ctrl)->control_srcomp_north_side + i*4);
237 } 237 }
238 } else { 238 } else {
239 srcomp_value = readl((*ctrl)->control_srcomp_east_side_wkup); 239 srcomp_value = readl((*ctrl)->control_srcomp_east_side_wkup);
240 srcomp_value &= ~(MULTIPLY_FACTOR_XS_MASK | 240 srcomp_value &= ~(MULTIPLY_FACTOR_XS_MASK |
241 DIVIDE_FACTOR_XS_MASK); 241 DIVIDE_FACTOR_XS_MASK);
242 srcomp_value |= (mul_factor << MULTIPLY_FACTOR_XS_SHIFT) | 242 srcomp_value |= (mul_factor << MULTIPLY_FACTOR_XS_SHIFT) |
243 (div_factor << DIVIDE_FACTOR_XS_SHIFT); 243 (div_factor << DIVIDE_FACTOR_XS_SHIFT);
244 writel(srcomp_value, (*ctrl)->control_srcomp_east_side_wkup); 244 writel(srcomp_value, (*ctrl)->control_srcomp_east_side_wkup);
245 245
246 for (i = 0; i < 4; i++) { 246 for (i = 0; i < 4; i++) {
247 srcomp_value = 247 srcomp_value =
248 readl((*ctrl)->control_srcomp_north_side + i*4); 248 readl((*ctrl)->control_srcomp_north_side + i*4);
249 srcomp_value |= SRCODE_OVERRIDE_SEL_XS_MASK; 249 srcomp_value |= SRCODE_OVERRIDE_SEL_XS_MASK;
250 writel(srcomp_value, 250 writel(srcomp_value,
251 (*ctrl)->control_srcomp_north_side + i*4); 251 (*ctrl)->control_srcomp_north_side + i*4);
252 252
253 srcomp_value = 253 srcomp_value =
254 readl((*ctrl)->control_srcomp_north_side + i*4); 254 readl((*ctrl)->control_srcomp_north_side + i*4);
255 srcomp_value &= ~OVERRIDE_XS_MASK; 255 srcomp_value &= ~OVERRIDE_XS_MASK;
256 writel(srcomp_value, 256 writel(srcomp_value,
257 (*ctrl)->control_srcomp_north_side + i*4); 257 (*ctrl)->control_srcomp_north_side + i*4);
258 } 258 }
259 259
260 srcomp_value = 260 srcomp_value =
261 readl((*ctrl)->control_srcomp_east_side_wkup); 261 readl((*ctrl)->control_srcomp_east_side_wkup);
262 srcomp_value |= SRCODE_OVERRIDE_SEL_XS_MASK; 262 srcomp_value |= SRCODE_OVERRIDE_SEL_XS_MASK;
263 writel(srcomp_value, (*ctrl)->control_srcomp_east_side_wkup); 263 writel(srcomp_value, (*ctrl)->control_srcomp_east_side_wkup);
264 264
265 srcomp_value = 265 srcomp_value =
266 readl((*ctrl)->control_srcomp_east_side_wkup); 266 readl((*ctrl)->control_srcomp_east_side_wkup);
267 srcomp_value &= ~OVERRIDE_XS_MASK; 267 srcomp_value &= ~OVERRIDE_XS_MASK;
268 writel(srcomp_value, (*ctrl)->control_srcomp_east_side_wkup); 268 writel(srcomp_value, (*ctrl)->control_srcomp_east_side_wkup);
269 269
270 clk_val = readl((*prcm)->cm_coreaon_io_srcomp_clkctrl); 270 clk_val = readl((*prcm)->cm_coreaon_io_srcomp_clkctrl);
271 clk_val |= OPTFCLKEN_SRCOMP_FCLK_MASK; 271 clk_val |= OPTFCLKEN_SRCOMP_FCLK_MASK;
272 writel(clk_val, (*prcm)->cm_coreaon_io_srcomp_clkctrl); 272 writel(clk_val, (*prcm)->cm_coreaon_io_srcomp_clkctrl);
273 273
274 clk_val = readl((*prcm)->cm_wkupaon_io_srcomp_clkctrl); 274 clk_val = readl((*prcm)->cm_wkupaon_io_srcomp_clkctrl);
275 clk_val |= OPTFCLKEN_SRCOMP_FCLK_MASK; 275 clk_val |= OPTFCLKEN_SRCOMP_FCLK_MASK;
276 writel(clk_val, (*prcm)->cm_wkupaon_io_srcomp_clkctrl); 276 writel(clk_val, (*prcm)->cm_wkupaon_io_srcomp_clkctrl);
277 277
278 for (i = 0; i < 4; i++) { 278 for (i = 0; i < 4; i++) {
279 while (((readl((*ctrl)->control_srcomp_north_side + i*4) 279 while (((readl((*ctrl)->control_srcomp_north_side + i*4)
280 & SRCODE_READ_XS_MASK) >> 280 & SRCODE_READ_XS_MASK) >>
281 SRCODE_READ_XS_SHIFT) == 0) 281 SRCODE_READ_XS_SHIFT) == 0)
282 ; 282 ;
283 283
284 srcomp_value = 284 srcomp_value =
285 readl((*ctrl)->control_srcomp_north_side + i*4); 285 readl((*ctrl)->control_srcomp_north_side + i*4);
286 srcomp_value &= ~SRCODE_OVERRIDE_SEL_XS_MASK; 286 srcomp_value &= ~SRCODE_OVERRIDE_SEL_XS_MASK;
287 writel(srcomp_value, 287 writel(srcomp_value,
288 (*ctrl)->control_srcomp_north_side + i*4); 288 (*ctrl)->control_srcomp_north_side + i*4);
289 } 289 }
290 290
291 while (((readl((*ctrl)->control_srcomp_east_side_wkup) & 291 while (((readl((*ctrl)->control_srcomp_east_side_wkup) &
292 SRCODE_READ_XS_MASK) >> SRCODE_READ_XS_SHIFT) == 0) 292 SRCODE_READ_XS_MASK) >> SRCODE_READ_XS_SHIFT) == 0)
293 ; 293 ;
294 294
295 srcomp_value = 295 srcomp_value =
296 readl((*ctrl)->control_srcomp_east_side_wkup); 296 readl((*ctrl)->control_srcomp_east_side_wkup);
297 srcomp_value &= ~SRCODE_OVERRIDE_SEL_XS_MASK; 297 srcomp_value &= ~SRCODE_OVERRIDE_SEL_XS_MASK;
298 writel(srcomp_value, (*ctrl)->control_srcomp_east_side_wkup); 298 writel(srcomp_value, (*ctrl)->control_srcomp_east_side_wkup);
299 } 299 }
300 } 300 }
301 #endif 301 #endif
302 302
303 void config_data_eye_leveling_samples(u32 emif_base) 303 void config_data_eye_leveling_samples(u32 emif_base)
304 { 304 {
305 /*EMIF_SDRAM_CONFIG_EXT-Read data eye leveling no of samples =4*/ 305 /*EMIF_SDRAM_CONFIG_EXT-Read data eye leveling no of samples =4*/
306 if (emif_base == EMIF1_BASE) 306 if (emif_base == EMIF1_BASE)
307 writel(SDRAM_CONFIG_EXT_RD_LVL_4_SAMPLES, 307 writel(SDRAM_CONFIG_EXT_RD_LVL_4_SAMPLES,
308 (*ctrl)->control_emif1_sdram_config_ext); 308 (*ctrl)->control_emif1_sdram_config_ext);
309 else if (emif_base == EMIF2_BASE) 309 else if (emif_base == EMIF2_BASE)
310 writel(SDRAM_CONFIG_EXT_RD_LVL_4_SAMPLES, 310 writel(SDRAM_CONFIG_EXT_RD_LVL_4_SAMPLES,
311 (*ctrl)->control_emif2_sdram_config_ext); 311 (*ctrl)->control_emif2_sdram_config_ext);
312 } 312 }
313 313
314 void init_omap_revision(void) 314 void init_omap_revision(void)
315 { 315 {
316 /* 316 /*
317 * For some of the ES2/ES1 boards ID_CODE is not reliable: 317 * For some of the ES2/ES1 boards ID_CODE is not reliable:
318 * Also, ES1 and ES2 have different ARM revisions 318 * Also, ES1 and ES2 have different ARM revisions
319 * So use ARM revision for identification 319 * So use ARM revision for identification
320 */ 320 */
321 unsigned int rev = cortex_rev(); 321 unsigned int rev = cortex_rev();
322 322
323 switch (readl(CONTROL_ID_CODE)) { 323 switch (readl(CONTROL_ID_CODE)) {
324 case OMAP5430_CONTROL_ID_CODE_ES1_0: 324 case OMAP5430_CONTROL_ID_CODE_ES1_0:
325 *omap_si_rev = OMAP5430_ES1_0; 325 *omap_si_rev = OMAP5430_ES1_0;
326 if (rev == MIDR_CORTEX_A15_R2P2) 326 if (rev == MIDR_CORTEX_A15_R2P2)
327 *omap_si_rev = OMAP5430_ES2_0; 327 *omap_si_rev = OMAP5430_ES2_0;
328 break; 328 break;
329 case OMAP5432_CONTROL_ID_CODE_ES1_0: 329 case OMAP5432_CONTROL_ID_CODE_ES1_0:
330 *omap_si_rev = OMAP5432_ES1_0; 330 *omap_si_rev = OMAP5432_ES1_0;
331 if (rev == MIDR_CORTEX_A15_R2P2) 331 if (rev == MIDR_CORTEX_A15_R2P2)
332 *omap_si_rev = OMAP5432_ES2_0; 332 *omap_si_rev = OMAP5432_ES2_0;
333 break; 333 break;
334 case OMAP5430_CONTROL_ID_CODE_ES2_0: 334 case OMAP5430_CONTROL_ID_CODE_ES2_0:
335 *omap_si_rev = OMAP5430_ES2_0; 335 *omap_si_rev = OMAP5430_ES2_0;
336 break; 336 break;
337 case OMAP5432_CONTROL_ID_CODE_ES2_0: 337 case OMAP5432_CONTROL_ID_CODE_ES2_0:
338 *omap_si_rev = OMAP5432_ES2_0; 338 *omap_si_rev = OMAP5432_ES2_0;
339 break; 339 break;
340 case DRA752_CONTROL_ID_CODE_ES1_0: 340 case DRA752_CONTROL_ID_CODE_ES1_0:
341 *omap_si_rev = DRA752_ES1_0; 341 *omap_si_rev = DRA752_ES1_0;
342 break; 342 break;
343 default: 343 default:
344 *omap_si_rev = OMAP5430_SILICON_ID_INVALID; 344 *omap_si_rev = OMAP5430_SILICON_ID_INVALID;
345 } 345 }
346 } 346 }
347 347
348 void reset_cpu(ulong ignored) 348 void reset_cpu(ulong ignored)
349 { 349 {
350 u32 omap_rev = omap_revision(); 350 u32 omap_rev = omap_revision();
351 351
352 /* 352 /*
353 * WARM reset is not functional in case of OMAP5430 ES1.0 soc. 353 * WARM reset is not functional in case of OMAP5430 ES1.0 soc.
354 * So use cold reset in case instead. 354 * So use cold reset in case instead.
355 */ 355 */
356 if (omap_rev == OMAP5430_ES1_0) 356 if (omap_rev == OMAP5430_ES1_0)
357 writel(PRM_RSTCTRL_RESET << 0x1, (*prcm)->prm_rstctrl); 357 writel(PRM_RSTCTRL_RESET << 0x1, (*prcm)->prm_rstctrl);
358 else 358 else
359 writel(PRM_RSTCTRL_RESET, (*prcm)->prm_rstctrl); 359 writel(PRM_RSTCTRL_RESET, (*prcm)->prm_rstctrl);
360 } 360 }
361 361
362 u32 warm_reset(void) 362 u32 warm_reset(void)
363 { 363 {
364 return readl((*prcm)->prm_rstst) & PRM_RSTST_WARM_RESET_MASK; 364 return readl((*prcm)->prm_rstst) & PRM_RSTST_WARM_RESET_MASK;
365 } 365 }
366
367 void setup_warmreset_time(void)
368 {
369 u32 rst_time, rst_val;
370
371 #ifndef CONFIG_OMAP_PLATFORM_RESET_TIME_MAX_USEC
372 rst_time = CONFIG_DEFAULT_OMAP_RESET_TIME_MAX_USEC;
373 #else
374 rst_time = CONFIG_OMAP_PLATFORM_RESET_TIME_MAX_USEC;
375 #endif
376 rst_time = usec_to_32k(rst_time) << RSTTIME1_SHIFT;
377
378 if (rst_time > RSTTIME1_MASK)
379 rst_time = RSTTIME1_MASK;
380
381 rst_val = readl((*prcm)->prm_rsttime) & ~RSTTIME1_MASK;
382 rst_val |= rst_time;
383 writel(rst_val, (*prcm)->prm_rsttime);
384 }
366 385
arch/arm/cpu/armv7/omap5/prcm-regs.c
Diff comments   View file @ 0b1b60c
1 /* 1 /*
2 * 2 *
3 * HW regs data for OMAP5 Soc 3 * HW regs data for OMAP5 Soc
4 * 4 *
5 * (C) Copyright 2013 5 * (C) Copyright 2013
6 * Texas Instruments, <www.ti.com> 6 * Texas Instruments, <www.ti.com>
7 * 7 *
8 * Sricharan R <r.sricharan@ti.com> 8 * Sricharan R <r.sricharan@ti.com>
9 * 9 *
10 * See file CREDITS for list of people who contributed to this 10 * See file CREDITS for list of people who contributed to this
11 * project. 11 * project.
12 * 12 *
13 * This program is free software; you can redistribute it and/or 13 * This program is free software; you can redistribute it and/or
14 * modify it under the terms of the GNU General Public License as 14 * modify it under the terms of the GNU General Public License as
15 * published by the Free Software Foundation; either version 2 of 15 * published by the Free Software Foundation; either version 2 of
16 * the License, or (at your option) any later version. 16 * the License, or (at your option) any later version.
17 * 17 *
18 * This program is distributed in the hope that it will be useful, 18 * This program is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of 19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU General Public License for more details. 21 * GNU General Public License for more details.
22 * 22 *
23 * You should have received a copy of the GNU General Public License 23 * You should have received a copy of the GNU General Public License
24 * along with this program; if not, write to the Free Software 24 * along with this program; if not, write to the Free Software
25 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 25 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
26 * MA 02111-1307 USA 26 * MA 02111-1307 USA
27 */ 27 */
28 28
29 #include <asm/omap_common.h> 29 #include <asm/omap_common.h>
30 30
31 struct prcm_regs const omap5_es1_prcm = { 31 struct prcm_regs const omap5_es1_prcm = {
32 /* cm1.ckgen */ 32 /* cm1.ckgen */
33 .cm_clksel_core = 0x4a004100, 33 .cm_clksel_core = 0x4a004100,
34 .cm_clksel_abe = 0x4a004108, 34 .cm_clksel_abe = 0x4a004108,
35 .cm_dll_ctrl = 0x4a004110, 35 .cm_dll_ctrl = 0x4a004110,
36 .cm_clkmode_dpll_core = 0x4a004120, 36 .cm_clkmode_dpll_core = 0x4a004120,
37 .cm_idlest_dpll_core = 0x4a004124, 37 .cm_idlest_dpll_core = 0x4a004124,
38 .cm_autoidle_dpll_core = 0x4a004128, 38 .cm_autoidle_dpll_core = 0x4a004128,
39 .cm_clksel_dpll_core = 0x4a00412c, 39 .cm_clksel_dpll_core = 0x4a00412c,
40 .cm_div_m2_dpll_core = 0x4a004130, 40 .cm_div_m2_dpll_core = 0x4a004130,
41 .cm_div_m3_dpll_core = 0x4a004134, 41 .cm_div_m3_dpll_core = 0x4a004134,
42 .cm_div_h11_dpll_core = 0x4a004138, 42 .cm_div_h11_dpll_core = 0x4a004138,
43 .cm_div_h12_dpll_core = 0x4a00413c, 43 .cm_div_h12_dpll_core = 0x4a00413c,
44 .cm_div_h13_dpll_core = 0x4a004140, 44 .cm_div_h13_dpll_core = 0x4a004140,
45 .cm_div_h14_dpll_core = 0x4a004144, 45 .cm_div_h14_dpll_core = 0x4a004144,
46 .cm_ssc_deltamstep_dpll_core = 0x4a004148, 46 .cm_ssc_deltamstep_dpll_core = 0x4a004148,
47 .cm_ssc_modfreqdiv_dpll_core = 0x4a00414c, 47 .cm_ssc_modfreqdiv_dpll_core = 0x4a00414c,
48 .cm_emu_override_dpll_core = 0x4a004150, 48 .cm_emu_override_dpll_core = 0x4a004150,
49 .cm_div_h22_dpllcore = 0x4a004154, 49 .cm_div_h22_dpllcore = 0x4a004154,
50 .cm_div_h23_dpll_core = 0x4a004158, 50 .cm_div_h23_dpll_core = 0x4a004158,
51 .cm_clkmode_dpll_mpu = 0x4a004160, 51 .cm_clkmode_dpll_mpu = 0x4a004160,
52 .cm_idlest_dpll_mpu = 0x4a004164, 52 .cm_idlest_dpll_mpu = 0x4a004164,
53 .cm_autoidle_dpll_mpu = 0x4a004168, 53 .cm_autoidle_dpll_mpu = 0x4a004168,
54 .cm_clksel_dpll_mpu = 0x4a00416c, 54 .cm_clksel_dpll_mpu = 0x4a00416c,
55 .cm_div_m2_dpll_mpu = 0x4a004170, 55 .cm_div_m2_dpll_mpu = 0x4a004170,
56 .cm_ssc_deltamstep_dpll_mpu = 0x4a004188, 56 .cm_ssc_deltamstep_dpll_mpu = 0x4a004188,
57 .cm_ssc_modfreqdiv_dpll_mpu = 0x4a00418c, 57 .cm_ssc_modfreqdiv_dpll_mpu = 0x4a00418c,
58 .cm_bypclk_dpll_mpu = 0x4a00419c, 58 .cm_bypclk_dpll_mpu = 0x4a00419c,
59 .cm_clkmode_dpll_iva = 0x4a0041a0, 59 .cm_clkmode_dpll_iva = 0x4a0041a0,
60 .cm_idlest_dpll_iva = 0x4a0041a4, 60 .cm_idlest_dpll_iva = 0x4a0041a4,
61 .cm_autoidle_dpll_iva = 0x4a0041a8, 61 .cm_autoidle_dpll_iva = 0x4a0041a8,
62 .cm_clksel_dpll_iva = 0x4a0041ac, 62 .cm_clksel_dpll_iva = 0x4a0041ac,
63 .cm_div_h11_dpll_iva = 0x4a0041b8, 63 .cm_div_h11_dpll_iva = 0x4a0041b8,
64 .cm_div_h12_dpll_iva = 0x4a0041bc, 64 .cm_div_h12_dpll_iva = 0x4a0041bc,
65 .cm_ssc_deltamstep_dpll_iva = 0x4a0041c8, 65 .cm_ssc_deltamstep_dpll_iva = 0x4a0041c8,
66 .cm_ssc_modfreqdiv_dpll_iva = 0x4a0041cc, 66 .cm_ssc_modfreqdiv_dpll_iva = 0x4a0041cc,
67 .cm_bypclk_dpll_iva = 0x4a0041dc, 67 .cm_bypclk_dpll_iva = 0x4a0041dc,
68 .cm_clkmode_dpll_abe = 0x4a0041e0, 68 .cm_clkmode_dpll_abe = 0x4a0041e0,
69 .cm_idlest_dpll_abe = 0x4a0041e4, 69 .cm_idlest_dpll_abe = 0x4a0041e4,
70 .cm_autoidle_dpll_abe = 0x4a0041e8, 70 .cm_autoidle_dpll_abe = 0x4a0041e8,
71 .cm_clksel_dpll_abe = 0x4a0041ec, 71 .cm_clksel_dpll_abe = 0x4a0041ec,
72 .cm_div_m2_dpll_abe = 0x4a0041f0, 72 .cm_div_m2_dpll_abe = 0x4a0041f0,
73 .cm_div_m3_dpll_abe = 0x4a0041f4, 73 .cm_div_m3_dpll_abe = 0x4a0041f4,
74 .cm_ssc_deltamstep_dpll_abe = 0x4a004208, 74 .cm_ssc_deltamstep_dpll_abe = 0x4a004208,
75 .cm_ssc_modfreqdiv_dpll_abe = 0x4a00420c, 75 .cm_ssc_modfreqdiv_dpll_abe = 0x4a00420c,
76 .cm_clkmode_dpll_ddrphy = 0x4a004220, 76 .cm_clkmode_dpll_ddrphy = 0x4a004220,
77 .cm_idlest_dpll_ddrphy = 0x4a004224, 77 .cm_idlest_dpll_ddrphy = 0x4a004224,
78 .cm_autoidle_dpll_ddrphy = 0x4a004228, 78 .cm_autoidle_dpll_ddrphy = 0x4a004228,
79 .cm_clksel_dpll_ddrphy = 0x4a00422c, 79 .cm_clksel_dpll_ddrphy = 0x4a00422c,
80 .cm_div_m2_dpll_ddrphy = 0x4a004230, 80 .cm_div_m2_dpll_ddrphy = 0x4a004230,
81 .cm_div_h11_dpll_ddrphy = 0x4a004238, 81 .cm_div_h11_dpll_ddrphy = 0x4a004238,
82 .cm_div_h12_dpll_ddrphy = 0x4a00423c, 82 .cm_div_h12_dpll_ddrphy = 0x4a00423c,
83 .cm_div_h13_dpll_ddrphy = 0x4a004240, 83 .cm_div_h13_dpll_ddrphy = 0x4a004240,
84 .cm_ssc_deltamstep_dpll_ddrphy = 0x4a004248, 84 .cm_ssc_deltamstep_dpll_ddrphy = 0x4a004248,
85 .cm_shadow_freq_config1 = 0x4a004260, 85 .cm_shadow_freq_config1 = 0x4a004260,
86 .cm_mpu_mpu_clkctrl = 0x4a004320, 86 .cm_mpu_mpu_clkctrl = 0x4a004320,
87 87
88 /* cm1.dsp */ 88 /* cm1.dsp */
89 .cm_dsp_clkstctrl = 0x4a004400, 89 .cm_dsp_clkstctrl = 0x4a004400,
90 .cm_dsp_dsp_clkctrl = 0x4a004420, 90 .cm_dsp_dsp_clkctrl = 0x4a004420,
91 91
92 /* cm1.abe */ 92 /* cm1.abe */
93 .cm1_abe_clkstctrl = 0x4a004500, 93 .cm1_abe_clkstctrl = 0x4a004500,
94 .cm1_abe_l4abe_clkctrl = 0x4a004520, 94 .cm1_abe_l4abe_clkctrl = 0x4a004520,
95 .cm1_abe_aess_clkctrl = 0x4a004528, 95 .cm1_abe_aess_clkctrl = 0x4a004528,
96 .cm1_abe_pdm_clkctrl = 0x4a004530, 96 .cm1_abe_pdm_clkctrl = 0x4a004530,
97 .cm1_abe_dmic_clkctrl = 0x4a004538, 97 .cm1_abe_dmic_clkctrl = 0x4a004538,
98 .cm1_abe_mcasp_clkctrl = 0x4a004540, 98 .cm1_abe_mcasp_clkctrl = 0x4a004540,
99 .cm1_abe_mcbsp1_clkctrl = 0x4a004548, 99 .cm1_abe_mcbsp1_clkctrl = 0x4a004548,
100 .cm1_abe_mcbsp2_clkctrl = 0x4a004550, 100 .cm1_abe_mcbsp2_clkctrl = 0x4a004550,
101 .cm1_abe_mcbsp3_clkctrl = 0x4a004558, 101 .cm1_abe_mcbsp3_clkctrl = 0x4a004558,
102 .cm1_abe_slimbus_clkctrl = 0x4a004560, 102 .cm1_abe_slimbus_clkctrl = 0x4a004560,
103 .cm1_abe_timer5_clkctrl = 0x4a004568, 103 .cm1_abe_timer5_clkctrl = 0x4a004568,
104 .cm1_abe_timer6_clkctrl = 0x4a004570, 104 .cm1_abe_timer6_clkctrl = 0x4a004570,
105 .cm1_abe_timer7_clkctrl = 0x4a004578, 105 .cm1_abe_timer7_clkctrl = 0x4a004578,
106 .cm1_abe_timer8_clkctrl = 0x4a004580, 106 .cm1_abe_timer8_clkctrl = 0x4a004580,
107 .cm1_abe_wdt3_clkctrl = 0x4a004588, 107 .cm1_abe_wdt3_clkctrl = 0x4a004588,
108 108
109 /* cm2.ckgen */ 109 /* cm2.ckgen */
110 .cm_clksel_mpu_m3_iss_root = 0x4a008100, 110 .cm_clksel_mpu_m3_iss_root = 0x4a008100,
111 .cm_clksel_usb_60mhz = 0x4a008104, 111 .cm_clksel_usb_60mhz = 0x4a008104,
112 .cm_scale_fclk = 0x4a008108, 112 .cm_scale_fclk = 0x4a008108,
113 .cm_core_dvfs_perf1 = 0x4a008110, 113 .cm_core_dvfs_perf1 = 0x4a008110,
114 .cm_core_dvfs_perf2 = 0x4a008114, 114 .cm_core_dvfs_perf2 = 0x4a008114,
115 .cm_core_dvfs_perf3 = 0x4a008118, 115 .cm_core_dvfs_perf3 = 0x4a008118,
116 .cm_core_dvfs_perf4 = 0x4a00811c, 116 .cm_core_dvfs_perf4 = 0x4a00811c,
117 .cm_core_dvfs_current = 0x4a008124, 117 .cm_core_dvfs_current = 0x4a008124,
118 .cm_iva_dvfs_perf_tesla = 0x4a008128, 118 .cm_iva_dvfs_perf_tesla = 0x4a008128,
119 .cm_iva_dvfs_perf_ivahd = 0x4a00812c, 119 .cm_iva_dvfs_perf_ivahd = 0x4a00812c,
120 .cm_iva_dvfs_perf_abe = 0x4a008130, 120 .cm_iva_dvfs_perf_abe = 0x4a008130,
121 .cm_iva_dvfs_current = 0x4a008138, 121 .cm_iva_dvfs_current = 0x4a008138,
122 .cm_clkmode_dpll_per = 0x4a008140, 122 .cm_clkmode_dpll_per = 0x4a008140,
123 .cm_idlest_dpll_per = 0x4a008144, 123 .cm_idlest_dpll_per = 0x4a008144,
124 .cm_autoidle_dpll_per = 0x4a008148, 124 .cm_autoidle_dpll_per = 0x4a008148,
125 .cm_clksel_dpll_per = 0x4a00814c, 125 .cm_clksel_dpll_per = 0x4a00814c,
126 .cm_div_m2_dpll_per = 0x4a008150, 126 .cm_div_m2_dpll_per = 0x4a008150,
127 .cm_div_m3_dpll_per = 0x4a008154, 127 .cm_div_m3_dpll_per = 0x4a008154,
128 .cm_div_h11_dpll_per = 0x4a008158, 128 .cm_div_h11_dpll_per = 0x4a008158,
129 .cm_div_h12_dpll_per = 0x4a00815c, 129 .cm_div_h12_dpll_per = 0x4a00815c,
130 .cm_div_h14_dpll_per = 0x4a008164, 130 .cm_div_h14_dpll_per = 0x4a008164,
131 .cm_ssc_deltamstep_dpll_per = 0x4a008168, 131 .cm_ssc_deltamstep_dpll_per = 0x4a008168,
132 .cm_ssc_modfreqdiv_dpll_per = 0x4a00816c, 132 .cm_ssc_modfreqdiv_dpll_per = 0x4a00816c,
133 .cm_emu_override_dpll_per = 0x4a008170, 133 .cm_emu_override_dpll_per = 0x4a008170,
134 .cm_clkmode_dpll_usb = 0x4a008180, 134 .cm_clkmode_dpll_usb = 0x4a008180,
135 .cm_idlest_dpll_usb = 0x4a008184, 135 .cm_idlest_dpll_usb = 0x4a008184,
136 .cm_autoidle_dpll_usb = 0x4a008188, 136 .cm_autoidle_dpll_usb = 0x4a008188,
137 .cm_clksel_dpll_usb = 0x4a00818c, 137 .cm_clksel_dpll_usb = 0x4a00818c,
138 .cm_div_m2_dpll_usb = 0x4a008190, 138 .cm_div_m2_dpll_usb = 0x4a008190,
139 .cm_ssc_deltamstep_dpll_usb = 0x4a0081a8, 139 .cm_ssc_deltamstep_dpll_usb = 0x4a0081a8,
140 .cm_ssc_modfreqdiv_dpll_usb = 0x4a0081ac, 140 .cm_ssc_modfreqdiv_dpll_usb = 0x4a0081ac,
141 .cm_clkdcoldo_dpll_usb = 0x4a0081b4, 141 .cm_clkdcoldo_dpll_usb = 0x4a0081b4,
142 .cm_clkmode_dpll_unipro = 0x4a0081c0, 142 .cm_clkmode_dpll_unipro = 0x4a0081c0,
143 .cm_idlest_dpll_unipro = 0x4a0081c4, 143 .cm_idlest_dpll_unipro = 0x4a0081c4,
144 .cm_autoidle_dpll_unipro = 0x4a0081c8, 144 .cm_autoidle_dpll_unipro = 0x4a0081c8,
145 .cm_clksel_dpll_unipro = 0x4a0081cc, 145 .cm_clksel_dpll_unipro = 0x4a0081cc,
146 .cm_div_m2_dpll_unipro = 0x4a0081d0, 146 .cm_div_m2_dpll_unipro = 0x4a0081d0,
147 .cm_ssc_deltamstep_dpll_unipro = 0x4a0081e8, 147 .cm_ssc_deltamstep_dpll_unipro = 0x4a0081e8,
148 .cm_ssc_modfreqdiv_dpll_unipro = 0x4a0081ec, 148 .cm_ssc_modfreqdiv_dpll_unipro = 0x4a0081ec,
149 149
150 /* cm2.core */ 150 /* cm2.core */
151 .cm_coreaon_bandgap_clkctrl = 0x4a008648, 151 .cm_coreaon_bandgap_clkctrl = 0x4a008648,
152 .cm_coreaon_io_srcomp_clkctrl = 0x4a008650, 152 .cm_coreaon_io_srcomp_clkctrl = 0x4a008650,
153 .cm_l3_1_clkstctrl = 0x4a008700, 153 .cm_l3_1_clkstctrl = 0x4a008700,
154 .cm_l3_1_dynamicdep = 0x4a008708, 154 .cm_l3_1_dynamicdep = 0x4a008708,
155 .cm_l3_1_l3_1_clkctrl = 0x4a008720, 155 .cm_l3_1_l3_1_clkctrl = 0x4a008720,
156 .cm_l3_2_clkstctrl = 0x4a008800, 156 .cm_l3_2_clkstctrl = 0x4a008800,
157 .cm_l3_2_dynamicdep = 0x4a008808, 157 .cm_l3_2_dynamicdep = 0x4a008808,
158 .cm_l3_2_l3_2_clkctrl = 0x4a008820, 158 .cm_l3_2_l3_2_clkctrl = 0x4a008820,
159 .cm_l3_gpmc_clkctrl = 0x4a008828, 159 .cm_l3_gpmc_clkctrl = 0x4a008828,
160 .cm_l3_2_ocmc_ram_clkctrl = 0x4a008830, 160 .cm_l3_2_ocmc_ram_clkctrl = 0x4a008830,
161 .cm_mpu_m3_clkstctrl = 0x4a008900, 161 .cm_mpu_m3_clkstctrl = 0x4a008900,
162 .cm_mpu_m3_staticdep = 0x4a008904, 162 .cm_mpu_m3_staticdep = 0x4a008904,
163 .cm_mpu_m3_dynamicdep = 0x4a008908, 163 .cm_mpu_m3_dynamicdep = 0x4a008908,
164 .cm_mpu_m3_mpu_m3_clkctrl = 0x4a008920, 164 .cm_mpu_m3_mpu_m3_clkctrl = 0x4a008920,
165 .cm_sdma_clkstctrl = 0x4a008a00, 165 .cm_sdma_clkstctrl = 0x4a008a00,
166 .cm_sdma_staticdep = 0x4a008a04, 166 .cm_sdma_staticdep = 0x4a008a04,
167 .cm_sdma_dynamicdep = 0x4a008a08, 167 .cm_sdma_dynamicdep = 0x4a008a08,
168 .cm_sdma_sdma_clkctrl = 0x4a008a20, 168 .cm_sdma_sdma_clkctrl = 0x4a008a20,
169 .cm_memif_clkstctrl = 0x4a008b00, 169 .cm_memif_clkstctrl = 0x4a008b00,
170 .cm_memif_dmm_clkctrl = 0x4a008b20, 170 .cm_memif_dmm_clkctrl = 0x4a008b20,
171 .cm_memif_emif_fw_clkctrl = 0x4a008b28, 171 .cm_memif_emif_fw_clkctrl = 0x4a008b28,
172 .cm_memif_emif_1_clkctrl = 0x4a008b30, 172 .cm_memif_emif_1_clkctrl = 0x4a008b30,
173 .cm_memif_emif_2_clkctrl = 0x4a008b38, 173 .cm_memif_emif_2_clkctrl = 0x4a008b38,
174 .cm_memif_dll_clkctrl = 0x4a008b40, 174 .cm_memif_dll_clkctrl = 0x4a008b40,
175 .cm_memif_emif_h1_clkctrl = 0x4a008b50, 175 .cm_memif_emif_h1_clkctrl = 0x4a008b50,
176 .cm_memif_emif_h2_clkctrl = 0x4a008b58, 176 .cm_memif_emif_h2_clkctrl = 0x4a008b58,
177 .cm_memif_dll_h_clkctrl = 0x4a008b60, 177 .cm_memif_dll_h_clkctrl = 0x4a008b60,
178 .cm_c2c_clkstctrl = 0x4a008c00, 178 .cm_c2c_clkstctrl = 0x4a008c00,
179 .cm_c2c_staticdep = 0x4a008c04, 179 .cm_c2c_staticdep = 0x4a008c04,
180 .cm_c2c_dynamicdep = 0x4a008c08, 180 .cm_c2c_dynamicdep = 0x4a008c08,
181 .cm_c2c_sad2d_clkctrl = 0x4a008c20, 181 .cm_c2c_sad2d_clkctrl = 0x4a008c20,
182 .cm_c2c_modem_icr_clkctrl = 0x4a008c28, 182 .cm_c2c_modem_icr_clkctrl = 0x4a008c28,
183 .cm_c2c_sad2d_fw_clkctrl = 0x4a008c30, 183 .cm_c2c_sad2d_fw_clkctrl = 0x4a008c30,
184 .cm_l4cfg_clkstctrl = 0x4a008d00, 184 .cm_l4cfg_clkstctrl = 0x4a008d00,
185 .cm_l4cfg_dynamicdep = 0x4a008d08, 185 .cm_l4cfg_dynamicdep = 0x4a008d08,
186 .cm_l4cfg_l4_cfg_clkctrl = 0x4a008d20, 186 .cm_l4cfg_l4_cfg_clkctrl = 0x4a008d20,
187 .cm_l4cfg_hw_sem_clkctrl = 0x4a008d28, 187 .cm_l4cfg_hw_sem_clkctrl = 0x4a008d28,
188 .cm_l4cfg_mailbox_clkctrl = 0x4a008d30, 188 .cm_l4cfg_mailbox_clkctrl = 0x4a008d30,
189 .cm_l4cfg_sar_rom_clkctrl = 0x4a008d38, 189 .cm_l4cfg_sar_rom_clkctrl = 0x4a008d38,
190 .cm_l3instr_clkstctrl = 0x4a008e00, 190 .cm_l3instr_clkstctrl = 0x4a008e00,
191 .cm_l3instr_l3_3_clkctrl = 0x4a008e20, 191 .cm_l3instr_l3_3_clkctrl = 0x4a008e20,
192 .cm_l3instr_l3_instr_clkctrl = 0x4a008e28, 192 .cm_l3instr_l3_instr_clkctrl = 0x4a008e28,
193 .cm_l3instr_intrconn_wp1_clkctrl = 0x4a008e40, 193 .cm_l3instr_intrconn_wp1_clkctrl = 0x4a008e40,
194 194
195 /* cm2.ivahd */ 195 /* cm2.ivahd */
196 .cm_ivahd_clkstctrl = 0x4a008f00, 196 .cm_ivahd_clkstctrl = 0x4a008f00,
197 .cm_ivahd_ivahd_clkctrl = 0x4a008f20, 197 .cm_ivahd_ivahd_clkctrl = 0x4a008f20,
198 .cm_ivahd_sl2_clkctrl = 0x4a008f28, 198 .cm_ivahd_sl2_clkctrl = 0x4a008f28,
199 199
200 /* cm2.cam */ 200 /* cm2.cam */
201 .cm_cam_clkstctrl = 0x4a009000, 201 .cm_cam_clkstctrl = 0x4a009000,
202 .cm_cam_iss_clkctrl = 0x4a009020, 202 .cm_cam_iss_clkctrl = 0x4a009020,
203 .cm_cam_fdif_clkctrl = 0x4a009028, 203 .cm_cam_fdif_clkctrl = 0x4a009028,
204 204
205 /* cm2.dss */ 205 /* cm2.dss */
206 .cm_dss_clkstctrl = 0x4a009100, 206 .cm_dss_clkstctrl = 0x4a009100,
207 .cm_dss_dss_clkctrl = 0x4a009120, 207 .cm_dss_dss_clkctrl = 0x4a009120,
208 208
209 /* cm2.sgx */ 209 /* cm2.sgx */
210 .cm_sgx_clkstctrl = 0x4a009200, 210 .cm_sgx_clkstctrl = 0x4a009200,
211 .cm_sgx_sgx_clkctrl = 0x4a009220, 211 .cm_sgx_sgx_clkctrl = 0x4a009220,
212 212
213 /* cm2.l3init */ 213 /* cm2.l3init */
214 .cm_l3init_clkstctrl = 0x4a009300, 214 .cm_l3init_clkstctrl = 0x4a009300,
215 .cm_l3init_hsmmc1_clkctrl = 0x4a009328, 215 .cm_l3init_hsmmc1_clkctrl = 0x4a009328,
216 .cm_l3init_hsmmc2_clkctrl = 0x4a009330, 216 .cm_l3init_hsmmc2_clkctrl = 0x4a009330,
217 .cm_l3init_hsi_clkctrl = 0x4a009338, 217 .cm_l3init_hsi_clkctrl = 0x4a009338,
218 .cm_l3init_hsusbhost_clkctrl = 0x4a009358, 218 .cm_l3init_hsusbhost_clkctrl = 0x4a009358,
219 .cm_l3init_hsusbotg_clkctrl = 0x4a009360, 219 .cm_l3init_hsusbotg_clkctrl = 0x4a009360,
220 .cm_l3init_hsusbtll_clkctrl = 0x4a009368, 220 .cm_l3init_hsusbtll_clkctrl = 0x4a009368,
221 .cm_l3init_p1500_clkctrl = 0x4a009378, 221 .cm_l3init_p1500_clkctrl = 0x4a009378,
222 .cm_l3init_fsusb_clkctrl = 0x4a0093d0, 222 .cm_l3init_fsusb_clkctrl = 0x4a0093d0,
223 .cm_l3init_ocp2scp1_clkctrl = 0x4a0093e0, 223 .cm_l3init_ocp2scp1_clkctrl = 0x4a0093e0,
224 224
225 /* cm2.l4per */ 225 /* cm2.l4per */
226 .cm_l4per_clkstctrl = 0x4a009400, 226 .cm_l4per_clkstctrl = 0x4a009400,
227 .cm_l4per_dynamicdep = 0x4a009408, 227 .cm_l4per_dynamicdep = 0x4a009408,
228 .cm_l4per_adc_clkctrl = 0x4a009420, 228 .cm_l4per_adc_clkctrl = 0x4a009420,
229 .cm_l4per_gptimer10_clkctrl = 0x4a009428, 229 .cm_l4per_gptimer10_clkctrl = 0x4a009428,
230 .cm_l4per_gptimer11_clkctrl = 0x4a009430, 230 .cm_l4per_gptimer11_clkctrl = 0x4a009430,
231 .cm_l4per_gptimer2_clkctrl = 0x4a009438, 231 .cm_l4per_gptimer2_clkctrl = 0x4a009438,
232 .cm_l4per_gptimer3_clkctrl = 0x4a009440, 232 .cm_l4per_gptimer3_clkctrl = 0x4a009440,
233 .cm_l4per_gptimer4_clkctrl = 0x4a009448, 233 .cm_l4per_gptimer4_clkctrl = 0x4a009448,
234 .cm_l4per_gptimer9_clkctrl = 0x4a009450, 234 .cm_l4per_gptimer9_clkctrl = 0x4a009450,
235 .cm_l4per_elm_clkctrl = 0x4a009458, 235 .cm_l4per_elm_clkctrl = 0x4a009458,
236 .cm_l4per_gpio2_clkctrl = 0x4a009460, 236 .cm_l4per_gpio2_clkctrl = 0x4a009460,
237 .cm_l4per_gpio3_clkctrl = 0x4a009468, 237 .cm_l4per_gpio3_clkctrl = 0x4a009468,
238 .cm_l4per_gpio4_clkctrl = 0x4a009470, 238 .cm_l4per_gpio4_clkctrl = 0x4a009470,
239 .cm_l4per_gpio5_clkctrl = 0x4a009478, 239 .cm_l4per_gpio5_clkctrl = 0x4a009478,
240 .cm_l4per_gpio6_clkctrl = 0x4a009480, 240 .cm_l4per_gpio6_clkctrl = 0x4a009480,
241 .cm_l4per_hdq1w_clkctrl = 0x4a009488, 241 .cm_l4per_hdq1w_clkctrl = 0x4a009488,
242 .cm_l4per_hecc1_clkctrl = 0x4a009490, 242 .cm_l4per_hecc1_clkctrl = 0x4a009490,
243 .cm_l4per_hecc2_clkctrl = 0x4a009498, 243 .cm_l4per_hecc2_clkctrl = 0x4a009498,
244 .cm_l4per_i2c1_clkctrl = 0x4a0094a0, 244 .cm_l4per_i2c1_clkctrl = 0x4a0094a0,
245 .cm_l4per_i2c2_clkctrl = 0x4a0094a8, 245 .cm_l4per_i2c2_clkctrl = 0x4a0094a8,
246 .cm_l4per_i2c3_clkctrl = 0x4a0094b0, 246 .cm_l4per_i2c3_clkctrl = 0x4a0094b0,
247 .cm_l4per_i2c4_clkctrl = 0x4a0094b8, 247 .cm_l4per_i2c4_clkctrl = 0x4a0094b8,
248 .cm_l4per_l4per_clkctrl = 0x4a0094c0, 248 .cm_l4per_l4per_clkctrl = 0x4a0094c0,
249 .cm_l4per_mcasp2_clkctrl = 0x4a0094d0, 249 .cm_l4per_mcasp2_clkctrl = 0x4a0094d0,
250 .cm_l4per_mcasp3_clkctrl = 0x4a0094d8, 250 .cm_l4per_mcasp3_clkctrl = 0x4a0094d8,
251 .cm_l4per_mgate_clkctrl = 0x4a0094e8, 251 .cm_l4per_mgate_clkctrl = 0x4a0094e8,
252 .cm_l4per_mcspi1_clkctrl = 0x4a0094f0, 252 .cm_l4per_mcspi1_clkctrl = 0x4a0094f0,
253 .cm_l4per_mcspi2_clkctrl = 0x4a0094f8, 253 .cm_l4per_mcspi2_clkctrl = 0x4a0094f8,
254 .cm_l4per_mcspi3_clkctrl = 0x4a009500, 254 .cm_l4per_mcspi3_clkctrl = 0x4a009500,
255 .cm_l4per_mcspi4_clkctrl = 0x4a009508, 255 .cm_l4per_mcspi4_clkctrl = 0x4a009508,
256 .cm_l4per_gpio7_clkctrl = 0x4a009510, 256 .cm_l4per_gpio7_clkctrl = 0x4a009510,
257 .cm_l4per_gpio8_clkctrl = 0x4a009518, 257 .cm_l4per_gpio8_clkctrl = 0x4a009518,
258 .cm_l4per_mmcsd3_clkctrl = 0x4a009520, 258 .cm_l4per_mmcsd3_clkctrl = 0x4a009520,
259 .cm_l4per_mmcsd4_clkctrl = 0x4a009528, 259 .cm_l4per_mmcsd4_clkctrl = 0x4a009528,
260 .cm_l4per_msprohg_clkctrl = 0x4a009530, 260 .cm_l4per_msprohg_clkctrl = 0x4a009530,
261 .cm_l4per_slimbus2_clkctrl = 0x4a009538, 261 .cm_l4per_slimbus2_clkctrl = 0x4a009538,
262 .cm_l4per_uart1_clkctrl = 0x4a009540, 262 .cm_l4per_uart1_clkctrl = 0x4a009540,
263 .cm_l4per_uart2_clkctrl = 0x4a009548, 263 .cm_l4per_uart2_clkctrl = 0x4a009548,
264 .cm_l4per_uart3_clkctrl = 0x4a009550, 264 .cm_l4per_uart3_clkctrl = 0x4a009550,
265 .cm_l4per_uart4_clkctrl = 0x4a009558, 265 .cm_l4per_uart4_clkctrl = 0x4a009558,
266 .cm_l4per_mmcsd5_clkctrl = 0x4a009560, 266 .cm_l4per_mmcsd5_clkctrl = 0x4a009560,
267 .cm_l4per_i2c5_clkctrl = 0x4a009568, 267 .cm_l4per_i2c5_clkctrl = 0x4a009568,
268 .cm_l4per_uart5_clkctrl = 0x4a009570, 268 .cm_l4per_uart5_clkctrl = 0x4a009570,
269 .cm_l4per_uart6_clkctrl = 0x4a009578, 269 .cm_l4per_uart6_clkctrl = 0x4a009578,
270 .cm_l4sec_clkstctrl = 0x4a009580, 270 .cm_l4sec_clkstctrl = 0x4a009580,
271 .cm_l4sec_staticdep = 0x4a009584, 271 .cm_l4sec_staticdep = 0x4a009584,
272 .cm_l4sec_dynamicdep = 0x4a009588, 272 .cm_l4sec_dynamicdep = 0x4a009588,
273 .cm_l4sec_aes1_clkctrl = 0x4a0095a0, 273 .cm_l4sec_aes1_clkctrl = 0x4a0095a0,
274 .cm_l4sec_aes2_clkctrl = 0x4a0095a8, 274 .cm_l4sec_aes2_clkctrl = 0x4a0095a8,
275 .cm_l4sec_des3des_clkctrl = 0x4a0095b0, 275 .cm_l4sec_des3des_clkctrl = 0x4a0095b0,
276 .cm_l4sec_pkaeip29_clkctrl = 0x4a0095b8, 276 .cm_l4sec_pkaeip29_clkctrl = 0x4a0095b8,
277 .cm_l4sec_rng_clkctrl = 0x4a0095c0, 277 .cm_l4sec_rng_clkctrl = 0x4a0095c0,
278 .cm_l4sec_sha2md51_clkctrl = 0x4a0095c8, 278 .cm_l4sec_sha2md51_clkctrl = 0x4a0095c8,
279 .cm_l4sec_cryptodma_clkctrl = 0x4a0095d8, 279 .cm_l4sec_cryptodma_clkctrl = 0x4a0095d8,
280 280
281 /* l4 wkup regs */ 281 /* l4 wkup regs */
282 .cm_abe_pll_ref_clksel = 0x4ae0610c, 282 .cm_abe_pll_ref_clksel = 0x4ae0610c,
283 .cm_sys_clksel = 0x4ae06110, 283 .cm_sys_clksel = 0x4ae06110,
284 .cm_wkup_clkstctrl = 0x4ae07800, 284 .cm_wkup_clkstctrl = 0x4ae07800,
285 .cm_wkup_l4wkup_clkctrl = 0x4ae07820, 285 .cm_wkup_l4wkup_clkctrl = 0x4ae07820,
286 .cm_wkup_wdtimer1_clkctrl = 0x4ae07828, 286 .cm_wkup_wdtimer1_clkctrl = 0x4ae07828,
287 .cm_wkup_wdtimer2_clkctrl = 0x4ae07830, 287 .cm_wkup_wdtimer2_clkctrl = 0x4ae07830,
288 .cm_wkup_gpio1_clkctrl = 0x4ae07838, 288 .cm_wkup_gpio1_clkctrl = 0x4ae07838,
289 .cm_wkup_gptimer1_clkctrl = 0x4ae07840, 289 .cm_wkup_gptimer1_clkctrl = 0x4ae07840,
290 .cm_wkup_gptimer12_clkctrl = 0x4ae07848, 290 .cm_wkup_gptimer12_clkctrl = 0x4ae07848,
291 .cm_wkup_synctimer_clkctrl = 0x4ae07850, 291 .cm_wkup_synctimer_clkctrl = 0x4ae07850,
292 .cm_wkup_usim_clkctrl = 0x4ae07858, 292 .cm_wkup_usim_clkctrl = 0x4ae07858,
293 .cm_wkup_sarram_clkctrl = 0x4ae07860, 293 .cm_wkup_sarram_clkctrl = 0x4ae07860,
294 .cm_wkup_keyboard_clkctrl = 0x4ae07878, 294 .cm_wkup_keyboard_clkctrl = 0x4ae07878,
295 .cm_wkup_rtc_clkctrl = 0x4ae07880, 295 .cm_wkup_rtc_clkctrl = 0x4ae07880,
296 .cm_wkup_bandgap_clkctrl = 0x4ae07888, 296 .cm_wkup_bandgap_clkctrl = 0x4ae07888,
297 .cm_wkupaon_scrm_clkctrl = 0x4ae07890, 297 .cm_wkupaon_scrm_clkctrl = 0x4ae07890,
298 .cm_wkupaon_io_srcomp_clkctrl = 0x4ae07898, 298 .cm_wkupaon_io_srcomp_clkctrl = 0x4ae07898,
299 .prm_rstctrl = 0x4ae07b00, 299 .prm_rstctrl = 0x4ae07b00,
300 .prm_rstst = 0x4ae07b04, 300 .prm_rstst = 0x4ae07b04,
301 .prm_vc_val_bypass = 0x4ae07ba0, 301 .prm_vc_val_bypass = 0x4ae07ba0,
302 .prm_vc_cfg_i2c_mode = 0x4ae07bb4, 302 .prm_vc_cfg_i2c_mode = 0x4ae07bb4,
303 .prm_vc_cfg_i2c_clk = 0x4ae07bb8, 303 .prm_vc_cfg_i2c_clk = 0x4ae07bb8,
304 .prm_sldo_core_setup = 0x4ae07bc4, 304 .prm_sldo_core_setup = 0x4ae07bc4,
305 .prm_sldo_core_ctrl = 0x4ae07bc8, 305 .prm_sldo_core_ctrl = 0x4ae07bc8,
306 .prm_sldo_mpu_setup = 0x4ae07bcc, 306 .prm_sldo_mpu_setup = 0x4ae07bcc,
307 .prm_sldo_mpu_ctrl = 0x4ae07bd0, 307 .prm_sldo_mpu_ctrl = 0x4ae07bd0,
308 .prm_sldo_mm_setup = 0x4ae07bd4, 308 .prm_sldo_mm_setup = 0x4ae07bd4,
309 .prm_sldo_mm_ctrl = 0x4ae07bd8, 309 .prm_sldo_mm_ctrl = 0x4ae07bd8,
310 }; 310 };
311 311
312 struct omap_sys_ctrl_regs const omap5_ctrl = { 312 struct omap_sys_ctrl_regs const omap5_ctrl = {
313 .control_status = 0x4A002134, 313 .control_status = 0x4A002134,
314 .control_paconf_global = 0x4A002DA0, 314 .control_paconf_global = 0x4A002DA0,
315 .control_paconf_mode = 0x4A002DA4, 315 .control_paconf_mode = 0x4A002DA4,
316 .control_smart1io_padconf_0 = 0x4A002DA8, 316 .control_smart1io_padconf_0 = 0x4A002DA8,
317 .control_smart1io_padconf_1 = 0x4A002DAC, 317 .control_smart1io_padconf_1 = 0x4A002DAC,
318 .control_smart1io_padconf_2 = 0x4A002DB0, 318 .control_smart1io_padconf_2 = 0x4A002DB0,
319 .control_smart2io_padconf_0 = 0x4A002DB4, 319 .control_smart2io_padconf_0 = 0x4A002DB4,
320 .control_smart2io_padconf_1 = 0x4A002DB8, 320 .control_smart2io_padconf_1 = 0x4A002DB8,
321 .control_smart2io_padconf_2 = 0x4A002DBC, 321 .control_smart2io_padconf_2 = 0x4A002DBC,
322 .control_smart3io_padconf_0 = 0x4A002DC0, 322 .control_smart3io_padconf_0 = 0x4A002DC0,
323 .control_smart3io_padconf_1 = 0x4A002DC4, 323 .control_smart3io_padconf_1 = 0x4A002DC4,
324 .control_pbias = 0x4A002E00, 324 .control_pbias = 0x4A002E00,
325 .control_i2c_0 = 0x4A002E04, 325 .control_i2c_0 = 0x4A002E04,
326 .control_camera_rx = 0x4A002E08, 326 .control_camera_rx = 0x4A002E08,
327 .control_hdmi_tx_phy = 0x4A002E0C, 327 .control_hdmi_tx_phy = 0x4A002E0C,
328 .control_uniportm = 0x4A002E10, 328 .control_uniportm = 0x4A002E10,
329 .control_dsiphy = 0x4A002E14, 329 .control_dsiphy = 0x4A002E14,
330 .control_mcbsplp = 0x4A002E18, 330 .control_mcbsplp = 0x4A002E18,
331 .control_usb2phycore = 0x4A002E1C, 331 .control_usb2phycore = 0x4A002E1C,
332 .control_hdmi_1 = 0x4A002E20, 332 .control_hdmi_1 = 0x4A002E20,
333 .control_hsi = 0x4A002E24, 333 .control_hsi = 0x4A002E24,
334 .control_ddr3ch1_0 = 0x4A002E30, 334 .control_ddr3ch1_0 = 0x4A002E30,
335 .control_ddr3ch2_0 = 0x4A002E34, 335 .control_ddr3ch2_0 = 0x4A002E34,
336 .control_ddrch1_0 = 0x4A002E38, 336 .control_ddrch1_0 = 0x4A002E38,
337 .control_ddrch1_1 = 0x4A002E3C, 337 .control_ddrch1_1 = 0x4A002E3C,
338 .control_ddrch2_0 = 0x4A002E40, 338 .control_ddrch2_0 = 0x4A002E40,
339 .control_ddrch2_1 = 0x4A002E44, 339 .control_ddrch2_1 = 0x4A002E44,
340 .control_lpddr2ch1_0 = 0x4A002E48, 340 .control_lpddr2ch1_0 = 0x4A002E48,
341 .control_lpddr2ch1_1 = 0x4A002E4C, 341 .control_lpddr2ch1_1 = 0x4A002E4C,
342 .control_ddrio_0 = 0x4A002E50, 342 .control_ddrio_0 = 0x4A002E50,
343 .control_ddrio_1 = 0x4A002E54, 343 .control_ddrio_1 = 0x4A002E54,
344 .control_ddrio_2 = 0x4A002E58, 344 .control_ddrio_2 = 0x4A002E58,
345 .control_hyst_1 = 0x4A002E5C, 345 .control_hyst_1 = 0x4A002E5C,
346 .control_usbb_hsic_control = 0x4A002E60, 346 .control_usbb_hsic_control = 0x4A002E60,
347 .control_c2c = 0x4A002E64, 347 .control_c2c = 0x4A002E64,
348 .control_core_control_spare_rw = 0x4A002E68, 348 .control_core_control_spare_rw = 0x4A002E68,
349 .control_core_control_spare_r = 0x4A002E6C, 349 .control_core_control_spare_r = 0x4A002E6C,
350 .control_core_control_spare_r_c0 = 0x4A002E70, 350 .control_core_control_spare_r_c0 = 0x4A002E70,
351 .control_srcomp_north_side = 0x4A002E74, 351 .control_srcomp_north_side = 0x4A002E74,
352 .control_srcomp_south_side = 0x4A002E78, 352 .control_srcomp_south_side = 0x4A002E78,
353 .control_srcomp_east_side = 0x4A002E7C, 353 .control_srcomp_east_side = 0x4A002E7C,
354 .control_srcomp_west_side = 0x4A002E80, 354 .control_srcomp_west_side = 0x4A002E80,
355 .control_srcomp_code_latch = 0x4A002E84, 355 .control_srcomp_code_latch = 0x4A002E84,
356 .control_port_emif1_sdram_config = 0x4AE0C110, 356 .control_port_emif1_sdram_config = 0x4AE0C110,
357 .control_port_emif1_lpddr2_nvm_config = 0x4AE0C114, 357 .control_port_emif1_lpddr2_nvm_config = 0x4AE0C114,
358 .control_port_emif2_sdram_config = 0x4AE0C118, 358 .control_port_emif2_sdram_config = 0x4AE0C118,
359 .control_emif1_sdram_config_ext = 0x4AE0C144, 359 .control_emif1_sdram_config_ext = 0x4AE0C144,
360 .control_emif2_sdram_config_ext = 0x4AE0C148, 360 .control_emif2_sdram_config_ext = 0x4AE0C148,
361 .control_smart1nopmio_padconf_0 = 0x4AE0CDA0, 361 .control_smart1nopmio_padconf_0 = 0x4AE0CDA0,
362 .control_smart1nopmio_padconf_1 = 0x4AE0CDA4, 362 .control_smart1nopmio_padconf_1 = 0x4AE0CDA4,
363 .control_padconf_mode = 0x4AE0CDA8, 363 .control_padconf_mode = 0x4AE0CDA8,
364 .control_xtal_oscillator = 0x4AE0CDAC, 364 .control_xtal_oscillator = 0x4AE0CDAC,
365 .control_i2c_2 = 0x4AE0CDB0, 365 .control_i2c_2 = 0x4AE0CDB0,
366 .control_ckobuffer = 0x4AE0CDB4, 366 .control_ckobuffer = 0x4AE0CDB4,
367 .control_wkup_control_spare_rw = 0x4AE0CDB8, 367 .control_wkup_control_spare_rw = 0x4AE0CDB8,
368 .control_wkup_control_spare_r = 0x4AE0CDBC, 368 .control_wkup_control_spare_r = 0x4AE0CDBC,
369 .control_wkup_control_spare_r_c0 = 0x4AE0CDC0, 369 .control_wkup_control_spare_r_c0 = 0x4AE0CDC0,
370 .control_srcomp_east_side_wkup = 0x4AE0CDC4, 370 .control_srcomp_east_side_wkup = 0x4AE0CDC4,
371 .control_efuse_1 = 0x4AE0CDC8, 371 .control_efuse_1 = 0x4AE0CDC8,
372 .control_efuse_2 = 0x4AE0CDCC, 372 .control_efuse_2 = 0x4AE0CDCC,
373 .control_efuse_3 = 0x4AE0CDD0, 373 .control_efuse_3 = 0x4AE0CDD0,
374 .control_efuse_4 = 0x4AE0CDD4, 374 .control_efuse_4 = 0x4AE0CDD4,
375 .control_efuse_5 = 0x4AE0CDD8, 375 .control_efuse_5 = 0x4AE0CDD8,
376 .control_efuse_6 = 0x4AE0CDDC, 376 .control_efuse_6 = 0x4AE0CDDC,
377 .control_efuse_7 = 0x4AE0CDE0, 377 .control_efuse_7 = 0x4AE0CDE0,
378 .control_efuse_8 = 0x4AE0CDE4, 378 .control_efuse_8 = 0x4AE0CDE4,
379 .control_efuse_9 = 0x4AE0CDE8, 379 .control_efuse_9 = 0x4AE0CDE8,
380 .control_efuse_10 = 0x4AE0CDEC, 380 .control_efuse_10 = 0x4AE0CDEC,
381 .control_efuse_11 = 0x4AE0CDF0, 381 .control_efuse_11 = 0x4AE0CDF0,
382 .control_efuse_12 = 0x4AE0CDF4, 382 .control_efuse_12 = 0x4AE0CDF4,
383 .control_efuse_13 = 0x4AE0CDF8, 383 .control_efuse_13 = 0x4AE0CDF8,
384 }; 384 };
385 385
386 struct omap_sys_ctrl_regs const dra7xx_ctrl = { 386 struct omap_sys_ctrl_regs const dra7xx_ctrl = {
387 .control_status = 0x4A002134, 387 .control_status = 0x4A002134,
388 .control_core_mmr_lock1 = 0x4A002540, 388 .control_core_mmr_lock1 = 0x4A002540,
389 .control_core_mmr_lock2 = 0x4A002544, 389 .control_core_mmr_lock2 = 0x4A002544,
390 .control_core_mmr_lock3 = 0x4A002548, 390 .control_core_mmr_lock3 = 0x4A002548,
391 .control_core_mmr_lock4 = 0x4A00254C, 391 .control_core_mmr_lock4 = 0x4A00254C,
392 .control_core_mmr_lock5 = 0x4A002550, 392 .control_core_mmr_lock5 = 0x4A002550,
393 .control_core_control_io1 = 0x4A002554, 393 .control_core_control_io1 = 0x4A002554,
394 .control_core_control_io2 = 0x4A002558, 394 .control_core_control_io2 = 0x4A002558,
395 .control_paconf_global = 0x4A002DA0, 395 .control_paconf_global = 0x4A002DA0,
396 .control_paconf_mode = 0x4A002DA4, 396 .control_paconf_mode = 0x4A002DA4,
397 .control_smart1io_padconf_0 = 0x4A002DA8, 397 .control_smart1io_padconf_0 = 0x4A002DA8,
398 .control_smart1io_padconf_1 = 0x4A002DAC, 398 .control_smart1io_padconf_1 = 0x4A002DAC,
399 .control_smart1io_padconf_2 = 0x4A002DB0, 399 .control_smart1io_padconf_2 = 0x4A002DB0,
400 .control_smart2io_padconf_0 = 0x4A002DB4, 400 .control_smart2io_padconf_0 = 0x4A002DB4,
401 .control_smart2io_padconf_1 = 0x4A002DB8, 401 .control_smart2io_padconf_1 = 0x4A002DB8,
402 .control_smart2io_padconf_2 = 0x4A002DBC, 402 .control_smart2io_padconf_2 = 0x4A002DBC,
403 .control_smart3io_padconf_0 = 0x4A002DC0, 403 .control_smart3io_padconf_0 = 0x4A002DC0,
404 .control_smart3io_padconf_1 = 0x4A002DC4, 404 .control_smart3io_padconf_1 = 0x4A002DC4,
405 .control_pbias = 0x4A002E00, 405 .control_pbias = 0x4A002E00,
406 .control_i2c_0 = 0x4A002E04, 406 .control_i2c_0 = 0x4A002E04,
407 .control_camera_rx = 0x4A002E08, 407 .control_camera_rx = 0x4A002E08,
408 .control_hdmi_tx_phy = 0x4A002E0C, 408 .control_hdmi_tx_phy = 0x4A002E0C,
409 .control_uniportm = 0x4A002E10, 409 .control_uniportm = 0x4A002E10,
410 .control_dsiphy = 0x4A002E14, 410 .control_dsiphy = 0x4A002E14,
411 .control_mcbsplp = 0x4A002E18, 411 .control_mcbsplp = 0x4A002E18,
412 .control_usb2phycore = 0x4A002E1C, 412 .control_usb2phycore = 0x4A002E1C,
413 .control_hdmi_1 = 0x4A002E20, 413 .control_hdmi_1 = 0x4A002E20,
414 .control_hsi = 0x4A002E24, 414 .control_hsi = 0x4A002E24,
415 .control_ddr3ch1_0 = 0x4A002E30, 415 .control_ddr3ch1_0 = 0x4A002E30,
416 .control_ddr3ch2_0 = 0x4A002E34, 416 .control_ddr3ch2_0 = 0x4A002E34,
417 .control_ddrch1_0 = 0x4A002E38, 417 .control_ddrch1_0 = 0x4A002E38,
418 .control_ddrch1_1 = 0x4A002E3C, 418 .control_ddrch1_1 = 0x4A002E3C,
419 .control_ddrch2_0 = 0x4A002E40, 419 .control_ddrch2_0 = 0x4A002E40,
420 .control_ddrch2_1 = 0x4A002E44, 420 .control_ddrch2_1 = 0x4A002E44,
421 .control_lpddr2ch1_0 = 0x4A002E48, 421 .control_lpddr2ch1_0 = 0x4A002E48,
422 .control_lpddr2ch1_1 = 0x4A002E4C, 422 .control_lpddr2ch1_1 = 0x4A002E4C,
423 .control_ddrio_0 = 0x4A002E50, 423 .control_ddrio_0 = 0x4A002E50,
424 .control_ddrio_1 = 0x4A002E54, 424 .control_ddrio_1 = 0x4A002E54,
425 .control_ddrio_2 = 0x4A002E58, 425 .control_ddrio_2 = 0x4A002E58,
426 .control_hyst_1 = 0x4A002E5C, 426 .control_hyst_1 = 0x4A002E5C,
427 .control_usbb_hsic_control = 0x4A002E60, 427 .control_usbb_hsic_control = 0x4A002E60,
428 .control_c2c = 0x4A002E64, 428 .control_c2c = 0x4A002E64,
429 .control_core_control_spare_rw = 0x4A002E68, 429 .control_core_control_spare_rw = 0x4A002E68,
430 .control_core_control_spare_r = 0x4A002E6C, 430 .control_core_control_spare_r = 0x4A002E6C,
431 .control_core_control_spare_r_c0 = 0x4A002E70, 431 .control_core_control_spare_r_c0 = 0x4A002E70,
432 .control_srcomp_north_side = 0x4A002E74, 432 .control_srcomp_north_side = 0x4A002E74,
433 .control_srcomp_south_side = 0x4A002E78, 433 .control_srcomp_south_side = 0x4A002E78,
434 .control_srcomp_east_side = 0x4A002E7C, 434 .control_srcomp_east_side = 0x4A002E7C,
435 .control_srcomp_west_side = 0x4A002E80, 435 .control_srcomp_west_side = 0x4A002E80,
436 .control_srcomp_code_latch = 0x4A002E84, 436 .control_srcomp_code_latch = 0x4A002E84,
437 .control_padconf_core_base = 0x4A003400, 437 .control_padconf_core_base = 0x4A003400,
438 .control_port_emif1_sdram_config = 0x4AE0C110, 438 .control_port_emif1_sdram_config = 0x4AE0C110,
439 .control_port_emif1_lpddr2_nvm_config = 0x4AE0C114, 439 .control_port_emif1_lpddr2_nvm_config = 0x4AE0C114,
440 .control_port_emif2_sdram_config = 0x4AE0C118, 440 .control_port_emif2_sdram_config = 0x4AE0C118,
441 .control_emif1_sdram_config_ext = 0x4AE0C144, 441 .control_emif1_sdram_config_ext = 0x4AE0C144,
442 .control_emif2_sdram_config_ext = 0x4AE0C148, 442 .control_emif2_sdram_config_ext = 0x4AE0C148,
443 .control_padconf_mode = 0x4AE0C5A0, 443 .control_padconf_mode = 0x4AE0C5A0,
444 .control_xtal_oscillator = 0x4AE0C5A4, 444 .control_xtal_oscillator = 0x4AE0C5A4,
445 .control_i2c_2 = 0x4AE0C5A8, 445 .control_i2c_2 = 0x4AE0C5A8,
446 .control_ckobuffer = 0x4AE0C5AC, 446 .control_ckobuffer = 0x4AE0C5AC,
447 .control_wkup_control_spare_rw = 0x4AE0C5B0, 447 .control_wkup_control_spare_rw = 0x4AE0C5B0,
448 .control_wkup_control_spare_r = 0x4AE0C5B4, 448 .control_wkup_control_spare_r = 0x4AE0C5B4,
449 .control_wkup_control_spare_r_c0 = 0x4AE0C5B8, 449 .control_wkup_control_spare_r_c0 = 0x4AE0C5B8,
450 .control_srcomp_east_side_wkup = 0x4AE0C5BC, 450 .control_srcomp_east_side_wkup = 0x4AE0C5BC,
451 .control_efuse_1 = 0x4AE0C5C0, 451 .control_efuse_1 = 0x4AE0C5C0,
452 .control_efuse_2 = 0x4AE0C5C4, 452 .control_efuse_2 = 0x4AE0C5C4,
453 .control_efuse_3 = 0x4AE0C5C8, 453 .control_efuse_3 = 0x4AE0C5C8,
454 .control_efuse_4 = 0x4AE0C5CC, 454 .control_efuse_4 = 0x4AE0C5CC,
455 .control_efuse_13 = 0x4AE0C5F0, 455 .control_efuse_13 = 0x4AE0C5F0,
456 }; 456 };
457 457
458 struct prcm_regs const omap5_es2_prcm = { 458 struct prcm_regs const omap5_es2_prcm = {
459 /* cm1.ckgen */ 459 /* cm1.ckgen */
460 .cm_clksel_core = 0x4a004100, 460 .cm_clksel_core = 0x4a004100,
461 .cm_clksel_abe = 0x4a004108, 461 .cm_clksel_abe = 0x4a004108,
462 .cm_dll_ctrl = 0x4a004110, 462 .cm_dll_ctrl = 0x4a004110,
463 .cm_clkmode_dpll_core = 0x4a004120, 463 .cm_clkmode_dpll_core = 0x4a004120,
464 .cm_idlest_dpll_core = 0x4a004124, 464 .cm_idlest_dpll_core = 0x4a004124,
465 .cm_autoidle_dpll_core = 0x4a004128, 465 .cm_autoidle_dpll_core = 0x4a004128,
466 .cm_clksel_dpll_core = 0x4a00412c, 466 .cm_clksel_dpll_core = 0x4a00412c,
467 .cm_div_m2_dpll_core = 0x4a004130, 467 .cm_div_m2_dpll_core = 0x4a004130,
468 .cm_div_m3_dpll_core = 0x4a004134, 468 .cm_div_m3_dpll_core = 0x4a004134,
469 .cm_div_h11_dpll_core = 0x4a004138, 469 .cm_div_h11_dpll_core = 0x4a004138,
470 .cm_div_h12_dpll_core = 0x4a00413c, 470 .cm_div_h12_dpll_core = 0x4a00413c,
471 .cm_div_h13_dpll_core = 0x4a004140, 471 .cm_div_h13_dpll_core = 0x4a004140,
472 .cm_div_h14_dpll_core = 0x4a004144, 472 .cm_div_h14_dpll_core = 0x4a004144,
473 .cm_ssc_deltamstep_dpll_core = 0x4a004148, 473 .cm_ssc_deltamstep_dpll_core = 0x4a004148,
474 .cm_ssc_modfreqdiv_dpll_core = 0x4a00414c, 474 .cm_ssc_modfreqdiv_dpll_core = 0x4a00414c,
475 .cm_div_h21_dpll_core = 0x4a004150, 475 .cm_div_h21_dpll_core = 0x4a004150,
476 .cm_div_h22_dpllcore = 0x4a004154, 476 .cm_div_h22_dpllcore = 0x4a004154,
477 .cm_div_h23_dpll_core = 0x4a004158, 477 .cm_div_h23_dpll_core = 0x4a004158,
478 .cm_div_h24_dpll_core = 0x4a00415c, 478 .cm_div_h24_dpll_core = 0x4a00415c,
479 .cm_clkmode_dpll_mpu = 0x4a004160, 479 .cm_clkmode_dpll_mpu = 0x4a004160,
480 .cm_idlest_dpll_mpu = 0x4a004164, 480 .cm_idlest_dpll_mpu = 0x4a004164,
481 .cm_autoidle_dpll_mpu = 0x4a004168, 481 .cm_autoidle_dpll_mpu = 0x4a004168,
482 .cm_clksel_dpll_mpu = 0x4a00416c, 482 .cm_clksel_dpll_mpu = 0x4a00416c,
483 .cm_div_m2_dpll_mpu = 0x4a004170, 483 .cm_div_m2_dpll_mpu = 0x4a004170,
484 .cm_ssc_deltamstep_dpll_mpu = 0x4a004188, 484 .cm_ssc_deltamstep_dpll_mpu = 0x4a004188,
485 .cm_ssc_modfreqdiv_dpll_mpu = 0x4a00418c, 485 .cm_ssc_modfreqdiv_dpll_mpu = 0x4a00418c,
486 .cm_bypclk_dpll_mpu = 0x4a00419c, 486 .cm_bypclk_dpll_mpu = 0x4a00419c,
487 .cm_clkmode_dpll_iva = 0x4a0041a0, 487 .cm_clkmode_dpll_iva = 0x4a0041a0,
488 .cm_idlest_dpll_iva = 0x4a0041a4, 488 .cm_idlest_dpll_iva = 0x4a0041a4,
489 .cm_autoidle_dpll_iva = 0x4a0041a8, 489 .cm_autoidle_dpll_iva = 0x4a0041a8,
490 .cm_clksel_dpll_iva = 0x4a0041ac, 490 .cm_clksel_dpll_iva = 0x4a0041ac,
491 .cm_div_h11_dpll_iva = 0x4a0041b8, 491 .cm_div_h11_dpll_iva = 0x4a0041b8,
492 .cm_div_h12_dpll_iva = 0x4a0041bc, 492 .cm_div_h12_dpll_iva = 0x4a0041bc,
493 .cm_ssc_deltamstep_dpll_iva = 0x4a0041c8, 493 .cm_ssc_deltamstep_dpll_iva = 0x4a0041c8,
494 .cm_ssc_modfreqdiv_dpll_iva = 0x4a0041cc, 494 .cm_ssc_modfreqdiv_dpll_iva = 0x4a0041cc,
495 .cm_bypclk_dpll_iva = 0x4a0041dc, 495 .cm_bypclk_dpll_iva = 0x4a0041dc,
496 .cm_clkmode_dpll_abe = 0x4a0041e0, 496 .cm_clkmode_dpll_abe = 0x4a0041e0,
497 .cm_idlest_dpll_abe = 0x4a0041e4, 497 .cm_idlest_dpll_abe = 0x4a0041e4,
498 .cm_autoidle_dpll_abe = 0x4a0041e8, 498 .cm_autoidle_dpll_abe = 0x4a0041e8,
499 .cm_clksel_dpll_abe = 0x4a0041ec, 499 .cm_clksel_dpll_abe = 0x4a0041ec,
500 .cm_div_m2_dpll_abe = 0x4a0041f0, 500 .cm_div_m2_dpll_abe = 0x4a0041f0,
501 .cm_div_m3_dpll_abe = 0x4a0041f4, 501 .cm_div_m3_dpll_abe = 0x4a0041f4,
502 .cm_ssc_deltamstep_dpll_abe = 0x4a004208, 502 .cm_ssc_deltamstep_dpll_abe = 0x4a004208,
503 .cm_ssc_modfreqdiv_dpll_abe = 0x4a00420c, 503 .cm_ssc_modfreqdiv_dpll_abe = 0x4a00420c,
504 .cm_clkmode_dpll_ddrphy = 0x4a004220, 504 .cm_clkmode_dpll_ddrphy = 0x4a004220,
505 .cm_idlest_dpll_ddrphy = 0x4a004224, 505 .cm_idlest_dpll_ddrphy = 0x4a004224,
506 .cm_autoidle_dpll_ddrphy = 0x4a004228, 506 .cm_autoidle_dpll_ddrphy = 0x4a004228,
507 .cm_clksel_dpll_ddrphy = 0x4a00422c, 507 .cm_clksel_dpll_ddrphy = 0x4a00422c,
508 .cm_div_m2_dpll_ddrphy = 0x4a004230, 508 .cm_div_m2_dpll_ddrphy = 0x4a004230,
509 .cm_div_h11_dpll_ddrphy = 0x4a004238, 509 .cm_div_h11_dpll_ddrphy = 0x4a004238,
510 .cm_div_h12_dpll_ddrphy = 0x4a00423c, 510 .cm_div_h12_dpll_ddrphy = 0x4a00423c,
511 .cm_div_h13_dpll_ddrphy = 0x4a004240, 511 .cm_div_h13_dpll_ddrphy = 0x4a004240,
512 .cm_ssc_deltamstep_dpll_ddrphy = 0x4a004248, 512 .cm_ssc_deltamstep_dpll_ddrphy = 0x4a004248,
513 .cm_shadow_freq_config1 = 0x4a004260, 513 .cm_shadow_freq_config1 = 0x4a004260,
514 .cm_mpu_mpu_clkctrl = 0x4a004320, 514 .cm_mpu_mpu_clkctrl = 0x4a004320,
515 515
516 /* cm1.dsp */ 516 /* cm1.dsp */
517 .cm_dsp_clkstctrl = 0x4a004400, 517 .cm_dsp_clkstctrl = 0x4a004400,
518 .cm_dsp_dsp_clkctrl = 0x4a004420, 518 .cm_dsp_dsp_clkctrl = 0x4a004420,
519 519
520 /* cm1.abe */ 520 /* cm1.abe */
521 .cm1_abe_clkstctrl = 0x4a004500, 521 .cm1_abe_clkstctrl = 0x4a004500,
522 .cm1_abe_l4abe_clkctrl = 0x4a004520, 522 .cm1_abe_l4abe_clkctrl = 0x4a004520,
523 .cm1_abe_aess_clkctrl = 0x4a004528, 523 .cm1_abe_aess_clkctrl = 0x4a004528,
524 .cm1_abe_pdm_clkctrl = 0x4a004530, 524 .cm1_abe_pdm_clkctrl = 0x4a004530,
525 .cm1_abe_dmic_clkctrl = 0x4a004538, 525 .cm1_abe_dmic_clkctrl = 0x4a004538,
526 .cm1_abe_mcasp_clkctrl = 0x4a004540, 526 .cm1_abe_mcasp_clkctrl = 0x4a004540,
527 .cm1_abe_mcbsp1_clkctrl = 0x4a004548, 527 .cm1_abe_mcbsp1_clkctrl = 0x4a004548,
528 .cm1_abe_mcbsp2_clkctrl = 0x4a004550, 528 .cm1_abe_mcbsp2_clkctrl = 0x4a004550,
529 .cm1_abe_mcbsp3_clkctrl = 0x4a004558, 529 .cm1_abe_mcbsp3_clkctrl = 0x4a004558,
530 .cm1_abe_slimbus_clkctrl = 0x4a004560, 530 .cm1_abe_slimbus_clkctrl = 0x4a004560,
531 .cm1_abe_timer5_clkctrl = 0x4a004568, 531 .cm1_abe_timer5_clkctrl = 0x4a004568,
532 .cm1_abe_timer6_clkctrl = 0x4a004570, 532 .cm1_abe_timer6_clkctrl = 0x4a004570,
533 .cm1_abe_timer7_clkctrl = 0x4a004578, 533 .cm1_abe_timer7_clkctrl = 0x4a004578,
534 .cm1_abe_timer8_clkctrl = 0x4a004580, 534 .cm1_abe_timer8_clkctrl = 0x4a004580,
535 .cm1_abe_wdt3_clkctrl = 0x4a004588, 535 .cm1_abe_wdt3_clkctrl = 0x4a004588,
536 536
537 537
538 538
539 /* cm2.ckgen */ 539 /* cm2.ckgen */
540 .cm_clksel_mpu_m3_iss_root = 0x4a008100, 540 .cm_clksel_mpu_m3_iss_root = 0x4a008100,
541 .cm_clksel_usb_60mhz = 0x4a008104, 541 .cm_clksel_usb_60mhz = 0x4a008104,
542 .cm_scale_fclk = 0x4a008108, 542 .cm_scale_fclk = 0x4a008108,
543 .cm_core_dvfs_perf1 = 0x4a008110, 543 .cm_core_dvfs_perf1 = 0x4a008110,
544 .cm_core_dvfs_perf2 = 0x4a008114, 544 .cm_core_dvfs_perf2 = 0x4a008114,
545 .cm_core_dvfs_perf3 = 0x4a008118, 545 .cm_core_dvfs_perf3 = 0x4a008118,
546 .cm_core_dvfs_perf4 = 0x4a00811c, 546 .cm_core_dvfs_perf4 = 0x4a00811c,
547 .cm_core_dvfs_current = 0x4a008124, 547 .cm_core_dvfs_current = 0x4a008124,
548 .cm_iva_dvfs_perf_tesla = 0x4a008128, 548 .cm_iva_dvfs_perf_tesla = 0x4a008128,
549 .cm_iva_dvfs_perf_ivahd = 0x4a00812c, 549 .cm_iva_dvfs_perf_ivahd = 0x4a00812c,
550 .cm_iva_dvfs_perf_abe = 0x4a008130, 550 .cm_iva_dvfs_perf_abe = 0x4a008130,
551 .cm_iva_dvfs_current = 0x4a008138, 551 .cm_iva_dvfs_current = 0x4a008138,
552 .cm_clkmode_dpll_per = 0x4a008140, 552 .cm_clkmode_dpll_per = 0x4a008140,
553 .cm_idlest_dpll_per = 0x4a008144, 553 .cm_idlest_dpll_per = 0x4a008144,
554 .cm_autoidle_dpll_per = 0x4a008148, 554 .cm_autoidle_dpll_per = 0x4a008148,
555 .cm_clksel_dpll_per = 0x4a00814c, 555 .cm_clksel_dpll_per = 0x4a00814c,
556 .cm_div_m2_dpll_per = 0x4a008150, 556 .cm_div_m2_dpll_per = 0x4a008150,
557 .cm_div_m3_dpll_per = 0x4a008154, 557 .cm_div_m3_dpll_per = 0x4a008154,
558 .cm_div_h11_dpll_per = 0x4a008158, 558 .cm_div_h11_dpll_per = 0x4a008158,
559 .cm_div_h12_dpll_per = 0x4a00815c, 559 .cm_div_h12_dpll_per = 0x4a00815c,
560 .cm_div_h13_dpll_per = 0x4a008160, 560 .cm_div_h13_dpll_per = 0x4a008160,
561 .cm_div_h14_dpll_per = 0x4a008164, 561 .cm_div_h14_dpll_per = 0x4a008164,
562 .cm_ssc_deltamstep_dpll_per = 0x4a008168, 562 .cm_ssc_deltamstep_dpll_per = 0x4a008168,
563 .cm_ssc_modfreqdiv_dpll_per = 0x4a00816c, 563 .cm_ssc_modfreqdiv_dpll_per = 0x4a00816c,
564 .cm_emu_override_dpll_per = 0x4a008170, 564 .cm_emu_override_dpll_per = 0x4a008170,
565 .cm_clkmode_dpll_usb = 0x4a008180, 565 .cm_clkmode_dpll_usb = 0x4a008180,
566 .cm_idlest_dpll_usb = 0x4a008184, 566 .cm_idlest_dpll_usb = 0x4a008184,
567 .cm_autoidle_dpll_usb = 0x4a008188, 567 .cm_autoidle_dpll_usb = 0x4a008188,
568 .cm_clksel_dpll_usb = 0x4a00818c, 568 .cm_clksel_dpll_usb = 0x4a00818c,
569 .cm_div_m2_dpll_usb = 0x4a008190, 569 .cm_div_m2_dpll_usb = 0x4a008190,
570 .cm_ssc_deltamstep_dpll_usb = 0x4a0081a8, 570 .cm_ssc_deltamstep_dpll_usb = 0x4a0081a8,
571 .cm_ssc_modfreqdiv_dpll_usb = 0x4a0081ac, 571 .cm_ssc_modfreqdiv_dpll_usb = 0x4a0081ac,
572 .cm_clkdcoldo_dpll_usb = 0x4a0081b4, 572 .cm_clkdcoldo_dpll_usb = 0x4a0081b4,
573 .cm_clkmode_dpll_unipro = 0x4a0081c0, 573 .cm_clkmode_dpll_unipro = 0x4a0081c0,
574 .cm_idlest_dpll_unipro = 0x4a0081c4, 574 .cm_idlest_dpll_unipro = 0x4a0081c4,
575 .cm_autoidle_dpll_unipro = 0x4a0081c8, 575 .cm_autoidle_dpll_unipro = 0x4a0081c8,
576 .cm_clksel_dpll_unipro = 0x4a0081cc, 576 .cm_clksel_dpll_unipro = 0x4a0081cc,
577 .cm_div_m2_dpll_unipro = 0x4a0081d0, 577 .cm_div_m2_dpll_unipro = 0x4a0081d0,
578 .cm_ssc_deltamstep_dpll_unipro = 0x4a0081e8, 578 .cm_ssc_deltamstep_dpll_unipro = 0x4a0081e8,
579 .cm_ssc_modfreqdiv_dpll_unipro = 0x4a0081ec, 579 .cm_ssc_modfreqdiv_dpll_unipro = 0x4a0081ec,
580 .cm_coreaon_bandgap_clkctrl = 0x4a008648, 580 .cm_coreaon_bandgap_clkctrl = 0x4a008648,
581 .cm_coreaon_io_srcomp_clkctrl = 0x4a008650, 581 .cm_coreaon_io_srcomp_clkctrl = 0x4a008650,
582 582
583 /* cm2.core */ 583 /* cm2.core */
584 .cm_l3_1_clkstctrl = 0x4a008700, 584 .cm_l3_1_clkstctrl = 0x4a008700,
585 .cm_l3_1_dynamicdep = 0x4a008708, 585 .cm_l3_1_dynamicdep = 0x4a008708,
586 .cm_l3_1_l3_1_clkctrl = 0x4a008720, 586 .cm_l3_1_l3_1_clkctrl = 0x4a008720,
587 .cm_l3_2_clkstctrl = 0x4a008800, 587 .cm_l3_2_clkstctrl = 0x4a008800,
588 .cm_l3_2_dynamicdep = 0x4a008808, 588 .cm_l3_2_dynamicdep = 0x4a008808,
589 .cm_l3_2_l3_2_clkctrl = 0x4a008820, 589 .cm_l3_2_l3_2_clkctrl = 0x4a008820,
590 .cm_l3_gpmc_clkctrl = 0x4a008828, 590 .cm_l3_gpmc_clkctrl = 0x4a008828,
591 .cm_l3_2_ocmc_ram_clkctrl = 0x4a008830, 591 .cm_l3_2_ocmc_ram_clkctrl = 0x4a008830,
592 .cm_mpu_m3_clkstctrl = 0x4a008900, 592 .cm_mpu_m3_clkstctrl = 0x4a008900,
593 .cm_mpu_m3_staticdep = 0x4a008904, 593 .cm_mpu_m3_staticdep = 0x4a008904,
594 .cm_mpu_m3_dynamicdep = 0x4a008908, 594 .cm_mpu_m3_dynamicdep = 0x4a008908,
595 .cm_mpu_m3_mpu_m3_clkctrl = 0x4a008920, 595 .cm_mpu_m3_mpu_m3_clkctrl = 0x4a008920,
596 .cm_sdma_clkstctrl = 0x4a008a00, 596 .cm_sdma_clkstctrl = 0x4a008a00,
597 .cm_sdma_staticdep = 0x4a008a04, 597 .cm_sdma_staticdep = 0x4a008a04,
598 .cm_sdma_dynamicdep = 0x4a008a08, 598 .cm_sdma_dynamicdep = 0x4a008a08,
599 .cm_sdma_sdma_clkctrl = 0x4a008a20, 599 .cm_sdma_sdma_clkctrl = 0x4a008a20,
600 .cm_memif_clkstctrl = 0x4a008b00, 600 .cm_memif_clkstctrl = 0x4a008b00,
601 .cm_memif_dmm_clkctrl = 0x4a008b20, 601 .cm_memif_dmm_clkctrl = 0x4a008b20,
602 .cm_memif_emif_fw_clkctrl = 0x4a008b28, 602 .cm_memif_emif_fw_clkctrl = 0x4a008b28,
603 .cm_memif_emif_1_clkctrl = 0x4a008b30, 603 .cm_memif_emif_1_clkctrl = 0x4a008b30,
604 .cm_memif_emif_2_clkctrl = 0x4a008b38, 604 .cm_memif_emif_2_clkctrl = 0x4a008b38,
605 .cm_memif_dll_clkctrl = 0x4a008b40, 605 .cm_memif_dll_clkctrl = 0x4a008b40,
606 .cm_memif_emif_h1_clkctrl = 0x4a008b50, 606 .cm_memif_emif_h1_clkctrl = 0x4a008b50,
607 .cm_memif_emif_h2_clkctrl = 0x4a008b58, 607 .cm_memif_emif_h2_clkctrl = 0x4a008b58,
608 .cm_memif_dll_h_clkctrl = 0x4a008b60, 608 .cm_memif_dll_h_clkctrl = 0x4a008b60,
609 .cm_c2c_clkstctrl = 0x4a008c00, 609 .cm_c2c_clkstctrl = 0x4a008c00,
610 .cm_c2c_staticdep = 0x4a008c04, 610 .cm_c2c_staticdep = 0x4a008c04,
611 .cm_c2c_dynamicdep = 0x4a008c08, 611 .cm_c2c_dynamicdep = 0x4a008c08,
612 .cm_c2c_sad2d_clkctrl = 0x4a008c20, 612 .cm_c2c_sad2d_clkctrl = 0x4a008c20,
613 .cm_c2c_modem_icr_clkctrl = 0x4a008c28, 613 .cm_c2c_modem_icr_clkctrl = 0x4a008c28,
614 .cm_c2c_sad2d_fw_clkctrl = 0x4a008c30, 614 .cm_c2c_sad2d_fw_clkctrl = 0x4a008c30,
615 .cm_l4cfg_clkstctrl = 0x4a008d00, 615 .cm_l4cfg_clkstctrl = 0x4a008d00,
616 .cm_l4cfg_dynamicdep = 0x4a008d08, 616 .cm_l4cfg_dynamicdep = 0x4a008d08,
617 .cm_l4cfg_l4_cfg_clkctrl = 0x4a008d20, 617 .cm_l4cfg_l4_cfg_clkctrl = 0x4a008d20,
618 .cm_l4cfg_hw_sem_clkctrl = 0x4a008d28, 618 .cm_l4cfg_hw_sem_clkctrl = 0x4a008d28,
619 .cm_l4cfg_mailbox_clkctrl = 0x4a008d30, 619 .cm_l4cfg_mailbox_clkctrl = 0x4a008d30,
620 .cm_l4cfg_sar_rom_clkctrl = 0x4a008d38, 620 .cm_l4cfg_sar_rom_clkctrl = 0x4a008d38,
621 .cm_l3instr_clkstctrl = 0x4a008e00, 621 .cm_l3instr_clkstctrl = 0x4a008e00,
622 .cm_l3instr_l3_3_clkctrl = 0x4a008e20, 622 .cm_l3instr_l3_3_clkctrl = 0x4a008e20,
623 .cm_l3instr_l3_instr_clkctrl = 0x4a008e28, 623 .cm_l3instr_l3_instr_clkctrl = 0x4a008e28,
624 .cm_l3instr_intrconn_wp1_clkctrl = 0x4a008e40, 624 .cm_l3instr_intrconn_wp1_clkctrl = 0x4a008e40,
625 .cm_l4per_clkstctrl = 0x4a009000, 625 .cm_l4per_clkstctrl = 0x4a009000,
626 .cm_l4per_dynamicdep = 0x4a009008, 626 .cm_l4per_dynamicdep = 0x4a009008,
627 .cm_l4per_adc_clkctrl = 0x4a009020, 627 .cm_l4per_adc_clkctrl = 0x4a009020,
628 .cm_l4per_gptimer10_clkctrl = 0x4a009028, 628 .cm_l4per_gptimer10_clkctrl = 0x4a009028,
629 .cm_l4per_gptimer11_clkctrl = 0x4a009030, 629 .cm_l4per_gptimer11_clkctrl = 0x4a009030,
630 .cm_l4per_gptimer2_clkctrl = 0x4a009038, 630 .cm_l4per_gptimer2_clkctrl = 0x4a009038,
631 .cm_l4per_gptimer3_clkctrl = 0x4a009040, 631 .cm_l4per_gptimer3_clkctrl = 0x4a009040,
632 .cm_l4per_gptimer4_clkctrl = 0x4a009048, 632 .cm_l4per_gptimer4_clkctrl = 0x4a009048,
633 .cm_l4per_gptimer9_clkctrl = 0x4a009050, 633 .cm_l4per_gptimer9_clkctrl = 0x4a009050,
634 .cm_l4per_elm_clkctrl = 0x4a009058, 634 .cm_l4per_elm_clkctrl = 0x4a009058,
635 .cm_l4per_gpio2_clkctrl = 0x4a009060, 635 .cm_l4per_gpio2_clkctrl = 0x4a009060,
636 .cm_l4per_gpio3_clkctrl = 0x4a009068, 636 .cm_l4per_gpio3_clkctrl = 0x4a009068,
637 .cm_l4per_gpio4_clkctrl = 0x4a009070, 637 .cm_l4per_gpio4_clkctrl = 0x4a009070,
638 .cm_l4per_gpio5_clkctrl = 0x4a009078, 638 .cm_l4per_gpio5_clkctrl = 0x4a009078,
639 .cm_l4per_gpio6_clkctrl = 0x4a009080, 639 .cm_l4per_gpio6_clkctrl = 0x4a009080,
640 .cm_l4per_hdq1w_clkctrl = 0x4a009088, 640 .cm_l4per_hdq1w_clkctrl = 0x4a009088,
641 .cm_l4per_hecc1_clkctrl = 0x4a009090, 641 .cm_l4per_hecc1_clkctrl = 0x4a009090,
642 .cm_l4per_hecc2_clkctrl = 0x4a009098, 642 .cm_l4per_hecc2_clkctrl = 0x4a009098,
643 .cm_l4per_i2c1_clkctrl = 0x4a0090a0, 643 .cm_l4per_i2c1_clkctrl = 0x4a0090a0,
644 .cm_l4per_i2c2_clkctrl = 0x4a0090a8, 644 .cm_l4per_i2c2_clkctrl = 0x4a0090a8,
645 .cm_l4per_i2c3_clkctrl = 0x4a0090b0, 645 .cm_l4per_i2c3_clkctrl = 0x4a0090b0,
646 .cm_l4per_i2c4_clkctrl = 0x4a0090b8, 646 .cm_l4per_i2c4_clkctrl = 0x4a0090b8,
647 .cm_l4per_l4per_clkctrl = 0x4a0090c0, 647 .cm_l4per_l4per_clkctrl = 0x4a0090c0,
648 .cm_l4per_mcasp2_clkctrl = 0x4a0090d0, 648 .cm_l4per_mcasp2_clkctrl = 0x4a0090d0,
649 .cm_l4per_mcasp3_clkctrl = 0x4a0090d8, 649 .cm_l4per_mcasp3_clkctrl = 0x4a0090d8,
650 .cm_l4per_mgate_clkctrl = 0x4a0090e8, 650 .cm_l4per_mgate_clkctrl = 0x4a0090e8,
651 .cm_l4per_mcspi1_clkctrl = 0x4a0090f0, 651 .cm_l4per_mcspi1_clkctrl = 0x4a0090f0,
652 .cm_l4per_mcspi2_clkctrl = 0x4a0090f8, 652 .cm_l4per_mcspi2_clkctrl = 0x4a0090f8,
653 .cm_l4per_mcspi3_clkctrl = 0x4a009100, 653 .cm_l4per_mcspi3_clkctrl = 0x4a009100,
654 .cm_l4per_mcspi4_clkctrl = 0x4a009108, 654 .cm_l4per_mcspi4_clkctrl = 0x4a009108,
655 .cm_l4per_gpio7_clkctrl = 0x4a009110, 655 .cm_l4per_gpio7_clkctrl = 0x4a009110,
656 .cm_l4per_gpio8_clkctrl = 0x4a009118, 656 .cm_l4per_gpio8_clkctrl = 0x4a009118,
657 .cm_l4per_mmcsd3_clkctrl = 0x4a009120, 657 .cm_l4per_mmcsd3_clkctrl = 0x4a009120,
658 .cm_l4per_mmcsd4_clkctrl = 0x4a009128, 658 .cm_l4per_mmcsd4_clkctrl = 0x4a009128,
659 .cm_l4per_msprohg_clkctrl = 0x4a009130, 659 .cm_l4per_msprohg_clkctrl = 0x4a009130,
660 .cm_l4per_slimbus2_clkctrl = 0x4a009138, 660 .cm_l4per_slimbus2_clkctrl = 0x4a009138,
661 .cm_l4per_uart1_clkctrl = 0x4a009140, 661 .cm_l4per_uart1_clkctrl = 0x4a009140,
662 .cm_l4per_uart2_clkctrl = 0x4a009148, 662 .cm_l4per_uart2_clkctrl = 0x4a009148,
663 .cm_l4per_uart3_clkctrl = 0x4a009150, 663 .cm_l4per_uart3_clkctrl = 0x4a009150,
664 .cm_l4per_uart4_clkctrl = 0x4a009158, 664 .cm_l4per_uart4_clkctrl = 0x4a009158,
665 .cm_l4per_mmcsd5_clkctrl = 0x4a009160, 665 .cm_l4per_mmcsd5_clkctrl = 0x4a009160,
666 .cm_l4per_i2c5_clkctrl = 0x4a009168, 666 .cm_l4per_i2c5_clkctrl = 0x4a009168,
667 .cm_l4per_uart5_clkctrl = 0x4a009170, 667 .cm_l4per_uart5_clkctrl = 0x4a009170,
668 .cm_l4per_uart6_clkctrl = 0x4a009178, 668 .cm_l4per_uart6_clkctrl = 0x4a009178,
669 .cm_l4sec_clkstctrl = 0x4a009180, 669 .cm_l4sec_clkstctrl = 0x4a009180,
670 .cm_l4sec_staticdep = 0x4a009184, 670 .cm_l4sec_staticdep = 0x4a009184,
671 .cm_l4sec_dynamicdep = 0x4a009188, 671 .cm_l4sec_dynamicdep = 0x4a009188,
672 .cm_l4sec_aes1_clkctrl = 0x4a0091a0, 672 .cm_l4sec_aes1_clkctrl = 0x4a0091a0,
673 .cm_l4sec_aes2_clkctrl = 0x4a0091a8, 673 .cm_l4sec_aes2_clkctrl = 0x4a0091a8,
674 .cm_l4sec_des3des_clkctrl = 0x4a0091b0, 674 .cm_l4sec_des3des_clkctrl = 0x4a0091b0,
675 .cm_l4sec_pkaeip29_clkctrl = 0x4a0091b8, 675 .cm_l4sec_pkaeip29_clkctrl = 0x4a0091b8,
676 .cm_l4sec_rng_clkctrl = 0x4a0091c0, 676 .cm_l4sec_rng_clkctrl = 0x4a0091c0,
677 .cm_l4sec_sha2md51_clkctrl = 0x4a0091c8, 677 .cm_l4sec_sha2md51_clkctrl = 0x4a0091c8,
678 .cm_l4sec_cryptodma_clkctrl = 0x4a0091d8, 678 .cm_l4sec_cryptodma_clkctrl = 0x4a0091d8,
679 679
680 /* cm2.ivahd */ 680 /* cm2.ivahd */
681 .cm_ivahd_clkstctrl = 0x4a009200, 681 .cm_ivahd_clkstctrl = 0x4a009200,
682 .cm_ivahd_ivahd_clkctrl = 0x4a009220, 682 .cm_ivahd_ivahd_clkctrl = 0x4a009220,
683 .cm_ivahd_sl2_clkctrl = 0x4a009228, 683 .cm_ivahd_sl2_clkctrl = 0x4a009228,
684 684
685 /* cm2.cam */ 685 /* cm2.cam */
686 .cm_cam_clkstctrl = 0x4a009300, 686 .cm_cam_clkstctrl = 0x4a009300,
687 .cm_cam_iss_clkctrl = 0x4a009320, 687 .cm_cam_iss_clkctrl = 0x4a009320,
688 .cm_cam_fdif_clkctrl = 0x4a009328, 688 .cm_cam_fdif_clkctrl = 0x4a009328,
689 689
690 /* cm2.dss */ 690 /* cm2.dss */
691 .cm_dss_clkstctrl = 0x4a009400, 691 .cm_dss_clkstctrl = 0x4a009400,
692 .cm_dss_dss_clkctrl = 0x4a009420, 692 .cm_dss_dss_clkctrl = 0x4a009420,
693 693
694 /* cm2.sgx */ 694 /* cm2.sgx */
695 .cm_sgx_clkstctrl = 0x4a009500, 695 .cm_sgx_clkstctrl = 0x4a009500,
696 .cm_sgx_sgx_clkctrl = 0x4a009520, 696 .cm_sgx_sgx_clkctrl = 0x4a009520,
697 697
698 /* cm2.l3init */ 698 /* cm2.l3init */
699 .cm_l3init_clkstctrl = 0x4a009600, 699 .cm_l3init_clkstctrl = 0x4a009600,
700 700
701 /* cm2.l3init */ 701 /* cm2.l3init */
702 .cm_l3init_hsmmc1_clkctrl = 0x4a009628, 702 .cm_l3init_hsmmc1_clkctrl = 0x4a009628,
703 .cm_l3init_hsmmc2_clkctrl = 0x4a009630, 703 .cm_l3init_hsmmc2_clkctrl = 0x4a009630,
704 .cm_l3init_hsi_clkctrl = 0x4a009638, 704 .cm_l3init_hsi_clkctrl = 0x4a009638,
705 .cm_l3init_hsusbhost_clkctrl = 0x4a009658, 705 .cm_l3init_hsusbhost_clkctrl = 0x4a009658,
706 .cm_l3init_hsusbotg_clkctrl = 0x4a009660, 706 .cm_l3init_hsusbotg_clkctrl = 0x4a009660,
707 .cm_l3init_hsusbtll_clkctrl = 0x4a009668, 707 .cm_l3init_hsusbtll_clkctrl = 0x4a009668,
708 .cm_l3init_p1500_clkctrl = 0x4a009678, 708 .cm_l3init_p1500_clkctrl = 0x4a009678,
709 .cm_l3init_fsusb_clkctrl = 0x4a0096d0, 709 .cm_l3init_fsusb_clkctrl = 0x4a0096d0,
710 .cm_l3init_ocp2scp1_clkctrl = 0x4a0096e0, 710 .cm_l3init_ocp2scp1_clkctrl = 0x4a0096e0,
711 711
712 /* l4 wkup regs */ 712 /* l4 wkup regs */
713 .cm_abe_pll_ref_clksel = 0x4ae0610c, 713 .cm_abe_pll_ref_clksel = 0x4ae0610c,
714 .cm_sys_clksel = 0x4ae06110, 714 .cm_sys_clksel = 0x4ae06110,
715 .cm_wkup_clkstctrl = 0x4ae07900, 715 .cm_wkup_clkstctrl = 0x4ae07900,
716 .cm_wkup_l4wkup_clkctrl = 0x4ae07920, 716 .cm_wkup_l4wkup_clkctrl = 0x4ae07920,
717 .cm_wkup_wdtimer1_clkctrl = 0x4ae07928, 717 .cm_wkup_wdtimer1_clkctrl = 0x4ae07928,
718 .cm_wkup_wdtimer2_clkctrl = 0x4ae07930, 718 .cm_wkup_wdtimer2_clkctrl = 0x4ae07930,
719 .cm_wkup_gpio1_clkctrl = 0x4ae07938, 719 .cm_wkup_gpio1_clkctrl = 0x4ae07938,
720 .cm_wkup_gptimer1_clkctrl = 0x4ae07940, 720 .cm_wkup_gptimer1_clkctrl = 0x4ae07940,
721 .cm_wkup_gptimer12_clkctrl = 0x4ae07948, 721 .cm_wkup_gptimer12_clkctrl = 0x4ae07948,
722 .cm_wkup_synctimer_clkctrl = 0x4ae07950, 722 .cm_wkup_synctimer_clkctrl = 0x4ae07950,
723 .cm_wkup_usim_clkctrl = 0x4ae07958, 723 .cm_wkup_usim_clkctrl = 0x4ae07958,
724 .cm_wkup_sarram_clkctrl = 0x4ae07960, 724 .cm_wkup_sarram_clkctrl = 0x4ae07960,
725 .cm_wkup_keyboard_clkctrl = 0x4ae07978, 725 .cm_wkup_keyboard_clkctrl = 0x4ae07978,
726 .cm_wkup_rtc_clkctrl = 0x4ae07980, 726 .cm_wkup_rtc_clkctrl = 0x4ae07980,
727 .cm_wkup_bandgap_clkctrl = 0x4ae07988, 727 .cm_wkup_bandgap_clkctrl = 0x4ae07988,
728 .cm_wkupaon_scrm_clkctrl = 0x4ae07990, 728 .cm_wkupaon_scrm_clkctrl = 0x4ae07990,
729 .cm_wkupaon_io_srcomp_clkctrl = 0x4ae07998, 729 .cm_wkupaon_io_srcomp_clkctrl = 0x4ae07998,
730 .prm_rstctrl = 0x4ae07c00, 730 .prm_rstctrl = 0x4ae07c00,
731 .prm_rstst = 0x4ae07c04, 731 .prm_rstst = 0x4ae07c04,
732 .prm_rsttime = 0x4ae07c08,
732 .prm_vc_val_bypass = 0x4ae07ca0, 733 .prm_vc_val_bypass = 0x4ae07ca0,
733 .prm_vc_cfg_i2c_mode = 0x4ae07cb4, 734 .prm_vc_cfg_i2c_mode = 0x4ae07cb4,
734 .prm_vc_cfg_i2c_clk = 0x4ae07cb8, 735 .prm_vc_cfg_i2c_clk = 0x4ae07cb8,
735 736
736 .prm_sldo_core_setup = 0x4ae07cc4, 737 .prm_sldo_core_setup = 0x4ae07cc4,
737 .prm_sldo_core_ctrl = 0x4ae07cc8, 738 .prm_sldo_core_ctrl = 0x4ae07cc8,
738 .prm_sldo_mpu_setup = 0x4ae07ccc, 739 .prm_sldo_mpu_setup = 0x4ae07ccc,
739 .prm_sldo_mpu_ctrl = 0x4ae07cd0, 740 .prm_sldo_mpu_ctrl = 0x4ae07cd0,
740 .prm_sldo_mm_setup = 0x4ae07cd4, 741 .prm_sldo_mm_setup = 0x4ae07cd4,
741 .prm_sldo_mm_ctrl = 0x4ae07cd8, 742 .prm_sldo_mm_ctrl = 0x4ae07cd8,
742 }; 743 };
743 744
744 struct prcm_regs const dra7xx_prcm = { 745 struct prcm_regs const dra7xx_prcm = {
745 /* cm1.ckgen */ 746 /* cm1.ckgen */
746 .cm_clksel_core = 0x4a005100, 747 .cm_clksel_core = 0x4a005100,
747 .cm_clksel_abe = 0x4a005108, 748 .cm_clksel_abe = 0x4a005108,
748 .cm_dll_ctrl = 0x4a005110, 749 .cm_dll_ctrl = 0x4a005110,
749 .cm_clkmode_dpll_core = 0x4a005120, 750 .cm_clkmode_dpll_core = 0x4a005120,
750 .cm_idlest_dpll_core = 0x4a005124, 751 .cm_idlest_dpll_core = 0x4a005124,
751 .cm_autoidle_dpll_core = 0x4a005128, 752 .cm_autoidle_dpll_core = 0x4a005128,
752 .cm_clksel_dpll_core = 0x4a00512c, 753 .cm_clksel_dpll_core = 0x4a00512c,
753 .cm_div_m2_dpll_core = 0x4a005130, 754 .cm_div_m2_dpll_core = 0x4a005130,
754 .cm_div_m3_dpll_core = 0x4a005134, 755 .cm_div_m3_dpll_core = 0x4a005134,
755 .cm_div_h11_dpll_core = 0x4a005138, 756 .cm_div_h11_dpll_core = 0x4a005138,
756 .cm_div_h12_dpll_core = 0x4a00513c, 757 .cm_div_h12_dpll_core = 0x4a00513c,
757 .cm_div_h13_dpll_core = 0x4a005140, 758 .cm_div_h13_dpll_core = 0x4a005140,
758 .cm_div_h14_dpll_core = 0x4a005144, 759 .cm_div_h14_dpll_core = 0x4a005144,
759 .cm_ssc_deltamstep_dpll_core = 0x4a005148, 760 .cm_ssc_deltamstep_dpll_core = 0x4a005148,
760 .cm_ssc_modfreqdiv_dpll_core = 0x4a00514c, 761 .cm_ssc_modfreqdiv_dpll_core = 0x4a00514c,
761 .cm_div_h21_dpll_core = 0x4a005150, 762 .cm_div_h21_dpll_core = 0x4a005150,
762 .cm_div_h22_dpllcore = 0x4a005154, 763 .cm_div_h22_dpllcore = 0x4a005154,
763 .cm_div_h23_dpll_core = 0x4a005158, 764 .cm_div_h23_dpll_core = 0x4a005158,
764 .cm_div_h24_dpll_core = 0x4a00515c, 765 .cm_div_h24_dpll_core = 0x4a00515c,
765 .cm_clkmode_dpll_mpu = 0x4a005160, 766 .cm_clkmode_dpll_mpu = 0x4a005160,
766 .cm_idlest_dpll_mpu = 0x4a005164, 767 .cm_idlest_dpll_mpu = 0x4a005164,
767 .cm_autoidle_dpll_mpu = 0x4a005168, 768 .cm_autoidle_dpll_mpu = 0x4a005168,
768 .cm_clksel_dpll_mpu = 0x4a00516c, 769 .cm_clksel_dpll_mpu = 0x4a00516c,
769 .cm_div_m2_dpll_mpu = 0x4a005170, 770 .cm_div_m2_dpll_mpu = 0x4a005170,
770 .cm_ssc_deltamstep_dpll_mpu = 0x4a005188, 771 .cm_ssc_deltamstep_dpll_mpu = 0x4a005188,
771 .cm_ssc_modfreqdiv_dpll_mpu = 0x4a00518c, 772 .cm_ssc_modfreqdiv_dpll_mpu = 0x4a00518c,
772 .cm_bypclk_dpll_mpu = 0x4a00519c, 773 .cm_bypclk_dpll_mpu = 0x4a00519c,
773 .cm_clkmode_dpll_iva = 0x4a0051a0, 774 .cm_clkmode_dpll_iva = 0x4a0051a0,
774 .cm_idlest_dpll_iva = 0x4a0051a4, 775 .cm_idlest_dpll_iva = 0x4a0051a4,
775 .cm_autoidle_dpll_iva = 0x4a0051a8, 776 .cm_autoidle_dpll_iva = 0x4a0051a8,
776 .cm_clksel_dpll_iva = 0x4a0051ac, 777 .cm_clksel_dpll_iva = 0x4a0051ac,
777 .cm_ssc_deltamstep_dpll_iva = 0x4a0051c8, 778 .cm_ssc_deltamstep_dpll_iva = 0x4a0051c8,
778 .cm_ssc_modfreqdiv_dpll_iva = 0x4a0051cc, 779 .cm_ssc_modfreqdiv_dpll_iva = 0x4a0051cc,
779 .cm_bypclk_dpll_iva = 0x4a0051dc, 780 .cm_bypclk_dpll_iva = 0x4a0051dc,
780 .cm_clkmode_dpll_abe = 0x4a0051e0, 781 .cm_clkmode_dpll_abe = 0x4a0051e0,
781 .cm_idlest_dpll_abe = 0x4a0051e4, 782 .cm_idlest_dpll_abe = 0x4a0051e4,
782 .cm_autoidle_dpll_abe = 0x4a0051e8, 783 .cm_autoidle_dpll_abe = 0x4a0051e8,
783 .cm_clksel_dpll_abe = 0x4a0051ec, 784 .cm_clksel_dpll_abe = 0x4a0051ec,
784 .cm_div_m2_dpll_abe = 0x4a0051f0, 785 .cm_div_m2_dpll_abe = 0x4a0051f0,
785 .cm_div_m3_dpll_abe = 0x4a0051f4, 786 .cm_div_m3_dpll_abe = 0x4a0051f4,
786 .cm_ssc_deltamstep_dpll_abe = 0x4a005208, 787 .cm_ssc_deltamstep_dpll_abe = 0x4a005208,
787 .cm_ssc_modfreqdiv_dpll_abe = 0x4a00520c, 788 .cm_ssc_modfreqdiv_dpll_abe = 0x4a00520c,
788 .cm_clkmode_dpll_ddrphy = 0x4a005210, 789 .cm_clkmode_dpll_ddrphy = 0x4a005210,
789 .cm_idlest_dpll_ddrphy = 0x4a005214, 790 .cm_idlest_dpll_ddrphy = 0x4a005214,
790 .cm_autoidle_dpll_ddrphy = 0x4a005218, 791 .cm_autoidle_dpll_ddrphy = 0x4a005218,
791 .cm_clksel_dpll_ddrphy = 0x4a00521c, 792 .cm_clksel_dpll_ddrphy = 0x4a00521c,
792 .cm_div_m2_dpll_ddrphy = 0x4a005220, 793 .cm_div_m2_dpll_ddrphy = 0x4a005220,
793 .cm_div_h11_dpll_ddrphy = 0x4a005228, 794 .cm_div_h11_dpll_ddrphy = 0x4a005228,
794 .cm_ssc_deltamstep_dpll_ddrphy = 0x4a00522c, 795 .cm_ssc_deltamstep_dpll_ddrphy = 0x4a00522c,
795 .cm_clkmode_dpll_dsp = 0x4a005234, 796 .cm_clkmode_dpll_dsp = 0x4a005234,
796 .cm_shadow_freq_config1 = 0x4a005260, 797 .cm_shadow_freq_config1 = 0x4a005260,
797 798
798 /* cm1.mpu */ 799 /* cm1.mpu */
799 .cm_mpu_mpu_clkctrl = 0x4a005320, 800 .cm_mpu_mpu_clkctrl = 0x4a005320,
800 801
801 /* cm1.dsp */ 802 /* cm1.dsp */
802 .cm_dsp_clkstctrl = 0x4a005400, 803 .cm_dsp_clkstctrl = 0x4a005400,
803 .cm_dsp_dsp_clkctrl = 0x4a005420, 804 .cm_dsp_dsp_clkctrl = 0x4a005420,
804 805
805 /* cm2.ckgen */ 806 /* cm2.ckgen */
806 .cm_clksel_usb_60mhz = 0x4a008104, 807 .cm_clksel_usb_60mhz = 0x4a008104,
807 .cm_clkmode_dpll_per = 0x4a008140, 808 .cm_clkmode_dpll_per = 0x4a008140,
808 .cm_idlest_dpll_per = 0x4a008144, 809 .cm_idlest_dpll_per = 0x4a008144,
809 .cm_autoidle_dpll_per = 0x4a008148, 810 .cm_autoidle_dpll_per = 0x4a008148,
810 .cm_clksel_dpll_per = 0x4a00814c, 811 .cm_clksel_dpll_per = 0x4a00814c,
811 .cm_div_m2_dpll_per = 0x4a008150, 812 .cm_div_m2_dpll_per = 0x4a008150,
812 .cm_div_m3_dpll_per = 0x4a008154, 813 .cm_div_m3_dpll_per = 0x4a008154,
813 .cm_div_h11_dpll_per = 0x4a008158, 814 .cm_div_h11_dpll_per = 0x4a008158,
814 .cm_div_h12_dpll_per = 0x4a00815c, 815 .cm_div_h12_dpll_per = 0x4a00815c,
815 .cm_div_h13_dpll_per = 0x4a008160, 816 .cm_div_h13_dpll_per = 0x4a008160,
816 .cm_div_h14_dpll_per = 0x4a008164, 817 .cm_div_h14_dpll_per = 0x4a008164,
817 .cm_ssc_deltamstep_dpll_per = 0x4a008168, 818 .cm_ssc_deltamstep_dpll_per = 0x4a008168,
818 .cm_ssc_modfreqdiv_dpll_per = 0x4a00816c, 819 .cm_ssc_modfreqdiv_dpll_per = 0x4a00816c,
819 .cm_clkmode_dpll_usb = 0x4a008180, 820 .cm_clkmode_dpll_usb = 0x4a008180,
820 .cm_idlest_dpll_usb = 0x4a008184, 821 .cm_idlest_dpll_usb = 0x4a008184,
821 .cm_autoidle_dpll_usb = 0x4a008188, 822 .cm_autoidle_dpll_usb = 0x4a008188,
822 .cm_clksel_dpll_usb = 0x4a00818c, 823 .cm_clksel_dpll_usb = 0x4a00818c,
823 .cm_div_m2_dpll_usb = 0x4a008190, 824 .cm_div_m2_dpll_usb = 0x4a008190,
824 .cm_ssc_deltamstep_dpll_usb = 0x4a0081a8, 825 .cm_ssc_deltamstep_dpll_usb = 0x4a0081a8,
825 .cm_ssc_modfreqdiv_dpll_usb = 0x4a0081ac, 826 .cm_ssc_modfreqdiv_dpll_usb = 0x4a0081ac,
826 .cm_clkdcoldo_dpll_usb = 0x4a0081b4, 827 .cm_clkdcoldo_dpll_usb = 0x4a0081b4,
827 .cm_clkmode_dpll_pcie_ref = 0x4a008200, 828 .cm_clkmode_dpll_pcie_ref = 0x4a008200,
828 .cm_clkmode_apll_pcie = 0x4a00821c, 829 .cm_clkmode_apll_pcie = 0x4a00821c,
829 .cm_idlest_apll_pcie = 0x4a008220, 830 .cm_idlest_apll_pcie = 0x4a008220,
830 .cm_div_m2_apll_pcie = 0x4a008224, 831 .cm_div_m2_apll_pcie = 0x4a008224,
831 .cm_clkvcoldo_apll_pcie = 0x4a008228, 832 .cm_clkvcoldo_apll_pcie = 0x4a008228,
832 833
833 /* cm2.core */ 834 /* cm2.core */
834 .cm_l3_1_clkstctrl = 0x4a008700, 835 .cm_l3_1_clkstctrl = 0x4a008700,
835 .cm_l3_1_dynamicdep = 0x4a008708, 836 .cm_l3_1_dynamicdep = 0x4a008708,
836 .cm_l3_1_l3_1_clkctrl = 0x4a008720, 837 .cm_l3_1_l3_1_clkctrl = 0x4a008720,
837 .cm_l3_gpmc_clkctrl = 0x4a008728, 838 .cm_l3_gpmc_clkctrl = 0x4a008728,
838 .cm_mpu_m3_clkstctrl = 0x4a008900, 839 .cm_mpu_m3_clkstctrl = 0x4a008900,
839 .cm_mpu_m3_staticdep = 0x4a008904, 840 .cm_mpu_m3_staticdep = 0x4a008904,
840 .cm_mpu_m3_dynamicdep = 0x4a008908, 841 .cm_mpu_m3_dynamicdep = 0x4a008908,
841 .cm_mpu_m3_mpu_m3_clkctrl = 0x4a008920, 842 .cm_mpu_m3_mpu_m3_clkctrl = 0x4a008920,
842 .cm_sdma_clkstctrl = 0x4a008a00, 843 .cm_sdma_clkstctrl = 0x4a008a00,
843 .cm_sdma_staticdep = 0x4a008a04, 844 .cm_sdma_staticdep = 0x4a008a04,
844 .cm_sdma_dynamicdep = 0x4a008a08, 845 .cm_sdma_dynamicdep = 0x4a008a08,
845 .cm_sdma_sdma_clkctrl = 0x4a008a20, 846 .cm_sdma_sdma_clkctrl = 0x4a008a20,
846 .cm_memif_clkstctrl = 0x4a008b00, 847 .cm_memif_clkstctrl = 0x4a008b00,
847 .cm_memif_dmm_clkctrl = 0x4a008b20, 848 .cm_memif_dmm_clkctrl = 0x4a008b20,
848 .cm_memif_emif_fw_clkctrl = 0x4a008b28, 849 .cm_memif_emif_fw_clkctrl = 0x4a008b28,
849 .cm_memif_emif_1_clkctrl = 0x4a008b30, 850 .cm_memif_emif_1_clkctrl = 0x4a008b30,
850 .cm_memif_emif_2_clkctrl = 0x4a008b38, 851 .cm_memif_emif_2_clkctrl = 0x4a008b38,
851 .cm_memif_dll_clkctrl = 0x4a008b40, 852 .cm_memif_dll_clkctrl = 0x4a008b40,
852 .cm_l4cfg_clkstctrl = 0x4a008d00, 853 .cm_l4cfg_clkstctrl = 0x4a008d00,
853 .cm_l4cfg_dynamicdep = 0x4a008d08, 854 .cm_l4cfg_dynamicdep = 0x4a008d08,
854 .cm_l4cfg_l4_cfg_clkctrl = 0x4a008d20, 855 .cm_l4cfg_l4_cfg_clkctrl = 0x4a008d20,
855 .cm_l4cfg_hw_sem_clkctrl = 0x4a008d28, 856 .cm_l4cfg_hw_sem_clkctrl = 0x4a008d28,
856 .cm_l4cfg_mailbox_clkctrl = 0x4a008d30, 857 .cm_l4cfg_mailbox_clkctrl = 0x4a008d30,
857 .cm_l4cfg_sar_rom_clkctrl = 0x4a008d38, 858 .cm_l4cfg_sar_rom_clkctrl = 0x4a008d38,
858 .cm_l3instr_clkstctrl = 0x4a008e00, 859 .cm_l3instr_clkstctrl = 0x4a008e00,
859 .cm_l3instr_l3_3_clkctrl = 0x4a008e20, 860 .cm_l3instr_l3_3_clkctrl = 0x4a008e20,
860 .cm_l3instr_l3_instr_clkctrl = 0x4a008e28, 861 .cm_l3instr_l3_instr_clkctrl = 0x4a008e28,
861 .cm_l3instr_intrconn_wp1_clkctrl = 0x4a008e40, 862 .cm_l3instr_intrconn_wp1_clkctrl = 0x4a008e40,
862 863
863 /* cm2.ivahd */ 864 /* cm2.ivahd */
864 .cm_ivahd_clkstctrl = 0x4a008f00, 865 .cm_ivahd_clkstctrl = 0x4a008f00,
865 .cm_ivahd_ivahd_clkctrl = 0x4a008f20, 866 .cm_ivahd_ivahd_clkctrl = 0x4a008f20,
866 .cm_ivahd_sl2_clkctrl = 0x4a008f28, 867 .cm_ivahd_sl2_clkctrl = 0x4a008f28,
867 868
868 /* cm2.cam */ 869 /* cm2.cam */
869 .cm_cam_clkstctrl = 0x4a009000, 870 .cm_cam_clkstctrl = 0x4a009000,
870 .cm_cam_vip1_clkctrl = 0x4a009020, 871 .cm_cam_vip1_clkctrl = 0x4a009020,
871 .cm_cam_vip2_clkctrl = 0x4a009028, 872 .cm_cam_vip2_clkctrl = 0x4a009028,
872 .cm_cam_vip3_clkctrl = 0x4a009030, 873 .cm_cam_vip3_clkctrl = 0x4a009030,
873 .cm_cam_lvdsrx_clkctrl = 0x4a009038, 874 .cm_cam_lvdsrx_clkctrl = 0x4a009038,
874 .cm_cam_csi1_clkctrl = 0x4a009040, 875 .cm_cam_csi1_clkctrl = 0x4a009040,
875 .cm_cam_csi2_clkctrl = 0x4a009048, 876 .cm_cam_csi2_clkctrl = 0x4a009048,
876 877
877 /* cm2.dss */ 878 /* cm2.dss */
878 .cm_dss_clkstctrl = 0x4a009100, 879 .cm_dss_clkstctrl = 0x4a009100,
879 .cm_dss_dss_clkctrl = 0x4a009120, 880 .cm_dss_dss_clkctrl = 0x4a009120,
880 881
881 /* cm2.sgx */ 882 /* cm2.sgx */
882 .cm_sgx_clkstctrl = 0x4a009200, 883 .cm_sgx_clkstctrl = 0x4a009200,
883 .cm_sgx_sgx_clkctrl = 0x4a009220, 884 .cm_sgx_sgx_clkctrl = 0x4a009220,
884 885
885 /* cm2.l3init */ 886 /* cm2.l3init */
886 .cm_l3init_clkstctrl = 0x4a009300, 887 .cm_l3init_clkstctrl = 0x4a009300,
887 888
888 /* cm2.l3init */ 889 /* cm2.l3init */
889 .cm_l3init_hsmmc1_clkctrl = 0x4a009328, 890 .cm_l3init_hsmmc1_clkctrl = 0x4a009328,
890 .cm_l3init_hsmmc2_clkctrl = 0x4a009330, 891 .cm_l3init_hsmmc2_clkctrl = 0x4a009330,
891 .cm_l3init_hsusbhost_clkctrl = 0x4a009340, 892 .cm_l3init_hsusbhost_clkctrl = 0x4a009340,
892 .cm_l3init_hsusbotg_clkctrl = 0x4a009348, 893 .cm_l3init_hsusbotg_clkctrl = 0x4a009348,
893 .cm_l3init_hsusbtll_clkctrl = 0x4a009350, 894 .cm_l3init_hsusbtll_clkctrl = 0x4a009350,
894 .cm_l3init_ocp2scp1_clkctrl = 0x4a0093e0, 895 .cm_l3init_ocp2scp1_clkctrl = 0x4a0093e0,
895 896
896 /* cm2.l4per */ 897 /* cm2.l4per */
897 .cm_l4per_clkstctrl = 0x4a009700, 898 .cm_l4per_clkstctrl = 0x4a009700,
898 .cm_l4per_dynamicdep = 0x4a009708, 899 .cm_l4per_dynamicdep = 0x4a009708,
899 .cm_l4per_gptimer10_clkctrl = 0x4a009728, 900 .cm_l4per_gptimer10_clkctrl = 0x4a009728,
900 .cm_l4per_gptimer11_clkctrl = 0x4a009730, 901 .cm_l4per_gptimer11_clkctrl = 0x4a009730,
901 .cm_l4per_gptimer2_clkctrl = 0x4a009738, 902 .cm_l4per_gptimer2_clkctrl = 0x4a009738,
902 .cm_l4per_gptimer3_clkctrl = 0x4a009740, 903 .cm_l4per_gptimer3_clkctrl = 0x4a009740,
903 .cm_l4per_gptimer4_clkctrl = 0x4a009748, 904 .cm_l4per_gptimer4_clkctrl = 0x4a009748,
904 .cm_l4per_gptimer9_clkctrl = 0x4a009750, 905 .cm_l4per_gptimer9_clkctrl = 0x4a009750,
905 .cm_l4per_elm_clkctrl = 0x4a009758, 906 .cm_l4per_elm_clkctrl = 0x4a009758,
906 .cm_l4per_gpio2_clkctrl = 0x4a009760, 907 .cm_l4per_gpio2_clkctrl = 0x4a009760,
907 .cm_l4per_gpio3_clkctrl = 0x4a009768, 908 .cm_l4per_gpio3_clkctrl = 0x4a009768,
908 .cm_l4per_gpio4_clkctrl = 0x4a009770, 909 .cm_l4per_gpio4_clkctrl = 0x4a009770,
909 .cm_l4per_gpio5_clkctrl = 0x4a009778, 910 .cm_l4per_gpio5_clkctrl = 0x4a009778,
910 .cm_l4per_gpio6_clkctrl = 0x4a009780, 911 .cm_l4per_gpio6_clkctrl = 0x4a009780,
911 .cm_l4per_hdq1w_clkctrl = 0x4a009788, 912 .cm_l4per_hdq1w_clkctrl = 0x4a009788,
912 .cm_l4per_i2c1_clkctrl = 0x4a0097a0, 913 .cm_l4per_i2c1_clkctrl = 0x4a0097a0,
913 .cm_l4per_i2c2_clkctrl = 0x4a0097a8, 914 .cm_l4per_i2c2_clkctrl = 0x4a0097a8,
914 .cm_l4per_i2c3_clkctrl = 0x4a0097b0, 915 .cm_l4per_i2c3_clkctrl = 0x4a0097b0,
915 .cm_l4per_i2c4_clkctrl = 0x4a0097b8, 916 .cm_l4per_i2c4_clkctrl = 0x4a0097b8,
916 .cm_l4per_l4per_clkctrl = 0x4a0097c0, 917 .cm_l4per_l4per_clkctrl = 0x4a0097c0,
917 .cm_l4per_mcspi1_clkctrl = 0x4a0097f0, 918 .cm_l4per_mcspi1_clkctrl = 0x4a0097f0,
918 .cm_l4per_mcspi2_clkctrl = 0x4a0097f8, 919 .cm_l4per_mcspi2_clkctrl = 0x4a0097f8,
919 .cm_l4per_mcspi3_clkctrl = 0x4a009800, 920 .cm_l4per_mcspi3_clkctrl = 0x4a009800,
920 .cm_l4per_mcspi4_clkctrl = 0x4a009808, 921 .cm_l4per_mcspi4_clkctrl = 0x4a009808,
921 .cm_l4per_gpio7_clkctrl = 0x4a009810, 922 .cm_l4per_gpio7_clkctrl = 0x4a009810,
922 .cm_l4per_gpio8_clkctrl = 0x4a009818, 923 .cm_l4per_gpio8_clkctrl = 0x4a009818,
923 .cm_l4per_mmcsd3_clkctrl = 0x4a009820, 924 .cm_l4per_mmcsd3_clkctrl = 0x4a009820,
924 .cm_l4per_mmcsd4_clkctrl = 0x4a009828, 925 .cm_l4per_mmcsd4_clkctrl = 0x4a009828,
925 .cm_l4per_uart1_clkctrl = 0x4a009840, 926 .cm_l4per_uart1_clkctrl = 0x4a009840,
926 .cm_l4per_uart2_clkctrl = 0x4a009848, 927 .cm_l4per_uart2_clkctrl = 0x4a009848,
927 .cm_l4per_uart3_clkctrl = 0x4a009850, 928 .cm_l4per_uart3_clkctrl = 0x4a009850,
928 .cm_l4per_uart4_clkctrl = 0x4a009858, 929 .cm_l4per_uart4_clkctrl = 0x4a009858,
929 .cm_l4per_uart5_clkctrl = 0x4a009870, 930 .cm_l4per_uart5_clkctrl = 0x4a009870,
930 .cm_l4sec_clkstctrl = 0x4a009880, 931 .cm_l4sec_clkstctrl = 0x4a009880,
931 .cm_l4sec_staticdep = 0x4a009884, 932 .cm_l4sec_staticdep = 0x4a009884,
932 .cm_l4sec_dynamicdep = 0x4a009888, 933 .cm_l4sec_dynamicdep = 0x4a009888,
933 .cm_l4sec_aes1_clkctrl = 0x4a0098a0, 934 .cm_l4sec_aes1_clkctrl = 0x4a0098a0,
934 .cm_l4sec_aes2_clkctrl = 0x4a0098a8, 935 .cm_l4sec_aes2_clkctrl = 0x4a0098a8,
935 .cm_l4sec_des3des_clkctrl = 0x4a0098b0, 936 .cm_l4sec_des3des_clkctrl = 0x4a0098b0,
936 .cm_l4sec_rng_clkctrl = 0x4a0098c0, 937 .cm_l4sec_rng_clkctrl = 0x4a0098c0,
937 .cm_l4sec_sha2md51_clkctrl = 0x4a0098c8, 938 .cm_l4sec_sha2md51_clkctrl = 0x4a0098c8,
938 .cm_l4sec_cryptodma_clkctrl = 0x4a0098d8, 939 .cm_l4sec_cryptodma_clkctrl = 0x4a0098d8,
939 940
940 /* l4 wkup regs */ 941 /* l4 wkup regs */
941 .cm_abe_pll_ref_clksel = 0x4ae0610c, 942 .cm_abe_pll_ref_clksel = 0x4ae0610c,
942 .cm_sys_clksel = 0x4ae06110, 943 .cm_sys_clksel = 0x4ae06110,
943 .cm_wkup_clkstctrl = 0x4ae07800, 944 .cm_wkup_clkstctrl = 0x4ae07800,
944 .cm_wkup_l4wkup_clkctrl = 0x4ae07820, 945 .cm_wkup_l4wkup_clkctrl = 0x4ae07820,
945 .cm_wkup_wdtimer1_clkctrl = 0x4ae07828, 946 .cm_wkup_wdtimer1_clkctrl = 0x4ae07828,
946 .cm_wkup_wdtimer2_clkctrl = 0x4ae07830, 947 .cm_wkup_wdtimer2_clkctrl = 0x4ae07830,
947 .cm_wkup_gpio1_clkctrl = 0x4ae07838, 948 .cm_wkup_gpio1_clkctrl = 0x4ae07838,
948 .cm_wkup_gptimer1_clkctrl = 0x4ae07840, 949 .cm_wkup_gptimer1_clkctrl = 0x4ae07840,
949 .cm_wkup_gptimer12_clkctrl = 0x4ae07848, 950 .cm_wkup_gptimer12_clkctrl = 0x4ae07848,
950 .cm_wkup_sarram_clkctrl = 0x4ae07860, 951 .cm_wkup_sarram_clkctrl = 0x4ae07860,
951 .cm_wkup_keyboard_clkctrl = 0x4ae07878, 952 .cm_wkup_keyboard_clkctrl = 0x4ae07878,
952 .cm_wkupaon_scrm_clkctrl = 0x4ae07890, 953 .cm_wkupaon_scrm_clkctrl = 0x4ae07890,
953 .prm_rstctrl = 0x4ae07d00, 954 .prm_rstctrl = 0x4ae07d00,
954 .prm_rstst = 0x4ae07d04, 955 .prm_rstst = 0x4ae07d04,
956 .prm_rsttime = 0x4ae07d08,
955 .prm_vc_val_bypass = 0x4ae07da0, 957 .prm_vc_val_bypass = 0x4ae07da0,
956 .prm_vc_cfg_i2c_mode = 0x4ae07db4, 958 .prm_vc_cfg_i2c_mode = 0x4ae07db4,
957 .prm_vc_cfg_i2c_clk = 0x4ae07db8, 959 .prm_vc_cfg_i2c_clk = 0x4ae07db8,
958 }; 960 };
959 961
arch/arm/include/asm/arch-omap4/sys_proto.h
Diff comments   View file @ 0b1b60c
1 /* 1 /*
2 * (C) Copyright 2010 2 * (C) Copyright 2010
3 * Texas Instruments, <www.ti.com> 3 * Texas Instruments, <www.ti.com>
4 * 4 *
5 * This program is free software; you can redistribute it and/or 5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License as 6 * modify it under the terms of the GNU General Public License as
7 * published by the Free Software Foundation; either version 2 of 7 * published by the Free Software Foundation; either version 2 of
8 * the License, or (at your option) any later version. 8 * the License, or (at your option) any later version.
9 * 9 *
10 * This program is distributed in the hope that it will be useful, 10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details. 13 * GNU General Public License for more details.
14 * 14 *
15 * You should have received a copy of the GNU General Public License 15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software 16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
18 * MA 02111-1307 USA 18 * MA 02111-1307 USA
19 */ 19 */
20 20
21 #ifndef _SYS_PROTO_H_ 21 #ifndef _SYS_PROTO_H_
22 #define _SYS_PROTO_H_ 22 #define _SYS_PROTO_H_
23 23
24 #include <asm/arch/omap.h> 24 #include <asm/arch/omap.h>
25 #include <asm/arch/clocks.h> 25 #include <asm/arch/clocks.h>
26 #include <asm/io.h> 26 #include <asm/io.h>
27 #include <asm/omap_common.h> 27 #include <asm/omap_common.h>
28 #include <asm/arch/mux_omap4.h> 28 #include <asm/arch/mux_omap4.h>
29 29
30 struct omap_sysinfo { 30 struct omap_sysinfo {
31 char *board_string; 31 char *board_string;
32 }; 32 };
33 extern const struct omap_sysinfo sysinfo; 33 extern const struct omap_sysinfo sysinfo;
34 34
35 void gpmc_init(void); 35 void gpmc_init(void);
36 void watchdog_init(void); 36 void watchdog_init(void);
37 u32 get_device_type(void); 37 u32 get_device_type(void);
38 void do_set_mux(u32 base, struct pad_conf_entry const *array, int size); 38 void do_set_mux(u32 base, struct pad_conf_entry const *array, int size);
39 void set_muxconf_regs_essential(void); 39 void set_muxconf_regs_essential(void);
40 void set_muxconf_regs_non_essential(void); 40 void set_muxconf_regs_non_essential(void);
41 void sr32(void *, u32, u32, u32); 41 void sr32(void *, u32, u32, u32);
42 u32 wait_on_value(u32, u32, void *, u32); 42 u32 wait_on_value(u32, u32, void *, u32);
43 void sdelay(unsigned long); 43 void sdelay(unsigned long);
44 void set_pl310_ctrl_reg(u32 val); 44 void set_pl310_ctrl_reg(u32 val);
45 void setup_clocks_for_console(void); 45 void setup_clocks_for_console(void);
46 void prcm_init(void); 46 void prcm_init(void);
47 void bypass_dpll(u32 const base); 47 void bypass_dpll(u32 const base);
48 void freq_update_core(void); 48 void freq_update_core(void);
49 u32 get_sys_clk_freq(void); 49 u32 get_sys_clk_freq(void);
50 u32 omap4_ddr_clk(void); 50 u32 omap4_ddr_clk(void);
51 void cancel_out(u32 *num, u32 *den, u32 den_limit); 51 void cancel_out(u32 *num, u32 *den, u32 den_limit);
52 void sdram_init(void); 52 void sdram_init(void);
53 u32 omap_sdram_size(void); 53 u32 omap_sdram_size(void);
54 u32 cortex_rev(void); 54 u32 cortex_rev(void);
55 void init_omap_revision(void); 55 void init_omap_revision(void);
56 void do_io_settings(void); 56 void do_io_settings(void);
57 void omap_vc_init(u16 speed_khz); 57 void omap_vc_init(u16 speed_khz);
58 int omap_vc_bypass_send_value(u8 sa, u8 reg_addr, u8 reg_data); 58 int omap_vc_bypass_send_value(u8 sa, u8 reg_addr, u8 reg_data);
59 u32 warm_reset(void); 59 u32 warm_reset(void);
60 void force_emif_self_refresh(void); 60 void force_emif_self_refresh(void);
61 void setup_warmreset_time(void);
61 /* 62 /*
62 * This is used to verify if the configuration header 63 * This is used to verify if the configuration header
63 * was executed by Romcode prior to control of transfer 64 * was executed by Romcode prior to control of transfer
64 * to the bootloader. SPL is responsible for saving and 65 * to the bootloader. SPL is responsible for saving and
65 * passing this to the u-boot. 66 * passing this to the u-boot.
66 */ 67 */
67 extern struct omap_boot_parameters boot_params; 68 extern struct omap_boot_parameters boot_params;
68 69
69 static inline u32 running_from_sdram(void) 70 static inline u32 running_from_sdram(void)
70 { 71 {
71 u32 pc; 72 u32 pc;
72 asm volatile ("mov %0, pc" : "=r" (pc)); 73 asm volatile ("mov %0, pc" : "=r" (pc));
73 return ((pc >= OMAP44XX_DRAM_ADDR_SPACE_START) && 74 return ((pc >= OMAP44XX_DRAM_ADDR_SPACE_START) &&
74 (pc < OMAP44XX_DRAM_ADDR_SPACE_END)); 75 (pc < OMAP44XX_DRAM_ADDR_SPACE_END));
75 } 76 }
76 77
77 static inline u8 uboot_loaded_by_spl(void) 78 static inline u8 uboot_loaded_by_spl(void)
78 { 79 {
79 /* 80 /*
80 * u-boot can be running from sdram either because of configuration 81 * u-boot can be running from sdram either because of configuration
81 * Header or by SPL. If because of CH, then the romcode sets the 82 * Header or by SPL. If because of CH, then the romcode sets the
82 * CHSETTINGS executed bit to true in the boot parameter structure that 83 * CHSETTINGS executed bit to true in the boot parameter structure that
83 * it passes to the bootloader.This parameter is stored in the ch_flags 84 * it passes to the bootloader.This parameter is stored in the ch_flags
84 * variable by both SPL and u-boot.Check out for CHSETTINGS, which is a 85 * variable by both SPL and u-boot.Check out for CHSETTINGS, which is a
85 * mandatory section if CH is present. 86 * mandatory section if CH is present.
86 */ 87 */
87 if ((boot_params.ch_flags) & (CH_FLAGS_CHSETTINGS)) 88 if ((boot_params.ch_flags) & (CH_FLAGS_CHSETTINGS))
88 return 0; 89 return 0;
89 else 90 else
90 return running_from_sdram(); 91 return running_from_sdram();
91 } 92 }
92 /* 93 /*
93 * The basic hardware init of OMAP(s_init()) can happen in 4 94 * The basic hardware init of OMAP(s_init()) can happen in 4
94 * different contexts: 95 * different contexts:
95 * 1. SPL running from SRAM 96 * 1. SPL running from SRAM
96 * 2. U-Boot running from FLASH 97 * 2. U-Boot running from FLASH
97 * 3. Non-XIP U-Boot loaded to SDRAM by SPL 98 * 3. Non-XIP U-Boot loaded to SDRAM by SPL
98 * 4. Non-XIP U-Boot loaded to SDRAM by ROM code using the 99 * 4. Non-XIP U-Boot loaded to SDRAM by ROM code using the
99 * Configuration Header feature 100 * Configuration Header feature
100 * 101 *
101 * This function finds this context. 102 * This function finds this context.
102 * Defining as inline may help in compiling out unused functions in SPL 103 * Defining as inline may help in compiling out unused functions in SPL
103 */ 104 */
104 static inline u32 omap_hw_init_context(void) 105 static inline u32 omap_hw_init_context(void)
105 { 106 {
106 #ifdef CONFIG_SPL_BUILD 107 #ifdef CONFIG_SPL_BUILD
107 return OMAP_INIT_CONTEXT_SPL; 108 return OMAP_INIT_CONTEXT_SPL;
108 #else 109 #else
109 if (uboot_loaded_by_spl()) 110 if (uboot_loaded_by_spl())
110 return OMAP_INIT_CONTEXT_UBOOT_AFTER_SPL; 111 return OMAP_INIT_CONTEXT_UBOOT_AFTER_SPL;
111 else if (running_from_sdram()) 112 else if (running_from_sdram())
112 return OMAP_INIT_CONTEXT_UBOOT_AFTER_CH; 113 return OMAP_INIT_CONTEXT_UBOOT_AFTER_CH;
113 else 114 else
114 return OMAP_INIT_CONTEXT_UBOOT_FROM_NOR; 115 return OMAP_INIT_CONTEXT_UBOOT_FROM_NOR;
115 #endif 116 #endif
116 } 117 }
117 118
118 #endif 119 #endif
119 120
arch/arm/include/asm/arch-omap5/clocks.h
Diff comments   View file @ 0b1b60c
1 /* 1 /*
2 * (C) Copyright 2010 2 * (C) Copyright 2010
3 * Texas Instruments, <www.ti.com> 3 * Texas Instruments, <www.ti.com>
4 * 4 *
5 * Aneesh V <aneesh@ti.com> 5 * Aneesh V <aneesh@ti.com>
6 * Sricharan R <r.sricharan@ti.com> 6 * Sricharan R <r.sricharan@ti.com>
7 * 7 *
8 * See file CREDITS for list of people who contributed to this 8 * See file CREDITS for list of people who contributed to this
9 * project. 9 * project.
10 * 10 *
11 * This program is free software; you can redistribute it and/or 11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as 12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of 13 * published by the Free Software Foundation; either version 2 of
14 * the License, or (at your option) any later version. 14 * the License, or (at your option) any later version.
15 * 15 *
16 * This program is distributed in the hope that it will be useful, 16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of 17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details. 19 * GNU General Public License for more details.
20 * 20 *
21 * You should have received a copy of the GNU General Public License 21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software 22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
24 * MA 02111-1307 USA 24 * MA 02111-1307 USA
25 */ 25 */
26 #ifndef _CLOCKS_OMAP5_H_ 26 #ifndef _CLOCKS_OMAP5_H_
27 #define _CLOCKS_OMAP5_H_ 27 #define _CLOCKS_OMAP5_H_
28 #include <common.h> 28 #include <common.h>
29 #include <asm/omap_common.h> 29 #include <asm/omap_common.h>
30 30
31 /* 31 /*
32 * Assuming a maximum of 1.5 GHz ARM speed and a minimum of 2 cycles per 32 * Assuming a maximum of 1.5 GHz ARM speed and a minimum of 2 cycles per
33 * loop, allow for a minimum of 2 ms wait (in reality the wait will be 33 * loop, allow for a minimum of 2 ms wait (in reality the wait will be
34 * much more than that) 34 * much more than that)
35 */ 35 */
36 #define LDELAY 1000000 36 #define LDELAY 1000000
37 37
38 #define CM_CLKMODE_DPLL_CORE (OMAP54XX_L4_CORE_BASE + 0x4120) 38 #define CM_CLKMODE_DPLL_CORE (OMAP54XX_L4_CORE_BASE + 0x4120)
39 #define CM_CLKMODE_DPLL_PER (OMAP54XX_L4_CORE_BASE + 0x8140) 39 #define CM_CLKMODE_DPLL_PER (OMAP54XX_L4_CORE_BASE + 0x8140)
40 #define CM_CLKMODE_DPLL_MPU (OMAP54XX_L4_CORE_BASE + 0x4160) 40 #define CM_CLKMODE_DPLL_MPU (OMAP54XX_L4_CORE_BASE + 0x4160)
41 #define CM_CLKSEL_CORE (OMAP54XX_L4_CORE_BASE + 0x4100) 41 #define CM_CLKSEL_CORE (OMAP54XX_L4_CORE_BASE + 0x4100)
42 42
43 /* DPLL register offsets */ 43 /* DPLL register offsets */
44 #define CM_CLKMODE_DPLL 0 44 #define CM_CLKMODE_DPLL 0
45 #define CM_IDLEST_DPLL 0x4 45 #define CM_IDLEST_DPLL 0x4
46 #define CM_AUTOIDLE_DPLL 0x8 46 #define CM_AUTOIDLE_DPLL 0x8
47 #define CM_CLKSEL_DPLL 0xC 47 #define CM_CLKSEL_DPLL 0xC
48 48
49 #define DPLL_CLKOUT_DIV_MASK 0x1F /* post-divider mask */ 49 #define DPLL_CLKOUT_DIV_MASK 0x1F /* post-divider mask */
50 50
51 /* CM_DLL_CTRL */ 51 /* CM_DLL_CTRL */
52 #define CM_DLL_CTRL_OVERRIDE_SHIFT 0 52 #define CM_DLL_CTRL_OVERRIDE_SHIFT 0
53 #define CM_DLL_CTRL_OVERRIDE_MASK (1 << 0) 53 #define CM_DLL_CTRL_OVERRIDE_MASK (1 << 0)
54 #define CM_DLL_CTRL_NO_OVERRIDE 0 54 #define CM_DLL_CTRL_NO_OVERRIDE 0
55 55
56 /* CM_CLKMODE_DPLL */ 56 /* CM_CLKMODE_DPLL */
57 #define CM_CLKMODE_DPLL_REGM4XEN_SHIFT 11 57 #define CM_CLKMODE_DPLL_REGM4XEN_SHIFT 11
58 #define CM_CLKMODE_DPLL_REGM4XEN_MASK (1 << 11) 58 #define CM_CLKMODE_DPLL_REGM4XEN_MASK (1 << 11)
59 #define CM_CLKMODE_DPLL_LPMODE_EN_SHIFT 10 59 #define CM_CLKMODE_DPLL_LPMODE_EN_SHIFT 10
60 #define CM_CLKMODE_DPLL_LPMODE_EN_MASK (1 << 10) 60 #define CM_CLKMODE_DPLL_LPMODE_EN_MASK (1 << 10)
61 #define CM_CLKMODE_DPLL_RELOCK_RAMP_EN_SHIFT 9 61 #define CM_CLKMODE_DPLL_RELOCK_RAMP_EN_SHIFT 9
62 #define CM_CLKMODE_DPLL_RELOCK_RAMP_EN_MASK (1 << 9) 62 #define CM_CLKMODE_DPLL_RELOCK_RAMP_EN_MASK (1 << 9)
63 #define CM_CLKMODE_DPLL_DRIFTGUARD_EN_SHIFT 8 63 #define CM_CLKMODE_DPLL_DRIFTGUARD_EN_SHIFT 8
64 #define CM_CLKMODE_DPLL_DRIFTGUARD_EN_MASK (1 << 8) 64 #define CM_CLKMODE_DPLL_DRIFTGUARD_EN_MASK (1 << 8)
65 #define CM_CLKMODE_DPLL_RAMP_RATE_SHIFT 5 65 #define CM_CLKMODE_DPLL_RAMP_RATE_SHIFT 5
66 #define CM_CLKMODE_DPLL_RAMP_RATE_MASK (0x7 << 5) 66 #define CM_CLKMODE_DPLL_RAMP_RATE_MASK (0x7 << 5)
67 #define CM_CLKMODE_DPLL_EN_SHIFT 0 67 #define CM_CLKMODE_DPLL_EN_SHIFT 0
68 #define CM_CLKMODE_DPLL_EN_MASK (0x7 << 0) 68 #define CM_CLKMODE_DPLL_EN_MASK (0x7 << 0)
69 69
70 #define CM_CLKMODE_DPLL_DPLL_EN_SHIFT 0 70 #define CM_CLKMODE_DPLL_DPLL_EN_SHIFT 0
71 #define CM_CLKMODE_DPLL_DPLL_EN_MASK 7 71 #define CM_CLKMODE_DPLL_DPLL_EN_MASK 7
72 72
73 #define DPLL_EN_STOP 1 73 #define DPLL_EN_STOP 1
74 #define DPLL_EN_MN_BYPASS 4 74 #define DPLL_EN_MN_BYPASS 4
75 #define DPLL_EN_LOW_POWER_BYPASS 5 75 #define DPLL_EN_LOW_POWER_BYPASS 5
76 #define DPLL_EN_FAST_RELOCK_BYPASS 6 76 #define DPLL_EN_FAST_RELOCK_BYPASS 6
77 #define DPLL_EN_LOCK 7 77 #define DPLL_EN_LOCK 7
78 78
79 /* CM_IDLEST_DPLL fields */ 79 /* CM_IDLEST_DPLL fields */
80 #define ST_DPLL_CLK_MASK 1 80 #define ST_DPLL_CLK_MASK 1
81 81
82 /* SGX */ 82 /* SGX */
83 #define CLKSEL_GPU_HYD_GCLK_MASK (1 << 25) 83 #define CLKSEL_GPU_HYD_GCLK_MASK (1 << 25)
84 #define CLKSEL_GPU_CORE_GCLK_MASK (1 << 24) 84 #define CLKSEL_GPU_CORE_GCLK_MASK (1 << 24)
85 85
86 /* CM_CLKSEL_DPLL */ 86 /* CM_CLKSEL_DPLL */
87 #define CM_CLKSEL_DPLL_DPLL_SD_DIV_SHIFT 24 87 #define CM_CLKSEL_DPLL_DPLL_SD_DIV_SHIFT 24
88 #define CM_CLKSEL_DPLL_DPLL_SD_DIV_MASK (0xFF << 24) 88 #define CM_CLKSEL_DPLL_DPLL_SD_DIV_MASK (0xFF << 24)
89 #define CM_CLKSEL_DPLL_M_SHIFT 8 89 #define CM_CLKSEL_DPLL_M_SHIFT 8
90 #define CM_CLKSEL_DPLL_M_MASK (0x7FF << 8) 90 #define CM_CLKSEL_DPLL_M_MASK (0x7FF << 8)
91 #define CM_CLKSEL_DPLL_N_SHIFT 0 91 #define CM_CLKSEL_DPLL_N_SHIFT 0
92 #define CM_CLKSEL_DPLL_N_MASK 0x7F 92 #define CM_CLKSEL_DPLL_N_MASK 0x7F
93 #define CM_CLKSEL_DCC_EN_SHIFT 22 93 #define CM_CLKSEL_DCC_EN_SHIFT 22
94 #define CM_CLKSEL_DCC_EN_MASK (1 << 22) 94 #define CM_CLKSEL_DCC_EN_MASK (1 << 22)
95 95
96 #define OMAP4_DPLL_MAX_N 127 96 #define OMAP4_DPLL_MAX_N 127
97 97
98 /* CM_SYS_CLKSEL */ 98 /* CM_SYS_CLKSEL */
99 #define CM_SYS_CLKSEL_SYS_CLKSEL_MASK 7 99 #define CM_SYS_CLKSEL_SYS_CLKSEL_MASK 7
100 100
101 /* CM_CLKSEL_CORE */ 101 /* CM_CLKSEL_CORE */
102 #define CLKSEL_CORE_SHIFT 0 102 #define CLKSEL_CORE_SHIFT 0
103 #define CLKSEL_L3_SHIFT 4 103 #define CLKSEL_L3_SHIFT 4
104 #define CLKSEL_L4_SHIFT 8 104 #define CLKSEL_L4_SHIFT 8
105 105
106 #define CLKSEL_CORE_X2_DIV_1 0 106 #define CLKSEL_CORE_X2_DIV_1 0
107 #define CLKSEL_L3_CORE_DIV_2 1 107 #define CLKSEL_L3_CORE_DIV_2 1
108 #define CLKSEL_L4_L3_DIV_2 1 108 #define CLKSEL_L4_L3_DIV_2 1
109 109
110 /* CM_ABE_PLL_REF_CLKSEL */ 110 /* CM_ABE_PLL_REF_CLKSEL */
111 #define CM_ABE_PLL_REF_CLKSEL_CLKSEL_SHIFT 0 111 #define CM_ABE_PLL_REF_CLKSEL_CLKSEL_SHIFT 0
112 #define CM_ABE_PLL_REF_CLKSEL_CLKSEL_MASK 1 112 #define CM_ABE_PLL_REF_CLKSEL_CLKSEL_MASK 1
113 #define CM_ABE_PLL_REF_CLKSEL_CLKSEL_SYSCLK 0 113 #define CM_ABE_PLL_REF_CLKSEL_CLKSEL_SYSCLK 0
114 #define CM_ABE_PLL_REF_CLKSEL_CLKSEL_32KCLK 1 114 #define CM_ABE_PLL_REF_CLKSEL_CLKSEL_32KCLK 1
115 115
116 /* CM_BYPCLK_DPLL_IVA */ 116 /* CM_BYPCLK_DPLL_IVA */
117 #define CM_BYPCLK_DPLL_IVA_CLKSEL_SHIFT 0 117 #define CM_BYPCLK_DPLL_IVA_CLKSEL_SHIFT 0
118 #define CM_BYPCLK_DPLL_IVA_CLKSEL_MASK 3 118 #define CM_BYPCLK_DPLL_IVA_CLKSEL_MASK 3
119 119
120 #define DPLL_IVA_CLKSEL_CORE_X2_DIV_2 1 120 #define DPLL_IVA_CLKSEL_CORE_X2_DIV_2 1
121 121
122 /* CM_SHADOW_FREQ_CONFIG1 */ 122 /* CM_SHADOW_FREQ_CONFIG1 */
123 #define SHADOW_FREQ_CONFIG1_FREQ_UPDATE_MASK 1 123 #define SHADOW_FREQ_CONFIG1_FREQ_UPDATE_MASK 1
124 #define SHADOW_FREQ_CONFIG1_DLL_OVERRIDE_MASK 4 124 #define SHADOW_FREQ_CONFIG1_DLL_OVERRIDE_MASK 4
125 #define SHADOW_FREQ_CONFIG1_DLL_RESET_MASK 8 125 #define SHADOW_FREQ_CONFIG1_DLL_RESET_MASK 8
126 126
127 #define SHADOW_FREQ_CONFIG1_DPLL_EN_SHIFT 8 127 #define SHADOW_FREQ_CONFIG1_DPLL_EN_SHIFT 8
128 #define SHADOW_FREQ_CONFIG1_DPLL_EN_MASK (7 << 8) 128 #define SHADOW_FREQ_CONFIG1_DPLL_EN_MASK (7 << 8)
129 129
130 #define SHADOW_FREQ_CONFIG1_M2_DIV_SHIFT 11 130 #define SHADOW_FREQ_CONFIG1_M2_DIV_SHIFT 11
131 #define SHADOW_FREQ_CONFIG1_M2_DIV_MASK (0x1F << 11) 131 #define SHADOW_FREQ_CONFIG1_M2_DIV_MASK (0x1F << 11)
132 132
133 /*CM_<clock_domain>__CLKCTRL */ 133 /*CM_<clock_domain>__CLKCTRL */
134 #define CD_CLKCTRL_CLKTRCTRL_SHIFT 0 134 #define CD_CLKCTRL_CLKTRCTRL_SHIFT 0
135 #define CD_CLKCTRL_CLKTRCTRL_MASK 3 135 #define CD_CLKCTRL_CLKTRCTRL_MASK 3
136 136
137 #define CD_CLKCTRL_CLKTRCTRL_NO_SLEEP 0 137 #define CD_CLKCTRL_CLKTRCTRL_NO_SLEEP 0
138 #define CD_CLKCTRL_CLKTRCTRL_SW_SLEEP 1 138 #define CD_CLKCTRL_CLKTRCTRL_SW_SLEEP 1
139 #define CD_CLKCTRL_CLKTRCTRL_SW_WKUP 2 139 #define CD_CLKCTRL_CLKTRCTRL_SW_WKUP 2
140 #define CD_CLKCTRL_CLKTRCTRL_HW_AUTO 3 140 #define CD_CLKCTRL_CLKTRCTRL_HW_AUTO 3
141 141
142 142
143 /* CM_<clock_domain>_<module>_CLKCTRL */ 143 /* CM_<clock_domain>_<module>_CLKCTRL */
144 #define MODULE_CLKCTRL_MODULEMODE_SHIFT 0 144 #define MODULE_CLKCTRL_MODULEMODE_SHIFT 0
145 #define MODULE_CLKCTRL_MODULEMODE_MASK 3 145 #define MODULE_CLKCTRL_MODULEMODE_MASK 3
146 #define MODULE_CLKCTRL_IDLEST_SHIFT 16 146 #define MODULE_CLKCTRL_IDLEST_SHIFT 16
147 #define MODULE_CLKCTRL_IDLEST_MASK (3 << 16) 147 #define MODULE_CLKCTRL_IDLEST_MASK (3 << 16)
148 148
149 #define MODULE_CLKCTRL_MODULEMODE_SW_DISABLE 0 149 #define MODULE_CLKCTRL_MODULEMODE_SW_DISABLE 0
150 #define MODULE_CLKCTRL_MODULEMODE_HW_AUTO 1 150 #define MODULE_CLKCTRL_MODULEMODE_HW_AUTO 1
151 #define MODULE_CLKCTRL_MODULEMODE_SW_EXPLICIT_EN 2 151 #define MODULE_CLKCTRL_MODULEMODE_SW_EXPLICIT_EN 2
152 152
153 #define MODULE_CLKCTRL_IDLEST_FULLY_FUNCTIONAL 0 153 #define MODULE_CLKCTRL_IDLEST_FULLY_FUNCTIONAL 0
154 #define MODULE_CLKCTRL_IDLEST_TRANSITIONING 1 154 #define MODULE_CLKCTRL_IDLEST_TRANSITIONING 1
155 #define MODULE_CLKCTRL_IDLEST_IDLE 2 155 #define MODULE_CLKCTRL_IDLEST_IDLE 2
156 #define MODULE_CLKCTRL_IDLEST_DISABLED 3 156 #define MODULE_CLKCTRL_IDLEST_DISABLED 3
157 157
158 /* CM_L4PER_GPIO4_CLKCTRL */ 158 /* CM_L4PER_GPIO4_CLKCTRL */
159 #define GPIO4_CLKCTRL_OPTFCLKEN_MASK (1 << 8) 159 #define GPIO4_CLKCTRL_OPTFCLKEN_MASK (1 << 8)
160 160
161 /* CM_L3INIT_HSMMCn_CLKCTRL */ 161 /* CM_L3INIT_HSMMCn_CLKCTRL */
162 #define HSMMC_CLKCTRL_CLKSEL_MASK (1 << 24) 162 #define HSMMC_CLKCTRL_CLKSEL_MASK (1 << 24)
163 #define HSMMC_CLKCTRL_CLKSEL_DIV_MASK (1 << 25) 163 #define HSMMC_CLKCTRL_CLKSEL_DIV_MASK (1 << 25)
164 164
165 /* CM_WKUP_GPTIMER1_CLKCTRL */ 165 /* CM_WKUP_GPTIMER1_CLKCTRL */
166 #define GPTIMER1_CLKCTRL_CLKSEL_MASK (1 << 24) 166 #define GPTIMER1_CLKCTRL_CLKSEL_MASK (1 << 24)
167 167
168 /* CM_CAM_ISS_CLKCTRL */ 168 /* CM_CAM_ISS_CLKCTRL */
169 #define ISS_CLKCTRL_OPTFCLKEN_MASK (1 << 8) 169 #define ISS_CLKCTRL_OPTFCLKEN_MASK (1 << 8)
170 170
171 /* CM_DSS_DSS_CLKCTRL */ 171 /* CM_DSS_DSS_CLKCTRL */
172 #define DSS_CLKCTRL_OPTFCLKEN_MASK 0xF00 172 #define DSS_CLKCTRL_OPTFCLKEN_MASK 0xF00
173 173
174 /* CM_L3INIT_USBPHY_CLKCTRL */ 174 /* CM_L3INIT_USBPHY_CLKCTRL */
175 #define USBPHY_CLKCTRL_OPTFCLKEN_PHY_48M_MASK 8 175 #define USBPHY_CLKCTRL_OPTFCLKEN_PHY_48M_MASK 8
176 176
177 /* CM_MPU_MPU_CLKCTRL */ 177 /* CM_MPU_MPU_CLKCTRL */
178 #define MPU_CLKCTRL_CLKSEL_EMIF_DIV_MODE_SHIFT 24 178 #define MPU_CLKCTRL_CLKSEL_EMIF_DIV_MODE_SHIFT 24
179 #define MPU_CLKCTRL_CLKSEL_EMIF_DIV_MODE_MASK (3 << 24) 179 #define MPU_CLKCTRL_CLKSEL_EMIF_DIV_MODE_MASK (3 << 24)
180 #define MPU_CLKCTRL_CLKSEL_ABE_DIV_MODE_SHIFT 26 180 #define MPU_CLKCTRL_CLKSEL_ABE_DIV_MODE_SHIFT 26
181 #define MPU_CLKCTRL_CLKSEL_ABE_DIV_MODE_MASK (1 << 26) 181 #define MPU_CLKCTRL_CLKSEL_ABE_DIV_MODE_MASK (1 << 26)
182 182
183 /* CM_WKUPAON_SCRM_CLKCTRL */ 183 /* CM_WKUPAON_SCRM_CLKCTRL */
184 #define OPTFCLKEN_SCRM_PER_SHIFT 9 184 #define OPTFCLKEN_SCRM_PER_SHIFT 9
185 #define OPTFCLKEN_SCRM_PER_MASK (1 << 9) 185 #define OPTFCLKEN_SCRM_PER_MASK (1 << 9)
186 #define OPTFCLKEN_SCRM_CORE_SHIFT 8 186 #define OPTFCLKEN_SCRM_CORE_SHIFT 8
187 #define OPTFCLKEN_SCRM_CORE_MASK (1 << 8) 187 #define OPTFCLKEN_SCRM_CORE_MASK (1 << 8)
188 188
189 /* CM_COREAON_IO_SRCOMP_CLKCTRL */ 189 /* CM_COREAON_IO_SRCOMP_CLKCTRL */
190 #define OPTFCLKEN_SRCOMP_FCLK_SHIFT 8 190 #define OPTFCLKEN_SRCOMP_FCLK_SHIFT 8
191 #define OPTFCLKEN_SRCOMP_FCLK_MASK (1 << 8) 191 #define OPTFCLKEN_SRCOMP_FCLK_MASK (1 << 8)
192 192
193 /* PRM_RSTTIME */
194 #define RSTTIME1_SHIFT 0
195 #define RSTTIME1_MASK (0x3ff << 0)
196
193 /* Clock frequencies */ 197 /* Clock frequencies */
194 #define OMAP_SYS_CLK_FREQ_38_4_MHZ 38400000 198 #define OMAP_SYS_CLK_FREQ_38_4_MHZ 38400000
195 #define OMAP_SYS_CLK_IND_38_4_MHZ 6 199 #define OMAP_SYS_CLK_IND_38_4_MHZ 6
196 #define OMAP_32K_CLK_FREQ 32768 200 #define OMAP_32K_CLK_FREQ 32768
197 201
198 /* PRM_VC_VAL_BYPASS */ 202 /* PRM_VC_VAL_BYPASS */
199 #define PRM_VC_I2C_CHANNEL_FREQ_KHZ 400 203 #define PRM_VC_I2C_CHANNEL_FREQ_KHZ 400
200 204
201 /* SMPS */ 205 /* SMPS */
202 #define SMPS_I2C_SLAVE_ADDR 0x12 206 #define SMPS_I2C_SLAVE_ADDR 0x12
203 #define SMPS_REG_ADDR_12_MPU 0x23 207 #define SMPS_REG_ADDR_12_MPU 0x23
204 #define SMPS_REG_ADDR_45_IVA 0x2B 208 #define SMPS_REG_ADDR_45_IVA 0x2B
205 #define SMPS_REG_ADDR_8_CORE 0x37 209 #define SMPS_REG_ADDR_8_CORE 0x37
206 210
207 /* PALMAS VOLTAGE SETTINGS in mv for OPP_NOMINAL */ 211 /* PALMAS VOLTAGE SETTINGS in mv for OPP_NOMINAL */
208 /* ES1.0 settings */ 212 /* ES1.0 settings */
209 #define VDD_MPU 1040 213 #define VDD_MPU 1040
210 #define VDD_MM 1040 214 #define VDD_MM 1040
211 #define VDD_CORE 1040 215 #define VDD_CORE 1040
212 216
213 #define VDD_MPU_LOW 890 217 #define VDD_MPU_LOW 890
214 #define VDD_MM_LOW 890 218 #define VDD_MM_LOW 890
215 #define VDD_CORE_LOW 890 219 #define VDD_CORE_LOW 890
216 220
217 /* ES2.0 settings */ 221 /* ES2.0 settings */
218 #define VDD_MPU_ES2 1060 222 #define VDD_MPU_ES2 1060
219 #define VDD_MM_ES2 1025 223 #define VDD_MM_ES2 1025
220 #define VDD_CORE_ES2 1040 224 #define VDD_CORE_ES2 1040
221 225
222 #define VDD_MPU_ES2_HIGH 1250 226 #define VDD_MPU_ES2_HIGH 1250
223 #define VDD_MM_ES2_OD 1120 227 #define VDD_MM_ES2_OD 1120
224 228
225 #define VDD_MPU_ES2_LOW 880 229 #define VDD_MPU_ES2_LOW 880
226 #define VDD_MM_ES2_LOW 880 230 #define VDD_MM_ES2_LOW 880
227 231
228 /* Standard offset is 0.5v expressed in uv */ 232 /* Standard offset is 0.5v expressed in uv */
229 #define PALMAS_SMPS_BASE_VOLT_UV 500000 233 #define PALMAS_SMPS_BASE_VOLT_UV 500000
230 234
231 /* TPS */ 235 /* TPS */
232 #define TPS62361_I2C_SLAVE_ADDR 0x60 236 #define TPS62361_I2C_SLAVE_ADDR 0x60
233 #define TPS62361_REG_ADDR_SET0 0x0 237 #define TPS62361_REG_ADDR_SET0 0x0
234 #define TPS62361_REG_ADDR_SET1 0x1 238 #define TPS62361_REG_ADDR_SET1 0x1
235 #define TPS62361_REG_ADDR_SET2 0x2 239 #define TPS62361_REG_ADDR_SET2 0x2
236 #define TPS62361_REG_ADDR_SET3 0x3 240 #define TPS62361_REG_ADDR_SET3 0x3
237 #define TPS62361_REG_ADDR_CTRL 0x4 241 #define TPS62361_REG_ADDR_CTRL 0x4
238 #define TPS62361_REG_ADDR_TEMP 0x5 242 #define TPS62361_REG_ADDR_TEMP 0x5
239 #define TPS62361_REG_ADDR_RMP_CTRL 0x6 243 #define TPS62361_REG_ADDR_RMP_CTRL 0x6
240 #define TPS62361_REG_ADDR_CHIP_ID 0x8 244 #define TPS62361_REG_ADDR_CHIP_ID 0x8
241 #define TPS62361_REG_ADDR_CHIP_ID_2 0x9 245 #define TPS62361_REG_ADDR_CHIP_ID_2 0x9
242 246
243 #define TPS62361_BASE_VOLT_MV 500 247 #define TPS62361_BASE_VOLT_MV 500
244 #define TPS62361_VSEL0_GPIO 7 248 #define TPS62361_VSEL0_GPIO 7
245 249
246 /* Defines for DPLL setup */ 250 /* Defines for DPLL setup */
247 #define DPLL_LOCKED_FREQ_TOLERANCE_0 0 251 #define DPLL_LOCKED_FREQ_TOLERANCE_0 0
248 #define DPLL_LOCKED_FREQ_TOLERANCE_500_KHZ 500 252 #define DPLL_LOCKED_FREQ_TOLERANCE_500_KHZ 500
249 #define DPLL_LOCKED_FREQ_TOLERANCE_1_MHZ 1000 253 #define DPLL_LOCKED_FREQ_TOLERANCE_1_MHZ 1000
250 254
251 #define DPLL_NO_LOCK 0 255 #define DPLL_NO_LOCK 0
252 #define DPLL_LOCK 1 256 #define DPLL_LOCK 1
253 257
258 /*
259 * MAX value for PRM_RSTTIME[9:0]RSTTIME1 stored is 0x3ff.
260 * 0x3ff is in the no of FUNC_32K_CLK cycles. Converting cycles
261 * into microsec and passing the value.
262 */
263 #define CONFIG_DEFAULT_OMAP_RESET_TIME_MAX_USEC 31219
254 #endif /* _CLOCKS_OMAP5_H_ */ 264 #endif /* _CLOCKS_OMAP5_H_ */
255 265
arch/arm/include/asm/arch-omap5/sys_proto.h
Diff comments   View file @ 0b1b60c
1 /* 1 /*
2 * (C) Copyright 2010 2 * (C) Copyright 2010
3 * Texas Instruments, <www.ti.com> 3 * Texas Instruments, <www.ti.com>
4 * 4 *
5 * This program is free software; you can redistribute it and/or 5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License as 6 * modify it under the terms of the GNU General Public License as
7 * published by the Free Software Foundation; either version 2 of 7 * published by the Free Software Foundation; either version 2 of
8 * the License, or (at your option) any later version. 8 * the License, or (at your option) any later version.
9 * 9 *
10 * This program is distributed in the hope that it will be useful, 10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details. 13 * GNU General Public License for more details.
14 * 14 *
15 * You should have received a copy of the GNU General Public License 15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software 16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
18 * MA 02111-1307 USA 18 * MA 02111-1307 USA
19 */ 19 */
20 20
21 #ifndef _SYS_PROTO_H_ 21 #ifndef _SYS_PROTO_H_
22 #define _SYS_PROTO_H_ 22 #define _SYS_PROTO_H_
23 23
24 #include <asm/arch/omap.h> 24 #include <asm/arch/omap.h>
25 #include <asm/io.h> 25 #include <asm/io.h>
26 #include <asm/arch/clocks.h> 26 #include <asm/arch/clocks.h>
27 #include <asm/omap_common.h> 27 #include <asm/omap_common.h>
28 #include <asm/arch/clocks.h> 28 #include <asm/arch/clocks.h>
29 29
30 struct pad_conf_entry { 30 struct pad_conf_entry {
31 u32 offset; 31 u32 offset;
32 u32 val; 32 u32 val;
33 }; 33 };
34 34
35 struct omap_sysinfo { 35 struct omap_sysinfo {
36 char *board_string; 36 char *board_string;
37 }; 37 };
38 extern const struct omap_sysinfo sysinfo; 38 extern const struct omap_sysinfo sysinfo;
39 39
40 void gpmc_init(void); 40 void gpmc_init(void);
41 void watchdog_init(void); 41 void watchdog_init(void);
42 u32 get_device_type(void); 42 u32 get_device_type(void);
43 void do_set_mux(u32 base, struct pad_conf_entry const *array, int size); 43 void do_set_mux(u32 base, struct pad_conf_entry const *array, int size);
44 void set_muxconf_regs_essential(void); 44 void set_muxconf_regs_essential(void);
45 void set_muxconf_regs_non_essential(void); 45 void set_muxconf_regs_non_essential(void);
46 void sr32(void *, u32, u32, u32); 46 void sr32(void *, u32, u32, u32);
47 u32 wait_on_value(u32, u32, void *, u32); 47 u32 wait_on_value(u32, u32, void *, u32);
48 void sdelay(unsigned long); 48 void sdelay(unsigned long);
49 void setup_clocks_for_console(void); 49 void setup_clocks_for_console(void);
50 void prcm_init(void); 50 void prcm_init(void);
51 void bypass_dpll(u32 const base); 51 void bypass_dpll(u32 const base);
52 void freq_update_core(void); 52 void freq_update_core(void);
53 u32 get_sys_clk_freq(void); 53 u32 get_sys_clk_freq(void);
54 u32 omap5_ddr_clk(void); 54 u32 omap5_ddr_clk(void);
55 void cancel_out(u32 *num, u32 *den, u32 den_limit); 55 void cancel_out(u32 *num, u32 *den, u32 den_limit);
56 void sdram_init(void); 56 void sdram_init(void);
57 u32 omap_sdram_size(void); 57 u32 omap_sdram_size(void);
58 u32 cortex_rev(void); 58 u32 cortex_rev(void);
59 void init_omap_revision(void); 59 void init_omap_revision(void);
60 void do_io_settings(void); 60 void do_io_settings(void);
61 void omap_vc_init(u16 speed_khz); 61 void omap_vc_init(u16 speed_khz);
62 int omap_vc_bypass_send_value(u8 sa, u8 reg_addr, u8 reg_data); 62 int omap_vc_bypass_send_value(u8 sa, u8 reg_addr, u8 reg_data);
63 u32 warm_reset(void); 63 u32 warm_reset(void);
64 void force_emif_self_refresh(void); 64 void force_emif_self_refresh(void);
65 void get_ioregs(const struct ctrl_ioregs **regs); 65 void get_ioregs(const struct ctrl_ioregs **regs);
66 void srcomp_enable(void); 66 void srcomp_enable(void);
67 void setup_warmreset_time(void);
67 68
68 /* 69 /*
69 * This is used to verify if the configuration header 70 * This is used to verify if the configuration header
70 * was executed by Romcode prior to control of transfer 71 * was executed by Romcode prior to control of transfer
71 * to the bootloader. SPL is responsible for saving and 72 * to the bootloader. SPL is responsible for saving and
72 * passing this to the u-boot. 73 * passing this to the u-boot.
73 */ 74 */
74 extern struct omap_boot_parameters boot_params; 75 extern struct omap_boot_parameters boot_params;
75 76
76 static inline u32 running_from_sdram(void) 77 static inline u32 running_from_sdram(void)
77 { 78 {
78 u32 pc; 79 u32 pc;
79 asm volatile ("mov %0, pc" : "=r" (pc)); 80 asm volatile ("mov %0, pc" : "=r" (pc));
80 return ((pc >= OMAP54XX_DRAM_ADDR_SPACE_START) && 81 return ((pc >= OMAP54XX_DRAM_ADDR_SPACE_START) &&
81 (pc < OMAP54XX_DRAM_ADDR_SPACE_END)); 82 (pc < OMAP54XX_DRAM_ADDR_SPACE_END));
82 } 83 }
83 84
84 static inline u8 uboot_loaded_by_spl(void) 85 static inline u8 uboot_loaded_by_spl(void)
85 { 86 {
86 /* 87 /*
87 * u-boot can be running from sdram either because of configuration 88 * u-boot can be running from sdram either because of configuration
88 * Header or by SPL. If because of CH, then the romcode sets the 89 * Header or by SPL. If because of CH, then the romcode sets the
89 * CHSETTINGS executed bit to true in the boot parameter structure that 90 * CHSETTINGS executed bit to true in the boot parameter structure that
90 * it passes to the bootloader.This parameter is stored in the ch_flags 91 * it passes to the bootloader.This parameter is stored in the ch_flags
91 * variable by both SPL and u-boot.Check out for CHSETTINGS, which is a 92 * variable by both SPL and u-boot.Check out for CHSETTINGS, which is a
92 * mandatory section if CH is present. 93 * mandatory section if CH is present.
93 */ 94 */
94 if ((boot_params.ch_flags) & (CH_FLAGS_CHSETTINGS)) 95 if ((boot_params.ch_flags) & (CH_FLAGS_CHSETTINGS))
95 return 0; 96 return 0;
96 else 97 else
97 return running_from_sdram(); 98 return running_from_sdram();
98 } 99 }
99 /* 100 /*
100 * The basic hardware init of OMAP(s_init()) can happen in 4 101 * The basic hardware init of OMAP(s_init()) can happen in 4
101 * different contexts: 102 * different contexts:
102 * 1. SPL running from SRAM 103 * 1. SPL running from SRAM
103 * 2. U-Boot running from FLASH 104 * 2. U-Boot running from FLASH
104 * 3. Non-XIP U-Boot loaded to SDRAM by SPL 105 * 3. Non-XIP U-Boot loaded to SDRAM by SPL
105 * 4. Non-XIP U-Boot loaded to SDRAM by ROM code using the 106 * 4. Non-XIP U-Boot loaded to SDRAM by ROM code using the
106 * Configuration Header feature 107 * Configuration Header feature
107 * 108 *
108 * This function finds this context. 109 * This function finds this context.
109 * Defining as inline may help in compiling out unused functions in SPL 110 * Defining as inline may help in compiling out unused functions in SPL
110 */ 111 */
111 static inline u32 omap_hw_init_context(void) 112 static inline u32 omap_hw_init_context(void)
112 { 113 {
113 #ifdef CONFIG_SPL_BUILD 114 #ifdef CONFIG_SPL_BUILD
114 return OMAP_INIT_CONTEXT_SPL; 115 return OMAP_INIT_CONTEXT_SPL;
115 #else 116 #else
116 if (uboot_loaded_by_spl()) 117 if (uboot_loaded_by_spl())
117 return OMAP_INIT_CONTEXT_UBOOT_AFTER_SPL; 118 return OMAP_INIT_CONTEXT_UBOOT_AFTER_SPL;
118 else if (running_from_sdram()) 119 else if (running_from_sdram())
119 return OMAP_INIT_CONTEXT_UBOOT_AFTER_CH; 120 return OMAP_INIT_CONTEXT_UBOOT_AFTER_CH;
120 else 121 else
121 return OMAP_INIT_CONTEXT_UBOOT_FROM_NOR; 122 return OMAP_INIT_CONTEXT_UBOOT_FROM_NOR;
122 #endif 123 #endif
123 } 124 }
124 125
126 static inline u32 div_round_up(u32 num, u32 den)
127 {
128 return (num + den - 1)/den;
129 }
130
131 static inline u32 usec_to_32k(u32 usec)
132 {
133 return div_round_up(32768 * usec, 1000000);
134 }
125 #endif 135 #endif
126 136
arch/arm/include/asm/omap_common.h
Diff comments   View file @ 0b1b60c
1 /* 1 /*
2 * (C) Copyright 2010 2 * (C) Copyright 2010
3 * Texas Instruments, <www.ti.com> 3 * Texas Instruments, <www.ti.com>
4 * 4 *
5 * Aneesh V <aneesh@ti.com> 5 * Aneesh V <aneesh@ti.com>
6 * 6 *
7 * See file CREDITS for list of people who contributed to this 7 * See file CREDITS for list of people who contributed to this
8 * project. 8 * project.
9 * 9 *
10 * This program is free software; you can redistribute it and/or 10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as 11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of 12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version. 13 * the License, or (at your option) any later version.
14 * 14 *
15 * This program is distributed in the hope that it will be useful, 15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details. 18 * GNU General Public License for more details.
19 * 19 *
20 * You should have received a copy of the GNU General Public License 20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software 21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23 * MA 02111-1307 USA 23 * MA 02111-1307 USA
24 */ 24 */
25 #ifndef _OMAP_COMMON_H_ 25 #ifndef _OMAP_COMMON_H_
26 #define _OMAP_COMMON_H_ 26 #define _OMAP_COMMON_H_
27 27
28 #include <common.h> 28 #include <common.h>
29 29
30 #define NUM_SYS_CLKS 8 30 #define NUM_SYS_CLKS 8
31 31
32 struct prcm_regs { 32 struct prcm_regs {
33 /* cm1.ckgen */ 33 /* cm1.ckgen */
34 u32 cm_clksel_core; 34 u32 cm_clksel_core;
35 u32 cm_clksel_abe; 35 u32 cm_clksel_abe;
36 u32 cm_dll_ctrl; 36 u32 cm_dll_ctrl;
37 u32 cm_clkmode_dpll_core; 37 u32 cm_clkmode_dpll_core;
38 u32 cm_idlest_dpll_core; 38 u32 cm_idlest_dpll_core;
39 u32 cm_autoidle_dpll_core; 39 u32 cm_autoidle_dpll_core;
40 u32 cm_clksel_dpll_core; 40 u32 cm_clksel_dpll_core;
41 u32 cm_div_m2_dpll_core; 41 u32 cm_div_m2_dpll_core;
42 u32 cm_div_m3_dpll_core; 42 u32 cm_div_m3_dpll_core;
43 u32 cm_div_h11_dpll_core; 43 u32 cm_div_h11_dpll_core;
44 u32 cm_div_h12_dpll_core; 44 u32 cm_div_h12_dpll_core;
45 u32 cm_div_h13_dpll_core; 45 u32 cm_div_h13_dpll_core;
46 u32 cm_div_h14_dpll_core; 46 u32 cm_div_h14_dpll_core;
47 u32 cm_div_h21_dpll_core; 47 u32 cm_div_h21_dpll_core;
48 u32 cm_div_h24_dpll_core; 48 u32 cm_div_h24_dpll_core;
49 u32 cm_ssc_deltamstep_dpll_core; 49 u32 cm_ssc_deltamstep_dpll_core;
50 u32 cm_ssc_modfreqdiv_dpll_core; 50 u32 cm_ssc_modfreqdiv_dpll_core;
51 u32 cm_emu_override_dpll_core; 51 u32 cm_emu_override_dpll_core;
52 u32 cm_div_h22_dpllcore; 52 u32 cm_div_h22_dpllcore;
53 u32 cm_div_h23_dpll_core; 53 u32 cm_div_h23_dpll_core;
54 u32 cm_clkmode_dpll_mpu; 54 u32 cm_clkmode_dpll_mpu;
55 u32 cm_idlest_dpll_mpu; 55 u32 cm_idlest_dpll_mpu;
56 u32 cm_autoidle_dpll_mpu; 56 u32 cm_autoidle_dpll_mpu;
57 u32 cm_clksel_dpll_mpu; 57 u32 cm_clksel_dpll_mpu;
58 u32 cm_div_m2_dpll_mpu; 58 u32 cm_div_m2_dpll_mpu;
59 u32 cm_ssc_deltamstep_dpll_mpu; 59 u32 cm_ssc_deltamstep_dpll_mpu;
60 u32 cm_ssc_modfreqdiv_dpll_mpu; 60 u32 cm_ssc_modfreqdiv_dpll_mpu;
61 u32 cm_bypclk_dpll_mpu; 61 u32 cm_bypclk_dpll_mpu;
62 u32 cm_clkmode_dpll_iva; 62 u32 cm_clkmode_dpll_iva;
63 u32 cm_idlest_dpll_iva; 63 u32 cm_idlest_dpll_iva;
64 u32 cm_autoidle_dpll_iva; 64 u32 cm_autoidle_dpll_iva;
65 u32 cm_clksel_dpll_iva; 65 u32 cm_clksel_dpll_iva;
66 u32 cm_div_h11_dpll_iva; 66 u32 cm_div_h11_dpll_iva;
67 u32 cm_div_h12_dpll_iva; 67 u32 cm_div_h12_dpll_iva;
68 u32 cm_ssc_deltamstep_dpll_iva; 68 u32 cm_ssc_deltamstep_dpll_iva;
69 u32 cm_ssc_modfreqdiv_dpll_iva; 69 u32 cm_ssc_modfreqdiv_dpll_iva;
70 u32 cm_bypclk_dpll_iva; 70 u32 cm_bypclk_dpll_iva;
71 u32 cm_clkmode_dpll_abe; 71 u32 cm_clkmode_dpll_abe;
72 u32 cm_idlest_dpll_abe; 72 u32 cm_idlest_dpll_abe;
73 u32 cm_autoidle_dpll_abe; 73 u32 cm_autoidle_dpll_abe;
74 u32 cm_clksel_dpll_abe; 74 u32 cm_clksel_dpll_abe;
75 u32 cm_div_m2_dpll_abe; 75 u32 cm_div_m2_dpll_abe;
76 u32 cm_div_m3_dpll_abe; 76 u32 cm_div_m3_dpll_abe;
77 u32 cm_ssc_deltamstep_dpll_abe; 77 u32 cm_ssc_deltamstep_dpll_abe;
78 u32 cm_ssc_modfreqdiv_dpll_abe; 78 u32 cm_ssc_modfreqdiv_dpll_abe;
79 u32 cm_clkmode_dpll_ddrphy; 79 u32 cm_clkmode_dpll_ddrphy;
80 u32 cm_idlest_dpll_ddrphy; 80 u32 cm_idlest_dpll_ddrphy;
81 u32 cm_autoidle_dpll_ddrphy; 81 u32 cm_autoidle_dpll_ddrphy;
82 u32 cm_clksel_dpll_ddrphy; 82 u32 cm_clksel_dpll_ddrphy;
83 u32 cm_div_m2_dpll_ddrphy; 83 u32 cm_div_m2_dpll_ddrphy;
84 u32 cm_div_h11_dpll_ddrphy; 84 u32 cm_div_h11_dpll_ddrphy;
85 u32 cm_div_h12_dpll_ddrphy; 85 u32 cm_div_h12_dpll_ddrphy;
86 u32 cm_div_h13_dpll_ddrphy; 86 u32 cm_div_h13_dpll_ddrphy;
87 u32 cm_ssc_deltamstep_dpll_ddrphy; 87 u32 cm_ssc_deltamstep_dpll_ddrphy;
88 u32 cm_clkmode_dpll_dsp; 88 u32 cm_clkmode_dpll_dsp;
89 u32 cm_shadow_freq_config1; 89 u32 cm_shadow_freq_config1;
90 u32 cm_mpu_mpu_clkctrl; 90 u32 cm_mpu_mpu_clkctrl;
91 91
92 /* cm1.dsp */ 92 /* cm1.dsp */
93 u32 cm_dsp_clkstctrl; 93 u32 cm_dsp_clkstctrl;
94 u32 cm_dsp_dsp_clkctrl; 94 u32 cm_dsp_dsp_clkctrl;
95 95
96 /* cm1.abe */ 96 /* cm1.abe */
97 u32 cm1_abe_clkstctrl; 97 u32 cm1_abe_clkstctrl;
98 u32 cm1_abe_l4abe_clkctrl; 98 u32 cm1_abe_l4abe_clkctrl;
99 u32 cm1_abe_aess_clkctrl; 99 u32 cm1_abe_aess_clkctrl;
100 u32 cm1_abe_pdm_clkctrl; 100 u32 cm1_abe_pdm_clkctrl;
101 u32 cm1_abe_dmic_clkctrl; 101 u32 cm1_abe_dmic_clkctrl;
102 u32 cm1_abe_mcasp_clkctrl; 102 u32 cm1_abe_mcasp_clkctrl;
103 u32 cm1_abe_mcbsp1_clkctrl; 103 u32 cm1_abe_mcbsp1_clkctrl;
104 u32 cm1_abe_mcbsp2_clkctrl; 104 u32 cm1_abe_mcbsp2_clkctrl;
105 u32 cm1_abe_mcbsp3_clkctrl; 105 u32 cm1_abe_mcbsp3_clkctrl;
106 u32 cm1_abe_slimbus_clkctrl; 106 u32 cm1_abe_slimbus_clkctrl;
107 u32 cm1_abe_timer5_clkctrl; 107 u32 cm1_abe_timer5_clkctrl;
108 u32 cm1_abe_timer6_clkctrl; 108 u32 cm1_abe_timer6_clkctrl;
109 u32 cm1_abe_timer7_clkctrl; 109 u32 cm1_abe_timer7_clkctrl;
110 u32 cm1_abe_timer8_clkctrl; 110 u32 cm1_abe_timer8_clkctrl;
111 u32 cm1_abe_wdt3_clkctrl; 111 u32 cm1_abe_wdt3_clkctrl;
112 112
113 /* cm2.ckgen */ 113 /* cm2.ckgen */
114 u32 cm_clksel_mpu_m3_iss_root; 114 u32 cm_clksel_mpu_m3_iss_root;
115 u32 cm_clksel_usb_60mhz; 115 u32 cm_clksel_usb_60mhz;
116 u32 cm_scale_fclk; 116 u32 cm_scale_fclk;
117 u32 cm_core_dvfs_perf1; 117 u32 cm_core_dvfs_perf1;
118 u32 cm_core_dvfs_perf2; 118 u32 cm_core_dvfs_perf2;
119 u32 cm_core_dvfs_perf3; 119 u32 cm_core_dvfs_perf3;
120 u32 cm_core_dvfs_perf4; 120 u32 cm_core_dvfs_perf4;
121 u32 cm_core_dvfs_current; 121 u32 cm_core_dvfs_current;
122 u32 cm_iva_dvfs_perf_tesla; 122 u32 cm_iva_dvfs_perf_tesla;
123 u32 cm_iva_dvfs_perf_ivahd; 123 u32 cm_iva_dvfs_perf_ivahd;
124 u32 cm_iva_dvfs_perf_abe; 124 u32 cm_iva_dvfs_perf_abe;
125 u32 cm_iva_dvfs_current; 125 u32 cm_iva_dvfs_current;
126 u32 cm_clkmode_dpll_per; 126 u32 cm_clkmode_dpll_per;
127 u32 cm_idlest_dpll_per; 127 u32 cm_idlest_dpll_per;
128 u32 cm_autoidle_dpll_per; 128 u32 cm_autoidle_dpll_per;
129 u32 cm_clksel_dpll_per; 129 u32 cm_clksel_dpll_per;
130 u32 cm_div_m2_dpll_per; 130 u32 cm_div_m2_dpll_per;
131 u32 cm_div_m3_dpll_per; 131 u32 cm_div_m3_dpll_per;
132 u32 cm_div_h11_dpll_per; 132 u32 cm_div_h11_dpll_per;
133 u32 cm_div_h12_dpll_per; 133 u32 cm_div_h12_dpll_per;
134 u32 cm_div_h13_dpll_per; 134 u32 cm_div_h13_dpll_per;
135 u32 cm_div_h14_dpll_per; 135 u32 cm_div_h14_dpll_per;
136 u32 cm_ssc_deltamstep_dpll_per; 136 u32 cm_ssc_deltamstep_dpll_per;
137 u32 cm_ssc_modfreqdiv_dpll_per; 137 u32 cm_ssc_modfreqdiv_dpll_per;
138 u32 cm_emu_override_dpll_per; 138 u32 cm_emu_override_dpll_per;
139 u32 cm_clkmode_dpll_usb; 139 u32 cm_clkmode_dpll_usb;
140 u32 cm_idlest_dpll_usb; 140 u32 cm_idlest_dpll_usb;
141 u32 cm_autoidle_dpll_usb; 141 u32 cm_autoidle_dpll_usb;
142 u32 cm_clksel_dpll_usb; 142 u32 cm_clksel_dpll_usb;
143 u32 cm_div_m2_dpll_usb; 143 u32 cm_div_m2_dpll_usb;
144 u32 cm_ssc_deltamstep_dpll_usb; 144 u32 cm_ssc_deltamstep_dpll_usb;
145 u32 cm_ssc_modfreqdiv_dpll_usb; 145 u32 cm_ssc_modfreqdiv_dpll_usb;
146 u32 cm_clkdcoldo_dpll_usb; 146 u32 cm_clkdcoldo_dpll_usb;
147 u32 cm_clkmode_dpll_pcie_ref; 147 u32 cm_clkmode_dpll_pcie_ref;
148 u32 cm_clkmode_apll_pcie; 148 u32 cm_clkmode_apll_pcie;
149 u32 cm_idlest_apll_pcie; 149 u32 cm_idlest_apll_pcie;
150 u32 cm_div_m2_apll_pcie; 150 u32 cm_div_m2_apll_pcie;
151 u32 cm_clkvcoldo_apll_pcie; 151 u32 cm_clkvcoldo_apll_pcie;
152 u32 cm_clkmode_dpll_unipro; 152 u32 cm_clkmode_dpll_unipro;
153 u32 cm_idlest_dpll_unipro; 153 u32 cm_idlest_dpll_unipro;
154 u32 cm_autoidle_dpll_unipro; 154 u32 cm_autoidle_dpll_unipro;
155 u32 cm_clksel_dpll_unipro; 155 u32 cm_clksel_dpll_unipro;
156 u32 cm_div_m2_dpll_unipro; 156 u32 cm_div_m2_dpll_unipro;
157 u32 cm_ssc_deltamstep_dpll_unipro; 157 u32 cm_ssc_deltamstep_dpll_unipro;
158 u32 cm_ssc_modfreqdiv_dpll_unipro; 158 u32 cm_ssc_modfreqdiv_dpll_unipro;
159 159
160 /* cm2.core */ 160 /* cm2.core */
161 u32 cm_coreaon_bandgap_clkctrl; 161 u32 cm_coreaon_bandgap_clkctrl;
162 u32 cm_coreaon_io_srcomp_clkctrl; 162 u32 cm_coreaon_io_srcomp_clkctrl;
163 u32 cm_l3_1_clkstctrl; 163 u32 cm_l3_1_clkstctrl;
164 u32 cm_l3_1_dynamicdep; 164 u32 cm_l3_1_dynamicdep;
165 u32 cm_l3_1_l3_1_clkctrl; 165 u32 cm_l3_1_l3_1_clkctrl;
166 u32 cm_l3_2_clkstctrl; 166 u32 cm_l3_2_clkstctrl;
167 u32 cm_l3_2_dynamicdep; 167 u32 cm_l3_2_dynamicdep;
168 u32 cm_l3_2_l3_2_clkctrl; 168 u32 cm_l3_2_l3_2_clkctrl;
169 u32 cm_l3_gpmc_clkctrl; 169 u32 cm_l3_gpmc_clkctrl;
170 u32 cm_l3_2_ocmc_ram_clkctrl; 170 u32 cm_l3_2_ocmc_ram_clkctrl;
171 u32 cm_mpu_m3_clkstctrl; 171 u32 cm_mpu_m3_clkstctrl;
172 u32 cm_mpu_m3_staticdep; 172 u32 cm_mpu_m3_staticdep;
173 u32 cm_mpu_m3_dynamicdep; 173 u32 cm_mpu_m3_dynamicdep;
174 u32 cm_mpu_m3_mpu_m3_clkctrl; 174 u32 cm_mpu_m3_mpu_m3_clkctrl;
175 u32 cm_sdma_clkstctrl; 175 u32 cm_sdma_clkstctrl;
176 u32 cm_sdma_staticdep; 176 u32 cm_sdma_staticdep;
177 u32 cm_sdma_dynamicdep; 177 u32 cm_sdma_dynamicdep;
178 u32 cm_sdma_sdma_clkctrl; 178 u32 cm_sdma_sdma_clkctrl;
179 u32 cm_memif_clkstctrl; 179 u32 cm_memif_clkstctrl;
180 u32 cm_memif_dmm_clkctrl; 180 u32 cm_memif_dmm_clkctrl;
181 u32 cm_memif_emif_fw_clkctrl; 181 u32 cm_memif_emif_fw_clkctrl;
182 u32 cm_memif_emif_1_clkctrl; 182 u32 cm_memif_emif_1_clkctrl;
183 u32 cm_memif_emif_2_clkctrl; 183 u32 cm_memif_emif_2_clkctrl;
184 u32 cm_memif_dll_clkctrl; 184 u32 cm_memif_dll_clkctrl;
185 u32 cm_memif_emif_h1_clkctrl; 185 u32 cm_memif_emif_h1_clkctrl;
186 u32 cm_memif_emif_h2_clkctrl; 186 u32 cm_memif_emif_h2_clkctrl;
187 u32 cm_memif_dll_h_clkctrl; 187 u32 cm_memif_dll_h_clkctrl;
188 u32 cm_c2c_clkstctrl; 188 u32 cm_c2c_clkstctrl;
189 u32 cm_c2c_staticdep; 189 u32 cm_c2c_staticdep;
190 u32 cm_c2c_dynamicdep; 190 u32 cm_c2c_dynamicdep;
191 u32 cm_c2c_sad2d_clkctrl; 191 u32 cm_c2c_sad2d_clkctrl;
192 u32 cm_c2c_modem_icr_clkctrl; 192 u32 cm_c2c_modem_icr_clkctrl;
193 u32 cm_c2c_sad2d_fw_clkctrl; 193 u32 cm_c2c_sad2d_fw_clkctrl;
194 u32 cm_l4cfg_clkstctrl; 194 u32 cm_l4cfg_clkstctrl;
195 u32 cm_l4cfg_dynamicdep; 195 u32 cm_l4cfg_dynamicdep;
196 u32 cm_l4cfg_l4_cfg_clkctrl; 196 u32 cm_l4cfg_l4_cfg_clkctrl;
197 u32 cm_l4cfg_hw_sem_clkctrl; 197 u32 cm_l4cfg_hw_sem_clkctrl;
198 u32 cm_l4cfg_mailbox_clkctrl; 198 u32 cm_l4cfg_mailbox_clkctrl;
199 u32 cm_l4cfg_sar_rom_clkctrl; 199 u32 cm_l4cfg_sar_rom_clkctrl;
200 u32 cm_l3instr_clkstctrl; 200 u32 cm_l3instr_clkstctrl;
201 u32 cm_l3instr_l3_3_clkctrl; 201 u32 cm_l3instr_l3_3_clkctrl;
202 u32 cm_l3instr_l3_instr_clkctrl; 202 u32 cm_l3instr_l3_instr_clkctrl;
203 u32 cm_l3instr_intrconn_wp1_clkctrl; 203 u32 cm_l3instr_intrconn_wp1_clkctrl;
204 204
205 /* cm2.ivahd */ 205 /* cm2.ivahd */
206 u32 cm_ivahd_clkstctrl; 206 u32 cm_ivahd_clkstctrl;
207 u32 cm_ivahd_ivahd_clkctrl; 207 u32 cm_ivahd_ivahd_clkctrl;
208 u32 cm_ivahd_sl2_clkctrl; 208 u32 cm_ivahd_sl2_clkctrl;
209 209
210 /* cm2.cam */ 210 /* cm2.cam */
211 u32 cm_cam_clkstctrl; 211 u32 cm_cam_clkstctrl;
212 u32 cm_cam_iss_clkctrl; 212 u32 cm_cam_iss_clkctrl;
213 u32 cm_cam_fdif_clkctrl; 213 u32 cm_cam_fdif_clkctrl;
214 u32 cm_cam_vip1_clkctrl; 214 u32 cm_cam_vip1_clkctrl;
215 u32 cm_cam_vip2_clkctrl; 215 u32 cm_cam_vip2_clkctrl;
216 u32 cm_cam_vip3_clkctrl; 216 u32 cm_cam_vip3_clkctrl;
217 u32 cm_cam_lvdsrx_clkctrl; 217 u32 cm_cam_lvdsrx_clkctrl;
218 u32 cm_cam_csi1_clkctrl; 218 u32 cm_cam_csi1_clkctrl;
219 u32 cm_cam_csi2_clkctrl; 219 u32 cm_cam_csi2_clkctrl;
220 220
221 /* cm2.dss */ 221 /* cm2.dss */
222 u32 cm_dss_clkstctrl; 222 u32 cm_dss_clkstctrl;
223 u32 cm_dss_dss_clkctrl; 223 u32 cm_dss_dss_clkctrl;
224 224
225 /* cm2.sgx */ 225 /* cm2.sgx */
226 u32 cm_sgx_clkstctrl; 226 u32 cm_sgx_clkstctrl;
227 u32 cm_sgx_sgx_clkctrl; 227 u32 cm_sgx_sgx_clkctrl;
228 228
229 /* cm2.l3init */ 229 /* cm2.l3init */
230 u32 cm_l3init_clkstctrl; 230 u32 cm_l3init_clkstctrl;
231 231
232 /* cm2.l3init */ 232 /* cm2.l3init */
233 u32 cm_l3init_hsmmc1_clkctrl; 233 u32 cm_l3init_hsmmc1_clkctrl;
234 u32 cm_l3init_hsmmc2_clkctrl; 234 u32 cm_l3init_hsmmc2_clkctrl;
235 u32 cm_l3init_hsi_clkctrl; 235 u32 cm_l3init_hsi_clkctrl;
236 u32 cm_l3init_hsusbhost_clkctrl; 236 u32 cm_l3init_hsusbhost_clkctrl;
237 u32 cm_l3init_hsusbotg_clkctrl; 237 u32 cm_l3init_hsusbotg_clkctrl;
238 u32 cm_l3init_hsusbtll_clkctrl; 238 u32 cm_l3init_hsusbtll_clkctrl;
239 u32 cm_l3init_p1500_clkctrl; 239 u32 cm_l3init_p1500_clkctrl;
240 u32 cm_l3init_fsusb_clkctrl; 240 u32 cm_l3init_fsusb_clkctrl;
241 u32 cm_l3init_ocp2scp1_clkctrl; 241 u32 cm_l3init_ocp2scp1_clkctrl;
242 242
243 /* cm2.l4per */ 243 /* cm2.l4per */
244 u32 cm_l4per_clkstctrl; 244 u32 cm_l4per_clkstctrl;
245 u32 cm_l4per_dynamicdep; 245 u32 cm_l4per_dynamicdep;
246 u32 cm_l4per_adc_clkctrl; 246 u32 cm_l4per_adc_clkctrl;
247 u32 cm_l4per_gptimer10_clkctrl; 247 u32 cm_l4per_gptimer10_clkctrl;
248 u32 cm_l4per_gptimer11_clkctrl; 248 u32 cm_l4per_gptimer11_clkctrl;
249 u32 cm_l4per_gptimer2_clkctrl; 249 u32 cm_l4per_gptimer2_clkctrl;
250 u32 cm_l4per_gptimer3_clkctrl; 250 u32 cm_l4per_gptimer3_clkctrl;
251 u32 cm_l4per_gptimer4_clkctrl; 251 u32 cm_l4per_gptimer4_clkctrl;
252 u32 cm_l4per_gptimer9_clkctrl; 252 u32 cm_l4per_gptimer9_clkctrl;
253 u32 cm_l4per_elm_clkctrl; 253 u32 cm_l4per_elm_clkctrl;
254 u32 cm_l4per_gpio2_clkctrl; 254 u32 cm_l4per_gpio2_clkctrl;
255 u32 cm_l4per_gpio3_clkctrl; 255 u32 cm_l4per_gpio3_clkctrl;
256 u32 cm_l4per_gpio4_clkctrl; 256 u32 cm_l4per_gpio4_clkctrl;
257 u32 cm_l4per_gpio5_clkctrl; 257 u32 cm_l4per_gpio5_clkctrl;
258 u32 cm_l4per_gpio6_clkctrl; 258 u32 cm_l4per_gpio6_clkctrl;
259 u32 cm_l4per_hdq1w_clkctrl; 259 u32 cm_l4per_hdq1w_clkctrl;
260 u32 cm_l4per_hecc1_clkctrl; 260 u32 cm_l4per_hecc1_clkctrl;
261 u32 cm_l4per_hecc2_clkctrl; 261 u32 cm_l4per_hecc2_clkctrl;
262 u32 cm_l4per_i2c1_clkctrl; 262 u32 cm_l4per_i2c1_clkctrl;
263 u32 cm_l4per_i2c2_clkctrl; 263 u32 cm_l4per_i2c2_clkctrl;
264 u32 cm_l4per_i2c3_clkctrl; 264 u32 cm_l4per_i2c3_clkctrl;
265 u32 cm_l4per_i2c4_clkctrl; 265 u32 cm_l4per_i2c4_clkctrl;
266 u32 cm_l4per_l4per_clkctrl; 266 u32 cm_l4per_l4per_clkctrl;
267 u32 cm_l4per_mcasp2_clkctrl; 267 u32 cm_l4per_mcasp2_clkctrl;
268 u32 cm_l4per_mcasp3_clkctrl; 268 u32 cm_l4per_mcasp3_clkctrl;
269 u32 cm_l4per_mgate_clkctrl; 269 u32 cm_l4per_mgate_clkctrl;
270 u32 cm_l4per_mcspi1_clkctrl; 270 u32 cm_l4per_mcspi1_clkctrl;
271 u32 cm_l4per_mcspi2_clkctrl; 271 u32 cm_l4per_mcspi2_clkctrl;
272 u32 cm_l4per_mcspi3_clkctrl; 272 u32 cm_l4per_mcspi3_clkctrl;
273 u32 cm_l4per_mcspi4_clkctrl; 273 u32 cm_l4per_mcspi4_clkctrl;
274 u32 cm_l4per_gpio7_clkctrl; 274 u32 cm_l4per_gpio7_clkctrl;
275 u32 cm_l4per_gpio8_clkctrl; 275 u32 cm_l4per_gpio8_clkctrl;
276 u32 cm_l4per_mmcsd3_clkctrl; 276 u32 cm_l4per_mmcsd3_clkctrl;
277 u32 cm_l4per_mmcsd4_clkctrl; 277 u32 cm_l4per_mmcsd4_clkctrl;
278 u32 cm_l4per_msprohg_clkctrl; 278 u32 cm_l4per_msprohg_clkctrl;
279 u32 cm_l4per_slimbus2_clkctrl; 279 u32 cm_l4per_slimbus2_clkctrl;
280 u32 cm_l4per_uart1_clkctrl; 280 u32 cm_l4per_uart1_clkctrl;
281 u32 cm_l4per_uart2_clkctrl; 281 u32 cm_l4per_uart2_clkctrl;
282 u32 cm_l4per_uart3_clkctrl; 282 u32 cm_l4per_uart3_clkctrl;
283 u32 cm_l4per_uart4_clkctrl; 283 u32 cm_l4per_uart4_clkctrl;
284 u32 cm_l4per_mmcsd5_clkctrl; 284 u32 cm_l4per_mmcsd5_clkctrl;
285 u32 cm_l4per_i2c5_clkctrl; 285 u32 cm_l4per_i2c5_clkctrl;
286 u32 cm_l4per_uart5_clkctrl; 286 u32 cm_l4per_uart5_clkctrl;
287 u32 cm_l4per_uart6_clkctrl; 287 u32 cm_l4per_uart6_clkctrl;
288 u32 cm_l4sec_clkstctrl; 288 u32 cm_l4sec_clkstctrl;
289 u32 cm_l4sec_staticdep; 289 u32 cm_l4sec_staticdep;
290 u32 cm_l4sec_dynamicdep; 290 u32 cm_l4sec_dynamicdep;
291 u32 cm_l4sec_aes1_clkctrl; 291 u32 cm_l4sec_aes1_clkctrl;
292 u32 cm_l4sec_aes2_clkctrl; 292 u32 cm_l4sec_aes2_clkctrl;
293 u32 cm_l4sec_des3des_clkctrl; 293 u32 cm_l4sec_des3des_clkctrl;
294 u32 cm_l4sec_pkaeip29_clkctrl; 294 u32 cm_l4sec_pkaeip29_clkctrl;
295 u32 cm_l4sec_rng_clkctrl; 295 u32 cm_l4sec_rng_clkctrl;
296 u32 cm_l4sec_sha2md51_clkctrl; 296 u32 cm_l4sec_sha2md51_clkctrl;
297 u32 cm_l4sec_cryptodma_clkctrl; 297 u32 cm_l4sec_cryptodma_clkctrl;
298 298
299 /* l4 wkup regs */ 299 /* l4 wkup regs */
300 u32 cm_abe_pll_ref_clksel; 300 u32 cm_abe_pll_ref_clksel;
301 u32 cm_sys_clksel; 301 u32 cm_sys_clksel;
302 u32 cm_wkup_clkstctrl; 302 u32 cm_wkup_clkstctrl;
303 u32 cm_wkup_l4wkup_clkctrl; 303 u32 cm_wkup_l4wkup_clkctrl;
304 u32 cm_wkup_wdtimer1_clkctrl; 304 u32 cm_wkup_wdtimer1_clkctrl;
305 u32 cm_wkup_wdtimer2_clkctrl; 305 u32 cm_wkup_wdtimer2_clkctrl;
306 u32 cm_wkup_gpio1_clkctrl; 306 u32 cm_wkup_gpio1_clkctrl;
307 u32 cm_wkup_gptimer1_clkctrl; 307 u32 cm_wkup_gptimer1_clkctrl;
308 u32 cm_wkup_gptimer12_clkctrl; 308 u32 cm_wkup_gptimer12_clkctrl;
309 u32 cm_wkup_synctimer_clkctrl; 309 u32 cm_wkup_synctimer_clkctrl;
310 u32 cm_wkup_usim_clkctrl; 310 u32 cm_wkup_usim_clkctrl;
311 u32 cm_wkup_sarram_clkctrl; 311 u32 cm_wkup_sarram_clkctrl;
312 u32 cm_wkup_keyboard_clkctrl; 312 u32 cm_wkup_keyboard_clkctrl;
313 u32 cm_wkup_rtc_clkctrl; 313 u32 cm_wkup_rtc_clkctrl;
314 u32 cm_wkup_bandgap_clkctrl; 314 u32 cm_wkup_bandgap_clkctrl;
315 u32 cm_wkupaon_scrm_clkctrl; 315 u32 cm_wkupaon_scrm_clkctrl;
316 u32 cm_wkupaon_io_srcomp_clkctrl; 316 u32 cm_wkupaon_io_srcomp_clkctrl;
317 u32 prm_rstctrl; 317 u32 prm_rstctrl;
318 u32 prm_rstst; 318 u32 prm_rstst;
319 u32 prm_rsttime;
319 u32 prm_vc_val_bypass; 320 u32 prm_vc_val_bypass;
320 u32 prm_vc_cfg_i2c_mode; 321 u32 prm_vc_cfg_i2c_mode;
321 u32 prm_vc_cfg_i2c_clk; 322 u32 prm_vc_cfg_i2c_clk;
322 u32 prm_sldo_core_setup; 323 u32 prm_sldo_core_setup;
323 u32 prm_sldo_core_ctrl; 324 u32 prm_sldo_core_ctrl;
324 u32 prm_sldo_mpu_setup; 325 u32 prm_sldo_mpu_setup;
325 u32 prm_sldo_mpu_ctrl; 326 u32 prm_sldo_mpu_ctrl;
326 u32 prm_sldo_mm_setup; 327 u32 prm_sldo_mm_setup;
327 u32 prm_sldo_mm_ctrl; 328 u32 prm_sldo_mm_ctrl;
328 329
329 u32 cm_div_m4_dpll_core; 330 u32 cm_div_m4_dpll_core;
330 u32 cm_div_m5_dpll_core; 331 u32 cm_div_m5_dpll_core;
331 u32 cm_div_m6_dpll_core; 332 u32 cm_div_m6_dpll_core;
332 u32 cm_div_m7_dpll_core; 333 u32 cm_div_m7_dpll_core;
333 u32 cm_div_m4_dpll_iva; 334 u32 cm_div_m4_dpll_iva;
334 u32 cm_div_m5_dpll_iva; 335 u32 cm_div_m5_dpll_iva;
335 u32 cm_div_m4_dpll_ddrphy; 336 u32 cm_div_m4_dpll_ddrphy;
336 u32 cm_div_m5_dpll_ddrphy; 337 u32 cm_div_m5_dpll_ddrphy;
337 u32 cm_div_m6_dpll_ddrphy; 338 u32 cm_div_m6_dpll_ddrphy;
338 u32 cm_div_m4_dpll_per; 339 u32 cm_div_m4_dpll_per;
339 u32 cm_div_m5_dpll_per; 340 u32 cm_div_m5_dpll_per;
340 u32 cm_div_m6_dpll_per; 341 u32 cm_div_m6_dpll_per;
341 u32 cm_div_m7_dpll_per; 342 u32 cm_div_m7_dpll_per;
342 u32 cm_l3instr_intrconn_wp1_clkct; 343 u32 cm_l3instr_intrconn_wp1_clkct;
343 u32 cm_l3init_usbphy_clkctrl; 344 u32 cm_l3init_usbphy_clkctrl;
344 u32 cm_l4per_mcbsp4_clkctrl; 345 u32 cm_l4per_mcbsp4_clkctrl;
345 u32 prm_vc_cfg_channel; 346 u32 prm_vc_cfg_channel;
346 }; 347 };
347 348
348 struct omap_sys_ctrl_regs { 349 struct omap_sys_ctrl_regs {
349 u32 control_status; 350 u32 control_status;
350 u32 control_core_mmr_lock1; 351 u32 control_core_mmr_lock1;
351 u32 control_core_mmr_lock2; 352 u32 control_core_mmr_lock2;
352 u32 control_core_mmr_lock3; 353 u32 control_core_mmr_lock3;
353 u32 control_core_mmr_lock4; 354 u32 control_core_mmr_lock4;
354 u32 control_core_mmr_lock5; 355 u32 control_core_mmr_lock5;
355 u32 control_core_control_io1; 356 u32 control_core_control_io1;
356 u32 control_core_control_io2; 357 u32 control_core_control_io2;
357 u32 control_id_code; 358 u32 control_id_code;
358 u32 control_std_fuse_opp_bgap; 359 u32 control_std_fuse_opp_bgap;
359 u32 control_ldosram_iva_voltage_ctrl; 360 u32 control_ldosram_iva_voltage_ctrl;
360 u32 control_ldosram_mpu_voltage_ctrl; 361 u32 control_ldosram_mpu_voltage_ctrl;
361 u32 control_ldosram_core_voltage_ctrl; 362 u32 control_ldosram_core_voltage_ctrl;
362 u32 control_padconf_core_base; 363 u32 control_padconf_core_base;
363 u32 control_paconf_global; 364 u32 control_paconf_global;
364 u32 control_paconf_mode; 365 u32 control_paconf_mode;
365 u32 control_smart1io_padconf_0; 366 u32 control_smart1io_padconf_0;
366 u32 control_smart1io_padconf_1; 367 u32 control_smart1io_padconf_1;
367 u32 control_smart1io_padconf_2; 368 u32 control_smart1io_padconf_2;
368 u32 control_smart2io_padconf_0; 369 u32 control_smart2io_padconf_0;
369 u32 control_smart2io_padconf_1; 370 u32 control_smart2io_padconf_1;
370 u32 control_smart2io_padconf_2; 371 u32 control_smart2io_padconf_2;
371 u32 control_smart3io_padconf_0; 372 u32 control_smart3io_padconf_0;
372 u32 control_smart3io_padconf_1; 373 u32 control_smart3io_padconf_1;
373 u32 control_pbias; 374 u32 control_pbias;
374 u32 control_i2c_0; 375 u32 control_i2c_0;
375 u32 control_camera_rx; 376 u32 control_camera_rx;
376 u32 control_hdmi_tx_phy; 377 u32 control_hdmi_tx_phy;
377 u32 control_uniportm; 378 u32 control_uniportm;
378 u32 control_dsiphy; 379 u32 control_dsiphy;
379 u32 control_mcbsplp; 380 u32 control_mcbsplp;
380 u32 control_usb2phycore; 381 u32 control_usb2phycore;
381 u32 control_hdmi_1; 382 u32 control_hdmi_1;
382 u32 control_hsi; 383 u32 control_hsi;
383 u32 control_ddr3ch1_0; 384 u32 control_ddr3ch1_0;
384 u32 control_ddr3ch2_0; 385 u32 control_ddr3ch2_0;
385 u32 control_ddrch1_0; 386 u32 control_ddrch1_0;
386 u32 control_ddrch1_1; 387 u32 control_ddrch1_1;
387 u32 control_ddrch2_0; 388 u32 control_ddrch2_0;
388 u32 control_ddrch2_1; 389 u32 control_ddrch2_1;
389 u32 control_lpddr2ch1_0; 390 u32 control_lpddr2ch1_0;
390 u32 control_lpddr2ch1_1; 391 u32 control_lpddr2ch1_1;
391 u32 control_ddrio_0; 392 u32 control_ddrio_0;
392 u32 control_ddrio_1; 393 u32 control_ddrio_1;
393 u32 control_ddrio_2; 394 u32 control_ddrio_2;
394 u32 control_lpddr2io1_0; 395 u32 control_lpddr2io1_0;
395 u32 control_lpddr2io1_1; 396 u32 control_lpddr2io1_1;
396 u32 control_lpddr2io1_2; 397 u32 control_lpddr2io1_2;
397 u32 control_lpddr2io1_3; 398 u32 control_lpddr2io1_3;
398 u32 control_lpddr2io2_0; 399 u32 control_lpddr2io2_0;
399 u32 control_lpddr2io2_1; 400 u32 control_lpddr2io2_1;
400 u32 control_lpddr2io2_2; 401 u32 control_lpddr2io2_2;
401 u32 control_lpddr2io2_3; 402 u32 control_lpddr2io2_3;
402 u32 control_hyst_1; 403 u32 control_hyst_1;
403 u32 control_usbb_hsic_control; 404 u32 control_usbb_hsic_control;
404 u32 control_c2c; 405 u32 control_c2c;
405 u32 control_core_control_spare_rw; 406 u32 control_core_control_spare_rw;
406 u32 control_core_control_spare_r; 407 u32 control_core_control_spare_r;
407 u32 control_core_control_spare_r_c0; 408 u32 control_core_control_spare_r_c0;
408 u32 control_srcomp_north_side; 409 u32 control_srcomp_north_side;
409 u32 control_srcomp_south_side; 410 u32 control_srcomp_south_side;
410 u32 control_srcomp_east_side; 411 u32 control_srcomp_east_side;
411 u32 control_srcomp_west_side; 412 u32 control_srcomp_west_side;
412 u32 control_srcomp_code_latch; 413 u32 control_srcomp_code_latch;
413 u32 control_pbiaslite; 414 u32 control_pbiaslite;
414 u32 control_port_emif1_sdram_config; 415 u32 control_port_emif1_sdram_config;
415 u32 control_port_emif1_lpddr2_nvm_config; 416 u32 control_port_emif1_lpddr2_nvm_config;
416 u32 control_port_emif2_sdram_config; 417 u32 control_port_emif2_sdram_config;
417 u32 control_emif1_sdram_config_ext; 418 u32 control_emif1_sdram_config_ext;
418 u32 control_emif2_sdram_config_ext; 419 u32 control_emif2_sdram_config_ext;
419 u32 control_smart1nopmio_padconf_0; 420 u32 control_smart1nopmio_padconf_0;
420 u32 control_smart1nopmio_padconf_1; 421 u32 control_smart1nopmio_padconf_1;
421 u32 control_padconf_mode; 422 u32 control_padconf_mode;
422 u32 control_xtal_oscillator; 423 u32 control_xtal_oscillator;
423 u32 control_i2c_2; 424 u32 control_i2c_2;
424 u32 control_ckobuffer; 425 u32 control_ckobuffer;
425 u32 control_wkup_control_spare_rw; 426 u32 control_wkup_control_spare_rw;
426 u32 control_wkup_control_spare_r; 427 u32 control_wkup_control_spare_r;
427 u32 control_wkup_control_spare_r_c0; 428 u32 control_wkup_control_spare_r_c0;
428 u32 control_srcomp_east_side_wkup; 429 u32 control_srcomp_east_side_wkup;
429 u32 control_efuse_1; 430 u32 control_efuse_1;
430 u32 control_efuse_2; 431 u32 control_efuse_2;
431 u32 control_efuse_3; 432 u32 control_efuse_3;
432 u32 control_efuse_4; 433 u32 control_efuse_4;
433 u32 control_efuse_5; 434 u32 control_efuse_5;
434 u32 control_efuse_6; 435 u32 control_efuse_6;
435 u32 control_efuse_7; 436 u32 control_efuse_7;
436 u32 control_efuse_8; 437 u32 control_efuse_8;
437 u32 control_efuse_9; 438 u32 control_efuse_9;
438 u32 control_efuse_10; 439 u32 control_efuse_10;
439 u32 control_efuse_11; 440 u32 control_efuse_11;
440 u32 control_efuse_12; 441 u32 control_efuse_12;
441 u32 control_efuse_13; 442 u32 control_efuse_13;
442 u32 control_padconf_wkup_base; 443 u32 control_padconf_wkup_base;
443 }; 444 };
444 445
445 struct dpll_params { 446 struct dpll_params {
446 u32 m; 447 u32 m;
447 u32 n; 448 u32 n;
448 s8 m2; 449 s8 m2;
449 s8 m3; 450 s8 m3;
450 s8 m4_h11; 451 s8 m4_h11;
451 s8 m5_h12; 452 s8 m5_h12;
452 s8 m6_h13; 453 s8 m6_h13;
453 s8 m7_h14; 454 s8 m7_h14;
454 s8 h21; 455 s8 h21;
455 s8 h22; 456 s8 h22;
456 s8 h23; 457 s8 h23;
457 s8 h24; 458 s8 h24;
458 }; 459 };
459 460
460 struct dpll_regs { 461 struct dpll_regs {
461 u32 cm_clkmode_dpll; 462 u32 cm_clkmode_dpll;
462 u32 cm_idlest_dpll; 463 u32 cm_idlest_dpll;
463 u32 cm_autoidle_dpll; 464 u32 cm_autoidle_dpll;
464 u32 cm_clksel_dpll; 465 u32 cm_clksel_dpll;
465 u32 cm_div_m2_dpll; 466 u32 cm_div_m2_dpll;
466 u32 cm_div_m3_dpll; 467 u32 cm_div_m3_dpll;
467 u32 cm_div_m4_h11_dpll; 468 u32 cm_div_m4_h11_dpll;
468 u32 cm_div_m5_h12_dpll; 469 u32 cm_div_m5_h12_dpll;
469 u32 cm_div_m6_h13_dpll; 470 u32 cm_div_m6_h13_dpll;
470 u32 cm_div_m7_h14_dpll; 471 u32 cm_div_m7_h14_dpll;
471 u32 reserved[2]; 472 u32 reserved[2];
472 u32 cm_div_h21_dpll; 473 u32 cm_div_h21_dpll;
473 u32 cm_div_h22_dpll; 474 u32 cm_div_h22_dpll;
474 u32 cm_div_h23_dpll; 475 u32 cm_div_h23_dpll;
475 u32 cm_div_h24_dpll; 476 u32 cm_div_h24_dpll;
476 }; 477 };
477 478
478 struct dplls { 479 struct dplls {
479 const struct dpll_params *mpu; 480 const struct dpll_params *mpu;
480 const struct dpll_params *core; 481 const struct dpll_params *core;
481 const struct dpll_params *per; 482 const struct dpll_params *per;
482 const struct dpll_params *abe; 483 const struct dpll_params *abe;
483 const struct dpll_params *iva; 484 const struct dpll_params *iva;
484 const struct dpll_params *usb; 485 const struct dpll_params *usb;
485 const struct dpll_params *ddr; 486 const struct dpll_params *ddr;
486 }; 487 };
487 488
488 struct pmic_data { 489 struct pmic_data {
489 u32 base_offset; 490 u32 base_offset;
490 u32 step; 491 u32 step;
491 u32 start_code; 492 u32 start_code;
492 unsigned gpio; 493 unsigned gpio;
493 int gpio_en; 494 int gpio_en;
494 }; 495 };
495 496
496 struct volts { 497 struct volts {
497 u32 value; 498 u32 value;
498 u32 addr; 499 u32 addr;
499 struct pmic_data *pmic; 500 struct pmic_data *pmic;
500 }; 501 };
501 502
502 struct vcores_data { 503 struct vcores_data {
503 struct volts mpu; 504 struct volts mpu;
504 struct volts core; 505 struct volts core;
505 struct volts mm; 506 struct volts mm;
506 }; 507 };
507 508
508 extern struct prcm_regs const **prcm; 509 extern struct prcm_regs const **prcm;
509 extern struct prcm_regs const omap5_es1_prcm; 510 extern struct prcm_regs const omap5_es1_prcm;
510 extern struct prcm_regs const omap5_es2_prcm; 511 extern struct prcm_regs const omap5_es2_prcm;
511 extern struct prcm_regs const omap4_prcm; 512 extern struct prcm_regs const omap4_prcm;
512 extern struct prcm_regs const dra7xx_prcm; 513 extern struct prcm_regs const dra7xx_prcm;
513 extern struct dplls const **dplls_data; 514 extern struct dplls const **dplls_data;
514 extern struct vcores_data const **omap_vcores; 515 extern struct vcores_data const **omap_vcores;
515 extern const u32 sys_clk_array[8]; 516 extern const u32 sys_clk_array[8];
516 extern struct omap_sys_ctrl_regs const **ctrl; 517 extern struct omap_sys_ctrl_regs const **ctrl;
517 extern struct omap_sys_ctrl_regs const omap4_ctrl; 518 extern struct omap_sys_ctrl_regs const omap4_ctrl;
518 extern struct omap_sys_ctrl_regs const omap5_ctrl; 519 extern struct omap_sys_ctrl_regs const omap5_ctrl;
519 extern struct omap_sys_ctrl_regs const dra7xx_ctrl; 520 extern struct omap_sys_ctrl_regs const dra7xx_ctrl;
520 521
521 void hw_data_init(void); 522 void hw_data_init(void);
522 523
523 const struct dpll_params *get_mpu_dpll_params(struct dplls const *); 524 const struct dpll_params *get_mpu_dpll_params(struct dplls const *);
524 const struct dpll_params *get_core_dpll_params(struct dplls const *); 525 const struct dpll_params *get_core_dpll_params(struct dplls const *);
525 const struct dpll_params *get_per_dpll_params(struct dplls const *); 526 const struct dpll_params *get_per_dpll_params(struct dplls const *);
526 const struct dpll_params *get_iva_dpll_params(struct dplls const *); 527 const struct dpll_params *get_iva_dpll_params(struct dplls const *);
527 const struct dpll_params *get_usb_dpll_params(struct dplls const *); 528 const struct dpll_params *get_usb_dpll_params(struct dplls const *);
528 const struct dpll_params *get_abe_dpll_params(struct dplls const *); 529 const struct dpll_params *get_abe_dpll_params(struct dplls const *);
529 530
530 void do_enable_clocks(u32 const *clk_domains, 531 void do_enable_clocks(u32 const *clk_domains,
531 u32 const *clk_modules_hw_auto, 532 u32 const *clk_modules_hw_auto,
532 u32 const *clk_modules_explicit_en, 533 u32 const *clk_modules_explicit_en,
533 u8 wait_for_enable); 534 u8 wait_for_enable);
534 535
535 void setup_post_dividers(u32 const base, 536 void setup_post_dividers(u32 const base,
536 const struct dpll_params *params); 537 const struct dpll_params *params);
537 u32 omap_ddr_clk(void); 538 u32 omap_ddr_clk(void);
538 u32 get_sys_clk_index(void); 539 u32 get_sys_clk_index(void);
539 void enable_basic_clocks(void); 540 void enable_basic_clocks(void);
540 void enable_basic_uboot_clocks(void); 541 void enable_basic_uboot_clocks(void);
541 void enable_non_essential_clocks(void); 542 void enable_non_essential_clocks(void);
542 void scale_vcores(struct vcores_data const *); 543 void scale_vcores(struct vcores_data const *);
543 u32 get_offset_code(u32 volt_offset, struct pmic_data *pmic); 544 u32 get_offset_code(u32 volt_offset, struct pmic_data *pmic);
544 void do_scale_vcore(u32 vcore_reg, u32 volt_mv, struct pmic_data *pmic); 545 void do_scale_vcore(u32 vcore_reg, u32 volt_mv, struct pmic_data *pmic);
545 546
546 /* Max value for DPLL multiplier M */ 547 /* Max value for DPLL multiplier M */
547 #define OMAP_DPLL_MAX_N 127 548 #define OMAP_DPLL_MAX_N 127
548 549
549 /* HW Init Context */ 550 /* HW Init Context */
550 #define OMAP_INIT_CONTEXT_SPL 0 551 #define OMAP_INIT_CONTEXT_SPL 0
551 #define OMAP_INIT_CONTEXT_UBOOT_FROM_NOR 1 552 #define OMAP_INIT_CONTEXT_UBOOT_FROM_NOR 1
552 #define OMAP_INIT_CONTEXT_UBOOT_AFTER_SPL 2 553 #define OMAP_INIT_CONTEXT_UBOOT_AFTER_SPL 2
553 #define OMAP_INIT_CONTEXT_UBOOT_AFTER_CH 3 554 #define OMAP_INIT_CONTEXT_UBOOT_AFTER_CH 3
554 555
555 static inline u32 omap_revision(void) 556 static inline u32 omap_revision(void)
556 { 557 {
557 extern u32 *const omap_si_rev; 558 extern u32 *const omap_si_rev;
558 return *omap_si_rev; 559 return *omap_si_rev;
559 } 560 }
560 561
561 /* 562 /*
562 * silicon revisions. 563 * silicon revisions.
563 * Moving this to common, so that most of code can be moved to common, 564 * Moving this to common, so that most of code can be moved to common,
564 * directories. 565 * directories.
565 */ 566 */
566 567
567 /* omap4 */ 568 /* omap4 */
568 #define OMAP4430_SILICON_ID_INVALID 0xFFFFFFFF 569 #define OMAP4430_SILICON_ID_INVALID 0xFFFFFFFF
569 #define OMAP4430_ES1_0 0x44300100 570 #define OMAP4430_ES1_0 0x44300100
570 #define OMAP4430_ES2_0 0x44300200 571 #define OMAP4430_ES2_0 0x44300200
571 #define OMAP4430_ES2_1 0x44300210 572 #define OMAP4430_ES2_1 0x44300210
572 #define OMAP4430_ES2_2 0x44300220 573 #define OMAP4430_ES2_2 0x44300220
573 #define OMAP4430_ES2_3 0x44300230 574 #define OMAP4430_ES2_3 0x44300230
574 #define OMAP4460_ES1_0 0x44600100 575 #define OMAP4460_ES1_0 0x44600100
575 #define OMAP4460_ES1_1 0x44600110 576 #define OMAP4460_ES1_1 0x44600110
576 577
577 /* omap5 */ 578 /* omap5 */
578 #define OMAP5430_SILICON_ID_INVALID 0 579 #define OMAP5430_SILICON_ID_INVALID 0
579 #define OMAP5430_ES1_0 0x54300100 580 #define OMAP5430_ES1_0 0x54300100
580 #define OMAP5432_ES1_0 0x54320100 581 #define OMAP5432_ES1_0 0x54320100
581 #define OMAP5430_ES2_0 0x54300200 582 #define OMAP5430_ES2_0 0x54300200
582 #define OMAP5432_ES2_0 0x54320200 583 #define OMAP5432_ES2_0 0x54320200
583 584
584 /* DRA7XX */ 585 /* DRA7XX */
585 #define DRA752_ES1_0 0x07520100 586 #define DRA752_ES1_0 0x07520100
586 #endif /* _OMAP_COMMON_H_ */ 587 #endif /* _OMAP_COMMON_H_ */
587 588
doc/README.omap-reset-time
Diff comments   View file @ 0b1b60c
File was created 1 README on how reset time on OMAPs should be calculated
2
3 CONFIG_OMAP_PLATFORM_RESET_TIME_MAX_USEC:
4 Most OMAPs' provide a way to specify the time for
5 which the reset should be held low while the voltages
6 and Oscillator outputs stabilize.
7
8 This time is mostly board and PMIC dependent. Hence the
9 boards are expected to specify a pre-computed time
10 using the above option, (the details on how to compute
11 the value are given below) without which a default time
12 as specified by CONFIG_DEFAULT_OMAP_RESET_TIME_MAX_USEC
13 is used.
14
15 The value for CONFIG_OMAP_PLATFORM_RESET_TIME_MAX_USEC
16 can be computed using a summation of the below 3 parameters
17 -1- Time taken by the Osciallator to stop and restart
18 -2- PMIC OTP time
19 -3- Voltage ramp time, which can be derived using the
20 PMIC slew rate and value of voltage ramp needed.
21
include/configs/omap5_uevm.h
Diff comments   View file @ 0b1b60c
1 /* 1 /*
2 * (C) Copyright 2013 2 * (C) Copyright 2013
3 * Texas Instruments Incorporated. 3 * Texas Instruments Incorporated.
4 * Sricharan R <r.sricharan@ti.com> 4 * Sricharan R <r.sricharan@ti.com>
5 * 5 *
6 * Configuration settings for the TI EVM5430 board. 6 * Configuration settings for the TI EVM5430 board.
7 * See omap5_common.h for omap5 common settings. 7 * See omap5_common.h for omap5 common settings.
8 * 8 *
9 * See file CREDITS for list of people who contributed to this 9 * See file CREDITS for list of people who contributed to this
10 * project. 10 * project.
11 * 11 *
12 * This program is free software; you can redistribute it and/or 12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License as 13 * modify it under the terms of the GNU General Public License as
14 * published by the Free Software Foundation; either version 2 of 14 * published by the Free Software Foundation; either version 2 of
15 * the License, or (at your option) any later version. 15 * the License, or (at your option) any later version.
16 * 16 *
17 * This program is distributed in the hope that it will be useful, 17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of 18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details. 20 * GNU General Public License for more details.
21 * 21 *
22 * You should have received a copy of the GNU General Public License 22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software 23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
25 * MA 02111-1307 USA 25 * MA 02111-1307 USA
26 */ 26 */
27 27
28 #ifndef __CONFIG_OMAP5_EVM_H 28 #ifndef __CONFIG_OMAP5_EVM_H
29 #define __CONFIG_OMAP5_EVM_H 29 #define __CONFIG_OMAP5_EVM_H
30 30
31 /* Define the default GPT table for eMMC */ 31 /* Define the default GPT table for eMMC */
32 #define PARTS_DEFAULT \ 32 #define PARTS_DEFAULT \
33 "uuid_disk=${uuid_gpt_disk};" \ 33 "uuid_disk=${uuid_gpt_disk};" \
34 "name=rootfs,start=2MiB,size=-,uuid=${uuid_gpt_rootfs}" 34 "name=rootfs,start=2MiB,size=-,uuid=${uuid_gpt_rootfs}"
35 35
36 #include <configs/omap5_common.h> 36 #include <configs/omap5_common.h>
37 37
38 /* TWL6035 */ 38 /* TWL6035 */
39 #ifndef CONFIG_SPL_BUILD 39 #ifndef CONFIG_SPL_BUILD
40 #define CONFIG_PALMAS_POWER 40 #define CONFIG_PALMAS_POWER
41 #endif 41 #endif
42 42
43 /* MMC ENV related defines */ 43 /* MMC ENV related defines */
44 #define CONFIG_ENV_IS_IN_MMC 44 #define CONFIG_ENV_IS_IN_MMC
45 #define CONFIG_SYS_MMC_ENV_DEV 1 /* SLOT2: eMMC(1) */ 45 #define CONFIG_SYS_MMC_ENV_DEV 1 /* SLOT2: eMMC(1) */
46 #define CONFIG_ENV_OFFSET 0xE0000 46 #define CONFIG_ENV_OFFSET 0xE0000
47 #define CONFIG_CMD_SAVEENV 47 #define CONFIG_CMD_SAVEENV
48 48
49 /* Enhance our eMMC support / experience. */ 49 /* Enhance our eMMC support / experience. */
50 #define CONFIG_CMD_GPT 50 #define CONFIG_CMD_GPT
51 #define CONFIG_EFI_PARTITION 51 #define CONFIG_EFI_PARTITION
52 #define CONFIG_PARTITION_UUIDS 52 #define CONFIG_PARTITION_UUIDS
53 #define CONFIG_CMD_PART 53 #define CONFIG_CMD_PART
54 54
55 #define CONFIG_SYS_PROMPT "OMAP5430 EVM # " 55 #define CONFIG_SYS_PROMPT "OMAP5430 EVM # "
56 56
57 #define CONFIG_OMAP_PLATFORM_RESET_TIME_MAX_USEC 16296
57 #endif /* __CONFIG_OMAP5_EVM_H */ 58 #endif /* __CONFIG_OMAP5_EVM_H */
58 59