Commit 0b7eb4337d47c0d1029a412b50e5dc0c11f3474c

Authored by Simon Goldschmidt
Committed by Marek Vasut
1 parent 9dc61aac2d

arm: socfpga: move vining_fpga to DM_I2C

All socfpga boards except for vining_fpga use DM_I2C. Enable
DM_I2C for this board and set the EEPROM defines via Kconfig
(enabling CONFIG_I2C_EEPROM from MISC).

Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Series-changes: 2
- added (this) patch to move socfpga_vining to DM_I2C

Showing 4 changed files with 8 additions and 44 deletions Side-by-side Diff

board/samtec/vining_fpga/socfpga.c
... ... @@ -52,14 +52,7 @@
52 52 u32 serial;
53 53 int ret;
54 54  
55   - /* EEPROM is at bus 0. */
56   - ret = i2c_set_bus_num(0);
57   - if (ret) {
58   - puts("Cannot select EEPROM I2C bus.\n");
59   - return 0;
60   - }
61   -
62   - /* EEPROM is at address 0x50. */
  55 + /* EEPROM is at address 0x50 (at bus CONFIG_SYS_EEPROM_BUS_NUM). */
63 56 ret = eeprom_read(0x50, 0, data, sizeof(data));
64 57 if (ret) {
65 58 puts("Cannot read I2C EEPROM.\n");
configs/socfpga_vining_fpga_defconfig
... ... @@ -16,8 +16,8 @@
16 16 CONFIG_DISPLAY_BOARDINFO_LATE=y
17 17 CONFIG_SPL_SPI_LOAD=y
18 18 CONFIG_CMD_ASKENV=y
19   -CONFIG_CMD_GREPENV=y
20 19 CONFIG_CMD_EEPROM=y
  20 +CONFIG_CMD_GREPENV=y
21 21 CONFIG_CMD_DFU=y
22 22 # CONFIG_CMD_FLASH is not set
23 23 CONFIG_CMD_GPIO=y
... ... @@ -44,6 +44,7 @@
44 44 CONFIG_DFU_SF=y
45 45 CONFIG_DM_GPIO=y
46 46 CONFIG_DWAPB_GPIO=y
  47 +CONFIG_DM_I2C=y
47 48 CONFIG_LED_STATUS=y
48 49 CONFIG_LED_STATUS_GPIO=y
49 50 CONFIG_LED_STATUS0=y
... ... @@ -55,6 +56,11 @@
55 56 CONFIG_LED_STATUS3=y
56 57 CONFIG_LED_STATUS_BIT3=65
57 58 CONFIG_LED_STATUS_CMD=y
  59 +CONFIG_MISC=y
  60 +CONFIG_I2C_EEPROM=y
  61 +CONFIG_SYS_I2C_EEPROM_ADDR=0x50
  62 +CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
  63 +CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=70
58 64 CONFIG_DM_MMC=y
59 65 CONFIG_MMC_DW=y
60 66 CONFIG_MTD_DEVICE=y
include/configs/socfpga_common.h
... ... @@ -150,32 +150,6 @@
150 150 #endif
151 151  
152 152 /*
153   - * I2C support
154   - */
155   -#ifndef CONFIG_DM_I2C
156   -#define CONFIG_SYS_I2C
157   -#define CONFIG_SYS_I2C_BASE SOCFPGA_I2C0_ADDRESS
158   -#define CONFIG_SYS_I2C_BASE1 SOCFPGA_I2C1_ADDRESS
159   -#define CONFIG_SYS_I2C_BASE2 SOCFPGA_I2C2_ADDRESS
160   -#define CONFIG_SYS_I2C_BASE3 SOCFPGA_I2C3_ADDRESS
161   -/* Using standard mode which the speed up to 100Kb/s */
162   -#define CONFIG_SYS_I2C_SPEED 100000
163   -#define CONFIG_SYS_I2C_SPEED1 100000
164   -#define CONFIG_SYS_I2C_SPEED2 100000
165   -#define CONFIG_SYS_I2C_SPEED3 100000
166   -/* Address of device when used as slave */
167   -#define CONFIG_SYS_I2C_SLAVE 0x02
168   -#define CONFIG_SYS_I2C_SLAVE1 0x02
169   -#define CONFIG_SYS_I2C_SLAVE2 0x02
170   -#define CONFIG_SYS_I2C_SLAVE3 0x02
171   -#ifndef __ASSEMBLY__
172   -/* Clock supplied to I2C controller in unit of MHz */
173   -unsigned int cm_get_l4_sp_clk_hz(void);
174   -#define IC_CLK (cm_get_l4_sp_clk_hz() / 1000000)
175   -#endif
176   -#endif /* CONFIG_DM_I2C */
177   -
178   -/*
179 153 * QSPI support
180 154 */
181 155 /* Enable multiple SPI NOR flash manufacturers */
include/configs/socfpga_vining_fpga.h
... ... @@ -16,15 +16,6 @@
16 16 #define CONFIG_LOADADDR 0x01000000
17 17 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
18 18  
19   -/* I2C EEPROM */
20   -#ifdef CONFIG_CMD_EEPROM
21   -#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
22   -#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
23   -#define CONFIG_SYS_I2C_EEPROM_BUS 0
24   -#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
25   -#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 70
26   -#endif
27   -
28 19 /*
29 20 * Status LEDs:
30 21 * 0 ... Top Green