omap3: evm: Update board, defconfig, and maintainer file

This patch brings the OMAP3 EVM to a bootable state, on master, as of v2017.09-rc1. Signed-off-by: Derald D. Woods <woods.technical@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com>

omap3: evm: Update board, defconfig, and maintainer file
This patch brings the OMAP3 EVM to a bootable state, on master, as of v2017.09-rc1. Signed-off-by: Derald D. Woods <woods.technical@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com>
Derald D. Woods · Tom Rini
1 parent 00fd59dd1a
Showing 5 changed files with 244 additions and 348 deletions Side-by-side Diff
board/ti/evm/MAINTAINERS
board/ti/evm/evm.c
board/ti/evm/evm.h
configs/omap3_evm_defconfig
include/configs/omap3_evm.h
 EVM BOARD
-M:	Tom Rini <trini@konsulko.com>
+M:	Derald D. Woods <woods.technical@gmail.com>
 S:	Maintained
 F:	board/ti/evm/
 F:	include/configs/omap3_evm.h
@@ -12,6 +12,8 @@
  * SPDX-License-Identifier:	GPL-2.0+
  */
 #include <common.h>
+#include <dm.h>
+#include <ns16550.h>
 #include <netdev.h>
 #include <asm/io.h>
 #include <asm/arch/mem.h>
  
  
  
  
@@ -22,14 +24,35 @@
 #include <i2c.h>
 #include <twl4030.h>
 #include <asm/mach-types.h>
+#include <asm/omap_musb.h>
 #include <linux/mtd/nand.h>
+#include <linux/usb/ch9.h>
+#include <linux/usb/gadget.h>
+#include <linux/usb/musb.h>
 #include "evm.h"
  
-#define OMAP3EVM_GPIO_ETH_RST_GEN1		64
-#define OMAP3EVM_GPIO_ETH_RST_GEN2		7
+#ifdef CONFIG_USB_EHCI_HCD
+#include <usb.h>
+#include <asm/ehci-omap.h>
+#endif
  
+#define OMAP3EVM_GPIO_ETH_RST_GEN1 64
+#define OMAP3EVM_GPIO_ETH_RST_GEN2 7
+
 DECLARE_GLOBAL_DATA_PTR;
  
+static const struct ns16550_platdata omap3_evm_serial = {
+	.base = OMAP34XX_UART1,
+	.reg_shift = 2,
+	.clock = V_NS16550_CLK,
+	.fcr = UART_FCR_DEFVAL,
+};
+
+U_BOOT_DEVICE(omap3_evm_uart) = {
+	"ns16550_serial",
+	&omap3_evm_serial
+};
+
 static u32 omap3_evm_version;
  
 u32 get_omap3_evm_rev(void)
  
  
  
  
@@ -60,25 +83,19 @@
 	default:
 		omap3_evm_version = OMAP3EVM_BOARD_GEN_2;
        }
-#else
+#else /* !CONFIG_CMD_NET */
 #if defined(CONFIG_STATIC_BOARD_REV)
-	/*
-	 * Look for static defintion of the board revision
-	 */
+	/* Look for static defintion of the board revision */
 	omap3_evm_version = CONFIG_STATIC_BOARD_REV;
 #else
-	/*
-	 * Fallback to the default above.
-	 */
+	/* Fallback to the default above */
 	omap3_evm_version = OMAP3EVM_BOARD_GEN_2;
-#endif
-#endif	/* CONFIG_CMD_NET */
+#endif /* CONFIG_STATIC_BOARD_REV */
+#endif /* CONFIG_CMD_NET */
 }
  
-#ifdef CONFIG_USB_OMAP3
-/*
- * MUSB port on OMAP3EVM Rev >= E requires extvbus programming.
- */
+#if defined(CONFIG_USB_MUSB_GADGET) || defined(CONFIG_USB_MUSB_HOST)
+/* MUSB port on OMAP3EVM Rev >= E requires extvbus programming. */
 u8 omap3_evm_need_extvbus(void)
 {
 	u8 retval = 0;
@@ -88,7 +105,7 @@
  
 	return retval;
 }
-#endif
+#endif /* CONFIG_USB_MUSB_{GADGET,HOST} */
  
 /*
  * Routine: board_init
@@ -105,7 +122,7 @@
 	return 0;
 }
  
-#ifdef CONFIG_SPL_BUILD
+#if defined(CONFIG_SPL_BUILD)
 /*
  * Routine: get_board_mem_timings
  * Description: If we use SPL then there is no x-loader nor config header
  
  
@@ -138,14 +155,42 @@
 	timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz;
 	timings->mr = MICRON_V_MR_165;
 }
-#endif
+#endif /* CONFIG_SPL_BUILD */
  
+#if defined(CONFIG_USB_MUSB_OMAP2PLUS)
+static struct musb_hdrc_config musb_config = {
+	.multipoint     = 1,
+	.dyn_fifo       = 1,
+	.num_eps        = 16,
+	.ram_bits       = 12,
+};
+
+static struct omap_musb_board_data musb_board_data = {
+	.interface_type	= MUSB_INTERFACE_ULPI,
+};
+
+static struct musb_hdrc_platform_data musb_plat = {
+#if defined(CONFIG_USB_MUSB_HOST)
+	.mode           = MUSB_HOST,
+#elif defined(CONFIG_USB_MUSB_GADGET)
+	.mode		= MUSB_PERIPHERAL,
+#else
+#error "Please define either CONFIG_USB_MUSB_HOST or CONFIG_USB_MUSB_GADGET"
+#endif /* CONFIG_USB_MUSB_{GADGET,HOST} */
+	.config         = &musb_config,
+	.power          = 100,
+	.platform_ops	= &omap2430_ops,
+	.board_data	= &musb_board_data,
+};
+#endif /* CONFIG_USB_MUSB_OMAP2PLUS */
+
 /*
  * Routine: misc_init_r
  * Description: Init ethernet (done here so udelay works)
  */
 int misc_init_r(void)
 {
+	twl4030_power_init();
  
 #ifdef CONFIG_SYS_I2C_OMAP24XX
 	i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED, CONFIG_SYS_OMAP24_I2C_SLAVE);
@@ -161,6 +206,13 @@
 #endif
 	omap_die_id_display();
  
+#if defined(CONFIG_USB_MUSB_OMAP2PLUS)
+	musb_register(&musb_plat, &musb_board_data, (void *)MUSB_BASE);
+#endif
+
+#if defined(CONFIG_USB_ETHER) && defined(CONFIG_USB_MUSB_GADGET)
+	omap_die_id_usbethaddr();
+#endif
 	return 0;
 }
  
@@ -175,7 +227,7 @@
 	MUX_EVM();
 }
  
-#ifdef CONFIG_CMD_NET
+#if defined(CONFIG_CMD_NET)
 /*
  * Routine: setup_net_chip
  * Description: Setting up the configuration GPMC registers specific to the
@@ -237,7 +289,7 @@
 int board_eth_init(bd_t *bis)
 {
 	int rc = 0;
-#ifdef CONFIG_SMC911X
+#if defined(CONFIG_SMC911X)
 #define STR_ENV_ETHADDR	"ethaddr"
  
 	struct eth_device *dev;
@@ -254,7 +306,7 @@
 			rc = -1;
 		}
 	}
-#endif
+#endif /* CONFIG_SMC911X */
 	return rc;
 }
 #endif /* CONFIG_CMD_NET */
  
  
@@ -264,12 +316,36 @@
 {
 	return omap_mmc_init(0, 0, 0, -1, -1);
 }
-#endif
  
-#if defined(CONFIG_MMC)
 void board_mmc_power_init(void)
 {
 	twl4030_power_mmc_init(0);
 }
-#endif
+#endif /* CONFIG_MMC */
+
+#if defined(CONFIG_USB_EHCI_HCD)
+static struct omap_usbhs_board_data usbhs_bdata = {
+	.port_mode[0] = OMAP_USBHS_PORT_MODE_UNUSED,
+	.port_mode[1] = OMAP_EHCI_PORT_MODE_PHY,
+	.port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED
+};
+
+int ehci_hcd_init(int index, enum usb_init_type init,
+		struct ehci_hccr **hccr, struct ehci_hcor **hcor)
+{
+	return omap_ehci_hcd_init(index, &usbhs_bdata, hccr, hcor);
+}
+
+int ehci_hcd_stop(int index)
+{
+	return omap_ehci_hcd_stop();
+}
+#endif /* CONFIG_USB_EHCI_HCD */
+
+#if defined(CONFIG_USB_ETHER) && defined(CONFIG_USB_MUSB_GADGET) && !defined(CONFIG_CMD_NET)
+int board_eth_init(bd_t *bis)
+{
+	return usb_eth_initialize(bis);
+}
+#endif /* CONFIG_USB_ETHER */
@@ -278,12 +278,19 @@
 								 /* TS_PEN_IRQ */\
 	MUX_VAL(CP(MCSPI1_CS2),		(IEN  | PTU | DIS | M4)) /*GPIO_176*/\
 								 /* - LAN_INTR*/\
-	MUX_VAL(CP(MCSPI1_CS3),		(IEN  | PTD | EN  | M0)) /*McSPI1_CS3*/\
-	MUX_VAL(CP(MCSPI2_CLK),		(IEN  | PTD | DIS | M0)) /*McSPI2_CLK*/\
-	MUX_VAL(CP(MCSPI2_SIMO),	(IEN  | PTD | DIS | M0)) /*McSPI2_SIMO*/\
-	MUX_VAL(CP(MCSPI2_SOMI),	(IEN  | PTD | DIS | M0)) /*McSPI2_SOMI*/\
-	MUX_VAL(CP(MCSPI2_CS0),		(IEN  | PTD | EN  | M0)) /*McSPI2_CS0*/\
-	MUX_VAL(CP(MCSPI2_CS1),		(IEN  | PTD | EN  | M0)) /*McSPI2_CS1*/\
+ /* USB EHCI (port 2) */\
+	MUX_VAL(CP(MCSPI1_CS3),		(IEN  | PTD | EN  | M3)) /*HSUSB2_DATA2*/\
+	MUX_VAL(CP(MCSPI2_CLK),		(IEN  | PTD | EN  | M3)) /*HSUSB2_DATA7*/\
+	MUX_VAL(CP(MCSPI2_SIMO),	(IEN  | PTD | EN  | M3)) /*HSUSB2_DATA4*/\
+	MUX_VAL(CP(MCSPI2_SOMI),	(IEN  | PTD | EN  | M3)) /*HSUSB2_DATA5*/\
+	MUX_VAL(CP(MCSPI2_CS0),		(IEN  | PTD | EN  | M3)) /*HSUSB2_DATA6*/\
+	MUX_VAL(CP(MCSPI2_CS1),		(IEN  | PTD | EN  | M3)) /*HSUSB2_DATA3*/\
+	MUX_VAL(CP(ETK_D10_ES2),	(IDIS | PTD | DIS | M3)) /*HSUSB2_CLK*/\
+	MUX_VAL(CP(ETK_D11_ES2),	(IDIS | PTD | DIS | M3)) /*HSUSB2_STP*/\
+	MUX_VAL(CP(ETK_D12_ES2),	(IEN  | PTD | EN  | M3)) /*HSUSB2_DIR*/\
+	MUX_VAL(CP(ETK_D13_ES2),	(IEN  | PTD | EN  | M3)) /*HSUSB2_NXT*/\
+	MUX_VAL(CP(ETK_D14_ES2),	(IEN  | PTD | EN  | M3)) /*HSUSB2_DATA0*/\
+	MUX_VAL(CP(ETK_D15_ES2),	(IEN  | PTD | EN  | M3)) /*HSUSB2_DATA1*/\
  /*Control and debug */\
 	MUX_VAL(CP(SYS_32K),		(IEN  | PTD | DIS | M0)) /*SYS_32K*/\
 	MUX_VAL(CP(SYS_CLKREQ),		(IEN  | PTD | DIS | M0)) /*SYS_CLKREQ*/\
@@ -318,12 +325,6 @@
 	MUX_VAL(CP(ETK_D7_ES2 ),	(IEN  | PTD | DIS | M0)) /*ETK_D7*/\
 	MUX_VAL(CP(ETK_D8_ES2 ),	(IEN  | PTD | DIS | M0)) /*ETK_D8*/\
 	MUX_VAL(CP(ETK_D9_ES2 ),	(IEN  | PTD | DIS | M0)) /*ETK_D9*/\
-	MUX_VAL(CP(ETK_D10_ES2),	(IEN  | PTD | DIS | M0)) /*ETK_D10*/\
-	MUX_VAL(CP(ETK_D11_ES2),	(IEN  | PTD | DIS | M0)) /*ETK_D11*/\
-	MUX_VAL(CP(ETK_D12_ES2),	(IEN  | PTD | DIS | M0)) /*ETK_D12*/\
-	MUX_VAL(CP(ETK_D13_ES2),	(IEN  | PTD | DIS | M0)) /*ETK_D13*/\
-	MUX_VAL(CP(ETK_D14_ES2),	(IEN  | PTD | DIS | M0)) /*ETK_D14*/\
-	MUX_VAL(CP(ETK_D15_ES2),	(IEN  | PTD | DIS | M0)) /*ETK_D15*/\
  /*Die to Die */\
 	MUX_VAL(CP(D2D_MCAD1),		(IEN  | PTD | EN  | M0)) /*d2d_mcad1*/\
 	MUX_VAL(CP(D2D_MCAD2),		(IEN  | PTD | EN  | M0)) /*d2d_mcad2*/\
@@ -2,33 +2,62 @@
 # CONFIG_SYS_THUMB_BUILD is not set
 CONFIG_ARCH_OMAP2PLUS=y
 CONFIG_SYS_TEXT_BASE=0x80100000
+CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_SYS_MPUCLK=720
 CONFIG_TARGET_OMAP3_EVM=y
+CONFIG_SPL_STACK_R_ADDR=0x82000000
+CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_EXTRA_OPTIONS="NAND"
 CONFIG_ENV_IS_IN_NAND=y
 CONFIG_BOOTDELAY=3
+CONFIG_SYS_CONSOLE_INFO_QUIET=y
+CONFIG_DEFAULT_FDT_FILE="omap3-evm.dtb"
+CONFIG_VERSION_VARIABLE=y
 CONFIG_SPL=y
+CONFIG_SPL_SYS_MALLOC_SIMPLE=y
+CONFIG_SPL_STACK_R=y
 # CONFIG_SPL_EXT_SUPPORT is not set
-CONFIG_HUSH_PARSER=y
+CONFIG_SPL_MTD_SUPPORT=y
 CONFIG_SYS_PROMPT="OMAP3_EVM # "
 # CONFIG_CMD_IMI is not set
 # CONFIG_CMD_IMLS is not set
 CONFIG_CMD_ASKENV=y
 # CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_NAND=y
-CONFIG_CMD_I2C=y
+CONFIG_CMD_NAND_TRIMFFS=y
+CONFIG_CMD_SPI=y
 CONFIG_CMD_USB=y
-# CONFIG_CMD_FPGA is not set
-# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_PING=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_FAT=y
-CONFIG_CMD_JFFS2=y
-CONFIG_EFI_PARTITION=y
-# CONFIG_PARTITION_UUIDS is not set
-# CONFIG_SPL_PARTITION_UUIDS is not set
+CONFIG_CMD_CACHE=y
+CONFIG_CMD_EXT4_WRITE=y
+CONFIG_CMD_FS_UUID=y
+CONFIG_MTDIDS_DEFAULT="nand0=omap2-nand.0"
+CONFIG_MTDPARTS_DEFAULT="mtdparts=omap2-nand.0:512k(spl),1792k(u-boot),128k(dtb),128k(u-boot-env),6m(kernel),-(rootfs)"
+CONFIG_CMD_UBI=y
+# CONFIG_ISO_PARTITION is not set
+# CONFIG_EFI_PARTITION is not set
+CONFIG_SPL_PARTITION_UUIDS=y
+CONFIG_DM=y
+CONFIG_SPL_DM=y
+CONFIG_DM_GPIO=y
 CONFIG_MMC_OMAP_HS=y
+CONFIG_MTD=y
+CONFIG_DM_SERIAL=y
 CONFIG_SYS_NS16550=y
 CONFIG_USB=y
-CONFIG_USB_STORAGE=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_MUSB_GADGET=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_G_DNL_MANUFACTURER="Texas Instruments"
+CONFIG_G_DNL_VENDOR_NUM=0x0451
+CONFIG_G_DNL_PRODUCT_NUM=0x5678
+CONFIG_FAT_WRITE=y
+CONFIG_OF_LIBFDT=y
+CONFIG_OF_LIBFDT_OVERLAY=y
+CONFIG_SPL_OF_LIBFDT=y
+# CONFIG_EFI_LOADER is not set
@@ -14,349 +14,139 @@
  * SPDX-License-Identifier:	GPL-2.0+
  */
  
-#ifndef __OMAP3EVM_CONFIG_H
-#define __OMAP3EVM_CONFIG_H
+#ifndef __CONFIG_H
+#define __CONFIG_H
  
-#include <asm/arch/cpu.h>
-#include <asm/arch/omap.h>
+#define CONFIG_NR_DRAM_BANKS            2 /* CS1 may or may not be populated */
  
-/* ----------------------------------------------------------------------------
- * Supported U-Boot features
- * ----------------------------------------------------------------------------
- */
-#define CONFIG_SYS_LONGHELP
+#include <configs/ti_omap3_common.h>
  
-/* Allow to overwrite serial and ethaddr */
-#define CONFIG_ENV_OVERWRITE
-
-/* Add auto-completion support */
-#define CONFIG_AUTO_COMPLETE
-
-/* ----------------------------------------------------------------------------
- * Supported hardware
- * ----------------------------------------------------------------------------
- */
-
-/* SPL */
-#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION	1
-#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME	"u-boot.img"
-
-/* Partition tables */
-
-/* USB
- *
- * Enable CONFIG_USB_MUSB_HCD for Host functionalities MSC, keyboard
- * Enable CONFIG_USB_MUSB_UDD for Device functionalities.
- */
-#define CONFIG_USB_OMAP3
-#define CONFIG_USB_MUSB_HCD
-/* #define CONFIG_USB_MUSB_UDC */
-
-/* NAND SPL */
-#define CONFIG_SPL_NAND_SIMPLE
-#define CONFIG_SPL_NAND_BASE
-#define CONFIG_SPL_NAND_DRIVERS
-#define CONFIG_SPL_NAND_ECC
-#define CONFIG_SYS_NAND_5_ADDR_CYCLE
-#define CONFIG_SYS_NAND_PAGE_COUNT	64
-#define CONFIG_SYS_NAND_PAGE_SIZE	2048
-#define CONFIG_SYS_NAND_OOBSIZE		64
-#define CONFIG_SYS_NAND_BLOCK_SIZE	(128*1024)
-#define CONFIG_SYS_NAND_BAD_BLOCK_POS	0
-#define CONFIG_SYS_NAND_ECCPOS		{2, 3, 4, 5, 6, 7, 8, 9,\
-						10, 11, 12, 13}
-#define CONFIG_SYS_NAND_ECCSIZE		512
-#define CONFIG_SYS_NAND_ECCBYTES	3
-#define CONFIG_NAND_OMAP_ECCSCHEME	OMAP_ECC_HAM1_CODE_HW
-#define CONFIG_SYS_NAND_U_BOOT_START   CONFIG_SYS_TEXT_BASE
-#define CONFIG_SYS_NAND_U_BOOT_OFFS	0x80000
-
 /*
- * High level configuration options
+ * We are only ever GP parts and will utilize all of the "downloaded image"
+ * area in SRAM which starts at 0x40200000 and ends at 0x4020FFFF (64KB).
  */
+#undef CONFIG_SPL_TEXT_BASE
+#define CONFIG_SPL_TEXT_BASE            0x40200000
  
-#define CONFIG_SDRC			/* The chip has SDRC controller */
+#define CONFIG_SPL_FRAMEWORK
  
-/*
- * Clock related definitions
- */
-#define V_OSCK			26000000	/* Clock output from T2 */
-#define V_SCLK			(V_OSCK >> 1)
-
-/*
- * OMAP3 has 12 GP timers, they can be driven by the system clock
- * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
- * This rate is divided by a local divisor.
- */
-#define CONFIG_SYS_TIMERBASE		OMAP34XX_GPT2
-#define CONFIG_SYS_PTV			2	/* Divisor: 2^(PTV+1) => 8 */
-
-/* Size of environment - 128KB */
-#define CONFIG_ENV_SIZE			(128 << 10)
-
-/* Size of malloc pool */
-#define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + (128 << 10))
-
-/*
- * Physical Memory Map
- * Note 1: CS1 may or may not be populated
- * Note 2: SDRAM size is expected to be at least 32MB
- */
-#define CONFIG_NR_DRAM_BANKS		2
-#define PHYS_SDRAM_1			OMAP34XX_SDRC_CS0
-#define PHYS_SDRAM_2			OMAP34XX_SDRC_CS1
-
-/* Limits for memtest */
-#define CONFIG_SYS_MEMTEST_START	(OMAP34XX_SDRC_CS0)
-#define CONFIG_SYS_MEMTEST_END		(OMAP34XX_SDRC_CS0 + \
-						0x01F00000) /* 31MB */
-
-/* Default load address */
-#define CONFIG_SYS_LOAD_ADDR		(OMAP34XX_SDRC_CS0)
-
-/* -----------------------------------------------------------------------------
- * Hardware drivers
- * -----------------------------------------------------------------------------
- */
-
-/*
- * NS16550 Configuration
- */
-#define V_NS16550_CLK			48000000	/* 48MHz (APLL96/2) */
-
-#define CONFIG_SYS_NS16550_SERIAL
-#define CONFIG_SYS_NS16550_REG_SIZE	(-4)
-#define CONFIG_SYS_NS16550_CLK		V_NS16550_CLK
-
-/*
- * select serial console configuration
- */
-#define CONFIG_CONS_INDEX		1
-#define CONFIG_SERIAL1			1	/* UART1 on OMAP3 EVM */
-#define CONFIG_SYS_NS16550_COM1		OMAP34XX_UART1
-#define CONFIG_SYS_BAUDRATE_TABLE	{4800, 9600, 19200, 38400, 57600,\
-					115200}
-
-/*
- * I2C
- */
-#define CONFIG_SYS_I2C
-#define CONFIG_SYS_OMAP24_I2C_SPEED	100000
-#define CONFIG_SYS_OMAP24_I2C_SLAVE	1
-
-/*
- * PISMO support
- */
-/* Monitor at start of flash - Reserve 2 sectors */
-#define CONFIG_SYS_MONITOR_BASE		CONFIG_SYS_FLASH_BASE
-
-#define CONFIG_SYS_MONITOR_LEN		(256 << 10)
-
-/* Start location & size of environment */
-#define ONENAND_ENV_OFFSET		0x260000
-#define SMNAND_ENV_OFFSET		0x260000
-
-#define CONFIG_SYS_ENV_SECT_SIZE	(128 << 10)	/* 128 KiB */
-
-/*
- * NAND
- */
-/* Physical address to access NAND */
-#define CONFIG_SYS_NAND_ADDR		NAND_BASE
-
-/* Physical address to access NAND at CS0 */
-#define CONFIG_SYS_NAND_BASE		NAND_BASE
-
-/* Max number of NAND devices */
-#define CONFIG_SYS_MAX_NAND_DEVICE	1
-#define CONFIG_SYS_NAND_BUSWIDTH_16BIT
-/* Timeout values (in ticks) */
-#define CONFIG_SYS_FLASH_ERASE_TOUT	(100 * CONFIG_SYS_HZ)
-#define CONFIG_SYS_FLASH_WRITE_TOUT	(100 * CONFIG_SYS_HZ)
-
-/* Flash banks JFFS2 should use */
-#define CONFIG_SYS_MAX_MTD_BANKS	(CONFIG_SYS_MAX_FLASH_BANKS + \
-						CONFIG_SYS_MAX_NAND_DEVICE)
-
-#define CONFIG_SYS_JFFS2_MEM_NAND
-#define CONFIG_SYS_JFFS2_FIRST_BANK	CONFIG_SYS_MAX_FLASH_BANKS
-#define CONFIG_SYS_JFFS2_NUM_BANKS	1
-
-#define CONFIG_JFFS2_NAND
-/* nand device jffs2 lives on */
-#define CONFIG_JFFS2_DEV		"nand0"
-/* Start of jffs2 partition */
-#define CONFIG_JFFS2_PART_OFFSET	0x680000
-/* Size of jffs2 partition */
-#define CONFIG_JFFS2_PART_SIZE		0xf980000
-
-/*
- * USB
- */
-#ifdef CONFIG_USB_OMAP3
-
-#ifdef CONFIG_USB_MUSB_HCD
-
-#ifdef CONFIG_USB_KEYBOARD
-#define CONFIG_SYS_USB_EVENT_POLL
-#define CONFIG_PREBOOT			"usb start"
-#endif /* CONFIG_USB_KEYBOARD */
-
-#endif /* CONFIG_USB_MUSB_HCD */
-
-#ifdef CONFIG_USB_MUSB_UDC
-/* USB device configuration */
-#define CONFIG_USB_DEVICE
-#define CONFIG_USB_TTY
-
-/* Change these to suit your needs */
-#define CONFIG_USBD_VENDORID		0x0451
-#define CONFIG_USBD_PRODUCTID		0x5678
-#define CONFIG_USBD_MANUFACTURER	"Texas Instruments"
-#define CONFIG_USBD_PRODUCT_NAME	"EVM"
-#endif /* CONFIG_USB_MUSB_UDC */
-
-#endif /* CONFIG_USB_OMAP3 */
-
-/* ----------------------------------------------------------------------------
- * U-Boot features
- * ----------------------------------------------------------------------------
- */
-#define CONFIG_SYS_MAXARGS		16	/* max args for a command */
-
 #define CONFIG_MISC_INIT_R
-
-#define CONFIG_CMDLINE_TAG			/* enable passing of ATAGs */
+#define CONFIG_CMDLINE_TAG
 #define CONFIG_SETUP_MEMORY_TAGS
 #define CONFIG_INITRD_TAG
 #define CONFIG_REVISION_TAG
  
-/* Size of Console IO buffer */
-#define CONFIG_SYS_CBSIZE		512
  
-/* Size of print buffer */
-#define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + \
-						sizeof(CONFIG_SYS_PROMPT) + 16)
+/* Override OMAP3 serial console configuration */
+#undef CONFIG_CONS_INDEX
+#define CONFIG_CONS_INDEX               1
+#define CONFIG_SYS_NS16550_COM1         OMAP34XX_UART1
+#if defined(CONFIG_SPL_BUILD)
+#undef CONFIG_SYS_NS16550_REG_SIZE
+#else /* !CONFIG_SPL_BUILD  */
+#define CONFIG_SYS_NS16550_REG_SIZE     (-1)
+#endif /* CONFIG_SPL_BUILD */
  
-/* Size of bootarg buffer */
-#define CONFIG_SYS_BARGSIZE		(CONFIG_SYS_CBSIZE)
-
-#define CONFIG_BOOTFILE			"uImage"
-
-/*
- * NAND / OneNAND
- */
-#if defined(CONFIG_CMD_NAND)
+/* NAND */
+#if defined(CONFIG_NAND)
+#define CONFIG_NAND_OMAP_GPMC
 #define CONFIG_SYS_FLASH_BASE		NAND_BASE
+#define CONFIG_SYS_MAX_NAND_DEVICE      1
+#define CONFIG_BCH
+#define CONFIG_SYS_NAND_BUSWIDTH_16BIT
+#define CONFIG_SYS_NAND_5_ADDR_CYCLE
+#define CONFIG_SYS_NAND_PAGE_COUNT      64
+#define CONFIG_SYS_NAND_PAGE_SIZE       2048
+#define CONFIG_SYS_NAND_OOBSIZE         64
+#define CONFIG_SYS_NAND_BLOCK_SIZE      (128*1024)
+#define CONFIG_SYS_NAND_BAD_BLOCK_POS   NAND_LARGE_BADBLOCK_POS
+#define CONFIG_SYS_NAND_ECCPOS          {2, 3, 4, 5, 6, 7, 8, 9,\
+                                         10, 11, 12, 13}
+#define CONFIG_SYS_NAND_ECCSIZE         512
+#define CONFIG_SYS_NAND_ECCBYTES        3
+#define CONFIG_NAND_OMAP_ECCSCHEME      OMAP_ECC_BCH8_CODE_HW_DETECTION_SW
+#define CONFIG_SYS_NAND_U_BOOT_OFFS     0x80000
+#define CONFIG_ENV_IS_IN_NAND           1
+#define CONFIG_ENV_SIZE                 (128 << 10) /* 128 KiB */
+#define SMNAND_ENV_OFFSET               0x260000    /* environment starts here */
+#define CONFIG_SYS_ENV_SECT_SIZE        (128 << 10) /* 128 KiB */
+#define CONFIG_ENV_OFFSET               SMNAND_ENV_OFFSET
+#define CONFIG_ENV_ADDR                 SMNAND_ENV_OFFSET
+#define CONFIG_ENV_OVERWRITE
+#define CONFIG_SPL_OMAP3_ID_NAND
+#define CONFIG_MTD_DEVICE               /* needed for mtdparts commands */
+#define CONFIG_MTD_PARTITIONS           /* required for UBI partition support */
+#endif /* CONFIG_NAND */
  
-#define CONFIG_NAND_OMAP_GPMC
-#define CONFIG_ENV_OFFSET		SMNAND_ENV_OFFSET
-#elif defined(CONFIG_CMD_ONENAND)
-#define CONFIG_SYS_FLASH_BASE		ONENAND_MAP
-#define CONFIG_SYS_ONENAND_BASE		ONENAND_MAP
-#endif
+#define CONFIG_USB_OMAP3
  
-#if !defined(CONFIG_ENV_IS_NOWHERE)
-#if defined(CONFIG_CMD_NAND)
-#elif defined(CONFIG_CMD_ONENAND)
-#define CONFIG_ENV_OFFSET		ONENAND_ENV_OFFSET
-#endif
-#endif /* CONFIG_ENV_IS_NOWHERE */
+/* MUSB */
+#define CONFIG_USB_MUSB_OMAP2PLUS
+#define CONFIG_USB_MUSB_PIO_ONLY
+#define CONFIG_USB_ETHER
+#define CONFIG_USB_ETHER_RNDIS
  
-#define CONFIG_ENV_ADDR			CONFIG_ENV_OFFSET
+/* USB EHCI */
+#define CONFIG_SYS_USB_FAT_BOOT_PARTITION  1
  
+/* SMSC911x Ethernet */
 #if defined(CONFIG_CMD_NET)
-
-/* Ethernet (SMSC9115 from SMSC9118 family) */
 #define CONFIG_SMC911X
 #define CONFIG_SMC911X_32_BIT
-#define CONFIG_SMC911X_BASE		0x2C000000
-
-/* BOOTP fields */
-#define CONFIG_BOOTP_SUBNETMASK		0x00000001
-#define CONFIG_BOOTP_GATEWAY		0x00000002
-#define CONFIG_BOOTP_HOSTNAME		0x00000004
-#define CONFIG_BOOTP_BOOTPATH		0x00000010
-
+#define CONFIG_SMC911X_BASE             0x2C000000
 #endif /* CONFIG_CMD_NET */
  
-/* Support for relocation */
-#define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM_1
-#define CONFIG_SYS_INIT_RAM_ADDR	0x4020f800
-#define CONFIG_SYS_INIT_RAM_SIZE	0x800
-#define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_INIT_RAM_ADDR + \
-					 CONFIG_SYS_INIT_RAM_SIZE - \
-					 GENERATED_GBL_DATA_SIZE)
+/* Environment */
+#define CONFIG_PREBOOT                  "usb start"
  
-/* -----------------------------------------------------------------------------
- * Board specific
- * -----------------------------------------------------------------------------
- */
-
-/* Uncomment to define the board revision statically */
-/* #define CONFIG_STATIC_BOARD_REV	OMAP3EVM_BOARD_GEN_2 */
-
-/* Defines for SPL */
-#define CONFIG_SPL_FRAMEWORK
-#define CONFIG_SPL_TEXT_BASE		0x40200800
-#define CONFIG_SPL_MAX_SIZE		(SRAM_SCRATCH_SPACE_ADDR - \
-					 CONFIG_SPL_TEXT_BASE)
-
-#define CONFIG_SPL_BSS_START_ADDR	0x80000000
-#define CONFIG_SPL_BSS_MAX_SIZE		0x80000		/* 512 KB */
-
-#define CONFIG_SPL_OMAP3_ID_NAND
-#define CONFIG_SPL_LDSCRIPT		"arch/arm/mach-omap2/u-boot-spl.lds"
-
-/*
- * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM
- * 64 bytes before this address should be set aside for u-boot.img's
- * header. That is 0x800FFFC0--0x80100000 should not be used for any
- * other needs.
- */
-#define CONFIG_SYS_TEXT_BASE		0x80100000
-#define CONFIG_SYS_SPL_MALLOC_START	0x80208000
-#define CONFIG_SYS_SPL_MALLOC_SIZE	0x100000
-
-/* -----------------------------------------------------------------------------
- * Default environment
- * -----------------------------------------------------------------------------
- */
-
 #define CONFIG_EXTRA_ENV_SETTINGS \
+	DEFAULT_LINUX_BOOT_ENV \
+	"mtdids=" CONFIG_MTDIDS_DEFAULT "\0"	\
+	"mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \
 	"loadaddr=0x82000000\0" \
 	"usbtty=cdc_acm\0" \
 	"mmcdev=0\0" \
 	"console=ttyO0,115200n8\0" \
 	"mmcargs=setenv bootargs console=${console} " \
+		"${optargs} " \
 		"root=/dev/mmcblk0p2 rw " \
-		"rootfstype=ext3 rootwait rootwait\0" \" \
+		"rootfstype=ext4 rootwait rootwait\0" \" \
 	"nandargs=setenv bootargs console=${console} " \
-		"root=/dev/mtdblock4 rw " \
-		"rootfstype=jffs2\0" \
+		"${optargs} " \
+		"root=ubi0:rootfs rw ubi.mtd=rootfs noinitrd " \
+		"rootfstype=ubifs rootwait\0" \
 	"loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
 	"bootscript=echo Running bootscript from mmc ...; " \
 		"source ${loadaddr}\0" \
-	"loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
-	"mmcboot=echo Booting from mmc ...; " \
+	"loaduimage=setenv bootfile uImage; " \
+		"fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
+	"loadzimage=setenv bootfile zImage; " \
+		"fatload mmc ${mmcdev} ${loadaddr} zImage\0" \
+	"loaddtb=fatload mmc ${mmcdev} ${fdtaddr} omap3-evm.dtb\0" \
+	"mmcboot=echo Booting ${bootfile} from mmc ...; " \
 		"run mmcargs; " \
-		"bootm ${loadaddr}\0" \
-	"nandboot=echo Booting from nand ...; " \
+		"bootm ${loadaddr} - ${fdtaddr}\0" \
+	"mmcbootz=echo Booting ${bootfile} from mmc ...; " \
+		"run mmcargs; " \
+		"bootz ${loadaddr} - ${fdtaddr}\0" \
+	"nandboot=echo Booting uImage from nand ...; " \
 		"run nandargs; " \
-		"onenand read ${loadaddr} 280000 400000; " \
-		"bootm ${loadaddr}\0" \
+		"nand read ${loadaddr} kernel; " \
+		"nand read ${fdtaddr} dtb; " \
+		"bootm ${loadaddr} - ${fdtaddr}\0"
  
 #define CONFIG_BOOTCOMMAND \
 	"mmc dev ${mmcdev}; if mmc rescan; then " \
 		"if run loadbootscript; then " \
 			"run bootscript; " \
 		"else " \
-			"if run loaduimage; then " \
-				"run mmcboot; " \
-			"else run nandboot; " \
-			"fi; " \
+			"if run loadzimage && run loaddtb; then " \
+				"run mmcbootz; fi; " \
+			"if run loaduimage && run loaddtb; then " \
+				"run mmcboot; fi; " \
+			"run nandboot; " \
 		"fi; " \
 	"else run nandboot; fi"
  
-#endif /* __OMAP3EVM_CONFIG_H */
+#endif /* __CONFIG_H */
1	1	EVM BOARD
2		-M: Tom Rini <trini@konsulko.com>
	2	+M: Derald D. Woods <woods.technical@gmail.com>
3	3	S: Maintained
4	4	F: board/ti/evm/
5	5	F: include/configs/omap3_evm.h
...	...	@@ -12,6 +12,8 @@
12	12	* SPDX-License-Identifier: GPL-2.0+
13	13	*/
14	14	#include <common.h>
	15	+#include <dm.h>
	16	+#include <ns16550.h>
15	17	#include <netdev.h>
16	18	#include <asm/io.h>
17	19	#include <asm/arch/mem.h>
18	20
19	21
20	22
21	23
...	...	@@ -22,14 +24,35 @@
22	24	#include <i2c.h>
23	25	#include <twl4030.h>
24	26	#include <asm/mach-types.h>
	27	+#include <asm/omap_musb.h>
25	28	#include <linux/mtd/nand.h>
	29	+#include <linux/usb/ch9.h>
	30	+#include <linux/usb/gadget.h>
	31	+#include <linux/usb/musb.h>
26	32	#include "evm.h"
27	33
28		-#define OMAP3EVM_GPIO_ETH_RST_GEN1 64
29		-#define OMAP3EVM_GPIO_ETH_RST_GEN2 7
	34	+#ifdef CONFIG_USB_EHCI_HCD
	35	+#include <usb.h>
	36	+#include <asm/ehci-omap.h>
	37	+#endif
30	38
	39	+#define OMAP3EVM_GPIO_ETH_RST_GEN1 64
	40	+#define OMAP3EVM_GPIO_ETH_RST_GEN2 7
	41	+
31	42	DECLARE_GLOBAL_DATA_PTR;
32	43
	44	+static const struct ns16550_platdata omap3_evm_serial = {
	45	+ .base = OMAP34XX_UART1,
	46	+ .reg_shift = 2,
	47	+ .clock = V_NS16550_CLK,
	48	+ .fcr = UART_FCR_DEFVAL,
	49	+};
	50	+
	51	+U_BOOT_DEVICE(omap3_evm_uart) = {
	52	+ "ns16550_serial",
	53	+ &omap3_evm_serial
	54	+};
	55	+
33	56	static u32 omap3_evm_version;
34	57
35	58	u32 get_omap3_evm_rev(void)
36	59
37	60
38	61
39	62
...	...	@@ -60,25 +83,19 @@
60	83	default:
61	84	omap3_evm_version = OMAP3EVM_BOARD_GEN_2;
62	85	}
63		-#else
	86	+#else /* !CONFIG_CMD_NET */
64	87	#if defined(CONFIG_STATIC_BOARD_REV)
65		- /*
66		- * Look for static defintion of the board revision
67		- */
	88	+ /* Look for static defintion of the board revision */
68	89	omap3_evm_version = CONFIG_STATIC_BOARD_REV;
69	90	#else
70		- /*
71		- * Fallback to the default above.
72		- */
	91	+ /* Fallback to the default above */
73	92	omap3_evm_version = OMAP3EVM_BOARD_GEN_2;
74		-#endif
75		-#endif /* CONFIG_CMD_NET */
	93	+#endif /* CONFIG_STATIC_BOARD_REV */
	94	+#endif /* CONFIG_CMD_NET */
76	95	}
77	96
78		-#ifdef CONFIG_USB_OMAP3
79		-/*
80		- * MUSB port on OMAP3EVM Rev >= E requires extvbus programming.
81		- */
	97	+#if defined(CONFIG_USB_MUSB_GADGET) \|\| defined(CONFIG_USB_MUSB_HOST)
	98	+/* MUSB port on OMAP3EVM Rev >= E requires extvbus programming. */
82	99	u8 omap3_evm_need_extvbus(void)
83	100	{
84	101	u8 retval = 0;
...	...	@@ -88,7 +105,7 @@
88	105
89	106	return retval;
90	107	}
91		-#endif
	108	+#endif /* CONFIG_USB_MUSB_{GADGET,HOST} */
92	109
93	110	/*
94	111	* Routine: board_init
...	...	@@ -105,7 +122,7 @@
105	122	return 0;
106	123	}
107	124
108		-#ifdef CONFIG_SPL_BUILD
	125	+#if defined(CONFIG_SPL_BUILD)
109	126	/*
110	127	* Routine: get_board_mem_timings
111	128	* Description: If we use SPL then there is no x-loader nor config header
112	129
113	130
...	...	@@ -138,14 +155,42 @@
138	155	timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz;
139	156	timings->mr = MICRON_V_MR_165;
140	157	}
141		-#endif
	158	+#endif /* CONFIG_SPL_BUILD */
142	159
	160	+#if defined(CONFIG_USB_MUSB_OMAP2PLUS)
	161	+static struct musb_hdrc_config musb_config = {
	162	+ .multipoint = 1,
	163	+ .dyn_fifo = 1,
	164	+ .num_eps = 16,
	165	+ .ram_bits = 12,
	166	+};
	167	+
	168	+static struct omap_musb_board_data musb_board_data = {
	169	+ .interface_type = MUSB_INTERFACE_ULPI,
	170	+};
	171	+
	172	+static struct musb_hdrc_platform_data musb_plat = {
	173	+#if defined(CONFIG_USB_MUSB_HOST)
	174	+ .mode = MUSB_HOST,
	175	+#elif defined(CONFIG_USB_MUSB_GADGET)
	176	+ .mode = MUSB_PERIPHERAL,
	177	+#else
	178	+#error "Please define either CONFIG_USB_MUSB_HOST or CONFIG_USB_MUSB_GADGET"
	179	+#endif /* CONFIG_USB_MUSB_{GADGET,HOST} */
	180	+ .config = &musb_config,
	181	+ .power = 100,
	182	+ .platform_ops = &omap2430_ops,
	183	+ .board_data = &musb_board_data,
	184	+};
	185	+#endif /* CONFIG_USB_MUSB_OMAP2PLUS */
	186	+
143	187	/*
144	188	* Routine: misc_init_r
145	189	* Description: Init ethernet (done here so udelay works)
146	190	*/
147	191	int misc_init_r(void)
148	192	{
	193	+ twl4030_power_init();
149	194
150	195	#ifdef CONFIG_SYS_I2C_OMAP24XX
151	196	i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED, CONFIG_SYS_OMAP24_I2C_SLAVE);
...	...	@@ -161,6 +206,13 @@
161	206	#endif
162	207	omap_die_id_display();
163	208
	209	+#if defined(CONFIG_USB_MUSB_OMAP2PLUS)
	210	+ musb_register(&musb_plat, &musb_board_data, (void *)MUSB_BASE);
	211	+#endif
	212	+
	213	+#if defined(CONFIG_USB_ETHER) && defined(CONFIG_USB_MUSB_GADGET)
	214	+ omap_die_id_usbethaddr();
	215	+#endif
164	216	return 0;
165	217	}
166	218
...	...	@@ -175,7 +227,7 @@
175	227	MUX_EVM();
176	228	}
177	229
178		-#ifdef CONFIG_CMD_NET
	230	+#if defined(CONFIG_CMD_NET)
179	231	/*
180	232	* Routine: setup_net_chip
181	233	* Description: Setting up the configuration GPMC registers specific to the
...	...	@@ -237,7 +289,7 @@
237	289	int board_eth_init(bd_t *bis)
238	290	{
239	291	int rc = 0;
240		-#ifdef CONFIG_SMC911X
	292	+#if defined(CONFIG_SMC911X)
241	293	#define STR_ENV_ETHADDR "ethaddr"
242	294
243	295	struct eth_device *dev;
...	...	@@ -254,7 +306,7 @@
254	306	rc = -1;
255	307	}
256	308	}
257		-#endif
	309	+#endif /* CONFIG_SMC911X */
258	310	return rc;
259	311	}
260	312	#endif /* CONFIG_CMD_NET */
261	313
262	314
...	...	@@ -264,12 +316,36 @@
264	316	{
265	317	return omap_mmc_init(0, 0, 0, -1, -1);
266	318	}
267		-#endif
268	319
269		-#if defined(CONFIG_MMC)
270	320	void board_mmc_power_init(void)
271	321	{
272	322	twl4030_power_mmc_init(0);
273	323	}
274		-#endif
	324	+#endif /* CONFIG_MMC */
	325	+
	326	+#if defined(CONFIG_USB_EHCI_HCD)
	327	+static struct omap_usbhs_board_data usbhs_bdata = {
	328	+ .port_mode[0] = OMAP_USBHS_PORT_MODE_UNUSED,
	329	+ .port_mode[1] = OMAP_EHCI_PORT_MODE_PHY,
	330	+ .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED
	331	+};
	332	+
	333	+int ehci_hcd_init(int index, enum usb_init_type init,
	334	+ struct ehci_hccr hccr, struct ehci_hcor hcor)
	335	+{
	336	+ return omap_ehci_hcd_init(index, &usbhs_bdata, hccr, hcor);
	337	+}
	338	+
	339	+int ehci_hcd_stop(int index)
	340	+{
	341	+ return omap_ehci_hcd_stop();
	342	+}
	343	+#endif /* CONFIG_USB_EHCI_HCD */
	344	+
	345	+#if defined(CONFIG_USB_ETHER) && defined(CONFIG_USB_MUSB_GADGET) && !defined(CONFIG_CMD_NET)
	346	+int board_eth_init(bd_t *bis)
	347	+{
	348	+ return usb_eth_initialize(bis);
	349	+}
	350	+#endif /* CONFIG_USB_ETHER */
...	...	@@ -278,12 +278,19 @@
278	278	/* TS_PEN_IRQ */\
279	279	MUX_VAL(CP(MCSPI1_CS2), (IEN \| PTU \| DIS \| M4)) /GPIO_176/\
280	280	/* - LAN_INTR*/\
281		- MUX_VAL(CP(MCSPI1_CS3), (IEN \| PTD \| EN \| M0)) /McSPI1_CS3/\
282		- MUX_VAL(CP(MCSPI2_CLK), (IEN \| PTD \| DIS \| M0)) /McSPI2_CLK/\
283		- MUX_VAL(CP(MCSPI2_SIMO), (IEN \| PTD \| DIS \| M0)) /McSPI2_SIMO/\
284		- MUX_VAL(CP(MCSPI2_SOMI), (IEN \| PTD \| DIS \| M0)) /McSPI2_SOMI/\
285		- MUX_VAL(CP(MCSPI2_CS0), (IEN \| PTD \| EN \| M0)) /McSPI2_CS0/\
286		- MUX_VAL(CP(MCSPI2_CS1), (IEN \| PTD \| EN \| M0)) /McSPI2_CS1/\
	281	+ /* USB EHCI (port 2) */\
	282	+ MUX_VAL(CP(MCSPI1_CS3), (IEN \| PTD \| EN \| M3)) /HSUSB2_DATA2/\
	283	+ MUX_VAL(CP(MCSPI2_CLK), (IEN \| PTD \| EN \| M3)) /HSUSB2_DATA7/\
	284	+ MUX_VAL(CP(MCSPI2_SIMO), (IEN \| PTD \| EN \| M3)) /HSUSB2_DATA4/\
	285	+ MUX_VAL(CP(MCSPI2_SOMI), (IEN \| PTD \| EN \| M3)) /HSUSB2_DATA5/\
	286	+ MUX_VAL(CP(MCSPI2_CS0), (IEN \| PTD \| EN \| M3)) /HSUSB2_DATA6/\
	287	+ MUX_VAL(CP(MCSPI2_CS1), (IEN \| PTD \| EN \| M3)) /HSUSB2_DATA3/\
	288	+ MUX_VAL(CP(ETK_D10_ES2), (IDIS \| PTD \| DIS \| M3)) /HSUSB2_CLK/\
	289	+ MUX_VAL(CP(ETK_D11_ES2), (IDIS \| PTD \| DIS \| M3)) /HSUSB2_STP/\
	290	+ MUX_VAL(CP(ETK_D12_ES2), (IEN \| PTD \| EN \| M3)) /HSUSB2_DIR/\
	291	+ MUX_VAL(CP(ETK_D13_ES2), (IEN \| PTD \| EN \| M3)) /HSUSB2_NXT/\
	292	+ MUX_VAL(CP(ETK_D14_ES2), (IEN \| PTD \| EN \| M3)) /HSUSB2_DATA0/\
	293	+ MUX_VAL(CP(ETK_D15_ES2), (IEN \| PTD \| EN \| M3)) /HSUSB2_DATA1/\
287	294	/Control and debug /\
288	295	MUX_VAL(CP(SYS_32K), (IEN \| PTD \| DIS \| M0)) /SYS_32K/\
289	296	MUX_VAL(CP(SYS_CLKREQ), (IEN \| PTD \| DIS \| M0)) /SYS_CLKREQ/\
...	...	@@ -318,12 +325,6 @@
318	325	MUX_VAL(CP(ETK_D7_ES2 ), (IEN \| PTD \| DIS \| M0)) /ETK_D7/\
319	326	MUX_VAL(CP(ETK_D8_ES2 ), (IEN \| PTD \| DIS \| M0)) /ETK_D8/\
320	327	MUX_VAL(CP(ETK_D9_ES2 ), (IEN \| PTD \| DIS \| M0)) /ETK_D9/\
321		- MUX_VAL(CP(ETK_D10_ES2), (IEN \| PTD \| DIS \| M0)) /ETK_D10/\
322		- MUX_VAL(CP(ETK_D11_ES2), (IEN \| PTD \| DIS \| M0)) /ETK_D11/\
323		- MUX_VAL(CP(ETK_D12_ES2), (IEN \| PTD \| DIS \| M0)) /ETK_D12/\
324		- MUX_VAL(CP(ETK_D13_ES2), (IEN \| PTD \| DIS \| M0)) /ETK_D13/\
325		- MUX_VAL(CP(ETK_D14_ES2), (IEN \| PTD \| DIS \| M0)) /ETK_D14/\
326		- MUX_VAL(CP(ETK_D15_ES2), (IEN \| PTD \| DIS \| M0)) /ETK_D15/\
327	328	/Die to Die /\
328	329	MUX_VAL(CP(D2D_MCAD1), (IEN \| PTD \| EN \| M0)) /d2d_mcad1/\
329	330	MUX_VAL(CP(D2D_MCAD2), (IEN \| PTD \| EN \| M0)) /d2d_mcad2/\
...	...	@@ -2,33 +2,62 @@
2	2	# CONFIG_SYS_THUMB_BUILD is not set
3	3	CONFIG_ARCH_OMAP2PLUS=y
4	4	CONFIG_SYS_TEXT_BASE=0x80100000
	5	+CONFIG_SYS_MALLOC_F_LEN=0x2000
	6	+CONFIG_SYS_MPUCLK=720
5	7	CONFIG_TARGET_OMAP3_EVM=y
	8	+CONFIG_SPL_STACK_R_ADDR=0x82000000
	9	+CONFIG_DISTRO_DEFAULTS=y
	10	+CONFIG_SYS_EXTRA_OPTIONS="NAND"
6	11	CONFIG_ENV_IS_IN_NAND=y
7	12	CONFIG_BOOTDELAY=3
	13	+CONFIG_SYS_CONSOLE_INFO_QUIET=y
	14	+CONFIG_DEFAULT_FDT_FILE="omap3-evm.dtb"
	15	+CONFIG_VERSION_VARIABLE=y
8	16	CONFIG_SPL=y
	17	+CONFIG_SPL_SYS_MALLOC_SIMPLE=y
	18	+CONFIG_SPL_STACK_R=y
9	19	# CONFIG_SPL_EXT_SUPPORT is not set
10		-CONFIG_HUSH_PARSER=y
	20	+CONFIG_SPL_MTD_SUPPORT=y
11	21	CONFIG_SYS_PROMPT="OMAP3_EVM # "
12	22	# CONFIG_CMD_IMI is not set
13	23	# CONFIG_CMD_IMLS is not set
14	24	CONFIG_CMD_ASKENV=y
15	25	# CONFIG_CMD_FLASH is not set
	26	+# CONFIG_CMD_FPGA is not set
	27	+CONFIG_CMD_GPIO=y
	28	+CONFIG_CMD_I2C=y
16	29	CONFIG_CMD_MMC=y
17	30	CONFIG_CMD_NAND=y
18		-CONFIG_CMD_I2C=y
	31	+CONFIG_CMD_NAND_TRIMFFS=y
	32	+CONFIG_CMD_SPI=y
19	33	CONFIG_CMD_USB=y
20		-# CONFIG_CMD_FPGA is not set
21		-# CONFIG_CMD_SETEXPR is not set
22		-CONFIG_CMD_DHCP=y
23		-CONFIG_CMD_PING=y
24		-CONFIG_CMD_EXT2=y
25		-CONFIG_CMD_FAT=y
26		-CONFIG_CMD_JFFS2=y
27		-CONFIG_EFI_PARTITION=y
28		-# CONFIG_PARTITION_UUIDS is not set
29		-# CONFIG_SPL_PARTITION_UUIDS is not set
	34	+CONFIG_CMD_CACHE=y
	35	+CONFIG_CMD_EXT4_WRITE=y
	36	+CONFIG_CMD_FS_UUID=y
	37	+CONFIG_MTDIDS_DEFAULT="nand0=omap2-nand.0"
	38	+CONFIG_MTDPARTS_DEFAULT="mtdparts=omap2-nand.0:512k(spl),1792k(u-boot),128k(dtb),128k(u-boot-env),6m(kernel),-(rootfs)"
	39	+CONFIG_CMD_UBI=y
	40	+# CONFIG_ISO_PARTITION is not set
	41	+# CONFIG_EFI_PARTITION is not set
	42	+CONFIG_SPL_PARTITION_UUIDS=y
	43	+CONFIG_DM=y
	44	+CONFIG_SPL_DM=y
	45	+CONFIG_DM_GPIO=y
30	46	CONFIG_MMC_OMAP_HS=y
	47	+CONFIG_MTD=y
	48	+CONFIG_DM_SERIAL=y
31	49	CONFIG_SYS_NS16550=y
32	50	CONFIG_USB=y
33		-CONFIG_USB_STORAGE=y
	51	+CONFIG_USB_EHCI_HCD=y
	52	+CONFIG_USB_MUSB_GADGET=y
	53	+CONFIG_USB_GADGET=y
	54	+CONFIG_USB_GADGET_DOWNLOAD=y
	55	+CONFIG_G_DNL_MANUFACTURER="Texas Instruments"
	56	+CONFIG_G_DNL_VENDOR_NUM=0x0451
	57	+CONFIG_G_DNL_PRODUCT_NUM=0x5678
	58	+CONFIG_FAT_WRITE=y
	59	+CONFIG_OF_LIBFDT=y
	60	+CONFIG_OF_LIBFDT_OVERLAY=y
	61	+CONFIG_SPL_OF_LIBFDT=y
	62	+# CONFIG_EFI_LOADER is not set
...	...	@@ -14,349 +14,139 @@
14	14	* SPDX-License-Identifier: GPL-2.0+
15	15	*/
16	16
17		-#ifndef __OMAP3EVM_CONFIG_H
18		-#define __OMAP3EVM_CONFIG_H
	17	+#ifndef __CONFIG_H
	18	+#define __CONFIG_H
19	19
20		-#include <asm/arch/cpu.h>
21		-#include <asm/arch/omap.h>
	20	+#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
22	21
23		-/* ----------------------------------------------------------------------------
24		- * Supported U-Boot features
25		- * ----------------------------------------------------------------------------
26		- */
27		-#define CONFIG_SYS_LONGHELP
	22	+#include <configs/ti_omap3_common.h>
28	23
29		-/* Allow to overwrite serial and ethaddr */
30		-#define CONFIG_ENV_OVERWRITE
31		-
32		-/* Add auto-completion support */
33		-#define CONFIG_AUTO_COMPLETE
34		-
35		-/* ----------------------------------------------------------------------------
36		- * Supported hardware
37		- * ----------------------------------------------------------------------------
38		- */
39		-
40		-/* SPL */
41		-#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
42		-#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
43		-
44		-/* Partition tables */
45		-
46		-/* USB
47		- *
48		- * Enable CONFIG_USB_MUSB_HCD for Host functionalities MSC, keyboard
49		- * Enable CONFIG_USB_MUSB_UDD for Device functionalities.
50		- */
51		-#define CONFIG_USB_OMAP3
52		-#define CONFIG_USB_MUSB_HCD
53		-/* #define CONFIG_USB_MUSB_UDC */
54		-
55		-/* NAND SPL */
56		-#define CONFIG_SPL_NAND_SIMPLE
57		-#define CONFIG_SPL_NAND_BASE
58		-#define CONFIG_SPL_NAND_DRIVERS
59		-#define CONFIG_SPL_NAND_ECC
60		-#define CONFIG_SYS_NAND_5_ADDR_CYCLE
61		-#define CONFIG_SYS_NAND_PAGE_COUNT 64
62		-#define CONFIG_SYS_NAND_PAGE_SIZE 2048
63		-#define CONFIG_SYS_NAND_OOBSIZE 64
64		-#define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024)
65		-#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0
66		-#define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9,\
67		- 10, 11, 12, 13}
68		-#define CONFIG_SYS_NAND_ECCSIZE 512
69		-#define CONFIG_SYS_NAND_ECCBYTES 3
70		-#define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_HAM1_CODE_HW
71		-#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
72		-#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
73		-
74	24	/*
75		- * High level configuration options
	25	+ * We are only ever GP parts and will utilize all of the "downloaded image"
	26	+ * area in SRAM which starts at 0x40200000 and ends at 0x4020FFFF (64KB).
76	27	*/
	28	+#undef CONFIG_SPL_TEXT_BASE
	29	+#define CONFIG_SPL_TEXT_BASE 0x40200000
77	30
78		-#define CONFIG_SDRC /* The chip has SDRC controller */
	31	+#define CONFIG_SPL_FRAMEWORK
79	32
80		-/*
81		- * Clock related definitions
82		- */
83		-#define V_OSCK 26000000 /* Clock output from T2 */
84		-#define V_SCLK (V_OSCK >> 1)
85		-
86		-/*
87		- * OMAP3 has 12 GP timers, they can be driven by the system clock
88		- * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
89		- * This rate is divided by a local divisor.
90		- */
91		-#define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2
92		-#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
93		-
94		-/* Size of environment - 128KB */
95		-#define CONFIG_ENV_SIZE (128 << 10)
96		-
97		-/* Size of malloc pool */
98		-#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10))
99		-
100		-/*
101		- * Physical Memory Map
102		- * Note 1: CS1 may or may not be populated
103		- * Note 2: SDRAM size is expected to be at least 32MB
104		- */
105		-#define CONFIG_NR_DRAM_BANKS 2
106		-#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
107		-#define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
108		-
109		-/* Limits for memtest */
110		-#define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0)
111		-#define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \
112		- 0x01F00000) /* 31MB */
113		-
114		-/* Default load address */
115		-#define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0)
116		-
117		-/* -----------------------------------------------------------------------------
118		- * Hardware drivers
119		- * -----------------------------------------------------------------------------
120		- */
121		-
122		-/*
123		- * NS16550 Configuration
124		- */
125		-#define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
126		-
127		-#define CONFIG_SYS_NS16550_SERIAL
128		-#define CONFIG_SYS_NS16550_REG_SIZE (-4)
129		-#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
130		-
131		-/*
132		- * select serial console configuration
133		- */
134		-#define CONFIG_CONS_INDEX 1
135		-#define CONFIG_SERIAL1 1 /* UART1 on OMAP3 EVM */
136		-#define CONFIG_SYS_NS16550_COM1 OMAP34XX_UART1
137		-#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
138		- 115200}
139		-
140		-/*
141		- * I2C
142		- */
143		-#define CONFIG_SYS_I2C
144		-#define CONFIG_SYS_OMAP24_I2C_SPEED 100000
145		-#define CONFIG_SYS_OMAP24_I2C_SLAVE 1
146		-
147		-/*
148		- * PISMO support
149		- */
150		-/* Monitor at start of flash - Reserve 2 sectors */
151		-#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
152		-
153		-#define CONFIG_SYS_MONITOR_LEN (256 << 10)
154		-
155		-/* Start location & size of environment */
156		-#define ONENAND_ENV_OFFSET 0x260000
157		-#define SMNAND_ENV_OFFSET 0x260000
158		-
159		-#define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
160		-
161		-/*
162		- * NAND
163		- */
164		-/* Physical address to access NAND */
165		-#define CONFIG_SYS_NAND_ADDR NAND_BASE
166		-
167		-/* Physical address to access NAND at CS0 */
168		-#define CONFIG_SYS_NAND_BASE NAND_BASE
169		-
170		-/* Max number of NAND devices */
171		-#define CONFIG_SYS_MAX_NAND_DEVICE 1
172		-#define CONFIG_SYS_NAND_BUSWIDTH_16BIT
173		-/* Timeout values (in ticks) */
174		-#define CONFIG_SYS_FLASH_ERASE_TOUT (100 * CONFIG_SYS_HZ)
175		-#define CONFIG_SYS_FLASH_WRITE_TOUT (100 * CONFIG_SYS_HZ)
176		-
177		-/* Flash banks JFFS2 should use */
178		-#define CONFIG_SYS_MAX_MTD_BANKS (CONFIG_SYS_MAX_FLASH_BANKS + \
179		- CONFIG_SYS_MAX_NAND_DEVICE)
180		-
181		-#define CONFIG_SYS_JFFS2_MEM_NAND
182		-#define CONFIG_SYS_JFFS2_FIRST_BANK CONFIG_SYS_MAX_FLASH_BANKS
183		-#define CONFIG_SYS_JFFS2_NUM_BANKS 1
184		-
185		-#define CONFIG_JFFS2_NAND
186		-/* nand device jffs2 lives on */
187		-#define CONFIG_JFFS2_DEV "nand0"
188		-/* Start of jffs2 partition */
189		-#define CONFIG_JFFS2_PART_OFFSET 0x680000
190		-/* Size of jffs2 partition */
191		-#define CONFIG_JFFS2_PART_SIZE 0xf980000
192		-
193		-/*
194		- * USB
195		- */
196		-#ifdef CONFIG_USB_OMAP3
197		-
198		-#ifdef CONFIG_USB_MUSB_HCD
199		-
200		-#ifdef CONFIG_USB_KEYBOARD
201		-#define CONFIG_SYS_USB_EVENT_POLL
202		-#define CONFIG_PREBOOT "usb start"
203		-#endif /* CONFIG_USB_KEYBOARD */
204		-
205		-#endif /* CONFIG_USB_MUSB_HCD */
206		-
207		-#ifdef CONFIG_USB_MUSB_UDC
208		-/* USB device configuration */
209		-#define CONFIG_USB_DEVICE
210		-#define CONFIG_USB_TTY
211		-
212		-/* Change these to suit your needs */
213		-#define CONFIG_USBD_VENDORID 0x0451
214		-#define CONFIG_USBD_PRODUCTID 0x5678
215		-#define CONFIG_USBD_MANUFACTURER "Texas Instruments"
216		-#define CONFIG_USBD_PRODUCT_NAME "EVM"
217		-#endif /* CONFIG_USB_MUSB_UDC */
218		-
219		-#endif /* CONFIG_USB_OMAP3 */
220		-
221		-/* ----------------------------------------------------------------------------
222		- * U-Boot features
223		- * ----------------------------------------------------------------------------
224		- */
225		-#define CONFIG_SYS_MAXARGS 16 /* max args for a command */
226		-
227	33	#define CONFIG_MISC_INIT_R
228		-
229		-#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
	34	+#define CONFIG_CMDLINE_TAG
230	35	#define CONFIG_SETUP_MEMORY_TAGS
231	36	#define CONFIG_INITRD_TAG
232	37	#define CONFIG_REVISION_TAG
233	38
234		-/* Size of Console IO buffer */
235		-#define CONFIG_SYS_CBSIZE 512
236	39
237		-/* Size of print buffer */
238		-#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
239		- sizeof(CONFIG_SYS_PROMPT) + 16)
	40	+/* Override OMAP3 serial console configuration */
	41	+#undef CONFIG_CONS_INDEX
	42	+#define CONFIG_CONS_INDEX 1
	43	+#define CONFIG_SYS_NS16550_COM1 OMAP34XX_UART1
	44	+#if defined(CONFIG_SPL_BUILD)
	45	+#undef CONFIG_SYS_NS16550_REG_SIZE
	46	+#else /* !CONFIG_SPL_BUILD */
	47	+#define CONFIG_SYS_NS16550_REG_SIZE (-1)
	48	+#endif /* CONFIG_SPL_BUILD */
240	49
241		-/* Size of bootarg buffer */
242		-#define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
243		-
244		-#define CONFIG_BOOTFILE "uImage"
245		-
246		-/*
247		- * NAND / OneNAND
248		- */
249		-#if defined(CONFIG_CMD_NAND)
	50	+/* NAND */
	51	+#if defined(CONFIG_NAND)
	52	+#define CONFIG_NAND_OMAP_GPMC
250	53	#define CONFIG_SYS_FLASH_BASE NAND_BASE
	54	+#define CONFIG_SYS_MAX_NAND_DEVICE 1
	55	+#define CONFIG_BCH
	56	+#define CONFIG_SYS_NAND_BUSWIDTH_16BIT
	57	+#define CONFIG_SYS_NAND_5_ADDR_CYCLE
	58	+#define CONFIG_SYS_NAND_PAGE_COUNT 64
	59	+#define CONFIG_SYS_NAND_PAGE_SIZE 2048
	60	+#define CONFIG_SYS_NAND_OOBSIZE 64
	61	+#define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024)
	62	+#define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
	63	+#define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9,\
	64	+ 10, 11, 12, 13}
	65	+#define CONFIG_SYS_NAND_ECCSIZE 512
	66	+#define CONFIG_SYS_NAND_ECCBYTES 3
	67	+#define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH8_CODE_HW_DETECTION_SW
	68	+#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
	69	+#define CONFIG_ENV_IS_IN_NAND 1
	70	+#define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */
	71	+#define SMNAND_ENV_OFFSET 0x260000 /* environment starts here */
	72	+#define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
	73	+#define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET
	74	+#define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET
	75	+#define CONFIG_ENV_OVERWRITE
	76	+#define CONFIG_SPL_OMAP3_ID_NAND
	77	+#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
	78	+#define CONFIG_MTD_PARTITIONS /* required for UBI partition support */
	79	+#endif /* CONFIG_NAND */
251	80
252		-#define CONFIG_NAND_OMAP_GPMC
253		-#define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET
254		-#elif defined(CONFIG_CMD_ONENAND)
255		-#define CONFIG_SYS_FLASH_BASE ONENAND_MAP
256		-#define CONFIG_SYS_ONENAND_BASE ONENAND_MAP
257		-#endif
	81	+#define CONFIG_USB_OMAP3
258	82
259		-#if !defined(CONFIG_ENV_IS_NOWHERE)
260		-#if defined(CONFIG_CMD_NAND)
261		-#elif defined(CONFIG_CMD_ONENAND)
262		-#define CONFIG_ENV_OFFSET ONENAND_ENV_OFFSET
263		-#endif
264		-#endif /* CONFIG_ENV_IS_NOWHERE */
	83	+/* MUSB */
	84	+#define CONFIG_USB_MUSB_OMAP2PLUS
	85	+#define CONFIG_USB_MUSB_PIO_ONLY
	86	+#define CONFIG_USB_ETHER
	87	+#define CONFIG_USB_ETHER_RNDIS
265	88
266		-#define CONFIG_ENV_ADDR CONFIG_ENV_OFFSET
	89	+/* USB EHCI */
	90	+#define CONFIG_SYS_USB_FAT_BOOT_PARTITION 1
267	91
	92	+/* SMSC911x Ethernet */
268	93	#if defined(CONFIG_CMD_NET)
269		-
270		-/* Ethernet (SMSC9115 from SMSC9118 family) */
271	94	#define CONFIG_SMC911X
272	95	#define CONFIG_SMC911X_32_BIT
273		-#define CONFIG_SMC911X_BASE 0x2C000000
274		-
275		-/* BOOTP fields */
276		-#define CONFIG_BOOTP_SUBNETMASK 0x00000001
277		-#define CONFIG_BOOTP_GATEWAY 0x00000002
278		-#define CONFIG_BOOTP_HOSTNAME 0x00000004
279		-#define CONFIG_BOOTP_BOOTPATH 0x00000010
280		-
	96	+#define CONFIG_SMC911X_BASE 0x2C000000
281	97	#endif /* CONFIG_CMD_NET */
282	98
283		-/* Support for relocation */
284		-#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
285		-#define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
286		-#define CONFIG_SYS_INIT_RAM_SIZE 0x800
287		-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
288		- CONFIG_SYS_INIT_RAM_SIZE - \
289		- GENERATED_GBL_DATA_SIZE)
	99	+/* Environment */
	100	+#define CONFIG_PREBOOT "usb start"
290	101
291		-/* -----------------------------------------------------------------------------
292		- * Board specific
293		- * -----------------------------------------------------------------------------
294		- */
295		-
296		-/* Uncomment to define the board revision statically */
297		-/* #define CONFIG_STATIC_BOARD_REV OMAP3EVM_BOARD_GEN_2 */
298		-
299		-/* Defines for SPL */
300		-#define CONFIG_SPL_FRAMEWORK
301		-#define CONFIG_SPL_TEXT_BASE 0x40200800
302		-#define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \
303		- CONFIG_SPL_TEXT_BASE)
304		-
305		-#define CONFIG_SPL_BSS_START_ADDR 0x80000000
306		-#define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */
307		-
308		-#define CONFIG_SPL_OMAP3_ID_NAND
309		-#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/u-boot-spl.lds"
310		-
311		-/*
312		- * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM
313		- * 64 bytes before this address should be set aside for u-boot.img's
314		- * header. That is 0x800FFFC0--0x80100000 should not be used for any
315		- * other needs.
316		- */
317		-#define CONFIG_SYS_TEXT_BASE 0x80100000
318		-#define CONFIG_SYS_SPL_MALLOC_START 0x80208000
319		-#define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000
320		-
321		-/* -----------------------------------------------------------------------------
322		- * Default environment
323		- * -----------------------------------------------------------------------------
324		- */
325		-
326	102	#define CONFIG_EXTRA_ENV_SETTINGS \
	103	+ DEFAULT_LINUX_BOOT_ENV \
	104	+ "mtdids=" CONFIG_MTDIDS_DEFAULT "\0" \
	105	+ "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \
327	106	"loadaddr=0x82000000\0" \
328	107	"usbtty=cdc_acm\0" \
329	108	"mmcdev=0\0" \
330	109	"console=ttyO0,115200n8\0" \
331	110	"mmcargs=setenv bootargs console=${console} " \
	111	+ "${optargs} " \
332	112	"root=/dev/mmcblk0p2 rw " \
333		- "rootfstype=ext3 rootwait rootwait\0" \" \
	113	+ "rootfstype=ext4 rootwait rootwait\0" \" \
334	114	"nandargs=setenv bootargs console=${console} " \
335		- "root=/dev/mtdblock4 rw " \
336		- "rootfstype=jffs2\0" \
	115	+ "${optargs} " \
	116	+ "root=ubi0:rootfs rw ubi.mtd=rootfs noinitrd " \
	117	+ "rootfstype=ubifs rootwait\0" \
337	118	"loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
338	119	"bootscript=echo Running bootscript from mmc ...; " \
339	120	"source ${loadaddr}\0" \
340		- "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
341		- "mmcboot=echo Booting from mmc ...; " \
	121	+ "loaduimage=setenv bootfile uImage; " \
	122	+ "fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
	123	+ "loadzimage=setenv bootfile zImage; " \
	124	+ "fatload mmc ${mmcdev} ${loadaddr} zImage\0" \
	125	+ "loaddtb=fatload mmc ${mmcdev} ${fdtaddr} omap3-evm.dtb\0" \
	126	+ "mmcboot=echo Booting ${bootfile} from mmc ...; " \
342	127	"run mmcargs; " \
343		- "bootm ${loadaddr}\0" \
344		- "nandboot=echo Booting from nand ...; " \
	128	+ "bootm ${loadaddr} - ${fdtaddr}\0" \
	129	+ "mmcbootz=echo Booting ${bootfile} from mmc ...; " \
	130	+ "run mmcargs; " \
	131	+ "bootz ${loadaddr} - ${fdtaddr}\0" \
	132	+ "nandboot=echo Booting uImage from nand ...; " \
345	133	"run nandargs; " \
346		- "onenand read ${loadaddr} 280000 400000; " \
347		- "bootm ${loadaddr}\0" \
	134	+ "nand read ${loadaddr} kernel; " \
	135	+ "nand read ${fdtaddr} dtb; " \
	136	+ "bootm ${loadaddr} - ${fdtaddr}\0"
348	137
349	138	#define CONFIG_BOOTCOMMAND \
350	139	"mmc dev ${mmcdev}; if mmc rescan; then " \
351	140	"if run loadbootscript; then " \
352	141	"run bootscript; " \
353	142	"else " \
354		- "if run loaduimage; then " \
355		- "run mmcboot; " \
356		- "else run nandboot; " \
357		- "fi; " \
	143	+ "if run loadzimage && run loaddtb; then " \
	144	+ "run mmcbootz; fi; " \
	145	+ "if run loaduimage && run loaddtb; then " \
	146	+ "run mmcboot; fi; " \
	147	+ "run nandboot; " \
358	148	"fi; " \
359	149	"else run nandboot; fi"
360	150
361		-#endif /* __OMAP3EVM_CONFIG_H */
	151	+#endif /* __CONFIG_H */