drivers: mmc: add driver for Microchip PIC32 SDHCI controller.

This driver implements platform specific glue and fixups for PIC32 internal SDHCI controller. Signed-off-by: Andrei Pistirica <andrei.pistirica@microchip.com> Signed-off-by: Sandeep Sheriker Mallikarjun <sandeepsheriker.mallikarjun@microchip.com> Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>

drivers: mmc: add driver for Microchip PIC32 SDHCI controller.
This driver implements platform specific glue and fixups for PIC32 internal SDHCI controller. Signed-off-by: Andrei Pistirica <andrei.pistirica@microchip.com> Signed-off-by: Sandeep Sheriker Mallikarjun <sandeepsheriker.mallikarjun@microchip.com> Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Andrei Pistirica · Daniel Schwierzeck
1 parent 44da3a176c
Showing 4 changed files with 72 additions and 1 deletions Side-by-side Diff
drivers/mmc/Kconfig
drivers/mmc/Makefile
drivers/mmc/pic32_sdhci.c
drivers/mmc/sdhci.c
@@ -31,5 +31,11 @@
 	help
 	  Support for the on-chip SDHI host controller on SuperH/Renesas ARM SoCs platform
  
+config PIC32_SDHCI
+	bool "Microchip PIC32 on-chip SDHCI support"
+	depends on DM_MMC && MACH_PIC32
+	help
+	  Support for Microchip PIC32 SDHCI controller.
+
 endmenu
@@ -48,4 +48,5 @@
 else
 obj-$(CONFIG_GENERIC_MMC) += mmc_write.o
 endif
+obj-$(CONFIG_PIC32_SDHCI) += pic32_sdhci.o
+/*
+ * Support of SDHCI for Microchip PIC32 SoC.
+ *
+ * Copyright (C) 2015 Microchip Technology Inc.
+ * Andrei Pistirica <andrei.pistirica@microchip.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <dm.h>
+#include <common.h>
+#include <sdhci.h>
+#include <asm/errno.h>
+#include <mach/pic32.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static int pic32_sdhci_probe(struct udevice *dev)
+{
+	struct sdhci_host *host = dev_get_priv(dev);
+	const void *fdt = gd->fdt_blob;
+	u32 f_min_max[2];
+	fdt_addr_t addr;
+	fdt_size_t size;
+	int ret;
+
+	addr = fdtdec_get_addr_size(fdt, dev->of_offset, "reg", &size);
+	if (addr == FDT_ADDR_T_NONE)
+		return -EINVAL;
+
+	host->ioaddr	= ioremap(addr, size);
+	host->name	= (char *)dev->name;
+	host->quirks	= SDHCI_QUIRK_NO_HISPD_BIT | SDHCI_QUIRK_NO_CD;
+	host->bus_width	= fdtdec_get_int(gd->fdt_blob, dev->of_offset,
+					"bus-width", 4);
+
+	ret = fdtdec_get_int_array(gd->fdt_blob, dev->of_offset,
+				   "clock-freq-min-max", f_min_max, 2);
+	if (ret) {
+		printf("sdhci: clock-freq-min-max not found\n");
+		return ret;
+	}
+
+	return add_sdhci(host, f_min_max[1], f_min_max[0]);
+}
+
+static const struct udevice_id pic32_sdhci_ids[] = {
+	{ .compatible = "microchip,pic32mzda-sdhci" },
+	{ }
+};
+
+U_BOOT_DRIVER(pic32_sdhci_drv) = {
+	.name			= "pic32_sdhci",
+	.id			= UCLASS_MMC,
+	.of_match		= pic32_sdhci_ids,
+	.probe			= pic32_sdhci_probe,
+	.priv_auto_alloc_size	= sizeof(struct sdhci_host),
+};
@@ -443,6 +443,12 @@
 	sdhci_set_power(host, fls(mmc->cfg->voltages) - 1);
  
 	if (host->quirks & SDHCI_QUIRK_NO_CD) {
+#if defined(CONFIG_PIC32_SDHCI)
+		/* PIC32 SDHCI CD errata:
+		 * - set CD_TEST and clear CD_TEST_INS bit
+		 */
+		sdhci_writeb(host, SDHCI_CTRL_CD_TEST, SDHCI_HOST_CONTROL);
+#else
 		unsigned int status;
  
 		sdhci_writeb(host, SDHCI_CTRL_CD_TEST_INS | SDHCI_CTRL_CD_TEST,
@@ -453,6 +459,7 @@
 		    (!(status & SDHCI_CARD_STATE_STABLE)) ||
 		    (!(status & SDHCI_CARD_DETECT_PIN_LEVEL)))
 			status = sdhci_readl(host, SDHCI_PRESENT_STATE);
+#endif
 	}
  
 	/* Enable only interrupts served by the SD controller */
...	...	@@ -31,5 +31,11 @@
31	31	help
32	32	Support for the on-chip SDHI host controller on SuperH/Renesas ARM SoCs platform
33	33
	34	+config PIC32_SDHCI
	35	+ bool "Microchip PIC32 on-chip SDHCI support"
	36	+ depends on DM_MMC && MACH_PIC32
	37	+ help
	38	+ Support for Microchip PIC32 SDHCI controller.
	39	+
34	40	endmenu
...	...	@@ -48,4 +48,5 @@
48	48	else
49	49	obj-$(CONFIG_GENERIC_MMC) += mmc_write.o
50	50	endif
	51	+obj-$(CONFIG_PIC32_SDHCI) += pic32_sdhci.o
	1	+/*
	2	+ * Support of SDHCI for Microchip PIC32 SoC.
	3	+ *
	4	+ * Copyright (C) 2015 Microchip Technology Inc.
	5	+ * Andrei Pistirica <andrei.pistirica@microchip.com>
	6	+ *
	7	+ * SPDX-License-Identifier: GPL-2.0+
	8	+ */
	9	+
	10	+#include <dm.h>
	11	+#include <common.h>
	12	+#include <sdhci.h>
	13	+#include <asm/errno.h>
	14	+#include <mach/pic32.h>
	15	+
	16	+DECLARE_GLOBAL_DATA_PTR;
	17	+
	18	+static int pic32_sdhci_probe(struct udevice *dev)
	19	+{
	20	+ struct sdhci_host *host = dev_get_priv(dev);
	21	+ const void *fdt = gd->fdt_blob;
	22	+ u32 f_min_max[2];
	23	+ fdt_addr_t addr;
	24	+ fdt_size_t size;
	25	+ int ret;
	26	+
	27	+ addr = fdtdec_get_addr_size(fdt, dev->of_offset, "reg", &size);
	28	+ if (addr == FDT_ADDR_T_NONE)
	29	+ return -EINVAL;
	30	+
	31	+ host->ioaddr = ioremap(addr, size);
	32	+ host->name = (char *)dev->name;
	33	+ host->quirks = SDHCI_QUIRK_NO_HISPD_BIT \| SDHCI_QUIRK_NO_CD;
	34	+ host->bus_width = fdtdec_get_int(gd->fdt_blob, dev->of_offset,
	35	+ "bus-width", 4);
	36	+
	37	+ ret = fdtdec_get_int_array(gd->fdt_blob, dev->of_offset,
	38	+ "clock-freq-min-max", f_min_max, 2);
	39	+ if (ret) {
	40	+ printf("sdhci: clock-freq-min-max not found\n");
	41	+ return ret;
	42	+ }
	43	+
	44	+ return add_sdhci(host, f_min_max[1], f_min_max[0]);
	45	+}
	46	+
	47	+static const struct udevice_id pic32_sdhci_ids[] = {
	48	+ { .compatible = "microchip,pic32mzda-sdhci" },
	49	+ { }
	50	+};
	51	+
	52	+U_BOOT_DRIVER(pic32_sdhci_drv) = {
	53	+ .name = "pic32_sdhci",
	54	+ .id = UCLASS_MMC,
	55	+ .of_match = pic32_sdhci_ids,
	56	+ .probe = pic32_sdhci_probe,
	57	+ .priv_auto_alloc_size = sizeof(struct sdhci_host),
	58	+};
...	...	@@ -443,6 +443,12 @@
443	443	sdhci_set_power(host, fls(mmc->cfg->voltages) - 1);
444	444
445	445	if (host->quirks & SDHCI_QUIRK_NO_CD) {
	446	+#if defined(CONFIG_PIC32_SDHCI)
	447	+ /* PIC32 SDHCI CD errata:
	448	+ * - set CD_TEST and clear CD_TEST_INS bit
	449	+ */
	450	+ sdhci_writeb(host, SDHCI_CTRL_CD_TEST, SDHCI_HOST_CONTROL);
	451	+#else
446	452	unsigned int status;
447	453
448	454	sdhci_writeb(host, SDHCI_CTRL_CD_TEST_INS \| SDHCI_CTRL_CD_TEST,
...	...	@@ -453,6 +459,7 @@
453	459	(!(status & SDHCI_CARD_STATE_STABLE)) \|\|
454	460	(!(status & SDHCI_CARD_DETECT_PIN_LEVEL)))
455	461	status = sdhci_readl(host, SDHCI_PRESENT_STATE);
	462	+#endif
456	463	}
457	464
458	465	/* Enable only interrupts served by the SD controller */