Merge branch 'master' of git://git.denx.de/u-boot-blackfin

Wolfgang Denk
2 parents d821f38022 ed540f07b8
Showing 4 changed files Side-by-side Diff
include/configs/blackstamp.h
include/configs/cm-bf561.h
lib_blackfin/Makefile
lib_blackfin/cmd_cache_dump.c
@@ -83,10 +83,9 @@
 #endif
  
 #define CONFIG_ENV_IS_IN_SPI_FLASH
-#define CONFIG_ENV_OFFSET	0x4000
+#define CONFIG_ENV_OFFSET	0x40000
 #define CONFIG_ENV_SIZE		0x2000
 #define CONFIG_ENV_SECT_SIZE	0x40000
-#define ENV_IS_EMBEDDED_CUSTOM
  
 /*
  * SDRAM settings & memory map
@@ -245,9 +244,9 @@
  * Serial Flash Infomation
  */
 #define CONFIG_BFIN_SPI
-/* For the M25P64 SCK Should be Kept < 20Mhz */
-#define CONFIG_ENV_SPI_MAX_HZ	20000000
-#define CONFIG_SF_DEFAULT_SPEED	20000000
+/* For the M25P64 SCK Should be Kept < 15Mhz */
+#define CONFIG_ENV_SPI_MAX_HZ	15000000
+#define CONFIG_SF_DEFAULT_SPEED	15000000
 #define CONFIG_SPI_FLASH
 #define CONFIG_SPI_FLASH_STMICRO
  
@@ -60,8 +60,13 @@
  * Network Settings
  */
 #define ADI_CMDS_NETWORK	1
+/* The next 2 lines are for use with DEV-BF5xx */
 #define CONFIG_DRIVER_SMC91111	1
 #define CONFIG_SMC91111_BASE	0x28000300
+/* The next 3 lines are for use with EXT-BF5xx-USB-ETH2 */
+/* #define CONFIG_DRIVER_SMC911X 1 */
+/* #define CONFIG_DRIVER_SMC911X_BASE 0x24080000 // AMS1 */
+/* #define CONFIG_DRIVER_SMC911X_32_BIT 1 */
 #define CONFIG_HOSTNAME		cm-bf561
 /* Uncomment next line to use fixed MAC address */
 /* #define CONFIG_ETHADDR	02:80:ad:20:31:cf */
@@ -40,6 +40,7 @@
 COBJS-y	+= boot.o
 COBJS-y	+= cache.o
 COBJS-y	+= clocks.o
+COBJS-$(CONFIG_CMD_CACHE_DUMP) += cmd_cache_dump.o
 COBJS-y	+= muldi3.o
 COBJS-$(CONFIG_POST) += post.o tests.o
 COBJS-y	+= string.o
+/*
+ * U-boot - cmd_cache_dump.c
+ *
+ * Copyright (c) 2007-2008 Analog Devices Inc.
+ *
+ * Licensed under the GPL-2 or later.
+ */
+
+#include <config.h>
+#include <common.h>
+#include <command.h>
+
+#include <asm/blackfin.h>
+#include <asm/mach-common/bits/mpu.h>
+
+static int check_limit(const char *type, size_t start_limit, size_t end_limit, size_t start, size_t end)
+{
+	if (start >= start_limit && start <= end_limit && \
+	    end <= end_limit && end >= start_limit && \
+	    start <= end)
+		return 0;
+
+	printf("%s limit violation: %zu <= (user:%zu) <= (user:%zu) <= %zu\n",
+		type, start_limit, start, end, end_limit);
+	return 1;
+}
+
+int do_icache_dump(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+{
+	int cache_status = icache_status();
+
+	if (cache_status)
+		icache_disable();
+
+	uint32_t cmd_base, tag, cache_upper, cache_lower;
+
+	size_t way, way_start = 0, way_end = 3;
+	size_t sbnk, sbnk_start = 0, sbnk_end = 3;
+	size_t set, set_start = 0, set_end = 31;
+	size_t dw;
+
+	if (argc > 1) {
+		way_start = way_end = simple_strtoul(argv[1], NULL, 10);
+		if (argc > 2) {
+			sbnk_start = sbnk_end = simple_strtoul(argv[2], NULL, 10);
+			if (argc > 3)
+				set_start = set_end = simple_strtoul(argv[3], NULL, 10);
+		}
+	}
+
+	if (check_limit("way", 0, 3, way_start, way_end) || \
+	    check_limit("subbank", 0, 3, sbnk_start, sbnk_end) || \
+	    check_limit("set", 0, 31, set_start, set_end))
+		return 1;
+
+	puts("Way:Subbank:Set: [valid-tag lower upper] {invalid-tag lower upper}...\n");
+
+	for (way = way_start; way <= way_end; ++way) {
+		for (sbnk = sbnk_start; sbnk <= sbnk_end; ++sbnk) {
+			for (set = set_start; set <= set_end; ++set) {
+				printf("%zu:%zu:%2zu: ", way, sbnk, set);
+				for (dw = 0; dw < 4; ++dw) {
+					if (ctrlc())
+						return 1;
+
+					cmd_base = \
+						(way  << 26) | \
+						(sbnk << 16) | \
+						(set  <<  5) | \
+						(dw   <<  3);
+
+					/* first read the tag */
+					bfin_write_ITEST_COMMAND(cmd_base | 0x0);
+					SSYNC();
+					tag = bfin_read_ITEST_DATA0();
+					printf("%c%08x ", (tag & 0x1 ? ' ' : '{'), tag);
+
+					/* grab the data at this loc */
+					bfin_write_ITEST_COMMAND(cmd_base | 0x4);
+					SSYNC();
+					cache_lower = bfin_read_ITEST_DATA0();
+					cache_upper = bfin_read_ITEST_DATA1();
+					printf("%08x %08x%c ", cache_lower, cache_upper, (tag & 0x1 ? ' ' : '}'));
+				}
+				puts("\n");
+			}
+		}
+	}
+
+	if (cache_status)
+		icache_enable();
+
+	return 0;
+}
+
+U_BOOT_CMD(icache_dump, 4, 0, do_icache_dump,
+	"icache_dump - dump current instruction cache\n",
+	"[way] [subbank] [set]");
+
+int do_dcache_dump(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+{
+	u32 way, bank, subbank, set;
+	u32 status, addr;
+	u32 dmem_ctl = bfin_read_DMEM_CONTROL();
+
+	for (bank = 0; bank < 2; ++bank) {
+		if (!(dmem_ctl & (1 << (DMC1_P - bank))))
+			continue;
+
+		for (way = 0; way < 2; ++way)
+			for (subbank = 0; subbank < 4; ++subbank) {
+				printf("%i:%i:%i:\t", bank, way, subbank);
+				for (set = 0; set < 64; ++set) {
+
+					if (ctrlc())
+						return 1;
+
+					/* retrieve a cache tag */
+					bfin_write_DTEST_COMMAND(
+						way << 26 |
+						bank << 23 |
+						subbank << 16 |
+						set << 5
+					);
+					CSYNC();
+					status = bfin_read_DTEST_DATA0();
+
+					/* construct the address using the tag */
+					addr = (status & 0xFFFFC800) | (subbank << 12) | (set << 5);
+
+					/* show it */
+					if (set && !(set % 4))
+						puts("\n\t");
+					printf("%c%08x%c%08x%c ", (status & 0x1 ? '[' : '{'), status, (status & 0x2 ? 'd' : ' '), addr, (status & 0x1 ? ']' : '}'));
+				}
+				puts("\n");
+			}
+	}
+
+	return 0;
+}
+
+U_BOOT_CMD(dcache_dump, 4, 0, do_dcache_dump,
+	"dcache_dump - dump current data cache\n",
+	"[bank] [way] [subbank] [set]");
...	...	@@ -83,10 +83,9 @@
83	83	#endif
84	84
85	85	#define CONFIG_ENV_IS_IN_SPI_FLASH
86		-#define CONFIG_ENV_OFFSET 0x4000
	86	+#define CONFIG_ENV_OFFSET 0x40000
87	87	#define CONFIG_ENV_SIZE 0x2000
88	88	#define CONFIG_ENV_SECT_SIZE 0x40000
89		-#define ENV_IS_EMBEDDED_CUSTOM
90	89
91	90	/*
92	91	* SDRAM settings & memory map
...	...	@@ -245,9 +244,9 @@
245	244	* Serial Flash Infomation
246	245	*/
247	246	#define CONFIG_BFIN_SPI
248		-/* For the M25P64 SCK Should be Kept < 20Mhz */
249		-#define CONFIG_ENV_SPI_MAX_HZ 20000000
250		-#define CONFIG_SF_DEFAULT_SPEED 20000000
	247	+/* For the M25P64 SCK Should be Kept < 15Mhz */
	248	+#define CONFIG_ENV_SPI_MAX_HZ 15000000
	249	+#define CONFIG_SF_DEFAULT_SPEED 15000000
251	250	#define CONFIG_SPI_FLASH
252	251	#define CONFIG_SPI_FLASH_STMICRO
253	252
...	...	@@ -60,8 +60,13 @@
60	60	* Network Settings
61	61	*/
62	62	#define ADI_CMDS_NETWORK 1
	63	+/* The next 2 lines are for use with DEV-BF5xx */
63	64	#define CONFIG_DRIVER_SMC91111 1
64	65	#define CONFIG_SMC91111_BASE 0x28000300
	66	+/* The next 3 lines are for use with EXT-BF5xx-USB-ETH2 */
	67	+/* #define CONFIG_DRIVER_SMC911X 1 */
	68	+/* #define CONFIG_DRIVER_SMC911X_BASE 0x24080000 // AMS1 */
	69	+/* #define CONFIG_DRIVER_SMC911X_32_BIT 1 */
65	70	#define CONFIG_HOSTNAME cm-bf561
66	71	/* Uncomment next line to use fixed MAC address */
67	72	/* #define CONFIG_ETHADDR 02:80:ad:20:31:cf */
...	...	@@ -40,6 +40,7 @@
40	40	COBJS-y += boot.o
41	41	COBJS-y += cache.o
42	42	COBJS-y += clocks.o
	43	+COBJS-$(CONFIG_CMD_CACHE_DUMP) += cmd_cache_dump.o
43	44	COBJS-y += muldi3.o
44	45	COBJS-$(CONFIG_POST) += post.o tests.o
45	46	COBJS-y += string.o
	1	+/*
	2	+ * U-boot - cmd_cache_dump.c
	3	+ *
	4	+ * Copyright (c) 2007-2008 Analog Devices Inc.
	5	+ *
	6	+ * Licensed under the GPL-2 or later.
	7	+ */
	8	+
	9	+#include <config.h>
	10	+#include <common.h>
	11	+#include <command.h>
	12	+
	13	+#include <asm/blackfin.h>
	14	+#include <asm/mach-common/bits/mpu.h>
	15	+
	16	+static int check_limit(const char *type, size_t start_limit, size_t end_limit, size_t start, size_t end)
	17	+{
	18	+ if (start >= start_limit && start <= end_limit && \
	19	+ end <= end_limit && end >= start_limit && \
	20	+ start <= end)
	21	+ return 0;
	22	+
	23	+ printf("%s limit violation: %zu <= (user:%zu) <= (user:%zu) <= %zu\n",
	24	+ type, start_limit, start, end, end_limit);
	25	+ return 1;
	26	+}
	27	+
	28	+int do_icache_dump(cmd_tbl_t cmdtp, int flag, int argc, char argv[])
	29	+{
	30	+ int cache_status = icache_status();
	31	+
	32	+ if (cache_status)
	33	+ icache_disable();
	34	+
	35	+ uint32_t cmd_base, tag, cache_upper, cache_lower;
	36	+
	37	+ size_t way, way_start = 0, way_end = 3;
	38	+ size_t sbnk, sbnk_start = 0, sbnk_end = 3;
	39	+ size_t set, set_start = 0, set_end = 31;
	40	+ size_t dw;
	41	+
	42	+ if (argc > 1) {
	43	+ way_start = way_end = simple_strtoul(argv[1], NULL, 10);
	44	+ if (argc > 2) {
	45	+ sbnk_start = sbnk_end = simple_strtoul(argv[2], NULL, 10);
	46	+ if (argc > 3)
	47	+ set_start = set_end = simple_strtoul(argv[3], NULL, 10);
	48	+ }
	49	+ }
	50	+
	51	+ if (check_limit("way", 0, 3, way_start, way_end) \|\| \
	52	+ check_limit("subbank", 0, 3, sbnk_start, sbnk_end) \|\| \
	53	+ check_limit("set", 0, 31, set_start, set_end))
	54	+ return 1;
	55	+
	56	+ puts("Way:Subbank:Set: [valid-tag lower upper] {invalid-tag lower upper}...\n");
	57	+
	58	+ for (way = way_start; way <= way_end; ++way) {
	59	+ for (sbnk = sbnk_start; sbnk <= sbnk_end; ++sbnk) {
	60	+ for (set = set_start; set <= set_end; ++set) {
	61	+ printf("%zu:%zu:%2zu: ", way, sbnk, set);
	62	+ for (dw = 0; dw < 4; ++dw) {
	63	+ if (ctrlc())
	64	+ return 1;
	65	+
	66	+ cmd_base = \
	67	+ (way << 26) \| \
	68	+ (sbnk << 16) \| \
	69	+ (set << 5) \| \
	70	+ (dw << 3);
	71	+
	72	+ /* first read the tag */
	73	+ bfin_write_ITEST_COMMAND(cmd_base \| 0x0);
	74	+ SSYNC();
	75	+ tag = bfin_read_ITEST_DATA0();
	76	+ printf("%c%08x ", (tag & 0x1 ? ' ' : '{'), tag);
	77	+
	78	+ /* grab the data at this loc */
	79	+ bfin_write_ITEST_COMMAND(cmd_base \| 0x4);
	80	+ SSYNC();
	81	+ cache_lower = bfin_read_ITEST_DATA0();
	82	+ cache_upper = bfin_read_ITEST_DATA1();
	83	+ printf("%08x %08x%c ", cache_lower, cache_upper, (tag & 0x1 ? ' ' : '}'));
	84	+ }
	85	+ puts("\n");
	86	+ }
	87	+ }
	88	+ }
	89	+
	90	+ if (cache_status)
	91	+ icache_enable();
	92	+
	93	+ return 0;
	94	+}
	95	+
	96	+U_BOOT_CMD(icache_dump, 4, 0, do_icache_dump,
	97	+ "icache_dump - dump current instruction cache\n",
	98	+ "[way] [subbank] [set]");
	99	+
	100	+int do_dcache_dump(cmd_tbl_t cmdtp, int flag, int argc, char argv[])
	101	+{
	102	+ u32 way, bank, subbank, set;
	103	+ u32 status, addr;
	104	+ u32 dmem_ctl = bfin_read_DMEM_CONTROL();
	105	+
	106	+ for (bank = 0; bank < 2; ++bank) {
	107	+ if (!(dmem_ctl & (1 << (DMC1_P - bank))))
	108	+ continue;
	109	+
	110	+ for (way = 0; way < 2; ++way)
	111	+ for (subbank = 0; subbank < 4; ++subbank) {
	112	+ printf("%i:%i:%i:\t", bank, way, subbank);
	113	+ for (set = 0; set < 64; ++set) {
	114	+
	115	+ if (ctrlc())
	116	+ return 1;
	117	+
	118	+ /* retrieve a cache tag */
	119	+ bfin_write_DTEST_COMMAND(
	120	+ way << 26 \|
	121	+ bank << 23 \|
	122	+ subbank << 16 \|
	123	+ set << 5
	124	+ );
	125	+ CSYNC();
	126	+ status = bfin_read_DTEST_DATA0();
	127	+
	128	+ /* construct the address using the tag */
	129	+ addr = (status & 0xFFFFC800) \| (subbank << 12) \| (set << 5);
	130	+
	131	+ /* show it */
	132	+ if (set && !(set % 4))
	133	+ puts("\n\t");
	134	+ printf("%c%08x%c%08x%c ", (status & 0x1 ? '[' : '{'), status, (status & 0x2 ? 'd' : ' '), addr, (status & 0x1 ? ']' : '}'));
	135	+ }
	136	+ puts("\n");
	137	+ }
	138	+ }
	139	+
	140	+ return 0;
	141	+}
	142	+
	143	+U_BOOT_CMD(dcache_dump, 4, 0, do_dcache_dump,
	144	+ "dcache_dump - dump current data cache\n",
	145	+ "[bank] [way] [subbank] [set]");