Commit 1220640b4ab5b76cab0126d58efd9b6fb7dbacd2

Authored by Ye Li
1 parent 23533910e2

MLK-24434 imx8mn: Add low drive mode support for DDR4/LPDDR4 EVK

Add dedicated defconfigs for iMX8MN low drive mode which set the VDD_SOC
and VDD_DRAM to 0.8v, DDR at 1600MTS (800Mhz clock) and GPU at 200Mhz.

Signed-off-by: Ye Li <ye.li@nxp.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
(cherry picked from commit fcd223cf3bd9e0f7f49013e4fd221e40b75dbe4c)

Showing 8 changed files with 2852 additions and 5 deletions Side-by-side Diff

arch/arm/mach-imx/imx8m/soc.c
... ... @@ -800,6 +800,40 @@
800 800  
801 801 }
802 802  
  803 +#ifdef CONFIG_IMX8MN_LOW_DRIVE_MODE
  804 +static int low_drive_gpu_freq(void *blob)
  805 +{
  806 + const char *nodes_path_8mn[] = {
  807 + "/gpu@38000000"
  808 + };
  809 +
  810 + int nodeoff, cnt, i;
  811 + u32 assignedclks[7];
  812 +
  813 + nodeoff = fdt_path_offset(blob, nodes_path_8mn[0]);
  814 + if (nodeoff < 0)
  815 + return nodeoff;
  816 +
  817 + cnt = fdtdec_get_int_array_count(blob, nodeoff, "assigned-clock-rates", assignedclks, 7);
  818 + if (cnt < 0)
  819 + return cnt;
  820 +
  821 + if (cnt != 7)
  822 + printf("Warning: %s, assigned-clock-rates count %d\n", nodes_path_8mn[0], cnt);
  823 +
  824 + assignedclks[cnt - 1] = 200000000;
  825 + assignedclks[cnt - 2] = 200000000;
  826 +
  827 + for (i = 0; i < cnt; i++) {
  828 + debug("<%u>, ", assignedclks[i]);
  829 + assignedclks[i] = cpu_to_fdt32(assignedclks[i]);
  830 + }
  831 + debug("\n");
  832 +
  833 + return fdt_setprop(blob, nodeoff, "assigned-clock-rates", &assignedclks, sizeof(assignedclks));
  834 +}
  835 +#endif
  836 +
803 837 int disable_gpu_nodes(void *blob)
804 838 {
805 839 const char *nodes_path_8mn[] = {
... ... @@ -968,6 +1002,15 @@
968 1002 #elif defined(CONFIG_IMX8MN)
969 1003 if (is_imx8mnl() || is_imx8mndl() || is_imx8mnsl())
970 1004 disable_gpu_nodes(blob);
  1005 +#ifdef CONFIG_IMX8MN_LOW_DRIVE_MODE
  1006 + else {
  1007 + int ldm_gpu = low_drive_gpu_freq(blob);
  1008 + if (ldm_gpu < 0)
  1009 + printf("Update GPU node assigned-clock-rates failed\n");
  1010 + else
  1011 + printf("Update GPU node assigned-clock-rates ok\n");
  1012 + }
  1013 +#endif
971 1014  
972 1015 if (is_imx8mnd() || is_imx8mndl())
973 1016 disable_cpu_nodes(blob, 2);
board/freescale/imx8mn_evk/Kconfig
... ... @@ -9,6 +9,10 @@
9 9 config SYS_CONFIG_NAME
10 10 default "imx8mn_evk"
11 11  
  12 +config IMX8MN_LOW_DRIVE_MODE
  13 + bool "Enable the low drive mode of iMX8MN on EVK board"
  14 + default n
  15 +
12 16 source "board/freescale/common/Kconfig"
13 17  
14 18 endif
board/freescale/imx8mn_evk/Makefile
... ... @@ -8,7 +8,12 @@
8 8  
9 9 ifdef CONFIG_SPL_BUILD
10 10 obj-y += spl.o
  11 +ifdef CONFIG_IMX8MN_LOW_DRIVE_MODE
  12 +obj-$(CONFIG_IMX8M_LPDDR4) += lpddr4_timing_ld.o
  13 +obj-$(CONFIG_IMX8M_DDR4) += ddr4_timing_ld.o
  14 +else
11 15 obj-$(CONFIG_IMX8M_LPDDR4) += lpddr4_timing.o
12 16 obj-$(CONFIG_IMX8M_DDR4) += ddr4_timing.o
  17 +endif
13 18 endif
board/freescale/imx8mn_evk/ddr4_timing_ld.c
Changes suppressed. Click to show
  1 +/*
  2 + * Copyright 2019 NXP
  3 + *
  4 + * SPDX-License-Identifier: GPL-2.0+
  5 + *
  6 + * Generated code from MX8M_DDR_tool
  7 + * Align with uboot version:
  8 + * imx_v2018.03_4.14.78_1.0.0_ga ~ imx_v2018.04_4.19.35_1.1.0_ga
  9 + */
  10 +
  11 +#include <linux/kernel.h>
  12 +#include <asm/arch/ddr.h>
  13 +
  14 +struct dram_cfg_param ddr_ddrc_cfg[] = {
  15 + /** Initialize DDRC registers **/
  16 + { 0x3d400000, 0x81040010 },
  17 + { 0x3d400030, 0x20 },
  18 + { 0x3d400034, 0x221306 },
  19 + { 0x3d400050, 0x210070 },
  20 + { 0x3d400054, 0x10008 },
  21 + { 0x3d400060, 0x0 },
  22 + { 0x3d400064, 0x6100dc },
  23 + { 0x3d4000c0, 0x0 },
  24 + { 0x3d4000c4, 0x1000 },
  25 + { 0x3d4000d0, 0xc00200c5 },
  26 + { 0x3d4000d4, 0x500000 },
  27 + { 0x3d4000dc, 0x2340105 },
  28 + { 0x3d4000e0, 0x0 },
  29 + { 0x3d4000e4, 0x110000 },
  30 + { 0x3d4000e8, 0x2000600 },
  31 + { 0x3d4000ec, 0x410 },
  32 + { 0x3d4000f0, 0x20 },
  33 + { 0x3d4000f4, 0xec7 },
  34 + { 0x3d400100, 0xd0c1b0d },
  35 + { 0x3d400104, 0x30313 },
  36 + { 0x3d400108, 0x508060a },
  37 + { 0x3d40010c, 0x400c },
  38 + { 0x3d400110, 0x6030306 },
  39 + { 0x3d400114, 0x4040302 },
  40 + { 0x3d40011c, 0x404 },
  41 + { 0x3d400120, 0x5050d08 },
  42 + { 0x3d400124, 0x20308 },
  43 + { 0x3d40012c, 0x1406010e },
  44 + { 0x3d400130, 0x8 },
  45 + { 0x3d40013c, 0x0 },
  46 + { 0x3d400180, 0x1000040 },
  47 + { 0x3d400184, 0x30d4 },
  48 + { 0x3d400190, 0x38b8204 },
  49 + { 0x3d400194, 0x2020303 },
  50 + { 0x3d400198, 0x7f04011 },
  51 + { 0x3d40019c, 0xb0 },
  52 + { 0x3d4001a0, 0xe0400018 },
  53 + { 0x3d4001a4, 0x48005a },
  54 + { 0x3d4001a8, 0x80000000 },
  55 + { 0x3d4001b0, 0x1 },
  56 + { 0x3d4001b4, 0xb04 },
  57 + { 0x3d4001b8, 0x4 },
  58 + { 0x3d4001c0, 0x1 },
  59 + { 0x3d4001c4, 0x0 },
  60 + { 0x3d400200, 0x3f1f },
  61 + { 0x3d400204, 0x3f0909 },
  62 + { 0x3d400208, 0x700 },
  63 + { 0x3d40020c, 0x0 },
  64 + { 0x3d400210, 0x1f1f },
  65 + { 0x3d400214, 0x7070707 },
  66 + { 0x3d400218, 0x7070707 },
  67 + { 0x3d40021c, 0xf07 },
  68 + { 0x3d400220, 0x3f01 },
  69 + { 0x3d400240, 0x600061c },
  70 + { 0x3d400244, 0x1323 },
  71 + { 0x3d400400, 0x100 },
  72 + { 0x3d400250, 0x317d1a07 },
  73 + { 0x3d400254, 0xf },
  74 + { 0x3d40025c, 0x2a001b76 },
  75 + { 0x3d400264, 0x7300b473 },
  76 + { 0x3d40026c, 0x30000e06 },
  77 + { 0x3d400300, 0x14 },
  78 + { 0x3d40036c, 0x10 },
  79 + { 0x3d400404, 0x13193 },
  80 + { 0x3d400408, 0x6096 },
  81 + { 0x3d400490, 0x1 },
  82 + { 0x3d400494, 0x2000c00 },
  83 + { 0x3d400498, 0x3c00db },
  84 + { 0x3d40049c, 0x100009 },
  85 + { 0x3d4004a0, 0x2 },
  86 + { 0x3d402050, 0x210070 },
  87 + { 0x3d402064, 0x400093 },
  88 + { 0x3d4020dc, 0x40105 },
  89 + { 0x3d4020e0, 0x0 },
  90 + { 0x3d4020e8, 0x2000600 },
  91 + { 0x3d4020ec, 0x10 },
  92 + { 0x3d402100, 0xb081209 },
  93 + { 0x3d402104, 0x2020d },
  94 + { 0x3d402108, 0x5050309 },
  95 + { 0x3d40210c, 0x400c },
  96 + { 0x3d402110, 0x5030206 },
  97 + { 0x3d402114, 0x3030202 },
  98 + { 0x3d40211c, 0x303 },
  99 + { 0x3d402120, 0x4040d06 },
  100 + { 0x3d402124, 0x20208 },
  101 + { 0x3d40212c, 0x1205010e },
  102 + { 0x3d402130, 0x8 },
  103 + { 0x3d40213c, 0x0 },
  104 + { 0x3d402180, 0x1000040 },
  105 + { 0x3d402190, 0x3858204 },
  106 + { 0x3d402194, 0x2020303 },
  107 + { 0x3d4021b4, 0x504 },
  108 + { 0x3d4021b8, 0x4 },
  109 + { 0x3d402240, 0x6000604 },
  110 + { 0x3d4020f4, 0xec7 },
  111 +};
  112 +
  113 +/* PHY Initialize Configuration */
  114 +struct dram_cfg_param ddr_ddrphy_cfg[] = {
  115 + { 0x1005f, 0x2fd },
  116 + { 0x1015f, 0x2fd },
  117 + { 0x1105f, 0x2fd },
  118 + { 0x1115f, 0x2fd },
  119 + { 0x11005f, 0x2fd },
  120 + { 0x11015f, 0x2fd },
  121 + { 0x11105f, 0x2fd },
  122 + { 0x11115f, 0x2fd },
  123 + { 0x55, 0x355 },
  124 + { 0x1055, 0x355 },
  125 + { 0x2055, 0x355 },
  126 + { 0x3055, 0x355 },
  127 + { 0x4055, 0x55 },
  128 + { 0x5055, 0x55 },
  129 + { 0x6055, 0x355 },
  130 + { 0x7055, 0x355 },
  131 + { 0x8055, 0x355 },
  132 + { 0x9055, 0x355 },
  133 + { 0x200c5, 0xb },
  134 + { 0x1200c5, 0x6 },
  135 + { 0x2002e, 0x1 },
  136 + { 0x12002e, 0x1 },
  137 + { 0x20024, 0x8 },
  138 + { 0x2003a, 0x2 },
  139 + { 0x120024, 0x8 },
  140 + { 0x2003a, 0x2 },
  141 + { 0x20056, 0xa },
  142 + { 0x120056, 0xa },
  143 + { 0x1004d, 0x1a },
  144 + { 0x1014d, 0x1a },
  145 + { 0x1104d, 0x1a },
  146 + { 0x1114d, 0x1a },
  147 + { 0x11004d, 0x1a },
  148 + { 0x11014d, 0x1a },
  149 + { 0x11104d, 0x1a },
  150 + { 0x11114d, 0x1a },
  151 + { 0x10049, 0xe38 },
  152 + { 0x10149, 0xe38 },
  153 + { 0x11049, 0xe38 },
  154 + { 0x11149, 0xe38 },
  155 + { 0x110049, 0xe38 },
  156 + { 0x110149, 0xe38 },
  157 + { 0x111049, 0xe38 },
  158 + { 0x111149, 0xe38 },
  159 + { 0x43, 0x63 },
  160 + { 0x1043, 0x63 },
  161 + { 0x2043, 0x63 },
  162 + { 0x3043, 0x63 },
  163 + { 0x4043, 0x63 },
  164 + { 0x5043, 0x63 },
  165 + { 0x6043, 0x63 },
  166 + { 0x7043, 0x63 },
  167 + { 0x8043, 0x63 },
  168 + { 0x9043, 0x63 },
  169 + { 0x20018, 0x1 },
  170 + { 0x20075, 0x2 },
  171 + { 0x20050, 0x0 },
  172 + { 0x20008, 0x190 },
  173 + { 0x120008, 0x10a },
  174 + { 0x20088, 0x9 },
  175 + { 0x200b2, 0x268 },
  176 + { 0x10043, 0x5b1 },
  177 + { 0x10143, 0x5b1 },
  178 + { 0x11043, 0x5b1 },
  179 + { 0x11143, 0x5b1 },
  180 + { 0x1200b2, 0x268 },
  181 + { 0x110043, 0x5b1 },
  182 + { 0x110143, 0x5b1 },
  183 + { 0x111043, 0x5b1 },
  184 + { 0x111143, 0x5b1 },
  185 + { 0x200fa, 0x1 },
  186 + { 0x1200fa, 0x1 },
  187 + { 0x20019, 0x5 },
  188 + { 0x120019, 0x5 },
  189 + { 0x200f0, 0x5555 },
  190 + { 0x200f1, 0x5555 },
  191 + { 0x200f2, 0x5555 },
  192 + { 0x200f3, 0x5555 },
  193 + { 0x200f4, 0x5555 },
  194 + { 0x200f5, 0x5555 },
  195 + { 0x200f6, 0x5555 },
  196 + { 0x200f7, 0xf000 },
  197 + { 0x20025, 0x0 },
  198 + { 0x2002d, 0x0 },
  199 + { 0x12002d, 0x0 },
  200 + { 0x2005b, 0x7529 },
  201 + { 0x2005c, 0x0 },
  202 + { 0x200c7, 0x21 },
  203 + { 0x200ca, 0x24 },
  204 + { 0x200cc, 0x1f7 },
  205 + { 0x1200c7, 0x21 },
  206 + { 0x1200ca, 0x24 },
  207 + { 0x1200cc, 0x1f7 },
  208 + { 0x2007d, 0x212 },
  209 + { 0x12007d, 0x212 },
  210 + { 0x2007c, 0x61 },
  211 + { 0x12007c, 0x61 },
  212 + { 0x1004a, 0x500 },
  213 + { 0x1104a, 0x500 },
  214 + { 0x2002c, 0x0 },
  215 +};
  216 +
  217 +/* ddr phy trained csr */
  218 +struct dram_cfg_param ddr_ddrphy_trained_csr[] = {
  219 + {0x0200b2,0x0},
  220 + {0x1200b2,0x0},
  221 + {0x2200b2,0x0},
  222 + {0x0200cb,0x0},
  223 + {0x010043,0x0},
  224 + {0x110043,0x0},
  225 + {0x210043,0x0},
  226 + {0x010143,0x0},
  227 + {0x110143,0x0},
  228 + {0x210143,0x0},
  229 + {0x011043,0x0},
  230 + {0x111043,0x0},
  231 + {0x211043,0x0},
  232 + {0x011143,0x0},
  233 + {0x111143,0x0},
  234 + {0x211143,0x0},
  235 + {0x000080,0x0},
  236 + {0x100080,0x0},
  237 + {0x200080,0x0},
  238 + {0x001080,0x0},
  239 + {0x101080,0x0},
  240 + {0x201080,0x0},
  241 + {0x002080,0x0},
  242 + {0x102080,0x0},
  243 + {0x202080,0x0},
  244 + {0x003080,0x0},
  245 + {0x103080,0x0},
  246 + {0x203080,0x0},
  247 + {0x004080,0x0},
  248 + {0x104080,0x0},
  249 + {0x204080,0x0},
  250 + {0x005080,0x0},
  251 + {0x105080,0x0},
  252 + {0x205080,0x0},
  253 + {0x006080,0x0},
  254 + {0x106080,0x0},
  255 + {0x206080,0x0},
  256 + {0x007080,0x0},
  257 + {0x107080,0x0},
  258 + {0x207080,0x0},
  259 + {0x008080,0x0},
  260 + {0x108080,0x0},
  261 + {0x208080,0x0},
  262 + {0x009080,0x0},
  263 + {0x109080,0x0},
  264 + {0x209080,0x0},
  265 + {0x010080,0x0},
  266 + {0x110080,0x0},
  267 + {0x210080,0x0},
  268 + {0x010180,0x0},
  269 + {0x110180,0x0},
  270 + {0x210180,0x0},
  271 + {0x010081,0x0},
  272 + {0x110081,0x0},
  273 + {0x210081,0x0},
  274 + {0x010181,0x0},
  275 + {0x110181,0x0},
  276 + {0x210181,0x0},
  277 + {0x010082,0x0},
  278 + {0x110082,0x0},
  279 + {0x210082,0x0},
  280 + {0x010182,0x0},
  281 + {0x110182,0x0},
  282 + {0x210182,0x0},
  283 + {0x010083,0x0},
  284 + {0x110083,0x0},
  285 + {0x210083,0x0},
  286 + {0x010183,0x0},
  287 + {0x110183,0x0},
  288 + {0x210183,0x0},
  289 + {0x011080,0x0},
  290 + {0x111080,0x0},
  291 + {0x211080,0x0},
  292 + {0x011180,0x0},
  293 + {0x111180,0x0},
  294 + {0x211180,0x0},
  295 + {0x011081,0x0},
  296 + {0x111081,0x0},
  297 + {0x211081,0x0},
  298 + {0x011181,0x0},
  299 + {0x111181,0x0},
  300 + {0x211181,0x0},
  301 + {0x011082,0x0},
  302 + {0x111082,0x0},
  303 + {0x211082,0x0},
  304 + {0x011182,0x0},
  305 + {0x111182,0x0},
  306 + {0x211182,0x0},
  307 + {0x011083,0x0},
  308 + {0x111083,0x0},
  309 + {0x211083,0x0},
  310 + {0x011183,0x0},
  311 + {0x111183,0x0},
  312 + {0x211183,0x0},
  313 + {0x0100d0,0x0},
  314 + {0x1100d0,0x0},
  315 + {0x2100d0,0x0},
  316 + {0x0101d0,0x0},
  317 + {0x1101d0,0x0},
  318 + {0x2101d0,0x0},
  319 + {0x0100d1,0x0},
  320 + {0x1100d1,0x0},
  321 + {0x2100d1,0x0},
  322 + {0x0101d1,0x0},
  323 + {0x1101d1,0x0},
  324 + {0x2101d1,0x0},
  325 + {0x0100d2,0x0},
  326 + {0x1100d2,0x0},
  327 + {0x2100d2,0x0},
  328 + {0x0101d2,0x0},
  329 + {0x1101d2,0x0},
  330 + {0x2101d2,0x0},
  331 + {0x0100d3,0x0},
  332 + {0x1100d3,0x0},
  333 + {0x2100d3,0x0},
  334 + {0x0101d3,0x0},
  335 + {0x1101d3,0x0},
  336 + {0x2101d3,0x0},
  337 + {0x0110d0,0x0},
  338 + {0x1110d0,0x0},
  339 + {0x2110d0,0x0},
  340 + {0x0111d0,0x0},
  341 + {0x1111d0,0x0},
  342 + {0x2111d0,0x0},
  343 + {0x0110d1,0x0},
  344 + {0x1110d1,0x0},
  345 + {0x2110d1,0x0},
  346 + {0x0111d1,0x0},
  347 + {0x1111d1,0x0},
  348 + {0x2111d1,0x0},
  349 + {0x0110d2,0x0},
  350 + {0x1110d2,0x0},
  351 + {0x2110d2,0x0},
  352 + {0x0111d2,0x0},
  353 + {0x1111d2,0x0},
  354 + {0x2111d2,0x0},
  355 + {0x0110d3,0x0},
  356 + {0x1110d3,0x0},
  357 + {0x2110d3,0x0},
  358 + {0x0111d3,0x0},
  359 + {0x1111d3,0x0},
  360 + {0x2111d3,0x0},
  361 + {0x010068,0x0},
  362 + {0x010168,0x0},
  363 + {0x010268,0x0},
  364 + {0x010368,0x0},
  365 + {0x010468,0x0},
  366 + {0x010568,0x0},
  367 + {0x010668,0x0},
  368 + {0x010768,0x0},
  369 + {0x010868,0x0},
  370 + {0x010069,0x0},
  371 + {0x010169,0x0},
  372 + {0x010269,0x0},
  373 + {0x010369,0x0},
  374 + {0x010469,0x0},
  375 + {0x010569,0x0},
  376 + {0x010669,0x0},
  377 + {0x010769,0x0},
  378 + {0x010869,0x0},
  379 + {0x01006a,0x0},
  380 + {0x01016a,0x0},
  381 + {0x01026a,0x0},
  382 + {0x01036a,0x0},
  383 + {0x01046a,0x0},
  384 + {0x01056a,0x0},
  385 + {0x01066a,0x0},
  386 + {0x01076a,0x0},
  387 + {0x01086a,0x0},
  388 + {0x01006b,0x0},
  389 + {0x01016b,0x0},
  390 + {0x01026b,0x0},
  391 + {0x01036b,0x0},
  392 + {0x01046b,0x0},
  393 + {0x01056b,0x0},
  394 + {0x01066b,0x0},
  395 + {0x01076b,0x0},
  396 + {0x01086b,0x0},
  397 + {0x011068,0x0},
  398 + {0x011168,0x0},
  399 + {0x011268,0x0},
  400 + {0x011368,0x0},
  401 + {0x011468,0x0},
  402 + {0x011568,0x0},
  403 + {0x011668,0x0},
  404 + {0x011768,0x0},
  405 + {0x011868,0x0},
  406 + {0x011069,0x0},
  407 + {0x011169,0x0},
  408 + {0x011269,0x0},
  409 + {0x011369,0x0},
  410 + {0x011469,0x0},
  411 + {0x011569,0x0},
  412 + {0x011669,0x0},
  413 + {0x011769,0x0},
  414 + {0x011869,0x0},
  415 + {0x01106a,0x0},
  416 + {0x01116a,0x0},
  417 + {0x01126a,0x0},
  418 + {0x01136a,0x0},
  419 + {0x01146a,0x0},
  420 + {0x01156a,0x0},
  421 + {0x01166a,0x0},
  422 + {0x01176a,0x0},
  423 + {0x01186a,0x0},
  424 + {0x01106b,0x0},
  425 + {0x01116b,0x0},
  426 + {0x01126b,0x0},
  427 + {0x01136b,0x0},
  428 + {0x01146b,0x0},
  429 + {0x01156b,0x0},
  430 + {0x01166b,0x0},
  431 + {0x01176b,0x0},
  432 + {0x01186b,0x0},
  433 + {0x01008c,0x0},
  434 + {0x11008c,0x0},
  435 + {0x21008c,0x0},
  436 + {0x01018c,0x0},
  437 + {0x11018c,0x0},
  438 + {0x21018c,0x0},
  439 + {0x01008d,0x0},
  440 + {0x11008d,0x0},
  441 + {0x21008d,0x0},
  442 + {0x01018d,0x0},
  443 + {0x11018d,0x0},
  444 + {0x21018d,0x0},
  445 + {0x01008e,0x0},
  446 + {0x11008e,0x0},
  447 + {0x21008e,0x0},
  448 + {0x01018e,0x0},
  449 + {0x11018e,0x0},
  450 + {0x21018e,0x0},
  451 + {0x01008f,0x0},
  452 + {0x11008f,0x0},
  453 + {0x21008f,0x0},
  454 + {0x01018f,0x0},
  455 + {0x11018f,0x0},
  456 + {0x21018f,0x0},
  457 + {0x01108c,0x0},
  458 + {0x11108c,0x0},
  459 + {0x21108c,0x0},
  460 + {0x01118c,0x0},
  461 + {0x11118c,0x0},
  462 + {0x21118c,0x0},
  463 + {0x01108d,0x0},
  464 + {0x11108d,0x0},
  465 + {0x21108d,0x0},
  466 + {0x01118d,0x0},
  467 + {0x11118d,0x0},
  468 + {0x21118d,0x0},
  469 + {0x01108e,0x0},
  470 + {0x11108e,0x0},
  471 + {0x21108e,0x0},
  472 + {0x01118e,0x0},
  473 + {0x11118e,0x0},
  474 + {0x21118e,0x0},
  475 + {0x01108f,0x0},
  476 + {0x11108f,0x0},
  477 + {0x21108f,0x0},
  478 + {0x01118f,0x0},
  479 + {0x11118f,0x0},
  480 + {0x21118f,0x0},
  481 + {0x0100c0,0x0},
  482 + {0x1100c0,0x0},
  483 + {0x2100c0,0x0},
  484 + {0x0101c0,0x0},
  485 + {0x1101c0,0x0},
  486 + {0x2101c0,0x0},
  487 + {0x0102c0,0x0},
  488 + {0x1102c0,0x0},
  489 + {0x2102c0,0x0},
  490 + {0x0103c0,0x0},
  491 + {0x1103c0,0x0},
  492 + {0x2103c0,0x0},
  493 + {0x0104c0,0x0},
  494 + {0x1104c0,0x0},
  495 + {0x2104c0,0x0},
  496 + {0x0105c0,0x0},
  497 + {0x1105c0,0x0},
  498 + {0x2105c0,0x0},
  499 + {0x0106c0,0x0},
  500 + {0x1106c0,0x0},
  501 + {0x2106c0,0x0},
  502 + {0x0107c0,0x0},
  503 + {0x1107c0,0x0},
  504 + {0x2107c0,0x0},
  505 + {0x0108c0,0x0},
  506 + {0x1108c0,0x0},
  507 + {0x2108c0,0x0},
  508 + {0x0100c1,0x0},
  509 + {0x1100c1,0x0},
  510 + {0x2100c1,0x0},
  511 + {0x0101c1,0x0},
  512 + {0x1101c1,0x0},
  513 + {0x2101c1,0x0},
  514 + {0x0102c1,0x0},
  515 + {0x1102c1,0x0},
  516 + {0x2102c1,0x0},
  517 + {0x0103c1,0x0},
  518 + {0x1103c1,0x0},
  519 + {0x2103c1,0x0},
  520 + {0x0104c1,0x0},
  521 + {0x1104c1,0x0},
  522 + {0x2104c1,0x0},
  523 + {0x0105c1,0x0},
  524 + {0x1105c1,0x0},
  525 + {0x2105c1,0x0},
  526 + {0x0106c1,0x0},
  527 + {0x1106c1,0x0},
  528 + {0x2106c1,0x0},
  529 + {0x0107c1,0x0},
  530 + {0x1107c1,0x0},
  531 + {0x2107c1,0x0},
  532 + {0x0108c1,0x0},
  533 + {0x1108c1,0x0},
  534 + {0x2108c1,0x0},
  535 + {0x0100c2,0x0},
  536 + {0x1100c2,0x0},
  537 + {0x2100c2,0x0},
  538 + {0x0101c2,0x0},
  539 + {0x1101c2,0x0},
  540 + {0x2101c2,0x0},
  541 + {0x0102c2,0x0},
  542 + {0x1102c2,0x0},
  543 + {0x2102c2,0x0},
  544 + {0x0103c2,0x0},
  545 + {0x1103c2,0x0},
  546 + {0x2103c2,0x0},
  547 + {0x0104c2,0x0},
  548 + {0x1104c2,0x0},
  549 + {0x2104c2,0x0},
  550 + {0x0105c2,0x0},
  551 + {0x1105c2,0x0},
  552 + {0x2105c2,0x0},
  553 + {0x0106c2,0x0},
  554 + {0x1106c2,0x0},
  555 + {0x2106c2,0x0},
  556 + {0x0107c2,0x0},
  557 + {0x1107c2,0x0},
  558 + {0x2107c2,0x0},
  559 + {0x0108c2,0x0},
  560 + {0x1108c2,0x0},
  561 + {0x2108c2,0x0},
  562 + {0x0100c3,0x0},
  563 + {0x1100c3,0x0},
  564 + {0x2100c3,0x0},
  565 + {0x0101c3,0x0},
  566 + {0x1101c3,0x0},
  567 + {0x2101c3,0x0},
  568 + {0x0102c3,0x0},
  569 + {0x1102c3,0x0},
  570 + {0x2102c3,0x0},
  571 + {0x0103c3,0x0},
  572 + {0x1103c3,0x0},
  573 + {0x2103c3,0x0},
  574 + {0x0104c3,0x0},
  575 + {0x1104c3,0x0},
  576 + {0x2104c3,0x0},
  577 + {0x0105c3,0x0},
  578 + {0x1105c3,0x0},
  579 + {0x2105c3,0x0},
  580 + {0x0106c3,0x0},
  581 + {0x1106c3,0x0},
  582 + {0x2106c3,0x0},
  583 + {0x0107c3,0x0},
  584 + {0x1107c3,0x0},
  585 + {0x2107c3,0x0},
  586 + {0x0108c3,0x0},
  587 + {0x1108c3,0x0},
  588 + {0x2108c3,0x0},
  589 + {0x0110c0,0x0},
  590 + {0x1110c0,0x0},
  591 + {0x2110c0,0x0},
  592 + {0x0111c0,0x0},
  593 + {0x1111c0,0x0},
  594 + {0x2111c0,0x0},
  595 + {0x0112c0,0x0},
  596 + {0x1112c0,0x0},
  597 + {0x2112c0,0x0},
  598 + {0x0113c0,0x0},
  599 + {0x1113c0,0x0},
  600 + {0x2113c0,0x0},
  601 + {0x0114c0,0x0},
  602 + {0x1114c0,0x0},
  603 + {0x2114c0,0x0},
  604 + {0x0115c0,0x0},
  605 + {0x1115c0,0x0},
  606 + {0x2115c0,0x0},
  607 + {0x0116c0,0x0},
  608 + {0x1116c0,0x0},
  609 + {0x2116c0,0x0},
  610 + {0x0117c0,0x0},
  611 + {0x1117c0,0x0},
  612 + {0x2117c0,0x0},
  613 + {0x0118c0,0x0},
  614 + {0x1118c0,0x0},
  615 + {0x2118c0,0x0},
  616 + {0x0110c1,0x0},
  617 + {0x1110c1,0x0},
  618 + {0x2110c1,0x0},
  619 + {0x0111c1,0x0},
  620 + {0x1111c1,0x0},
  621 + {0x2111c1,0x0},
  622 + {0x0112c1,0x0},
  623 + {0x1112c1,0x0},
  624 + {0x2112c1,0x0},
  625 + {0x0113c1,0x0},
  626 + {0x1113c1,0x0},
  627 + {0x2113c1,0x0},
  628 + {0x0114c1,0x0},
  629 + {0x1114c1,0x0},
  630 + {0x2114c1,0x0},
  631 + {0x0115c1,0x0},
  632 + {0x1115c1,0x0},
  633 + {0x2115c1,0x0},
  634 + {0x0116c1,0x0},
  635 + {0x1116c1,0x0},
  636 + {0x2116c1,0x0},
  637 + {0x0117c1,0x0},
  638 + {0x1117c1,0x0},
  639 + {0x2117c1,0x0},
  640 + {0x0118c1,0x0},
  641 + {0x1118c1,0x0},
  642 + {0x2118c1,0x0},
  643 + {0x0110c2,0x0},
  644 + {0x1110c2,0x0},
  645 + {0x2110c2,0x0},
  646 + {0x0111c2,0x0},
  647 + {0x1111c2,0x0},
  648 + {0x2111c2,0x0},
  649 + {0x0112c2,0x0},
  650 + {0x1112c2,0x0},
  651 + {0x2112c2,0x0},
  652 + {0x0113c2,0x0},
  653 + {0x1113c2,0x0},
  654 + {0x2113c2,0x0},
  655 + {0x0114c2,0x0},
  656 + {0x1114c2,0x0},
  657 + {0x2114c2,0x0},
  658 + {0x0115c2,0x0},
  659 + {0x1115c2,0x0},
  660 + {0x2115c2,0x0},
  661 + {0x0116c2,0x0},
  662 + {0x1116c2,0x0},
  663 + {0x2116c2,0x0},
  664 + {0x0117c2,0x0},
  665 + {0x1117c2,0x0},
  666 + {0x2117c2,0x0},
  667 + {0x0118c2,0x0},
  668 + {0x1118c2,0x0},
  669 + {0x2118c2,0x0},
  670 + {0x0110c3,0x0},
  671 + {0x1110c3,0x0},
  672 + {0x2110c3,0x0},
  673 + {0x0111c3,0x0},
  674 + {0x1111c3,0x0},
  675 + {0x2111c3,0x0},
  676 + {0x0112c3,0x0},
  677 + {0x1112c3,0x0},
  678 + {0x2112c3,0x0},
  679 + {0x0113c3,0x0},
  680 + {0x1113c3,0x0},
  681 + {0x2113c3,0x0},
  682 + {0x0114c3,0x0},
  683 + {0x1114c3,0x0},
  684 + {0x2114c3,0x0},
  685 + {0x0115c3,0x0},
  686 + {0x1115c3,0x0},
  687 + {0x2115c3,0x0},
  688 + {0x0116c3,0x0},
  689 + {0x1116c3,0x0},
  690 + {0x2116c3,0x0},
  691 + {0x0117c3,0x0},
  692 + {0x1117c3,0x0},
  693 + {0x2117c3,0x0},
  694 + {0x0118c3,0x0},
  695 + {0x1118c3,0x0},
  696 + {0x2118c3,0x0},
  697 + {0x010020,0x0},
  698 + {0x110020,0x0},
  699 + {0x210020,0x0},
  700 + {0x011020,0x0},
  701 + {0x111020,0x0},
  702 + {0x211020,0x0},
  703 + {0x02007d,0x0},
  704 + {0x12007d,0x0},
  705 + {0x22007d,0x0},
  706 + {0x010040,0x0},
  707 + {0x010140,0x0},
  708 + {0x010240,0x0},
  709 + {0x010340,0x0},
  710 + {0x010440,0x0},
  711 + {0x010540,0x0},
  712 + {0x010640,0x0},
  713 + {0x010740,0x0},
  714 + {0x010840,0x0},
  715 + {0x010030,0x0},
  716 + {0x010130,0x0},
  717 + {0x010230,0x0},
  718 + {0x010330,0x0},
  719 + {0x010430,0x0},
  720 + {0x010530,0x0},
  721 + {0x010630,0x0},
  722 + {0x010730,0x0},
  723 + {0x010830,0x0},
  724 + {0x011040,0x0},
  725 + {0x011140,0x0},
  726 + {0x011240,0x0},
  727 + {0x011340,0x0},
  728 + {0x011440,0x0},
  729 + {0x011540,0x0},
  730 + {0x011640,0x0},
  731 + {0x011740,0x0},
  732 + {0x011840,0x0},
  733 + {0x011030,0x0},
  734 + {0x011130,0x0},
  735 + {0x011230,0x0},
  736 + {0x011330,0x0},
  737 + {0x011430,0x0},
  738 + {0x011530,0x0},
  739 + {0x011630,0x0},
  740 + {0x011730,0x0},
  741 + {0x011830,0x0},
  742 +};
  743 +
  744 +/* P0 message block paremeter for training firmware */
  745 +struct dram_cfg_param ddr_fsp0_cfg[] = {
  746 + { 0xd0000, 0x0 },
  747 + { 0x54003, 0x640 },
  748 + { 0x54004, 0x2 },
  749 + { 0x54005, 0x2830 },
  750 + { 0x54006, 0x25e },
  751 + { 0x54007, 0x1000 },
  752 + { 0x54008, 0x101 },
  753 + { 0x5400b, 0x31f },
  754 + { 0x5400c, 0xc8 },
  755 + { 0x5400d, 0x100 },
  756 + { 0x54012, 0x1 },
  757 + { 0x5402f, 0x234 },
  758 + { 0x54030, 0x105 },
  759 + { 0x54033, 0x200 },
  760 + { 0x54034, 0x600 },
  761 + { 0x54035, 0x410 },
  762 + { 0x54036, 0x101 },
  763 + { 0x5403f, 0x1221 },
  764 + { 0x541fc, 0x100 },
  765 + { 0xd0000, 0x1 },
  766 +};
  767 +
  768 +
  769 +/* P1 message block paremeter for training firmware */
  770 +struct dram_cfg_param ddr_fsp1_cfg[] = {
  771 + { 0xd0000, 0x0 },
  772 + { 0x54002, 0x1 },
  773 + { 0x54003, 0x42a },
  774 + { 0x54004, 0x2 },
  775 + { 0x54005, 0x2830 },
  776 + { 0x54006, 0x25e },
  777 + { 0x54007, 0x1000 },
  778 + { 0x54008, 0x101 },
  779 + { 0x5400b, 0x21f },
  780 + { 0x5400c, 0xc8 },
  781 + { 0x5400d, 0x100 },
  782 + { 0x54012, 0x1 },
  783 + { 0x5402f, 0x4 },
  784 + { 0x54030, 0x105 },
  785 + { 0x54033, 0x200 },
  786 + { 0x54034, 0x600 },
  787 + { 0x54035, 0x10 },
  788 + { 0x54036, 0x101 },
  789 + { 0x5403f, 0x1221 },
  790 + { 0x541fc, 0x100 },
  791 + { 0xd0000, 0x1 },
  792 +};
  793 +
  794 +
  795 +/* P0 2D message block paremeter for training firmware */
  796 +struct dram_cfg_param ddr_fsp0_2d_cfg[] = {
  797 + { 0xd0000, 0x0 },
  798 + { 0x54003, 0x640 },
  799 + { 0x54004, 0x2 },
  800 + { 0x54005, 0x2830 },
  801 + { 0x54006, 0x25e },
  802 + { 0x54007, 0x1000 },
  803 + { 0x54008, 0x101 },
  804 + { 0x5400b, 0x61 },
  805 + { 0x5400c, 0xc8 },
  806 + { 0x5400d, 0x100 },
  807 + { 0x5400e, 0x1f7f },
  808 + { 0x54012, 0x1 },
  809 + { 0x5402f, 0x234 },
  810 + { 0x54030, 0x105 },
  811 + { 0x54033, 0x200 },
  812 + { 0x54034, 0x600 },
  813 + { 0x54035, 0x410 },
  814 + { 0x54036, 0x101 },
  815 + { 0x5403f, 0x1221 },
  816 + { 0x541fc, 0x100 },
  817 + { 0xd0000, 0x1 },
  818 +};
  819 +
  820 +/* DRAM PHY init engine image */
  821 +struct dram_cfg_param ddr_phy_pie[] = {
  822 + { 0xd0000, 0x0 },
  823 + { 0x90000, 0x10 },
  824 + { 0x90001, 0x400 },
  825 + { 0x90002, 0x10e },
  826 + { 0x90003, 0x0 },
  827 + { 0x90004, 0x0 },
  828 + { 0x90005, 0x8 },
  829 + { 0x90029, 0xb },
  830 + { 0x9002a, 0x480 },
  831 + { 0x9002b, 0x109 },
  832 + { 0x9002c, 0x8 },
  833 + { 0x9002d, 0x448 },
  834 + { 0x9002e, 0x139 },
  835 + { 0x9002f, 0x8 },
  836 + { 0x90030, 0x478 },
  837 + { 0x90031, 0x109 },
  838 + { 0x90032, 0x2 },
  839 + { 0x90033, 0x10 },
  840 + { 0x90034, 0x139 },
  841 + { 0x90035, 0xb },
  842 + { 0x90036, 0x7c0 },
  843 + { 0x90037, 0x139 },
  844 + { 0x90038, 0x44 },
  845 + { 0x90039, 0x633 },
  846 + { 0x9003a, 0x159 },
  847 + { 0x9003b, 0x14f },
  848 + { 0x9003c, 0x630 },
  849 + { 0x9003d, 0x159 },
  850 + { 0x9003e, 0x47 },
  851 + { 0x9003f, 0x633 },
  852 + { 0x90040, 0x149 },
  853 + { 0x90041, 0x4f },
  854 + { 0x90042, 0x633 },
  855 + { 0x90043, 0x179 },
  856 + { 0x90044, 0x8 },
  857 + { 0x90045, 0xe0 },
  858 + { 0x90046, 0x109 },
  859 + { 0x90047, 0x0 },
  860 + { 0x90048, 0x7c8 },
  861 + { 0x90049, 0x109 },
  862 + { 0x9004a, 0x0 },
  863 + { 0x9004b, 0x1 },
  864 + { 0x9004c, 0x8 },
  865 + { 0x9004d, 0x0 },
  866 + { 0x9004e, 0x45a },
  867 + { 0x9004f, 0x9 },
  868 + { 0x90050, 0x0 },
  869 + { 0x90051, 0x448 },
  870 + { 0x90052, 0x109 },
  871 + { 0x90053, 0x40 },
  872 + { 0x90054, 0x633 },
  873 + { 0x90055, 0x179 },
  874 + { 0x90056, 0x1 },
  875 + { 0x90057, 0x618 },
  876 + { 0x90058, 0x109 },
  877 + { 0x90059, 0x40c0 },
  878 + { 0x9005a, 0x633 },
  879 + { 0x9005b, 0x149 },
  880 + { 0x9005c, 0x8 },
  881 + { 0x9005d, 0x4 },
  882 + { 0x9005e, 0x48 },
  883 + { 0x9005f, 0x4040 },
  884 + { 0x90060, 0x633 },
  885 + { 0x90061, 0x149 },
  886 + { 0x90062, 0x0 },
  887 + { 0x90063, 0x4 },
  888 + { 0x90064, 0x48 },
  889 + { 0x90065, 0x40 },
  890 + { 0x90066, 0x633 },
  891 + { 0x90067, 0x149 },
  892 + { 0x90068, 0x10 },
  893 + { 0x90069, 0x4 },
  894 + { 0x9006a, 0x18 },
  895 + { 0x9006b, 0x0 },
  896 + { 0x9006c, 0x4 },
  897 + { 0x9006d, 0x78 },
  898 + { 0x9006e, 0x549 },
  899 + { 0x9006f, 0x633 },
  900 + { 0x90070, 0x159 },
  901 + { 0x90071, 0xd49 },
  902 + { 0x90072, 0x633 },
  903 + { 0x90073, 0x159 },
  904 + { 0x90074, 0x94a },
  905 + { 0x90075, 0x633 },
  906 + { 0x90076, 0x159 },
  907 + { 0x90077, 0x441 },
  908 + { 0x90078, 0x633 },
  909 + { 0x90079, 0x149 },
  910 + { 0x9007a, 0x42 },
  911 + { 0x9007b, 0x633 },
  912 + { 0x9007c, 0x149 },
  913 + { 0x9007d, 0x1 },
  914 + { 0x9007e, 0x633 },
  915 + { 0x9007f, 0x149 },
  916 + { 0x90080, 0x0 },
  917 + { 0x90081, 0xe0 },
  918 + { 0x90082, 0x109 },
  919 + { 0x90083, 0xa },
  920 + { 0x90084, 0x10 },
  921 + { 0x90085, 0x109 },
  922 + { 0x90086, 0x9 },
  923 + { 0x90087, 0x3c0 },
  924 + { 0x90088, 0x149 },
  925 + { 0x90089, 0x9 },
  926 + { 0x9008a, 0x3c0 },
  927 + { 0x9008b, 0x159 },
  928 + { 0x9008c, 0x18 },
  929 + { 0x9008d, 0x10 },
  930 + { 0x9008e, 0x109 },
  931 + { 0x9008f, 0x0 },
  932 + { 0x90090, 0x3c0 },
  933 + { 0x90091, 0x109 },
  934 + { 0x90092, 0x18 },
  935 + { 0x90093, 0x4 },
  936 + { 0x90094, 0x48 },
  937 + { 0x90095, 0x18 },
  938 + { 0x90096, 0x4 },
  939 + { 0x90097, 0x58 },
  940 + { 0x90098, 0xb },
  941 + { 0x90099, 0x10 },
  942 + { 0x9009a, 0x109 },
  943 + { 0x9009b, 0x1 },
  944 + { 0x9009c, 0x10 },
  945 + { 0x9009d, 0x109 },
  946 + { 0x9009e, 0x5 },
  947 + { 0x9009f, 0x7c0 },
  948 + { 0x900a0, 0x109 },
  949 + { 0x900a1, 0x0 },
  950 + { 0x900a2, 0x8140 },
  951 + { 0x900a3, 0x10c },
  952 + { 0x900a4, 0x10 },
  953 + { 0x900a5, 0x8138 },
  954 + { 0x900a6, 0x10c },
  955 + { 0x900a7, 0x8 },
  956 + { 0x900a8, 0x7c8 },
  957 + { 0x900a9, 0x101 },
  958 + { 0x900aa, 0x8 },
  959 + { 0x900ab, 0x448 },
  960 + { 0x900ac, 0x109 },
  961 + { 0x900ad, 0xf },
  962 + { 0x900ae, 0x7c0 },
  963 + { 0x900af, 0x109 },
  964 + { 0x900b0, 0x47 },
  965 + { 0x900b1, 0x630 },
  966 + { 0x900b2, 0x109 },
  967 + { 0x900b3, 0x8 },
  968 + { 0x900b4, 0x618 },
  969 + { 0x900b5, 0x109 },
  970 + { 0x900b6, 0x8 },
  971 + { 0x900b7, 0xe0 },
  972 + { 0x900b8, 0x109 },
  973 + { 0x900b9, 0x0 },
  974 + { 0x900ba, 0x7c8 },
  975 + { 0x900bb, 0x109 },
  976 + { 0x900bc, 0x8 },
  977 + { 0x900bd, 0x8140 },
  978 + { 0x900be, 0x10c },
  979 + { 0x900bf, 0x0 },
  980 + { 0x900c0, 0x1 },
  981 + { 0x900c1, 0x8 },
  982 + { 0x900c2, 0x8 },
  983 + { 0x900c3, 0x4 },
  984 + { 0x900c4, 0x8 },
  985 + { 0x900c5, 0x8 },
  986 + { 0x900c6, 0x7c8 },
  987 + { 0x900c7, 0x101 },
  988 + { 0x90006, 0x0 },
  989 + { 0x90007, 0x0 },
  990 + { 0x90008, 0x8 },
  991 + { 0x90009, 0x0 },
  992 + { 0x9000a, 0x0 },
  993 + { 0x9000b, 0x0 },
  994 + { 0xd00e7, 0x400 },
  995 + { 0x90017, 0x0 },
  996 + { 0x90026, 0x2b },
  997 + { 0x2000b, 0x32 },
  998 + { 0x2000c, 0x64 },
  999 + { 0x2000d, 0x3e8 },
  1000 + { 0x2000e, 0x2c },
  1001 + { 0x12000b, 0x21 },
  1002 + { 0x12000c, 0x42 },
  1003 + { 0x12000d, 0x29a },
  1004 + { 0x12000e, 0x21 },
  1005 + { 0x9000c, 0x0 },
  1006 + { 0x9000d, 0x173 },
  1007 + { 0x9000e, 0x60 },
  1008 + { 0x9000f, 0x6110 },
  1009 + { 0x90010, 0x2152 },
  1010 + { 0x90011, 0xdfbd },
  1011 + { 0x90012, 0xffff },
  1012 + { 0x90013, 0x6152 },
  1013 + { 0x20089, 0x1 },
  1014 + { 0x20088, 0x19 },
  1015 + { 0xc0080, 0x0 },
  1016 + { 0xd0000, 0x1 }
  1017 +};
  1018 +
  1019 +struct dram_fsp_msg ddr_dram_fsp_msg[] = {
  1020 + {
  1021 + /* P0 1600mts 1D */
  1022 + .drate = 1600,
  1023 + .fw_type = FW_1D_IMAGE,
  1024 + .fsp_cfg = ddr_fsp0_cfg,
  1025 + .fsp_cfg_num = ARRAY_SIZE(ddr_fsp0_cfg),
  1026 + },
  1027 + {
  1028 + /* P1 1066mts 1D */
  1029 + .drate = 1066,
  1030 + .fw_type = FW_1D_IMAGE,
  1031 + .fsp_cfg = ddr_fsp1_cfg,
  1032 + .fsp_cfg_num = ARRAY_SIZE(ddr_fsp1_cfg),
  1033 + },
  1034 + {
  1035 + /* P0 1600mts 2D */
  1036 + .drate = 1600,
  1037 + .fw_type = FW_2D_IMAGE,
  1038 + .fsp_cfg = ddr_fsp0_2d_cfg,
  1039 + .fsp_cfg_num = ARRAY_SIZE(ddr_fsp0_2d_cfg),
  1040 + },
  1041 +};
  1042 +
  1043 +/* ddr timing config params */
  1044 +struct dram_timing_info dram_timing = {
  1045 + .ddrc_cfg = ddr_ddrc_cfg,
  1046 + .ddrc_cfg_num = ARRAY_SIZE(ddr_ddrc_cfg),
  1047 + .ddrphy_cfg = ddr_ddrphy_cfg,
  1048 + .ddrphy_cfg_num = ARRAY_SIZE(ddr_ddrphy_cfg),
  1049 + .fsp_msg = ddr_dram_fsp_msg,
  1050 + .fsp_msg_num = ARRAY_SIZE(ddr_dram_fsp_msg),
  1051 + .ddrphy_trained_csr = ddr_ddrphy_trained_csr,
  1052 + .ddrphy_trained_csr_num = ARRAY_SIZE(ddr_ddrphy_trained_csr),
  1053 + .ddrphy_pie = ddr_phy_pie,
  1054 + .ddrphy_pie_num = ARRAY_SIZE(ddr_phy_pie),
  1055 + .fsp_table = { 1600, 1066, },
  1056 +};
board/freescale/imx8mn_evk/lpddr4_timing_ld.c
Changes suppressed. Click to show
  1 +/*
  2 + * Copyright 2019 NXP
  3 + *
  4 + * SPDX-License-Identifier: GPL-2.0+
  5 + *
  6 + * Generated code from MX8M_DDR_tool
  7 + * Align with uboot version:
  8 + * imx_v2018.03_4.14.78_1.0.0_ga ~ imx_v2018.04_4.19.35_1.1.0_ga
  9 + */
  10 +
  11 +#include <linux/kernel.h>
  12 +#include <asm/arch/ddr.h>
  13 +
  14 +struct dram_cfg_param ddr_ddrc_cfg[] = {
  15 + /** Initialize DDRC registers **/
  16 + { 0x3d400304, 0x1 },
  17 + { 0x3d400030, 0x1 },
  18 + { 0x3d400000, 0xa3080020 },
  19 + { 0x3d400020, 0x111 },
  20 + { 0x3d400024, 0x1f400 },
  21 + { 0x3d400064, 0x300070 },
  22 + { 0x3d4000d0, 0xc002030f },
  23 + { 0x3d4000d4, 0x500000 },
  24 + { 0x3d4000dc, 0xa40012 },
  25 + { 0x3d4000e0, 0x310000 },
  26 + { 0x3d4000e8, 0x66004d },
  27 + { 0x3d4000ec, 0x16004d },
  28 + { 0x3d400100, 0x10100d11 },
  29 + { 0x3d400104, 0x3041a },
  30 + { 0x3d40010c, 0x606000 },
  31 + { 0x3d400110, 0x8040408 },
  32 + { 0x3d400114, 0x2030606 },
  33 + { 0x3d400118, 0x1010004 },
  34 + { 0x3d40011c, 0x301 },
  35 + { 0x3d400130, 0x20300 },
  36 + { 0x3d400134, 0xa100002 },
  37 + { 0x3d400138, 0x73 },
  38 + { 0x3d400144, 0x500028 },
  39 + { 0x3d400180, 0x190000c },
  40 + { 0x3d400184, 0x14030d4 },
  41 + { 0x3d400188, 0x0 },
  42 + { 0x3d400190, 0x4898204 },
  43 + { 0x3d400194, 0x80303 },
  44 + { 0x3d4001b4, 0x904 },
  45 + { 0x3d4001a0, 0xe0400018 },
  46 + { 0x3d4001a4, 0xdf00e4 },
  47 + { 0x3d4001a8, 0x80000000 },
  48 + { 0x3d4001b0, 0x11 },
  49 + { 0x3d4001c0, 0x1 },
  50 + { 0x3d4001c4, 0x1 },
  51 + { 0x3d4000f4, 0xc99 },
  52 + { 0x3d400108, 0x4070f0f },
  53 + { 0x3d400200, 0x17 },
  54 + { 0x3d40020c, 0x0 },
  55 + { 0x3d400210, 0x1f1f },
  56 + { 0x3d400204, 0x80808 },
  57 + { 0x3d400214, 0x7070707 },
  58 + { 0x3d400218, 0x7070707 },
  59 + { 0x3d400250, 0x29001701 },
  60 + { 0x3d400254, 0x2c },
  61 + { 0x3d40025c, 0x4000030 },
  62 + { 0x3d400264, 0x900093e7 },
  63 + { 0x3d40026c, 0x2005574 },
  64 + { 0x3d400400, 0x111 },
  65 + { 0x3d400408, 0x72ff },
  66 + { 0x3d400494, 0x2100e07 },
  67 + { 0x3d400498, 0x620096 },
  68 + { 0x3d40049c, 0x1100e07 },
  69 + { 0x3d4004a0, 0xc8012c },
  70 + { 0x3d402020, 0x11 },
  71 + { 0x3d402024, 0x7d00 },
  72 + { 0x3d402050, 0x20d040 },
  73 + { 0x3d402064, 0xc001c },
  74 + { 0x3d4020dc, 0x840000 },
  75 + { 0x3d4020e0, 0x310000 },
  76 + { 0x3d4020e8, 0x66004d },
  77 + { 0x3d4020ec, 0x16004d },
  78 + { 0x3d402100, 0xa040305 },
  79 + { 0x3d402104, 0x30407 },
  80 + { 0x3d402108, 0x203060b },
  81 + { 0x3d40210c, 0x505000 },
  82 + { 0x3d402110, 0x2040202 },
  83 + { 0x3d402114, 0x2030202 },
  84 + { 0x3d402118, 0x1010004 },
  85 + { 0x3d40211c, 0x301 },
  86 + { 0x3d402130, 0x20300 },
  87 + { 0x3d402134, 0xa100002 },
  88 + { 0x3d402138, 0x1d },
  89 + { 0x3d402144, 0x14000a },
  90 + { 0x3d402180, 0x640004 },
  91 + { 0x3d402190, 0x3818200 },
  92 + { 0x3d402194, 0x80303 },
  93 + { 0x3d4021b4, 0x100 },
  94 + { 0x3d4020f4, 0xc99 },
  95 + { 0x3d403020, 0x11 },
  96 + { 0x3d403024, 0x1f40 },
  97 + { 0x3d403050, 0x20d040 },
  98 + { 0x3d403064, 0x30007 },
  99 + { 0x3d4030dc, 0x840000 },
  100 + { 0x3d4030e0, 0x310000 },
  101 + { 0x3d4030e8, 0x66004d },
  102 + { 0x3d4030ec, 0x16004d },
  103 + { 0x3d403100, 0xa010102 },
  104 + { 0x3d403104, 0x30404 },
  105 + { 0x3d403108, 0x203060b },
  106 + { 0x3d40310c, 0x505000 },
  107 + { 0x3d403110, 0x2040202 },
  108 + { 0x3d403114, 0x2030202 },
  109 + { 0x3d403118, 0x1010004 },
  110 + { 0x3d40311c, 0x301 },
  111 + { 0x3d403130, 0x20300 },
  112 + { 0x3d403134, 0xa100002 },
  113 + { 0x3d403138, 0x8 },
  114 + { 0x3d403144, 0x50003 },
  115 + { 0x3d403180, 0x190004 },
  116 + { 0x3d403190, 0x3818200 },
  117 + { 0x3d403194, 0x80303 },
  118 + { 0x3d4031b4, 0x100 },
  119 + { 0x3d4030f4, 0xc99 },
  120 + { 0x3d400028, 0x0 },
  121 +};
  122 +
  123 +/* PHY Initialize Configuration */
  124 +struct dram_cfg_param ddr_ddrphy_cfg[] = {
  125 + { 0x100a0, 0x0 },
  126 + { 0x100a1, 0x1 },
  127 + { 0x100a2, 0x2 },
  128 + { 0x100a3, 0x3 },
  129 + { 0x100a4, 0x4 },
  130 + { 0x100a5, 0x5 },
  131 + { 0x100a6, 0x6 },
  132 + { 0x100a7, 0x7 },
  133 + { 0x110a0, 0x0 },
  134 + { 0x110a1, 0x1 },
  135 + { 0x110a2, 0x3 },
  136 + { 0x110a3, 0x4 },
  137 + { 0x110a4, 0x5 },
  138 + { 0x110a5, 0x2 },
  139 + { 0x110a6, 0x7 },
  140 + { 0x110a7, 0x6 },
  141 + { 0x1005f, 0x1ff },
  142 + { 0x1015f, 0x1ff },
  143 + { 0x1105f, 0x1ff },
  144 + { 0x1115f, 0x1ff },
  145 + { 0x11005f, 0x1ff },
  146 + { 0x11015f, 0x1ff },
  147 + { 0x11105f, 0x1ff },
  148 + { 0x11115f, 0x1ff },
  149 + { 0x21005f, 0x1ff },
  150 + { 0x21015f, 0x1ff },
  151 + { 0x21105f, 0x1ff },
  152 + { 0x21115f, 0x1ff },
  153 + { 0x55, 0x1ff },
  154 + { 0x1055, 0x1ff },
  155 + { 0x2055, 0x1ff },
  156 + { 0x3055, 0x1ff },
  157 + { 0x4055, 0x1ff },
  158 + { 0x5055, 0x1ff },
  159 + { 0x6055, 0x1ff },
  160 + { 0x7055, 0x1ff },
  161 + { 0x8055, 0x1ff },
  162 + { 0x9055, 0x1ff },
  163 + { 0x200c5, 0xb },
  164 + { 0x1200c5, 0x7 },
  165 + { 0x2200c5, 0x7 },
  166 + { 0x2002e, 0x1 },
  167 + { 0x12002e, 0x2 },
  168 + { 0x22002e, 0x2 },
  169 + { 0x90204, 0x0 },
  170 + { 0x190204, 0x0 },
  171 + { 0x290204, 0x0 },
  172 + { 0x20024, 0x1a3 },
  173 + { 0x2003a, 0x2 },
  174 + { 0x120024, 0x1a3 },
  175 + { 0x2003a, 0x2 },
  176 + { 0x220024, 0x1a3 },
  177 + { 0x2003a, 0x2 },
  178 + { 0x20056, 0x3 },
  179 + { 0x120056, 0x3 },
  180 + { 0x220056, 0x3 },
  181 + { 0x1004d, 0xe00 },
  182 + { 0x1014d, 0xe00 },
  183 + { 0x1104d, 0xe00 },
  184 + { 0x1114d, 0xe00 },
  185 + { 0x11004d, 0xe00 },
  186 + { 0x11014d, 0xe00 },
  187 + { 0x11104d, 0xe00 },
  188 + { 0x11114d, 0xe00 },
  189 + { 0x21004d, 0xe00 },
  190 + { 0x21014d, 0xe00 },
  191 + { 0x21104d, 0xe00 },
  192 + { 0x21114d, 0xe00 },
  193 + { 0x10049, 0xeba },
  194 + { 0x10149, 0xeba },
  195 + { 0x11049, 0xeba },
  196 + { 0x11149, 0xeba },
  197 + { 0x110049, 0xeba },
  198 + { 0x110149, 0xeba },
  199 + { 0x111049, 0xeba },
  200 + { 0x111149, 0xeba },
  201 + { 0x210049, 0xeba },
  202 + { 0x210149, 0xeba },
  203 + { 0x211049, 0xeba },
  204 + { 0x211149, 0xeba },
  205 + { 0x43, 0x63 },
  206 + { 0x1043, 0x63 },
  207 + { 0x2043, 0x63 },
  208 + { 0x3043, 0x63 },
  209 + { 0x4043, 0x63 },
  210 + { 0x5043, 0x63 },
  211 + { 0x6043, 0x63 },
  212 + { 0x7043, 0x63 },
  213 + { 0x8043, 0x63 },
  214 + { 0x9043, 0x63 },
  215 + { 0x20018, 0x1 },
  216 + { 0x20075, 0x4 },
  217 + { 0x20050, 0x0 },
  218 + { 0x20008, 0x190 },
  219 + { 0x120008, 0x64 },
  220 + { 0x220008, 0x19 },
  221 + { 0x20088, 0x9 },
  222 + { 0x200b2, 0xdc },
  223 + { 0x10043, 0x5a1 },
  224 + { 0x10143, 0x5a1 },
  225 + { 0x11043, 0x5a1 },
  226 + { 0x11143, 0x5a1 },
  227 + { 0x1200b2, 0xdc },
  228 + { 0x110043, 0x5a1 },
  229 + { 0x110143, 0x5a1 },
  230 + { 0x111043, 0x5a1 },
  231 + { 0x111143, 0x5a1 },
  232 + { 0x2200b2, 0xdc },
  233 + { 0x210043, 0x5a1 },
  234 + { 0x210143, 0x5a1 },
  235 + { 0x211043, 0x5a1 },
  236 + { 0x211143, 0x5a1 },
  237 + { 0x200fa, 0x1 },
  238 + { 0x1200fa, 0x1 },
  239 + { 0x2200fa, 0x1 },
  240 + { 0x20019, 0x1 },
  241 + { 0x120019, 0x1 },
  242 + { 0x220019, 0x1 },
  243 + { 0x200f0, 0x660 },
  244 + { 0x200f1, 0x0 },
  245 + { 0x200f2, 0x4444 },
  246 + { 0x200f3, 0x8888 },
  247 + { 0x200f4, 0x5665 },
  248 + { 0x200f5, 0x0 },
  249 + { 0x200f6, 0x0 },
  250 + { 0x200f7, 0xf000 },
  251 + { 0x20025, 0x0 },
  252 + { 0x2002d, 0x0 },
  253 + { 0x12002d, 0x0 },
  254 + { 0x22002d, 0x0 },
  255 + { 0x2005b, 0x7529 },
  256 + { 0x2005c, 0x0 },
  257 + { 0x200c7, 0x21 },
  258 + { 0x200ca, 0x24 },
  259 + { 0x200cc, 0x1f7 },
  260 + { 0x1200c7, 0x21 },
  261 + { 0x1200ca, 0x24 },
  262 + { 0x1200cc, 0x1f7 },
  263 + { 0x2200c7, 0x21 },
  264 + { 0x2200ca, 0x24 },
  265 + { 0x2200cc, 0x1f7 },
  266 + { 0x2007d, 0x212 },
  267 + { 0x12007d, 0x212 },
  268 + { 0x22007d, 0x212 },
  269 + { 0x2007c, 0x61 },
  270 + { 0x12007c, 0x61 },
  271 + { 0x22007c, 0x61 },
  272 + { 0x1004a, 0x500 },
  273 + { 0x1104a, 0x500 },
  274 + { 0x2002c, 0x0 },
  275 +};
  276 +
  277 +/* ddr phy trained csr */
  278 +struct dram_cfg_param ddr_ddrphy_trained_csr[] = {
  279 + {0x0200b2, 0x0},
  280 + {0x1200b2, 0x0},
  281 + {0x2200b2, 0x0},
  282 + {0x0200cb, 0x0},
  283 + {0x010043, 0x0},
  284 + {0x110043, 0x0},
  285 + {0x210043, 0x0},
  286 + {0x010143, 0x0},
  287 + {0x110143, 0x0},
  288 + {0x210143, 0x0},
  289 + {0x011043, 0x0},
  290 + {0x111043, 0x0},
  291 + {0x211043, 0x0},
  292 + {0x011143, 0x0},
  293 + {0x111143, 0x0},
  294 + {0x211143, 0x0},
  295 + {0x000080, 0x0},
  296 + {0x100080, 0x0},
  297 + {0x200080, 0x0},
  298 + {0x001080, 0x0},
  299 + {0x101080, 0x0},
  300 + {0x201080, 0x0},
  301 + {0x002080, 0x0},
  302 + {0x102080, 0x0},
  303 + {0x202080, 0x0},
  304 + {0x003080, 0x0},
  305 + {0x103080, 0x0},
  306 + {0x203080, 0x0},
  307 + {0x004080, 0x0},
  308 + {0x104080, 0x0},
  309 + {0x204080, 0x0},
  310 + {0x005080, 0x0},
  311 + {0x105080, 0x0},
  312 + {0x205080, 0x0},
  313 + {0x006080, 0x0},
  314 + {0x106080, 0x0},
  315 + {0x206080, 0x0},
  316 + {0x007080, 0x0},
  317 + {0x107080, 0x0},
  318 + {0x207080, 0x0},
  319 + {0x008080, 0x0},
  320 + {0x108080, 0x0},
  321 + {0x208080, 0x0},
  322 + {0x009080, 0x0},
  323 + {0x109080, 0x0},
  324 + {0x209080, 0x0},
  325 + {0x010080, 0x0},
  326 + {0x110080, 0x0},
  327 + {0x210080, 0x0},
  328 + {0x010180, 0x0},
  329 + {0x110180, 0x0},
  330 + {0x210180, 0x0},
  331 + {0x011080, 0x0},
  332 + {0x111080, 0x0},
  333 + {0x211080, 0x0},
  334 + {0x011180, 0x0},
  335 + {0x111180, 0x0},
  336 + {0x211180, 0x0},
  337 + {0x010081, 0x0},
  338 + {0x110081, 0x0},
  339 + {0x210081, 0x0},
  340 + {0x010181, 0x0},
  341 + {0x110181, 0x0},
  342 + {0x210181, 0x0},
  343 + {0x011081, 0x0},
  344 + {0x111081, 0x0},
  345 + {0x211081, 0x0},
  346 + {0x011181, 0x0},
  347 + {0x111181, 0x0},
  348 + {0x211181, 0x0},
  349 + {0x0100d0, 0x0},
  350 + {0x1100d0, 0x0},
  351 + {0x2100d0, 0x0},
  352 + {0x0101d0, 0x0},
  353 + {0x1101d0, 0x0},
  354 + {0x2101d0, 0x0},
  355 + {0x0110d0, 0x0},
  356 + {0x1110d0, 0x0},
  357 + {0x2110d0, 0x0},
  358 + {0x0111d0, 0x0},
  359 + {0x1111d0, 0x0},
  360 + {0x2111d0, 0x0},
  361 + {0x0100d1, 0x0},
  362 + {0x1100d1, 0x0},
  363 + {0x2100d1, 0x0},
  364 + {0x0101d1, 0x0},
  365 + {0x1101d1, 0x0},
  366 + {0x2101d1, 0x0},
  367 + {0x0110d1, 0x0},
  368 + {0x1110d1, 0x0},
  369 + {0x2110d1, 0x0},
  370 + {0x0111d1, 0x0},
  371 + {0x1111d1, 0x0},
  372 + {0x2111d1, 0x0},
  373 + {0x010068, 0x0},
  374 + {0x010168, 0x0},
  375 + {0x010268, 0x0},
  376 + {0x010368, 0x0},
  377 + {0x010468, 0x0},
  378 + {0x010568, 0x0},
  379 + {0x010668, 0x0},
  380 + {0x010768, 0x0},
  381 + {0x010868, 0x0},
  382 + {0x011068, 0x0},
  383 + {0x011168, 0x0},
  384 + {0x011268, 0x0},
  385 + {0x011368, 0x0},
  386 + {0x011468, 0x0},
  387 + {0x011568, 0x0},
  388 + {0x011668, 0x0},
  389 + {0x011768, 0x0},
  390 + {0x011868, 0x0},
  391 + {0x010069, 0x0},
  392 + {0x010169, 0x0},
  393 + {0x010269, 0x0},
  394 + {0x010369, 0x0},
  395 + {0x010469, 0x0},
  396 + {0x010569, 0x0},
  397 + {0x010669, 0x0},
  398 + {0x010769, 0x0},
  399 + {0x010869, 0x0},
  400 + {0x011069, 0x0},
  401 + {0x011169, 0x0},
  402 + {0x011269, 0x0},
  403 + {0x011369, 0x0},
  404 + {0x011469, 0x0},
  405 + {0x011569, 0x0},
  406 + {0x011669, 0x0},
  407 + {0x011769, 0x0},
  408 + {0x011869, 0x0},
  409 + {0x01008c, 0x0},
  410 + {0x11008c, 0x0},
  411 + {0x21008c, 0x0},
  412 + {0x01018c, 0x0},
  413 + {0x11018c, 0x0},
  414 + {0x21018c, 0x0},
  415 + {0x01108c, 0x0},
  416 + {0x11108c, 0x0},
  417 + {0x21108c, 0x0},
  418 + {0x01118c, 0x0},
  419 + {0x11118c, 0x0},
  420 + {0x21118c, 0x0},
  421 + {0x01008d, 0x0},
  422 + {0x11008d, 0x0},
  423 + {0x21008d, 0x0},
  424 + {0x01018d, 0x0},
  425 + {0x11018d, 0x0},
  426 + {0x21018d, 0x0},
  427 + {0x01108d, 0x0},
  428 + {0x11108d, 0x0},
  429 + {0x21108d, 0x0},
  430 + {0x01118d, 0x0},
  431 + {0x11118d, 0x0},
  432 + {0x21118d, 0x0},
  433 + {0x0100c0, 0x0},
  434 + {0x1100c0, 0x0},
  435 + {0x2100c0, 0x0},
  436 + {0x0101c0, 0x0},
  437 + {0x1101c0, 0x0},
  438 + {0x2101c0, 0x0},
  439 + {0x0102c0, 0x0},
  440 + {0x1102c0, 0x0},
  441 + {0x2102c0, 0x0},
  442 + {0x0103c0, 0x0},
  443 + {0x1103c0, 0x0},
  444 + {0x2103c0, 0x0},
  445 + {0x0104c0, 0x0},
  446 + {0x1104c0, 0x0},
  447 + {0x2104c0, 0x0},
  448 + {0x0105c0, 0x0},
  449 + {0x1105c0, 0x0},
  450 + {0x2105c0, 0x0},
  451 + {0x0106c0, 0x0},
  452 + {0x1106c0, 0x0},
  453 + {0x2106c0, 0x0},
  454 + {0x0107c0, 0x0},
  455 + {0x1107c0, 0x0},
  456 + {0x2107c0, 0x0},
  457 + {0x0108c0, 0x0},
  458 + {0x1108c0, 0x0},
  459 + {0x2108c0, 0x0},
  460 + {0x0110c0, 0x0},
  461 + {0x1110c0, 0x0},
  462 + {0x2110c0, 0x0},
  463 + {0x0111c0, 0x0},
  464 + {0x1111c0, 0x0},
  465 + {0x2111c0, 0x0},
  466 + {0x0112c0, 0x0},
  467 + {0x1112c0, 0x0},
  468 + {0x2112c0, 0x0},
  469 + {0x0113c0, 0x0},
  470 + {0x1113c0, 0x0},
  471 + {0x2113c0, 0x0},
  472 + {0x0114c0, 0x0},
  473 + {0x1114c0, 0x0},
  474 + {0x2114c0, 0x0},
  475 + {0x0115c0, 0x0},
  476 + {0x1115c0, 0x0},
  477 + {0x2115c0, 0x0},
  478 + {0x0116c0, 0x0},
  479 + {0x1116c0, 0x0},
  480 + {0x2116c0, 0x0},
  481 + {0x0117c0, 0x0},
  482 + {0x1117c0, 0x0},
  483 + {0x2117c0, 0x0},
  484 + {0x0118c0, 0x0},
  485 + {0x1118c0, 0x0},
  486 + {0x2118c0, 0x0},
  487 + {0x0100c1, 0x0},
  488 + {0x1100c1, 0x0},
  489 + {0x2100c1, 0x0},
  490 + {0x0101c1, 0x0},
  491 + {0x1101c1, 0x0},
  492 + {0x2101c1, 0x0},
  493 + {0x0102c1, 0x0},
  494 + {0x1102c1, 0x0},
  495 + {0x2102c1, 0x0},
  496 + {0x0103c1, 0x0},
  497 + {0x1103c1, 0x0},
  498 + {0x2103c1, 0x0},
  499 + {0x0104c1, 0x0},
  500 + {0x1104c1, 0x0},
  501 + {0x2104c1, 0x0},
  502 + {0x0105c1, 0x0},
  503 + {0x1105c1, 0x0},
  504 + {0x2105c1, 0x0},
  505 + {0x0106c1, 0x0},
  506 + {0x1106c1, 0x0},
  507 + {0x2106c1, 0x0},
  508 + {0x0107c1, 0x0},
  509 + {0x1107c1, 0x0},
  510 + {0x2107c1, 0x0},
  511 + {0x0108c1, 0x0},
  512 + {0x1108c1, 0x0},
  513 + {0x2108c1, 0x0},
  514 + {0x0110c1, 0x0},
  515 + {0x1110c1, 0x0},
  516 + {0x2110c1, 0x0},
  517 + {0x0111c1, 0x0},
  518 + {0x1111c1, 0x0},
  519 + {0x2111c1, 0x0},
  520 + {0x0112c1, 0x0},
  521 + {0x1112c1, 0x0},
  522 + {0x2112c1, 0x0},
  523 + {0x0113c1, 0x0},
  524 + {0x1113c1, 0x0},
  525 + {0x2113c1, 0x0},
  526 + {0x0114c1, 0x0},
  527 + {0x1114c1, 0x0},
  528 + {0x2114c1, 0x0},
  529 + {0x0115c1, 0x0},
  530 + {0x1115c1, 0x0},
  531 + {0x2115c1, 0x0},
  532 + {0x0116c1, 0x0},
  533 + {0x1116c1, 0x0},
  534 + {0x2116c1, 0x0},
  535 + {0x0117c1, 0x0},
  536 + {0x1117c1, 0x0},
  537 + {0x2117c1, 0x0},
  538 + {0x0118c1, 0x0},
  539 + {0x1118c1, 0x0},
  540 + {0x2118c1, 0x0},
  541 + {0x010020, 0x0},
  542 + {0x110020, 0x0},
  543 + {0x210020, 0x0},
  544 + {0x011020, 0x0},
  545 + {0x111020, 0x0},
  546 + {0x211020, 0x0},
  547 + {0x020072, 0x0},
  548 + {0x020073, 0x0},
  549 + {0x020074, 0x0},
  550 + {0x0100aa, 0x0},
  551 + {0x0110aa, 0x0},
  552 + {0x020010, 0x0},
  553 + {0x120010, 0x0},
  554 + {0x220010, 0x0},
  555 + {0x020011, 0x0},
  556 + {0x120011, 0x0},
  557 + {0x220011, 0x0},
  558 + {0x0100ae, 0x0},
  559 + {0x1100ae, 0x0},
  560 + {0x2100ae, 0x0},
  561 + {0x0100af, 0x0},
  562 + {0x1100af, 0x0},
  563 + {0x2100af, 0x0},
  564 + {0x0110ae, 0x0},
  565 + {0x1110ae, 0x0},
  566 + {0x2110ae, 0x0},
  567 + {0x0110af, 0x0},
  568 + {0x1110af, 0x0},
  569 + {0x2110af, 0x0},
  570 + {0x020020, 0x0},
  571 + {0x120020, 0x0},
  572 + {0x220020, 0x0},
  573 + {0x0100a0, 0x0},
  574 + {0x0100a1, 0x0},
  575 + {0x0100a2, 0x0},
  576 + {0x0100a3, 0x0},
  577 + {0x0100a4, 0x0},
  578 + {0x0100a5, 0x0},
  579 + {0x0100a6, 0x0},
  580 + {0x0100a7, 0x0},
  581 + {0x0110a0, 0x0},
  582 + {0x0110a1, 0x0},
  583 + {0x0110a2, 0x0},
  584 + {0x0110a3, 0x0},
  585 + {0x0110a4, 0x0},
  586 + {0x0110a5, 0x0},
  587 + {0x0110a6, 0x0},
  588 + {0x0110a7, 0x0},
  589 + {0x02007c, 0x0},
  590 + {0x12007c, 0x0},
  591 + {0x22007c, 0x0},
  592 + {0x02007d, 0x0},
  593 + {0x12007d, 0x0},
  594 + {0x22007d, 0x0},
  595 + {0x0400fd, 0x0},
  596 + {0x0400c0, 0x0},
  597 + {0x090201, 0x0},
  598 + {0x190201, 0x0},
  599 + {0x290201, 0x0},
  600 + {0x090202, 0x0},
  601 + {0x190202, 0x0},
  602 + {0x290202, 0x0},
  603 + {0x090203, 0x0},
  604 + {0x190203, 0x0},
  605 + {0x290203, 0x0},
  606 + {0x090204, 0x0},
  607 + {0x190204, 0x0},
  608 + {0x290204, 0x0},
  609 + {0x090205, 0x0},
  610 + {0x190205, 0x0},
  611 + {0x290205, 0x0},
  612 + {0x090206, 0x0},
  613 + {0x190206, 0x0},
  614 + {0x290206, 0x0},
  615 + {0x090207, 0x0},
  616 + {0x190207, 0x0},
  617 + {0x290207, 0x0},
  618 + {0x090208, 0x0},
  619 + {0x190208, 0x0},
  620 + {0x290208, 0x0},
  621 + {0x010062, 0x0},
  622 + {0x010162, 0x0},
  623 + {0x010262, 0x0},
  624 + {0x010362, 0x0},
  625 + {0x010462, 0x0},
  626 + {0x010562, 0x0},
  627 + {0x010662, 0x0},
  628 + {0x010762, 0x0},
  629 + {0x010862, 0x0},
  630 + {0x011062, 0x0},
  631 + {0x011162, 0x0},
  632 + {0x011262, 0x0},
  633 + {0x011362, 0x0},
  634 + {0x011462, 0x0},
  635 + {0x011562, 0x0},
  636 + {0x011662, 0x0},
  637 + {0x011762, 0x0},
  638 + {0x011862, 0x0},
  639 + {0x020077, 0x0},
  640 + {0x010001, 0x0},
  641 + {0x011001, 0x0},
  642 + {0x010040, 0x0},
  643 + {0x010140, 0x0},
  644 + {0x010240, 0x0},
  645 + {0x010340, 0x0},
  646 + {0x010440, 0x0},
  647 + {0x010540, 0x0},
  648 + {0x010640, 0x0},
  649 + {0x010740, 0x0},
  650 + {0x010840, 0x0},
  651 + {0x010030, 0x0},
  652 + {0x010130, 0x0},
  653 + {0x010230, 0x0},
  654 + {0x010330, 0x0},
  655 + {0x010430, 0x0},
  656 + {0x010530, 0x0},
  657 + {0x010630, 0x0},
  658 + {0x010730, 0x0},
  659 + {0x010830, 0x0},
  660 + {0x011040, 0x0},
  661 + {0x011140, 0x0},
  662 + {0x011240, 0x0},
  663 + {0x011340, 0x0},
  664 + {0x011440, 0x0},
  665 + {0x011540, 0x0},
  666 + {0x011640, 0x0},
  667 + {0x011740, 0x0},
  668 + {0x011840, 0x0},
  669 + {0x011030, 0x0},
  670 + {0x011130, 0x0},
  671 + {0x011230, 0x0},
  672 + {0x011330, 0x0},
  673 + {0x011430, 0x0},
  674 + {0x011530, 0x0},
  675 + {0x011630, 0x0},
  676 + {0x011730, 0x0},
  677 + {0x011830, 0x0},
  678 +};
  679 +
  680 +/* P0 message block paremeter for training firmware */
  681 +struct dram_cfg_param ddr_fsp0_cfg[] = {
  682 + { 0xd0000, 0x0 },
  683 + { 0x54003, 0x640 },
  684 + { 0x54004, 0x2 },
  685 + { 0x54005, 0x2228 },
  686 + { 0x54006, 0x11 },
  687 + { 0x54008, 0x131f },
  688 + { 0x54009, 0xc8 },
  689 + { 0x5400b, 0x2 },
  690 + { 0x5400f, 0x100 },
  691 + { 0x54012, 0x310 },
  692 + { 0x54019, 0x12a4 },
  693 + { 0x5401a, 0x31 },
  694 + { 0x5401b, 0x4d66 },
  695 + { 0x5401c, 0x4d00 },
  696 + { 0x5401e, 0x16 },
  697 + { 0x5401f, 0x12a4 },
  698 + { 0x54020, 0x31 },
  699 + { 0x54021, 0x4d66 },
  700 + { 0x54022, 0x4d00 },
  701 + { 0x54024, 0x16 },
  702 + { 0x54032, 0xa400 },
  703 + { 0x54033, 0x3112 },
  704 + { 0x54034, 0x6600 },
  705 + { 0x54035, 0x4d },
  706 + { 0x54036, 0x4d },
  707 + { 0x54037, 0x1600 },
  708 + { 0x54038, 0xa400 },
  709 + { 0x54039, 0x3112 },
  710 + { 0x5403a, 0x6600 },
  711 + { 0x5403b, 0x4d },
  712 + { 0x5403c, 0x4d },
  713 + { 0x5403d, 0x1600 },
  714 + { 0xd0000, 0x1 },
  715 +};
  716 +
  717 +
  718 +/* P1 message block paremeter for training firmware */
  719 +struct dram_cfg_param ddr_fsp1_cfg[] = {
  720 + { 0xd0000, 0x0 },
  721 + { 0x54002, 0x101 },
  722 + { 0x54003, 0x190 },
  723 + { 0x54004, 0x2 },
  724 + { 0x54005, 0x2228 },
  725 + { 0x54006, 0x11 },
  726 + { 0x54008, 0x121f },
  727 + { 0x54009, 0xc8 },
  728 + { 0x5400b, 0x2 },
  729 + { 0x5400f, 0x100 },
  730 + { 0x54012, 0x310 },
  731 + { 0x54019, 0x84 },
  732 + { 0x5401a, 0x31 },
  733 + { 0x5401b, 0x4d66 },
  734 + { 0x5401c, 0x4d00 },
  735 + { 0x5401e, 0x16 },
  736 + { 0x5401f, 0x84 },
  737 + { 0x54020, 0x31 },
  738 + { 0x54021, 0x4d66 },
  739 + { 0x54022, 0x4d00 },
  740 + { 0x54024, 0x16 },
  741 + { 0x54032, 0x8400 },
  742 + { 0x54033, 0x3100 },
  743 + { 0x54034, 0x6600 },
  744 + { 0x54035, 0x4d },
  745 + { 0x54036, 0x4d },
  746 + { 0x54037, 0x1600 },
  747 + { 0x54038, 0x8400 },
  748 + { 0x54039, 0x3100 },
  749 + { 0x5403a, 0x6600 },
  750 + { 0x5403b, 0x4d },
  751 + { 0x5403c, 0x4d },
  752 + { 0x5403d, 0x1600 },
  753 + { 0xd0000, 0x1 },
  754 +};
  755 +
  756 +
  757 +/* P2 message block paremeter for training firmware */
  758 +struct dram_cfg_param ddr_fsp2_cfg[] = {
  759 + { 0xd0000, 0x0 },
  760 + { 0x54002, 0x102 },
  761 + { 0x54003, 0x64 },
  762 + { 0x54004, 0x2 },
  763 + { 0x54005, 0x2228 },
  764 + { 0x54006, 0x11 },
  765 + { 0x54008, 0x121f },
  766 + { 0x54009, 0xc8 },
  767 + { 0x5400b, 0x2 },
  768 + { 0x5400f, 0x100 },
  769 + { 0x54012, 0x310 },
  770 + { 0x54019, 0x84 },
  771 + { 0x5401a, 0x31 },
  772 + { 0x5401b, 0x4d66 },
  773 + { 0x5401c, 0x4d00 },
  774 + { 0x5401e, 0x16 },
  775 + { 0x5401f, 0x84 },
  776 + { 0x54020, 0x31 },
  777 + { 0x54021, 0x4d66 },
  778 + { 0x54022, 0x4d00 },
  779 + { 0x54024, 0x16 },
  780 + { 0x54032, 0x8400 },
  781 + { 0x54033, 0x3100 },
  782 + { 0x54034, 0x6600 },
  783 + { 0x54035, 0x4d },
  784 + { 0x54036, 0x4d },
  785 + { 0x54037, 0x1600 },
  786 + { 0x54038, 0x8400 },
  787 + { 0x54039, 0x3100 },
  788 + { 0x5403a, 0x6600 },
  789 + { 0x5403b, 0x4d },
  790 + { 0x5403c, 0x4d },
  791 + { 0x5403d, 0x1600 },
  792 + { 0xd0000, 0x1 },
  793 +};
  794 +
  795 +
  796 +/* P0 2D message block paremeter for training firmware */
  797 +struct dram_cfg_param ddr_fsp0_2d_cfg[] = {
  798 + { 0xd0000, 0x0 },
  799 + { 0x54003, 0x640 },
  800 + { 0x54004, 0x2 },
  801 + { 0x54005, 0x2228 },
  802 + { 0x54006, 0x11 },
  803 + { 0x54008, 0x61 },
  804 + { 0x54009, 0xc8 },
  805 + { 0x5400b, 0x2 },
  806 + { 0x5400d, 0x100 },
  807 + { 0x5400f, 0x100 },
  808 + { 0x54010, 0x1f7f },
  809 + { 0x54012, 0x310 },
  810 + { 0x54019, 0x12a4 },
  811 + { 0x5401a, 0x31 },
  812 + { 0x5401b, 0x4d66 },
  813 + { 0x5401c, 0x4d00 },
  814 + { 0x5401e, 0x16 },
  815 + { 0x5401f, 0x12a4 },
  816 + { 0x54020, 0x31 },
  817 + { 0x54021, 0x4d66 },
  818 + { 0x54022, 0x4d00 },
  819 + { 0x54024, 0x16 },
  820 + { 0x54032, 0xa400 },
  821 + { 0x54033, 0x3112 },
  822 + { 0x54034, 0x6600 },
  823 + { 0x54035, 0x4d },
  824 + { 0x54036, 0x4d },
  825 + { 0x54037, 0x1600 },
  826 + { 0x54038, 0xa400 },
  827 + { 0x54039, 0x3112 },
  828 + { 0x5403a, 0x6600 },
  829 + { 0x5403b, 0x4d },
  830 + { 0x5403c, 0x4d },
  831 + { 0x5403d, 0x1600 },
  832 + { 0xd0000, 0x1 },
  833 +};
  834 +
  835 +/* DRAM PHY init engine image */
  836 +struct dram_cfg_param ddr_phy_pie[] = {
  837 + { 0xd0000, 0x0 },
  838 + { 0x90000, 0x10 },
  839 + { 0x90001, 0x400 },
  840 + { 0x90002, 0x10e },
  841 + { 0x90003, 0x0 },
  842 + { 0x90004, 0x0 },
  843 + { 0x90005, 0x8 },
  844 + { 0x90029, 0xb },
  845 + { 0x9002a, 0x480 },
  846 + { 0x9002b, 0x109 },
  847 + { 0x9002c, 0x8 },
  848 + { 0x9002d, 0x448 },
  849 + { 0x9002e, 0x139 },
  850 + { 0x9002f, 0x8 },
  851 + { 0x90030, 0x478 },
  852 + { 0x90031, 0x109 },
  853 + { 0x90032, 0x0 },
  854 + { 0x90033, 0xe8 },
  855 + { 0x90034, 0x109 },
  856 + { 0x90035, 0x2 },
  857 + { 0x90036, 0x10 },
  858 + { 0x90037, 0x139 },
  859 + { 0x90038, 0xb },
  860 + { 0x90039, 0x7c0 },
  861 + { 0x9003a, 0x139 },
  862 + { 0x9003b, 0x44 },
  863 + { 0x9003c, 0x633 },
  864 + { 0x9003d, 0x159 },
  865 + { 0x9003e, 0x14f },
  866 + { 0x9003f, 0x630 },
  867 + { 0x90040, 0x159 },
  868 + { 0x90041, 0x47 },
  869 + { 0x90042, 0x633 },
  870 + { 0x90043, 0x149 },
  871 + { 0x90044, 0x4f },
  872 + { 0x90045, 0x633 },
  873 + { 0x90046, 0x179 },
  874 + { 0x90047, 0x8 },
  875 + { 0x90048, 0xe0 },
  876 + { 0x90049, 0x109 },
  877 + { 0x9004a, 0x0 },
  878 + { 0x9004b, 0x7c8 },
  879 + { 0x9004c, 0x109 },
  880 + { 0x9004d, 0x0 },
  881 + { 0x9004e, 0x1 },
  882 + { 0x9004f, 0x8 },
  883 + { 0x90050, 0x0 },
  884 + { 0x90051, 0x45a },
  885 + { 0x90052, 0x9 },
  886 + { 0x90053, 0x0 },
  887 + { 0x90054, 0x448 },
  888 + { 0x90055, 0x109 },
  889 + { 0x90056, 0x40 },
  890 + { 0x90057, 0x633 },
  891 + { 0x90058, 0x179 },
  892 + { 0x90059, 0x1 },
  893 + { 0x9005a, 0x618 },
  894 + { 0x9005b, 0x109 },
  895 + { 0x9005c, 0x40c0 },
  896 + { 0x9005d, 0x633 },
  897 + { 0x9005e, 0x149 },
  898 + { 0x9005f, 0x8 },
  899 + { 0x90060, 0x4 },
  900 + { 0x90061, 0x48 },
  901 + { 0x90062, 0x4040 },
  902 + { 0x90063, 0x633 },
  903 + { 0x90064, 0x149 },
  904 + { 0x90065, 0x0 },
  905 + { 0x90066, 0x4 },
  906 + { 0x90067, 0x48 },
  907 + { 0x90068, 0x40 },
  908 + { 0x90069, 0x633 },
  909 + { 0x9006a, 0x149 },
  910 + { 0x9006b, 0x10 },
  911 + { 0x9006c, 0x4 },
  912 + { 0x9006d, 0x18 },
  913 + { 0x9006e, 0x0 },
  914 + { 0x9006f, 0x4 },
  915 + { 0x90070, 0x78 },
  916 + { 0x90071, 0x549 },
  917 + { 0x90072, 0x633 },
  918 + { 0x90073, 0x159 },
  919 + { 0x90074, 0xd49 },
  920 + { 0x90075, 0x633 },
  921 + { 0x90076, 0x159 },
  922 + { 0x90077, 0x94a },
  923 + { 0x90078, 0x633 },
  924 + { 0x90079, 0x159 },
  925 + { 0x9007a, 0x441 },
  926 + { 0x9007b, 0x633 },
  927 + { 0x9007c, 0x149 },
  928 + { 0x9007d, 0x42 },
  929 + { 0x9007e, 0x633 },
  930 + { 0x9007f, 0x149 },
  931 + { 0x90080, 0x1 },
  932 + { 0x90081, 0x633 },
  933 + { 0x90082, 0x149 },
  934 + { 0x90083, 0x0 },
  935 + { 0x90084, 0xe0 },
  936 + { 0x90085, 0x109 },
  937 + { 0x90086, 0xa },
  938 + { 0x90087, 0x10 },
  939 + { 0x90088, 0x109 },
  940 + { 0x90089, 0x9 },
  941 + { 0x9008a, 0x3c0 },
  942 + { 0x9008b, 0x149 },
  943 + { 0x9008c, 0x9 },
  944 + { 0x9008d, 0x3c0 },
  945 + { 0x9008e, 0x159 },
  946 + { 0x9008f, 0x18 },
  947 + { 0x90090, 0x10 },
  948 + { 0x90091, 0x109 },
  949 + { 0x90092, 0x0 },
  950 + { 0x90093, 0x3c0 },
  951 + { 0x90094, 0x109 },
  952 + { 0x90095, 0x18 },
  953 + { 0x90096, 0x4 },
  954 + { 0x90097, 0x48 },
  955 + { 0x90098, 0x18 },
  956 + { 0x90099, 0x4 },
  957 + { 0x9009a, 0x58 },
  958 + { 0x9009b, 0xb },
  959 + { 0x9009c, 0x10 },
  960 + { 0x9009d, 0x109 },
  961 + { 0x9009e, 0x1 },
  962 + { 0x9009f, 0x10 },
  963 + { 0x900a0, 0x109 },
  964 + { 0x900a1, 0x5 },
  965 + { 0x900a2, 0x7c0 },
  966 + { 0x900a3, 0x109 },
  967 + { 0x40000, 0x811 },
  968 + { 0x40020, 0x880 },
  969 + { 0x40040, 0x0 },
  970 + { 0x40060, 0x0 },
  971 + { 0x40001, 0x4008 },
  972 + { 0x40021, 0x83 },
  973 + { 0x40041, 0x4f },
  974 + { 0x40061, 0x0 },
  975 + { 0x40002, 0x4040 },
  976 + { 0x40022, 0x83 },
  977 + { 0x40042, 0x51 },
  978 + { 0x40062, 0x0 },
  979 + { 0x40003, 0x811 },
  980 + { 0x40023, 0x880 },
  981 + { 0x40043, 0x0 },
  982 + { 0x40063, 0x0 },
  983 + { 0x40004, 0x720 },
  984 + { 0x40024, 0xf },
  985 + { 0x40044, 0x1740 },
  986 + { 0x40064, 0x0 },
  987 + { 0x40005, 0x16 },
  988 + { 0x40025, 0x83 },
  989 + { 0x40045, 0x4b },
  990 + { 0x40065, 0x0 },
  991 + { 0x40006, 0x716 },
  992 + { 0x40026, 0xf },
  993 + { 0x40046, 0x2001 },
  994 + { 0x40066, 0x0 },
  995 + { 0x40007, 0x716 },
  996 + { 0x40027, 0xf },
  997 + { 0x40047, 0x2800 },
  998 + { 0x40067, 0x0 },
  999 + { 0x40008, 0x716 },
  1000 + { 0x40028, 0xf },
  1001 + { 0x40048, 0xf00 },
  1002 + { 0x40068, 0x0 },
  1003 + { 0x40009, 0x720 },
  1004 + { 0x40029, 0xf },
  1005 + { 0x40049, 0x1400 },
  1006 + { 0x40069, 0x0 },
  1007 + { 0x4000a, 0xe08 },
  1008 + { 0x4002a, 0xc15 },
  1009 + { 0x4004a, 0x0 },
  1010 + { 0x4006a, 0x0 },
  1011 + { 0x4000b, 0x625 },
  1012 + { 0x4002b, 0x15 },
  1013 + { 0x4004b, 0x0 },
  1014 + { 0x4006b, 0x0 },
  1015 + { 0x4000c, 0x4028 },
  1016 + { 0x4002c, 0x80 },
  1017 + { 0x4004c, 0x0 },
  1018 + { 0x4006c, 0x0 },
  1019 + { 0x4000d, 0xe08 },
  1020 + { 0x4002d, 0xc1a },
  1021 + { 0x4004d, 0x0 },
  1022 + { 0x4006d, 0x0 },
  1023 + { 0x4000e, 0x625 },
  1024 + { 0x4002e, 0x1a },
  1025 + { 0x4004e, 0x0 },
  1026 + { 0x4006e, 0x0 },
  1027 + { 0x4000f, 0x4040 },
  1028 + { 0x4002f, 0x80 },
  1029 + { 0x4004f, 0x0 },
  1030 + { 0x4006f, 0x0 },
  1031 + { 0x40010, 0x2604 },
  1032 + { 0x40030, 0x15 },
  1033 + { 0x40050, 0x0 },
  1034 + { 0x40070, 0x0 },
  1035 + { 0x40011, 0x708 },
  1036 + { 0x40031, 0x5 },
  1037 + { 0x40051, 0x0 },
  1038 + { 0x40071, 0x2002 },
  1039 + { 0x40012, 0x8 },
  1040 + { 0x40032, 0x80 },
  1041 + { 0x40052, 0x0 },
  1042 + { 0x40072, 0x0 },
  1043 + { 0x40013, 0x2604 },
  1044 + { 0x40033, 0x1a },
  1045 + { 0x40053, 0x0 },
  1046 + { 0x40073, 0x0 },
  1047 + { 0x40014, 0x708 },
  1048 + { 0x40034, 0xa },
  1049 + { 0x40054, 0x0 },
  1050 + { 0x40074, 0x2002 },
  1051 + { 0x40015, 0x4040 },
  1052 + { 0x40035, 0x80 },
  1053 + { 0x40055, 0x0 },
  1054 + { 0x40075, 0x0 },
  1055 + { 0x40016, 0x60a },
  1056 + { 0x40036, 0x15 },
  1057 + { 0x40056, 0x1200 },
  1058 + { 0x40076, 0x0 },
  1059 + { 0x40017, 0x61a },
  1060 + { 0x40037, 0x15 },
  1061 + { 0x40057, 0x1300 },
  1062 + { 0x40077, 0x0 },
  1063 + { 0x40018, 0x60a },
  1064 + { 0x40038, 0x1a },
  1065 + { 0x40058, 0x1200 },
  1066 + { 0x40078, 0x0 },
  1067 + { 0x40019, 0x642 },
  1068 + { 0x40039, 0x1a },
  1069 + { 0x40059, 0x1300 },
  1070 + { 0x40079, 0x0 },
  1071 + { 0x4001a, 0x4808 },
  1072 + { 0x4003a, 0x880 },
  1073 + { 0x4005a, 0x0 },
  1074 + { 0x4007a, 0x0 },
  1075 + { 0x900a4, 0x0 },
  1076 + { 0x900a5, 0x790 },
  1077 + { 0x900a6, 0x11a },
  1078 + { 0x900a7, 0x8 },
  1079 + { 0x900a8, 0x7aa },
  1080 + { 0x900a9, 0x2a },
  1081 + { 0x900aa, 0x10 },
  1082 + { 0x900ab, 0x7b2 },
  1083 + { 0x900ac, 0x2a },
  1084 + { 0x900ad, 0x0 },
  1085 + { 0x900ae, 0x7c8 },
  1086 + { 0x900af, 0x109 },
  1087 + { 0x900b0, 0x10 },
  1088 + { 0x900b1, 0x10 },
  1089 + { 0x900b2, 0x109 },
  1090 + { 0x900b3, 0x10 },
  1091 + { 0x900b4, 0x2a8 },
  1092 + { 0x900b5, 0x129 },
  1093 + { 0x900b6, 0x8 },
  1094 + { 0x900b7, 0x370 },
  1095 + { 0x900b8, 0x129 },
  1096 + { 0x900b9, 0xa },
  1097 + { 0x900ba, 0x3c8 },
  1098 + { 0x900bb, 0x1a9 },
  1099 + { 0x900bc, 0xc },
  1100 + { 0x900bd, 0x408 },
  1101 + { 0x900be, 0x199 },
  1102 + { 0x900bf, 0x14 },
  1103 + { 0x900c0, 0x790 },
  1104 + { 0x900c1, 0x11a },
  1105 + { 0x900c2, 0x8 },
  1106 + { 0x900c3, 0x4 },
  1107 + { 0x900c4, 0x18 },
  1108 + { 0x900c5, 0xe },
  1109 + { 0x900c6, 0x408 },
  1110 + { 0x900c7, 0x199 },
  1111 + { 0x900c8, 0x8 },
  1112 + { 0x900c9, 0x8568 },
  1113 + { 0x900ca, 0x108 },
  1114 + { 0x900cb, 0x18 },
  1115 + { 0x900cc, 0x790 },
  1116 + { 0x900cd, 0x16a },
  1117 + { 0x900ce, 0x8 },
  1118 + { 0x900cf, 0x1d8 },
  1119 + { 0x900d0, 0x169 },
  1120 + { 0x900d1, 0x10 },
  1121 + { 0x900d2, 0x8558 },
  1122 + { 0x900d3, 0x168 },
  1123 + { 0x900d4, 0x70 },
  1124 + { 0x900d5, 0x788 },
  1125 + { 0x900d6, 0x16a },
  1126 + { 0x900d7, 0x1ff8 },
  1127 + { 0x900d8, 0x85a8 },
  1128 + { 0x900d9, 0x1e8 },
  1129 + { 0x900da, 0x50 },
  1130 + { 0x900db, 0x798 },
  1131 + { 0x900dc, 0x16a },
  1132 + { 0x900dd, 0x60 },
  1133 + { 0x900de, 0x7a0 },
  1134 + { 0x900df, 0x16a },
  1135 + { 0x900e0, 0x8 },
  1136 + { 0x900e1, 0x8310 },
  1137 + { 0x900e2, 0x168 },
  1138 + { 0x900e3, 0x8 },
  1139 + { 0x900e4, 0xa310 },
  1140 + { 0x900e5, 0x168 },
  1141 + { 0x900e6, 0xa },
  1142 + { 0x900e7, 0x408 },
  1143 + { 0x900e8, 0x169 },
  1144 + { 0x900e9, 0x6e },
  1145 + { 0x900ea, 0x0 },
  1146 + { 0x900eb, 0x68 },
  1147 + { 0x900ec, 0x0 },
  1148 + { 0x900ed, 0x408 },
  1149 + { 0x900ee, 0x169 },
  1150 + { 0x900ef, 0x0 },
  1151 + { 0x900f0, 0x8310 },
  1152 + { 0x900f1, 0x168 },
  1153 + { 0x900f2, 0x0 },
  1154 + { 0x900f3, 0xa310 },
  1155 + { 0x900f4, 0x168 },
  1156 + { 0x900f5, 0x1ff8 },
  1157 + { 0x900f6, 0x85a8 },
  1158 + { 0x900f7, 0x1e8 },
  1159 + { 0x900f8, 0x68 },
  1160 + { 0x900f9, 0x798 },
  1161 + { 0x900fa, 0x16a },
  1162 + { 0x900fb, 0x78 },
  1163 + { 0x900fc, 0x7a0 },
  1164 + { 0x900fd, 0x16a },
  1165 + { 0x900fe, 0x68 },
  1166 + { 0x900ff, 0x790 },
  1167 + { 0x90100, 0x16a },
  1168 + { 0x90101, 0x8 },
  1169 + { 0x90102, 0x8b10 },
  1170 + { 0x90103, 0x168 },
  1171 + { 0x90104, 0x8 },
  1172 + { 0x90105, 0xab10 },
  1173 + { 0x90106, 0x168 },
  1174 + { 0x90107, 0xa },
  1175 + { 0x90108, 0x408 },
  1176 + { 0x90109, 0x169 },
  1177 + { 0x9010a, 0x58 },
  1178 + { 0x9010b, 0x0 },
  1179 + { 0x9010c, 0x68 },
  1180 + { 0x9010d, 0x0 },
  1181 + { 0x9010e, 0x408 },
  1182 + { 0x9010f, 0x169 },
  1183 + { 0x90110, 0x0 },
  1184 + { 0x90111, 0x8b10 },
  1185 + { 0x90112, 0x168 },
  1186 + { 0x90113, 0x0 },
  1187 + { 0x90114, 0xab10 },
  1188 + { 0x90115, 0x168 },
  1189 + { 0x90116, 0x0 },
  1190 + { 0x90117, 0x1d8 },
  1191 + { 0x90118, 0x169 },
  1192 + { 0x90119, 0x80 },
  1193 + { 0x9011a, 0x790 },
  1194 + { 0x9011b, 0x16a },
  1195 + { 0x9011c, 0x18 },
  1196 + { 0x9011d, 0x7aa },
  1197 + { 0x9011e, 0x6a },
  1198 + { 0x9011f, 0xa },
  1199 + { 0x90120, 0x0 },
  1200 + { 0x90121, 0x1e9 },
  1201 + { 0x90122, 0x8 },
  1202 + { 0x90123, 0x8080 },
  1203 + { 0x90124, 0x108 },
  1204 + { 0x90125, 0xf },
  1205 + { 0x90126, 0x408 },
  1206 + { 0x90127, 0x169 },
  1207 + { 0x90128, 0xc },
  1208 + { 0x90129, 0x0 },
  1209 + { 0x9012a, 0x68 },
  1210 + { 0x9012b, 0x9 },
  1211 + { 0x9012c, 0x0 },
  1212 + { 0x9012d, 0x1a9 },
  1213 + { 0x9012e, 0x0 },
  1214 + { 0x9012f, 0x408 },
  1215 + { 0x90130, 0x169 },
  1216 + { 0x90131, 0x0 },
  1217 + { 0x90132, 0x8080 },
  1218 + { 0x90133, 0x108 },
  1219 + { 0x90134, 0x8 },
  1220 + { 0x90135, 0x7aa },
  1221 + { 0x90136, 0x6a },
  1222 + { 0x90137, 0x0 },
  1223 + { 0x90138, 0x8568 },
  1224 + { 0x90139, 0x108 },
  1225 + { 0x9013a, 0xb7 },
  1226 + { 0x9013b, 0x790 },
  1227 + { 0x9013c, 0x16a },
  1228 + { 0x9013d, 0x1f },
  1229 + { 0x9013e, 0x0 },
  1230 + { 0x9013f, 0x68 },
  1231 + { 0x90140, 0x8 },
  1232 + { 0x90141, 0x8558 },
  1233 + { 0x90142, 0x168 },
  1234 + { 0x90143, 0xf },
  1235 + { 0x90144, 0x408 },
  1236 + { 0x90145, 0x169 },
  1237 + { 0x90146, 0xd },
  1238 + { 0x90147, 0x0 },
  1239 + { 0x90148, 0x68 },
  1240 + { 0x90149, 0x0 },
  1241 + { 0x9014a, 0x408 },
  1242 + { 0x9014b, 0x169 },
  1243 + { 0x9014c, 0x0 },
  1244 + { 0x9014d, 0x8558 },
  1245 + { 0x9014e, 0x168 },
  1246 + { 0x9014f, 0x8 },
  1247 + { 0x90150, 0x3c8 },
  1248 + { 0x90151, 0x1a9 },
  1249 + { 0x90152, 0x3 },
  1250 + { 0x90153, 0x370 },
  1251 + { 0x90154, 0x129 },
  1252 + { 0x90155, 0x20 },
  1253 + { 0x90156, 0x2aa },
  1254 + { 0x90157, 0x9 },
  1255 + { 0x90158, 0x0 },
  1256 + { 0x90159, 0x400 },
  1257 + { 0x9015a, 0x10e },
  1258 + { 0x9015b, 0x8 },
  1259 + { 0x9015c, 0xe8 },
  1260 + { 0x9015d, 0x109 },
  1261 + { 0x9015e, 0x0 },
  1262 + { 0x9015f, 0x8140 },
  1263 + { 0x90160, 0x10c },
  1264 + { 0x90161, 0x10 },
  1265 + { 0x90162, 0x8138 },
  1266 + { 0x90163, 0x10c },
  1267 + { 0x90164, 0x8 },
  1268 + { 0x90165, 0x7c8 },
  1269 + { 0x90166, 0x101 },
  1270 + { 0x90167, 0x8 },
  1271 + { 0x90168, 0x448 },
  1272 + { 0x90169, 0x109 },
  1273 + { 0x9016a, 0xf },
  1274 + { 0x9016b, 0x7c0 },
  1275 + { 0x9016c, 0x109 },
  1276 + { 0x9016d, 0x0 },
  1277 + { 0x9016e, 0xe8 },
  1278 + { 0x9016f, 0x109 },
  1279 + { 0x90170, 0x47 },
  1280 + { 0x90171, 0x630 },
  1281 + { 0x90172, 0x109 },
  1282 + { 0x90173, 0x8 },
  1283 + { 0x90174, 0x618 },
  1284 + { 0x90175, 0x109 },
  1285 + { 0x90176, 0x8 },
  1286 + { 0x90177, 0xe0 },
  1287 + { 0x90178, 0x109 },
  1288 + { 0x90179, 0x0 },
  1289 + { 0x9017a, 0x7c8 },
  1290 + { 0x9017b, 0x109 },
  1291 + { 0x9017c, 0x8 },
  1292 + { 0x9017d, 0x8140 },
  1293 + { 0x9017e, 0x10c },
  1294 + { 0x9017f, 0x0 },
  1295 + { 0x90180, 0x1 },
  1296 + { 0x90181, 0x8 },
  1297 + { 0x90182, 0x8 },
  1298 + { 0x90183, 0x4 },
  1299 + { 0x90184, 0x8 },
  1300 + { 0x90185, 0x8 },
  1301 + { 0x90186, 0x7c8 },
  1302 + { 0x90187, 0x101 },
  1303 + { 0x90006, 0x0 },
  1304 + { 0x90007, 0x0 },
  1305 + { 0x90008, 0x8 },
  1306 + { 0x90009, 0x0 },
  1307 + { 0x9000a, 0x0 },
  1308 + { 0x9000b, 0x0 },
  1309 + { 0xd00e7, 0x400 },
  1310 + { 0x90017, 0x0 },
  1311 + { 0x9001f, 0x29 },
  1312 + { 0x90026, 0x6a },
  1313 + { 0x400d0, 0x0 },
  1314 + { 0x400d1, 0x101 },
  1315 + { 0x400d2, 0x105 },
  1316 + { 0x400d3, 0x107 },
  1317 + { 0x400d4, 0x10f },
  1318 + { 0x400d5, 0x202 },
  1319 + { 0x400d6, 0x20a },
  1320 + { 0x400d7, 0x20b },
  1321 + { 0x2003a, 0x2 },
  1322 + { 0x2000b, 0x32 },
  1323 + { 0x2000c, 0x64 },
  1324 + { 0x2000d, 0x3e8 },
  1325 + { 0x2000e, 0x2c },
  1326 + { 0x12000b, 0xc },
  1327 + { 0x12000c, 0x19 },
  1328 + { 0x12000d, 0xfa },
  1329 + { 0x12000e, 0x10 },
  1330 + { 0x22000b, 0x3 },
  1331 + { 0x22000c, 0x6 },
  1332 + { 0x22000d, 0x3e },
  1333 + { 0x22000e, 0x10 },
  1334 + { 0x9000c, 0x0 },
  1335 + { 0x9000d, 0x173 },
  1336 + { 0x9000e, 0x60 },
  1337 + { 0x9000f, 0x6110 },
  1338 + { 0x90010, 0x2152 },
  1339 + { 0x90011, 0xdfbd },
  1340 + { 0x90012, 0x2060 },
  1341 + { 0x90013, 0x6152 },
  1342 + { 0x20010, 0x5a },
  1343 + { 0x20011, 0x3 },
  1344 + { 0x120010, 0x5a },
  1345 + { 0x120011, 0x3 },
  1346 + { 0x220010, 0x5a },
  1347 + { 0x220011, 0x3 },
  1348 + { 0x40080, 0xe0 },
  1349 + { 0x40081, 0x12 },
  1350 + { 0x40082, 0xe0 },
  1351 + { 0x40083, 0x12 },
  1352 + { 0x40084, 0xe0 },
  1353 + { 0x40085, 0x12 },
  1354 + { 0x140080, 0xe0 },
  1355 + { 0x140081, 0x12 },
  1356 + { 0x140082, 0xe0 },
  1357 + { 0x140083, 0x12 },
  1358 + { 0x140084, 0xe0 },
  1359 + { 0x140085, 0x12 },
  1360 + { 0x240080, 0xe0 },
  1361 + { 0x240081, 0x12 },
  1362 + { 0x240082, 0xe0 },
  1363 + { 0x240083, 0x12 },
  1364 + { 0x240084, 0xe0 },
  1365 + { 0x240085, 0x12 },
  1366 + { 0x400fd, 0xf },
  1367 + { 0x10011, 0x1 },
  1368 + { 0x10012, 0x1 },
  1369 + { 0x10013, 0x180 },
  1370 + { 0x10018, 0x1 },
  1371 + { 0x10002, 0x6209 },
  1372 + { 0x100b2, 0x1 },
  1373 + { 0x101b4, 0x1 },
  1374 + { 0x102b4, 0x1 },
  1375 + { 0x103b4, 0x1 },
  1376 + { 0x104b4, 0x1 },
  1377 + { 0x105b4, 0x1 },
  1378 + { 0x106b4, 0x1 },
  1379 + { 0x107b4, 0x1 },
  1380 + { 0x108b4, 0x1 },
  1381 + { 0x11011, 0x1 },
  1382 + { 0x11012, 0x1 },
  1383 + { 0x11013, 0x180 },
  1384 + { 0x11018, 0x1 },
  1385 + { 0x11002, 0x6209 },
  1386 + { 0x110b2, 0x1 },
  1387 + { 0x111b4, 0x1 },
  1388 + { 0x112b4, 0x1 },
  1389 + { 0x113b4, 0x1 },
  1390 + { 0x114b4, 0x1 },
  1391 + { 0x115b4, 0x1 },
  1392 + { 0x116b4, 0x1 },
  1393 + { 0x117b4, 0x1 },
  1394 + { 0x118b4, 0x1 },
  1395 + { 0x20089, 0x1 },
  1396 + { 0x20088, 0x19 },
  1397 + { 0xc0080, 0x2 },
  1398 + { 0xd0000, 0x1 }
  1399 +};
  1400 +
  1401 +struct dram_fsp_msg ddr_dram_fsp_msg[] = {
  1402 + {
  1403 + /* P0 1600mts 1D */
  1404 + .drate = 1600,
  1405 + .fw_type = FW_1D_IMAGE,
  1406 + .fsp_cfg = ddr_fsp0_cfg,
  1407 + .fsp_cfg_num = ARRAY_SIZE(ddr_fsp0_cfg),
  1408 + },
  1409 + {
  1410 + /* P1 400mts 1D */
  1411 + .drate = 400,
  1412 + .fw_type = FW_1D_IMAGE,
  1413 + .fsp_cfg = ddr_fsp1_cfg,
  1414 + .fsp_cfg_num = ARRAY_SIZE(ddr_fsp1_cfg),
  1415 + },
  1416 + {
  1417 + /* P2 100mts 1D */
  1418 + .drate = 100,
  1419 + .fw_type = FW_1D_IMAGE,
  1420 + .fsp_cfg = ddr_fsp2_cfg,
  1421 + .fsp_cfg_num = ARRAY_SIZE(ddr_fsp2_cfg),
  1422 + },
  1423 + {
  1424 + /* P0 1600mts 2D */
  1425 + .drate = 1600,
  1426 + .fw_type = FW_2D_IMAGE,
  1427 + .fsp_cfg = ddr_fsp0_2d_cfg,
  1428 + .fsp_cfg_num = ARRAY_SIZE(ddr_fsp0_2d_cfg),
  1429 + },
  1430 +};
  1431 +
  1432 +/* ddr timing config params */
  1433 +struct dram_timing_info dram_timing = {
  1434 + .ddrc_cfg = ddr_ddrc_cfg,
  1435 + .ddrc_cfg_num = ARRAY_SIZE(ddr_ddrc_cfg),
  1436 + .ddrphy_cfg = ddr_ddrphy_cfg,
  1437 + .ddrphy_cfg_num = ARRAY_SIZE(ddr_ddrphy_cfg),
  1438 + .fsp_msg = ddr_dram_fsp_msg,
  1439 + .fsp_msg_num = ARRAY_SIZE(ddr_dram_fsp_msg),
  1440 + .ddrphy_trained_csr = ddr_ddrphy_trained_csr,
  1441 + .ddrphy_trained_csr_num = ARRAY_SIZE(ddr_ddrphy_trained_csr),
  1442 + .ddrphy_pie = ddr_phy_pie,
  1443 + .ddrphy_pie_num = ARRAY_SIZE(ddr_phy_pie),
  1444 + .fsp_table = { 1600, 400, 100, },
  1445 +};
board/freescale/imx8mn_evk/spl.c
... ... @@ -189,10 +189,15 @@
189 189 /* BUCKxOUT_DVS0/1 control BUCK123 output */
190 190 pmic_reg_write(p, PCA9450_BUCK123_DVS, 0x29);
191 191  
  192 +#ifdef CONFIG_IMX8MN_LOW_DRIVE_MODE
  193 + /* Set VDD_SOC/VDD_DRAM to 0.8v for low drive mode */
  194 + pmic_reg_write(p, PCA9450_BUCK1OUT_DVS0, 0x10);
  195 +#else
192 196 /* increase VDD_SOC/VDD_DRAM to typical value 0.95V before first DRAM access */
  197 + pmic_reg_write(p, PCA9450_BUCK1OUT_DVS0, 0x1C);
  198 +#endif
193 199 /* Set DVS1 to 0.85v for suspend */
194 200 /* Enable DVS control through PMIC_STBY_REQ and set B1_ENMODE=1 (ON by PMIC_ON_REQ=H) */
195   - pmic_reg_write(p, PCA9450_BUCK1OUT_DVS0, 0x1C);
196 201 pmic_reg_write(p, PCA9450_BUCK1OUT_DVS1, 0x14);
197 202 pmic_reg_write(p, PCA9450_BUCK1CTRL, 0x59);
198 203  
199 204  
200 205  
201 206  
... ... @@ -230,18 +235,19 @@
230 235 /* Set VDD_ARM to typical value 0.85v for 1.2Ghz */
231 236 pmic_reg_write(p, BD71837_BUCK2_VOLT_RUN, 0xf);
232 237  
233   -#ifdef CONFIG_IMX8M_DDR4
  238 +#ifdef CONFIG_IMX8MN_LOW_DRIVE_MODE
  239 + /* Set VDD_SOC/VDD_DRAM to typical value 0.8v for low drive mode */
  240 + pmic_reg_write(p, BD71837_BUCK1_VOLT_RUN, 0xa);
  241 +#else
234 242 /* Set VDD_SOC/VDD_DRAM to typical value 0.85v for nominal mode */
235 243 pmic_reg_write(p, BD71837_BUCK1_VOLT_RUN, 0xf);
236   -#endif
  244 +#endif /* CONFIG_IMX8MN_LOW_DRIVE_MODE */
237 245  
238 246 /* Set VDD_SOC 0.85v for suspend */
239 247 pmic_reg_write(p, BD71837_BUCK1_VOLT_SUSP, 0xf);
240 248  
241   -#ifdef CONFIG_IMX8M_DDR4
242 249 /* increase NVCC_DRAM_1V2 to 1.2v for DDR4 */
243 250 pmic_reg_write(p, BD71837_BUCK8_VOLT, 0x28);
244   -#endif
245 251  
246 252 /* lock the PMIC regs */
247 253 pmic_reg_write(p, BD71837_REGLOCK, 0x11);
configs/imx8mn_ddr4_evk_ld_defconfig
  1 +CONFIG_ARM=y
  2 +CONFIG_SPL_SYS_ICACHE_OFF=y
  3 +CONFIG_SPL_SYS_DCACHE_OFF=y
  4 +CONFIG_ARCH_IMX8M=y
  5 +CONFIG_SYS_TEXT_BASE=0x40200000
  6 +CONFIG_SPL_GPIO_SUPPORT=y
  7 +CONFIG_SPL_LIBCOMMON_SUPPORT=y
  8 +CONFIG_SPL_LIBGENERIC_SUPPORT=y
  9 +CONFIG_SYS_MALLOC_F_LEN=0x2000
  10 +CONFIG_SYS_I2C_MXC_I2C1=y
  11 +CONFIG_SYS_I2C_MXC_I2C2=y
  12 +CONFIG_SYS_I2C_MXC_I2C3=y
  13 +CONFIG_ENV_SIZE=0x1000
  14 +CONFIG_ENV_OFFSET=0x400000
  15 +CONFIG_ENV_SECT_SIZE=0x10000
  16 +CONFIG_DM_GPIO=y
  17 +CONFIG_TARGET_IMX8MN_DDR4_EVK=y
  18 +CONFIG_ARCH_MISC_INIT=y
  19 +CONFIG_SPL_SERIAL_SUPPORT=y
  20 +CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
  21 +CONFIG_SPL=y
  22 +CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x48000000
  23 +CONFIG_CSF_SIZE=0x2000
  24 +CONFIG_SPL_TEXT_BASE=0x912000
  25 +CONFIG_FIT=y
  26 +CONFIG_FIT_EXTERNAL_OFFSET=0x3000
  27 +CONFIG_SPL_LOAD_FIT=y
  28 +CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-imx/mkimage_fit_atf.sh"
  29 +CONFIG_OF_SYSTEM_SETUP=y
  30 +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/imx8m/imximage-8mn-ddr4.cfg"
  31 +CONFIG_DEFAULT_FDT_FILE="imx8mn-ddr4-evk.dtb"
  32 +CONFIG_BOARD_LATE_INIT=y
  33 +CONFIG_BOARD_EARLY_INIT_F=y
  34 +CONFIG_SPL_BOARD_INIT=y
  35 +CONFIG_SPL_BOOTROM_SUPPORT=y
  36 +CONFIG_SPL_SEPARATE_BSS=y
  37 +CONFIG_SPL_I2C_SUPPORT=y
  38 +CONFIG_SPL_POWER_SUPPORT=y
  39 +CONFIG_NR_DRAM_BANKS=2
  40 +CONFIG_HUSH_PARSER=y
  41 +CONFIG_SYS_PROMPT="u-boot=> "
  42 +# CONFIG_CMD_EXPORTENV is not set
  43 +# CONFIG_CMD_IMPORTENV is not set
  44 +CONFIG_CMD_ERASEENV=y
  45 +# CONFIG_CMD_CRC32 is not set
  46 +# CONFIG_BOOTM_NETBSD is not set
  47 +CONFIG_CMD_CLK=y
  48 +CONFIG_CMD_FUSE=y
  49 +CONFIG_CMD_GPIO=y
  50 +CONFIG_CMD_I2C=y
  51 +CONFIG_CMD_MMC=y
  52 +CONFIG_CMD_DHCP=y
  53 +CONFIG_CMD_MII=y
  54 +CONFIG_CMD_PING=y
  55 +CONFIG_CMD_CACHE=y
  56 +CONFIG_CMD_REGULATOR=y
  57 +CONFIG_CMD_MEMTEST=y
  58 +CONFIG_CMD_EXT2=y
  59 +CONFIG_CMD_EXT4=y
  60 +CONFIG_CMD_EXT4_WRITE=y
  61 +CONFIG_CMD_FAT=y
  62 +CONFIG_CMD_SF=y
  63 +CONFIG_OF_CONTROL=y
  64 +CONFIG_DEFAULT_DEVICE_TREE="imx8mn-ddr4-evk"
  65 +CONFIG_ENV_IS_IN_MMC=y
  66 +CONFIG_ENV_IS_IN_SPI_FLASH=y
  67 +CONFIG_ENV_IS_NOWHERE=y
  68 +CONFIG_SYS_RELOC_GD_ENV_ADDR=y
  69 +CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
  70 +CONFIG_CLK_COMPOSITE_CCF=y
  71 +CONFIG_CLK_IMX8MN=y
  72 +CONFIG_MXC_GPIO=y
  73 +CONFIG_FASTBOOT=y
  74 +CONFIG_USB_FUNCTION_FASTBOOT=y
  75 +CONFIG_CMD_FASTBOOT=y
  76 +CONFIG_ANDROID_BOOT_IMAGE=y
  77 +CONFIG_FASTBOOT_UUU_SUPPORT=y
  78 +CONFIG_FASTBOOT_BUF_ADDR=0x42800000
  79 +CONFIG_FASTBOOT_BUF_SIZE=0x40000000
  80 +CONFIG_FASTBOOT_FLASH=y
  81 +
  82 +CONFIG_DM_I2C=y
  83 +CONFIG_SYS_I2C_MXC=y
  84 +CONFIG_DM_MMC=y
  85 +CONFIG_MMC_IO_VOLTAGE=y
  86 +CONFIG_MMC_UHS_SUPPORT=y
  87 +CONFIG_MMC_HS400_SUPPORT=y
  88 +CONFIG_MMC_HS400_ES_SUPPORT=y
  89 +CONFIG_EFI_PARTITION=y
  90 +CONFIG_SUPPORT_EMMC_BOOT=y
  91 +CONFIG_FSL_ESDHC_IMX=y
  92 +CONFIG_DM_SPI_FLASH=y
  93 +CONFIG_DM_SPI=y
  94 +CONFIG_FSL_FSPI=y
  95 +CONFIG_SPI=y
  96 +CONFIG_SPI_FLASH=y
  97 +CONFIG_SPI_FLASH_BAR=y
  98 +CONFIG_SPI_FLASH_STMICRO=y
  99 +CONFIG_SF_DEFAULT_BUS=0
  100 +CONFIG_SF_DEFAULT_CS=0
  101 +CONFIG_SF_DEFAULT_SPEED=40000000
  102 +CONFIG_SF_DEFAULT_MODE=0
  103 +
  104 +CONFIG_PHYLIB=y
  105 +CONFIG_PHY_ATHEROS=y
  106 +CONFIG_DM_ETH=y
  107 +CONFIG_PHY_GIGE=y
  108 +CONFIG_FEC_MXC=y
  109 +CONFIG_MII=y
  110 +CONFIG_PINCTRL=y
  111 +CONFIG_PINCTRL_IMX8M=y
  112 +CONFIG_DM_REGULATOR=y
  113 +CONFIG_DM_REGULATOR_FIXED=y
  114 +CONFIG_DM_REGULATOR_GPIO=y
  115 +CONFIG_MXC_UART=y
  116 +CONFIG_SYSRESET=y
  117 +CONFIG_SYSRESET_PSCI=y
  118 +CONFIG_DM_THERMAL=y
  119 +CONFIG_NXP_TMU=y
  120 +CONFIG_USB_TCPC=y
  121 +CONFIG_USB=y
  122 +CONFIG_USB_GADGET=y
  123 +CONFIG_DM_USB=y
  124 +CONFIG_CI_UDC=y
  125 +CONFIG_USB_EHCI_HCD=y
  126 +
  127 +CONFIG_USB_GADGET_MANUFACTURER="FSL"
  128 +CONFIG_USB_GADGET_VENDOR_NUM=0x0525
  129 +CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5
  130 +
  131 +CONFIG_OF_LIBFDT_OVERLAY=y
  132 +
  133 +CONFIG_REGMAP=y
  134 +CONFIG_SYSCON=y
  135 +CONFIG_DM_RESET=y
  136 +CONFIG_RESET_DISPMIX=y
  137 +CONFIG_VIDEO_IMX_SEC_DSI=y
  138 +CONFIG_DM_VIDEO=y
  139 +CONFIG_VIDEO_LCD_RAYDIUM_RM67191=y
  140 +CONFIG_VIDEO_ADV7535=y
  141 +CONFIG_SYS_WHITE_ON_BLACK=y
  142 +
  143 +CONFIG_IMX8MN_LOW_DRIVE_MODE=y
configs/imx8mn_evk_ld_defconfig
  1 +CONFIG_ARM=y
  2 +CONFIG_SPL_SYS_ICACHE_OFF=y
  3 +CONFIG_SPL_SYS_DCACHE_OFF=y
  4 +CONFIG_ARCH_IMX8M=y
  5 +CONFIG_SYS_TEXT_BASE=0x40200000
  6 +CONFIG_SPL_GPIO_SUPPORT=y
  7 +CONFIG_SPL_LIBCOMMON_SUPPORT=y
  8 +CONFIG_SPL_LIBGENERIC_SUPPORT=y
  9 +CONFIG_SYS_MALLOC_F_LEN=0x2000
  10 +CONFIG_SYS_I2C_MXC_I2C1=y
  11 +CONFIG_SYS_I2C_MXC_I2C2=y
  12 +CONFIG_SYS_I2C_MXC_I2C3=y
  13 +CONFIG_ENV_SIZE=0x1000
  14 +CONFIG_ENV_OFFSET=0x400000
  15 +CONFIG_ENV_SECT_SIZE=0x10000
  16 +CONFIG_DM_GPIO=y
  17 +CONFIG_TARGET_IMX8MN_EVK=y
  18 +CONFIG_ARCH_MISC_INIT=y
  19 +CONFIG_SPL_SERIAL_SUPPORT=y
  20 +CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
  21 +CONFIG_SPL=y
  22 +CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x48000000
  23 +CONFIG_CSF_SIZE=0x2000
  24 +CONFIG_SPL_TEXT_BASE=0x912000
  25 +CONFIG_FIT=y
  26 +CONFIG_FIT_EXTERNAL_OFFSET=0x3000
  27 +CONFIG_SPL_LOAD_FIT=y
  28 +CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-imx/mkimage_fit_atf.sh"
  29 +CONFIG_OF_SYSTEM_SETUP=y
  30 +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/imx8m/imximage-8mn-lpddr4.cfg"
  31 +CONFIG_DEFAULT_FDT_FILE="imx8mn-evk.dtb"
  32 +CONFIG_BOARD_LATE_INIT=y
  33 +CONFIG_BOARD_EARLY_INIT_F=y
  34 +CONFIG_SPL_BOARD_INIT=y
  35 +CONFIG_SPL_BOOTROM_SUPPORT=y
  36 +CONFIG_SPL_SEPARATE_BSS=y
  37 +CONFIG_SPL_I2C_SUPPORT=y
  38 +CONFIG_SPL_POWER_SUPPORT=y
  39 +CONFIG_NR_DRAM_BANKS=2
  40 +CONFIG_HUSH_PARSER=y
  41 +CONFIG_SYS_PROMPT="u-boot=> "
  42 +# CONFIG_CMD_EXPORTENV is not set
  43 +# CONFIG_CMD_IMPORTENV is not set
  44 +CONFIG_CMD_ERASEENV=y
  45 +# CONFIG_CMD_CRC32 is not set
  46 +# CONFIG_BOOTM_NETBSD is not set
  47 +CONFIG_CMD_CLK=y
  48 +CONFIG_CMD_FUSE=y
  49 +CONFIG_CMD_GPIO=y
  50 +CONFIG_CMD_I2C=y
  51 +CONFIG_CMD_MMC=y
  52 +CONFIG_CMD_DHCP=y
  53 +CONFIG_CMD_MII=y
  54 +CONFIG_CMD_PING=y
  55 +CONFIG_CMD_CACHE=y
  56 +CONFIG_CMD_REGULATOR=y
  57 +CONFIG_CMD_MEMTEST=y
  58 +CONFIG_CMD_EXT2=y
  59 +CONFIG_CMD_EXT4=y
  60 +CONFIG_CMD_EXT4_WRITE=y
  61 +CONFIG_CMD_FAT=y
  62 +CONFIG_CMD_SF=y
  63 +CONFIG_OF_CONTROL=y
  64 +CONFIG_DEFAULT_DEVICE_TREE="imx8mn-evk"
  65 +CONFIG_ENV_IS_IN_MMC=y
  66 +CONFIG_ENV_IS_IN_SPI_FLASH=y
  67 +CONFIG_ENV_IS_NOWHERE=y
  68 +CONFIG_SYS_RELOC_GD_ENV_ADDR=y
  69 +CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
  70 +CONFIG_CLK_COMPOSITE_CCF=y
  71 +CONFIG_CLK_IMX8MN=y
  72 +CONFIG_MXC_GPIO=y
  73 +CONFIG_FASTBOOT=y
  74 +CONFIG_USB_FUNCTION_FASTBOOT=y
  75 +CONFIG_CMD_FASTBOOT=y
  76 +CONFIG_ANDROID_BOOT_IMAGE=y
  77 +CONFIG_FASTBOOT_UUU_SUPPORT=y
  78 +CONFIG_FASTBOOT_BUF_ADDR=0x42800000
  79 +CONFIG_FASTBOOT_BUF_SIZE=0x40000000
  80 +CONFIG_FASTBOOT_FLASH=y
  81 +
  82 +CONFIG_DM_I2C=y
  83 +CONFIG_SYS_I2C_MXC=y
  84 +CONFIG_DM_MMC=y
  85 +CONFIG_MMC_IO_VOLTAGE=y
  86 +CONFIG_MMC_UHS_SUPPORT=y
  87 +CONFIG_MMC_HS400_SUPPORT=y
  88 +CONFIG_MMC_HS400_ES_SUPPORT=y
  89 +CONFIG_EFI_PARTITION=y
  90 +CONFIG_SUPPORT_EMMC_BOOT=y
  91 +CONFIG_FSL_ESDHC_IMX=y
  92 +CONFIG_DM_SPI_FLASH=y
  93 +CONFIG_DM_SPI=y
  94 +CONFIG_FSL_FSPI=y
  95 +CONFIG_SPI=y
  96 +CONFIG_SPI_FLASH=y
  97 +CONFIG_SPI_FLASH_BAR=y
  98 +CONFIG_SPI_FLASH_STMICRO=y
  99 +CONFIG_SF_DEFAULT_BUS=0
  100 +CONFIG_SF_DEFAULT_CS=0
  101 +CONFIG_SF_DEFAULT_SPEED=40000000
  102 +CONFIG_SF_DEFAULT_MODE=0
  103 +
  104 +CONFIG_PHYLIB=y
  105 +CONFIG_PHY_ATHEROS=y
  106 +CONFIG_DM_ETH=y
  107 +CONFIG_PHY_GIGE=y
  108 +CONFIG_FEC_MXC=y
  109 +CONFIG_MII=y
  110 +CONFIG_PINCTRL=y
  111 +CONFIG_PINCTRL_IMX8M=y
  112 +CONFIG_DM_REGULATOR=y
  113 +CONFIG_DM_REGULATOR_FIXED=y
  114 +CONFIG_DM_REGULATOR_GPIO=y
  115 +CONFIG_MXC_UART=y
  116 +CONFIG_SYSRESET=y
  117 +CONFIG_SYSRESET_PSCI=y
  118 +CONFIG_DM_THERMAL=y
  119 +CONFIG_NXP_TMU=y
  120 +CONFIG_USB_TCPC=y
  121 +CONFIG_USB=y
  122 +CONFIG_USB_GADGET=y
  123 +CONFIG_DM_USB=y
  124 +CONFIG_CI_UDC=y
  125 +CONFIG_USB_EHCI_HCD=y
  126 +
  127 +CONFIG_USB_GADGET_MANUFACTURER="FSL"
  128 +CONFIG_USB_GADGET_VENDOR_NUM=0x0525
  129 +CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5
  130 +
  131 +CONFIG_OF_LIBFDT_OVERLAY=y
  132 +
  133 +CONFIG_REGMAP=y
  134 +CONFIG_SYSCON=y
  135 +CONFIG_DM_RESET=y
  136 +CONFIG_RESET_DISPMIX=y
  137 +CONFIG_VIDEO_IMX_SEC_DSI=y
  138 +CONFIG_DM_VIDEO=y
  139 +CONFIG_VIDEO_LCD_RAYDIUM_RM67191=y
  140 +CONFIG_VIDEO_ADV7535=y
  141 +CONFIG_SYS_WHITE_ON_BLACK=y
  142 +
  143 +CONFIG_IMX8MN_LOW_DRIVE_MODE=y