Eric Lee / smarc-uboot

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Commit 13d2079a2d74797fe665ccf94109b06aaccf1b45

Authored by Ye Li
1 parent 8c8da023f9
Exists in smarc-imx_v2015.04_4.1.15_1.0.0_ga and in 1 other branch imx_v2015.04_4.1.15_1.0.0_ga

MLK-12492-1 mx6: fix type style problems introduced by patch MLK-12483 

Some type style problems found by review-commits for previous patch
MLK-12483, fix them in this patch and re-check.

Signed-off-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit 8ada91778f7f28dd33b80f515a35d09c1398933c)

Showing 9 changed files with 106 additions and 105 deletions Side-by-side Diff

arch/arm/cpu/armv7/mx6/module_fuse.c
Diff comments   View file @ 13d2079
... ... @@ -14,14 +14,14 @@
14 14  
15 15 struct fuse_entry_desc {
16 16 enum fuse_module_type module;
17   - const char* node_path;
  17 + const char *node_path;
18 18 u32 fuse_word_offset;
19 19 u32 fuse_bit_offset;
20 20 u32 status;
21 21 };
22 22  
23 23 static struct fuse_entry_desc mx6_fuse_descs[] = {
24   -#ifdef CONFIG_MX6UL
  24 +#ifdef CONFIG_MX6UL
25 25 {MX6_MODULE_TSC, "/soc/aips-bus@02000000/tsc@02040000", 0x430, 22},
26 26 {MX6_MODULE_ADC2, "/soc/aips-bus@02100000/adc@0219c000", 0x430, 23},
27 27 {MX6_MODULE_SIM1, "/soc/aips-bus@02100000/sim@0218c000", 0x430, 24},
28 28  
29 29  
30 30  
31 31  
... ... @@ -83,23 +83,22 @@
83 83 void print_fuse_status()
84 84 {
85 85 u32 i, reg;
86   -
  86 +
87 87 for (i = 0; i < ARRAY_SIZE(mx6_fuse_descs); i++) {
88 88 reg = readl(OCOTP_BASE_ADDR + mx6_fuse_descs[i].fuse_word_offset);
89   - if (reg & (1 << mx6_fuse_descs[i].fuse_bit_offset)) {
  89 + if (reg & (1 << mx6_fuse_descs[i].fuse_bit_offset))
90 90 printf("%s, disabled\n", mx6_fuse_descs[i].node_path);
91   - }
92 91 }
93 92 }
94 93  
95 94 void simulate_fuse()
96 95 {
97 96 u32 i, reg;
98   -
  97 +
99 98 for (i = 0; i < ARRAY_SIZE(mx6_fuse_descs); i++) {
100 99 if (MX6_MODULE_SD2 == mx6_fuse_descs[i].module)
101 100 continue;
102   -
  101 +
103 102 reg = readl(OCOTP_BASE_ADDR + mx6_fuse_descs[i].fuse_word_offset);
104 103 reg |= (1 << mx6_fuse_descs[i].fuse_bit_offset);
105 104 writel(reg, OCOTP_BASE_ADDR + mx6_fuse_descs[i].fuse_word_offset);
... ... @@ -113,7 +112,7 @@
113 112 u32 i, reg;
114 113 const char *status = "disabled";
115 114 int rc;
116   -
  115 +
117 116 for (i = 0; i < ARRAY_SIZE(mx6_fuse_descs); i++) {
118 117 reg = readl(OCOTP_BASE_ADDR + mx6_fuse_descs[i].fuse_word_offset);
119 118 if (reg & (1 << mx6_fuse_descs[i].fuse_bit_offset)) {
120 119  
121 120  
122 121  
123 122  
124 123  
125 124  
126 125  
127 126  
128 127  
... ... @@ -147,67 +146,67 @@
147 146 u32 mx6_esdhc_fused(u32 base_addr)
148 147 {
149 148 switch (base_addr) {
150   - case USDHC1_BASE_ADDR:
151   - return check_module_fused(MX6_MODULE_SD1);
152   - case USDHC2_BASE_ADDR:
153   - return check_module_fused(MX6_MODULE_SD2);
154   -#ifdef USDHC3_BASE_ADDR
155   - case USDHC3_BASE_ADDR:
156   - return check_module_fused(MX6_MODULE_SD3);
  149 + case USDHC1_BASE_ADDR:
  150 + return check_module_fused(MX6_MODULE_SD1);
  151 + case USDHC2_BASE_ADDR:
  152 + return check_module_fused(MX6_MODULE_SD2);
  153 +#ifdef USDHC3_BASE_ADDR
  154 + case USDHC3_BASE_ADDR:
  155 + return check_module_fused(MX6_MODULE_SD3);
157 156 #endif
158   -#ifdef USDHC4_BASE_ADDR
159   - case USDHC4_BASE_ADDR:
160   - return check_module_fused(MX6_MODULE_SD4);
  157 +#ifdef USDHC4_BASE_ADDR
  158 + case USDHC4_BASE_ADDR:
  159 + return check_module_fused(MX6_MODULE_SD4);
161 160 #endif
162   - default:
163   - return 0;
  161 + default:
  162 + return 0;
164 163 }
165 164 }
166 165  
167 166 u32 mx6_ecspi_fused(u32 base_addr)
168 167 {
169 168 switch (base_addr) {
170   - case ECSPI1_BASE_ADDR:
171   - return check_module_fused(MX6_MODULE_ECSPI1);
172   - case ECSPI2_BASE_ADDR:
173   - return check_module_fused(MX6_MODULE_ECSPI2);
174   - case ECSPI3_BASE_ADDR:
175   - return check_module_fused(MX6_MODULE_ECSPI3);
176   - case ECSPI4_BASE_ADDR:
177   - return check_module_fused(MX6_MODULE_ECSPI4);
  169 + case ECSPI1_BASE_ADDR:
  170 + return check_module_fused(MX6_MODULE_ECSPI1);
  171 + case ECSPI2_BASE_ADDR:
  172 + return check_module_fused(MX6_MODULE_ECSPI2);
  173 + case ECSPI3_BASE_ADDR:
  174 + return check_module_fused(MX6_MODULE_ECSPI3);
  175 + case ECSPI4_BASE_ADDR:
  176 + return check_module_fused(MX6_MODULE_ECSPI4);
178 177 #ifdef ECSPI5_BASE_ADDR
179   - case ECSPI5_BASE_ADDR:
180   - return check_module_fused(MX6_MODULE_ECSPI5);
  178 + case ECSPI5_BASE_ADDR:
  179 + return check_module_fused(MX6_MODULE_ECSPI5);
181 180 #endif
182   - default:
183   - return 0;
  181 + default:
  182 + return 0;
184 183 }
185 184 }
186 185  
187 186 u32 mx6_uart_fused(u32 base_addr)
188 187 {
189 188 switch (base_addr) {
190   - case UART1_BASE:
191   - return check_module_fused(MX6_MODULE_UART1);
192   - case UART2_BASE:
193   - return check_module_fused(MX6_MODULE_UART2);
194   - case UART3_BASE:
195   - return check_module_fused(MX6_MODULE_UART3);
196   - case UART4_BASE:
197   - return check_module_fused(MX6_MODULE_UART4);
198   - case UART5_BASE:
199   - return check_module_fused(MX6_MODULE_UART5);
  189 + case UART1_BASE:
  190 + return check_module_fused(MX6_MODULE_UART1);
  191 + case UART2_BASE:
  192 + return check_module_fused(MX6_MODULE_UART2);
  193 + case UART3_BASE:
  194 + return check_module_fused(MX6_MODULE_UART3);
  195 + case UART4_BASE:
  196 + return check_module_fused(MX6_MODULE_UART4);
  197 + case UART5_BASE:
  198 + return check_module_fused(MX6_MODULE_UART5);
200 199 #ifdef UART6_BASE_ADDR
201   - case UART6_BASE_ADDR:
202   - return check_module_fused(MX6_MODULE_UART6);
  200 + case UART6_BASE_ADDR:
  201 + return check_module_fused(MX6_MODULE_UART6);
203 202 #endif
204 203 #ifdef UART7_IPS_BASE_ADDR
205   - case UART7_IPS_BASE_ADDR:
206   - return check_module_fused(MX6_MODULE_UART7);
  204 + case UART7_IPS_BASE_ADDR:
  205 + return check_module_fused(MX6_MODULE_UART7);
207 206 #endif
208 207 #ifdef UART8_IPS_BASE_ADDR
209   - case UART8_IPS_BASE_ADDR:
210   - return check_module_fused(MX6_MODULE_UART8);
  208 + case UART8_IPS_BASE_ADDR:
  209 + return check_module_fused(MX6_MODULE_UART8);
211 210 #endif
212 211 }
213 212  
214 213  
215 214  
216 215  
... ... @@ -223,32 +222,32 @@
223 222 u32 mx6_qspi_fused(u32 base_addr)
224 223 {
225 224 switch (base_addr) {
226   -#ifdef QSPI1_BASE_ADDR
227   - case QSPI1_BASE_ADDR:
228   - return check_module_fused(MX6_MODULE_QSPI1);
  225 +#ifdef QSPI1_BASE_ADDR
  226 + case QSPI1_BASE_ADDR:
  227 + return check_module_fused(MX6_MODULE_QSPI1);
229 228 #endif
230 229  
231 230 #ifdef QSPI2_BASE_ADDR
232   - case QSPI2_BASE_ADDR:
233   - return check_module_fused(MX6_MODULE_QSPI2);
  231 + case QSPI2_BASE_ADDR:
  232 + return check_module_fused(MX6_MODULE_QSPI2);
234 233 #endif
235   - default:
236   - return 0;
  234 + default:
  235 + return 0;
237 236 }
238 237 }
239 238  
240 239 u32 mx6_i2c_fused(u32 base_addr)
241 240 {
242 241 switch (base_addr) {
243   - case I2C1_BASE_ADDR:
244   - return check_module_fused(MX6_MODULE_I2C1);
245   - case I2C2_BASE_ADDR:
246   - return check_module_fused(MX6_MODULE_I2C2);
247   - case I2C3_BASE_ADDR:
248   - return check_module_fused(MX6_MODULE_I2C3);
249   -#ifdef I2C4_BASE_ADDR
250   - case I2C4_BASE_ADDR:
251   - return check_module_fused(MX6_MODULE_I2C4);
  242 + case I2C1_BASE_ADDR:
  243 + return check_module_fused(MX6_MODULE_I2C1);
  244 + case I2C2_BASE_ADDR:
  245 + return check_module_fused(MX6_MODULE_I2C2);
  246 + case I2C3_BASE_ADDR:
  247 + return check_module_fused(MX6_MODULE_I2C3);
  248 +#ifdef I2C4_BASE_ADDR
  249 + case I2C4_BASE_ADDR:
  250 + return check_module_fused(MX6_MODULE_I2C4);
252 251 #endif
253 252 }
254 253  
255 254  
256 255  
... ... @@ -258,14 +257,14 @@
258 257 u32 mx6_enet_fused(u32 base_addr)
259 258 {
260 259 switch (base_addr) {
261   - case ENET_BASE_ADDR:
262   - return check_module_fused(MX6_MODULE_ENET1);
  260 + case ENET_BASE_ADDR:
  261 + return check_module_fused(MX6_MODULE_ENET1);
263 262 #ifdef ENET2_BASE_ADDR
264   - case ENET2_BASE_ADDR:
265   - return check_module_fused(MX6_MODULE_ENET2);
  263 + case ENET2_BASE_ADDR:
  264 + return check_module_fused(MX6_MODULE_ENET2);
266 265 #endif
267   - default:
268   - return 0;
  266 + default:
  267 + return 0;
269 268 }
270 269 }
arch/arm/include/asm/arch-mx6/module_fuse.h
Diff comments   View file @ 13d2079
... ... @@ -66,30 +66,38 @@
66 66 };
67 67  
68 68 #if !defined(CONFIG_MODULE_FUSE)
69   -static inline u32 check_module_fused(enum fuse_module_type module) {
  69 +static inline u32 check_module_fused(enum fuse_module_type module)
  70 +{
70 71 return 0;
71 72 };
72 73  
73   -static inline u32 mx6_esdhc_fused(u32 base_addr) {
  74 +static inline u32 mx6_esdhc_fused(u32 base_addr)
  75 +{
74 76 return 0;
75 77 };
76 78  
77   -static inline u32 mx6_ecspi_fused(u32 base_addr){
  79 +static inline u32 mx6_ecspi_fused(u32 base_addr)
  80 +{
78 81 return 0;
79 82 };
80   -static inline u32 mx6_uart_fused(u32 base_addr){
  83 +static inline u32 mx6_uart_fused(u32 base_addr)
  84 +{
81 85 return 0;
82 86 };
83   -static inline u32 mx6_usb_fused(u32 base_addr){
  87 +static inline u32 mx6_usb_fused(u32 base_addr)
  88 +{
84 89 return 0;
85 90 };
86   -static inline u32 mx6_qspi_fused(u32 base_addr){
  91 +static inline u32 mx6_qspi_fused(u32 base_addr)
  92 +{
87 93 return 0;
88 94 };
89   -static inline u32 mx6_i2c_fused(u32 base_addr){
  95 +static inline u32 mx6_i2c_fused(u32 base_addr)
  96 +{
90 97 return 0;
91 98 };
92   -static inline u32 mx6_enet_fused(u32 base_addr){
  99 +static inline u32 mx6_enet_fused(u32 base_addr)
  100 +{
93 101 return 0;
94 102 };
95 103  
board/freescale/mx6ul_14x14_ddr3_arm2/mx6ul_14x14_ddr3_arm2.c
Diff comments   View file @ 13d2079
... ... @@ -351,9 +351,8 @@
351 351  
352 352 int board_flash_wp_on(void)
353 353 {
354   - if (check_module_fused(MX6_MODULE_EIM)) {
  354 + if (check_module_fused(MX6_MODULE_EIM))
355 355 return 1; /* Skip flash init */
356   - }
357 356  
358 357 return 0;
359 358 }
... ... @@ -514,7 +513,7 @@
514 513 {
515 514 if (dev_no == 0 && mx6_esdhc_fused(USDHC1_BASE_ADDR))
516 515 dev_no = 1;
517   -
  516 +
518 517 return dev_no;
519 518 }
520 519  
... ... @@ -553,7 +552,7 @@
553 552 */
554 553 for (i = 0; i < CONFIG_SYS_FSL_USDHC_NUM; i++) {
555 554 switch (i) {
556   - case 0:
  555 + case 0:
557 556 #ifdef CONFIG_MX6UL_DDR3_ARM2_EMMC_REWORK
558 557 imx_iomux_v3_setup_multiple_pads(
559 558 usdhc1_emmc_pads, ARRAY_SIZE(usdhc1_emmc_pads));
560 559  
... ... @@ -756,10 +755,9 @@
756 755 int ret;
757 756  
758 757 if (0 == fec_id) {
759   - if (check_module_fused(MX6_MODULE_ENET1)) {
  758 + if (check_module_fused(MX6_MODULE_ENET1))
760 759 return -1;
761   - }
762   -
  760 +
763 761 /*
764 762 * Use 50M anatop loopback REF_CLK1 for ENET1,
765 763 * clear gpr1[13], set gpr1[17]
766 764  
... ... @@ -771,10 +769,9 @@
771 769 return ret;
772 770  
773 771 } else {
774   - if (check_module_fused(MX6_MODULE_ENET2)) {
  772 + if (check_module_fused(MX6_MODULE_ENET2))
775 773 return -1;
776   - }
777   -
  774 +
778 775 /* clk from phy, set gpr1[14], clear gpr1[18]*/
779 776 clrsetbits_le32(&iomuxc_gpr_regs->gpr[1], IOMUX_GPR1_FEC2_MASK,
780 777 IOMUX_GPR1_FEC2_CLOCK_MUX2_SEL_MASK);
board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c
Diff comments   View file @ 13d2079
... ... @@ -498,7 +498,7 @@
498 498 {
499 499 if (dev_no == 0 && mx6_esdhc_fused(USDHC1_BASE_ADDR))
500 500 dev_no = 1;
501   -
  501 +
502 502 return dev_no;
503 503 }
504 504  
505 505  
506 506  
507 507  
... ... @@ -755,18 +755,16 @@
755 755 int ret;
756 756  
757 757 if (0 == fec_id) {
758   - if (check_module_fused(MX6_MODULE_ENET1)) {
  758 + if (check_module_fused(MX6_MODULE_ENET1))
759 759 return -1;
760   - }
761   -
  760 +
762 761 /* Use 50M anatop loopback REF_CLK1 for ENET1, clear gpr1[13], set gpr1[17]*/
763 762 clrsetbits_le32(&iomuxc_gpr_regs->gpr[1], IOMUX_GPR1_FEC1_MASK,
764 763 IOMUX_GPR1_FEC1_CLOCK_MUX1_SEL_MASK);
765 764 } else {
766   - if (check_module_fused(MX6_MODULE_ENET2)) {
  765 + if (check_module_fused(MX6_MODULE_ENET2))
767 766 return -1;
768   - }
769   -
  767 +
770 768 /* Use 50M anatop loopback REF_CLK2 for ENET2, clear gpr1[14], set gpr1[18]*/
771 769 clrsetbits_le32(&iomuxc_gpr_regs->gpr[1], IOMUX_GPR1_FEC2_MASK,
772 770 IOMUX_GPR1_FEC2_CLOCK_MUX1_SEL_MASK);
drivers/dma/apbh_dma.c
Diff comments   View file @ 13d2079
... ... @@ -128,7 +128,7 @@
128 128  
129 129 if (list_empty(&pchan->active))
130 130 return -EFAULT;
131   -
  131 +
132 132 pdesc = list_first_entry(&pchan->active, struct mxs_dma_desc, node);
133 133 if (pchan->flags & MXS_DMA_FLAGS_BUSY) {
134 134 if (!(pdesc->cmd.data & MXS_DMA_DESC_CHAIN))
... ... @@ -576,7 +576,8 @@
576 576  
577 577 #ifdef CONFIG_MX6
578 578 if (check_module_fused(MX6_MODULE_APBHDMA)) {
579   - printf("NAND APBH-DMA@0x%x is fused, disable it\n", MXS_APBH_BASE);
  579 + printf("NAND APBH-DMA@0x%x is fused, disable it\n",
  580 + MXS_APBH_BASE);
580 581 return;
581 582 }
582 583 #endif
drivers/i2c/mxc_i2c.c
Diff comments   View file @ 13d2079
... ... @@ -526,10 +526,10 @@
526 526 struct i2c_parms *p = srdata->i2c_data;
527 527 if (!base)
528 528 return;
529   -
  529 +
530 530 #ifdef CONFIG_MX6
531 531 if (mx6_i2c_fused((u32)base)) {
532   - printf("I2C@0x%x is fused, disable it\n",
  532 + printf("I2C@0x%x is fused, disable it\n",
533 533 (u32)base);
534 534 return;
535 535 }
drivers/spi/mxc_spi.c
Diff comments   View file @ 13d2079
... ... @@ -414,7 +414,7 @@
414 414 return NULL;
415 415 }
416 416  
417   - if (mx6_ecspi_fused(spi_bases[bus])){
  417 + if (mx6_ecspi_fused(spi_bases[bus])) {
418 418 printf("ECSPI@0x%lx is fused, disable it\n", spi_bases[bus]);
419 419 return NULL;
420 420 }
drivers/usb/host/ehci-mx6.c
Diff comments   View file @ 13d2079
... ... @@ -237,11 +237,11 @@
237 237 return -EINVAL;
238 238  
239 239 if (mx6_usb_fused(USB_BASE_ADDR + (0x200 * index))) {
240   - printf("USB@0x%x is fused, disable it\n",
  240 + printf("USB@0x%x is fused, disable it\n",
241 241 USB_BASE_ADDR + (0x200 * index));
242 242 return -2;
243 243 }
244   -
  244 +
245 245 enable_usboh3_clk(1);
246 246 mdelay(1);
247 247  
drivers/video/mxsfb.c
Diff comments   View file @ 13d2079
... ... @@ -171,9 +171,8 @@
171 171 int timeout = WAIT_FOR_VSYNC_TIMEOUT;
172 172  
173 173 #ifdef CONFIG_MX6
174   - if (check_module_fused(MX6_MODULE_LCDIF)) {
  174 + if (check_module_fused(MX6_MODULE_LCDIF))
175 175 return;
176   - }
177 176 #endif
178 177 writel(panel.frameAdrs, &regs->hw_lcdif_cur_buf);
179 178 writel(panel.frameAdrs, &regs->hw_lcdif_next_buf);