Commit 143b65448e5717cfc51b6ac94594eaf651afbb8d

Authored by Abel Vesa
1 parent 3695f4c41c

MLK-19770-2 iMX8QM SPL: include/configs: imx8qm_mek: Add SPL build config

Add all necessary configs when building for SPL based on CONFIG_SPL_BUILD set.

Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>

Showing 1 changed file with 40 additions and 0 deletions Side-by-side Diff

include/configs/imx8qm_mek.h
... ... @@ -11,6 +11,46 @@
11 11 #include <asm/arch/imx-regs.h>
12 12 #include "imx_env.h"
13 13  
  14 +#ifdef CONFIG_SPL_BUILD
  15 +#define CONFIG_SPL_TEXT_BASE 0x0
  16 +#define CONFIG_SPL_MAX_SIZE (124 * 1024)
  17 +#define CONFIG_SYS_MONITOR_LEN (1024 * 1024)
  18 +#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
  19 +#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x1040 /* (flash.bin_offset + 2Mb)/sector_size */
  20 +#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 0
  21 +
  22 +
  23 +#define CONFIG_SPL_WATCHDOG_SUPPORT
  24 +#define CONFIG_SPL_DRIVERS_MISC_SUPPORT
  25 +#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv8/u-boot-spl.lds"
  26 +#define CONFIG_SPL_STACK 0x013E000
  27 +#define CONFIG_SPL_LIBCOMMON_SUPPORT
  28 +#define CONFIG_SPL_LIBGENERIC_SUPPORT
  29 +#define CONFIG_SPL_SERIAL_SUPPORT
  30 +#define CONFIG_SPL_BSS_START_ADDR 0x00128000
  31 +#define CONFIG_SPL_BSS_MAX_SIZE 0x1000 /* 4 KB */
  32 +#define CONFIG_SYS_SPL_MALLOC_START 0x00120000
  33 +#define CONFIG_SYS_SPL_MALLOC_SIZE 0x3000 /* 12 KB */
  34 +#define CONFIG_SERIAL_LPUART_BASE 0x5a060000
  35 +#define CONFIG_SYS_ICACHE_OFF
  36 +#define CONFIG_SYS_DCACHE_OFF
  37 +#define CONFIG_MALLOC_F_ADDR 0x00120000 /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */
  38 +
  39 +#define CONFIG_SPL_RAW_IMAGE_ARM_TRUSTED_FIRMWARE
  40 +
  41 +#define CONFIG_SPL_ABORT_ON_RAW_IMAGE /* For RAW image gives a error info not panic */
  42 +
  43 +#define CONFIG_OF_EMBED
  44 +#define CONFIG_ATF_TEXT_BASE 0x80000000
  45 +#define CONFIG_SYS_ATF_START 0x80000000
  46 +/* #define CONFIG_FIT */
  47 +
  48 +/* Since the SPL runs before ATF, MU1 will not be started yet, so use MU0 */
  49 +#define SC_IPC_CH SC_IPC_AP_CH0
  50 +
  51 +#endif
  52 +
  53 +
14 54 #define CONFIG_REMAKE_ELF
15 55  
16 56 #define CONFIG_BOARD_EARLY_INIT_F