Commit 147271209a9d328203cf1663de17abdad23412b4

Authored by Marcel Ziswiler
Committed by Marek Vasut
1 parent ab27f30b6e

net: asix: fix operation without eeprom

This patch fixes operation of our on-board AX88772B chip without EEPROM
but with a ethaddr coming from the regular U-Boot environment. This is
a forward port of some remaining parts initially implemented by
Antmicro.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Acked-by: Marek Vasut <marex@denx.de>

Showing 1 changed file with 34 additions and 6 deletions Side-by-side Diff

drivers/usb/eth/asix.c
1 1 /*
2 2 * Copyright (c) 2011 The Chromium OS Authors.
3 3 *
  4 + * Patched for AX88772B by Antmicro Ltd <www.antmicro.com>
  5 + *
4 6 * SPDX-License-Identifier: GPL-2.0+
5 7 */
6 8  
... ... @@ -64,8 +66,11 @@
64 66 AX_MEDIUM_AC | AX_MEDIUM_RE)
65 67  
66 68 /* AX88772 & AX88178 RX_CTL values */
67   -#define AX_RX_CTL_SO 0x0080
68   -#define AX_RX_CTL_AB 0x0008
  69 +#define AX_RX_CTL_RH2M 0x0200 /* 32-bit aligned RX IP header */
  70 +#define AX_RX_CTL_RH1M 0x0100 /* Enable RX header format type 1 */
  71 +#define AX_RX_CTL_SO 0x0080
  72 +#define AX_RX_CTL_AB 0x0008
  73 +#define AX_RX_HEADER_DEFAULT (AX_RX_CTL_RH1M | AX_RX_CTL_RH2M)
69 74  
70 75 #define AX_DEFAULT_RX_CTL \
71 76 (AX_RX_CTL_SO | AX_RX_CTL_AB)
... ... @@ -92,6 +97,8 @@
92 97 #define FLAG_TYPE_AX88772B (1U << 2)
93 98 #define FLAG_EEPROM_MAC (1U << 3) /* initial mac address in eeprom */
94 99  
  100 +#define ASIX_USB_VENDOR_ID 0x0b95
  101 +#define AX88772B_USB_PRODUCT_ID 0x772b
95 102  
96 103 /* driver private */
97 104 struct asix_private {
98 105  
99 106  
100 107  
... ... @@ -418,17 +425,25 @@
418 425 return 0;
419 426 }
420 427  
421   -static int asix_init_common(struct ueth_data *dev)
  428 +static int asix_init_common(struct ueth_data *dev, uint8_t *enetaddr)
422 429 {
423 430 int timeout = 0;
424 431 #define TIMEOUT_RESOLUTION 50 /* ms */
425 432 int link_detected;
  433 + u32 ctl = AX_DEFAULT_RX_CTL;
426 434  
427 435 debug("** %s()\n", __func__);
428 436  
429   - if (asix_write_rx_ctl(dev, AX_DEFAULT_RX_CTL) < 0)
  437 + if ((dev->pusb_dev->descriptor.idVendor == ASIX_USB_VENDOR_ID) &&
  438 + (dev->pusb_dev->descriptor.idProduct == AX88772B_USB_PRODUCT_ID))
  439 + ctl |= AX_RX_HEADER_DEFAULT;
  440 +
  441 + if (asix_write_rx_ctl(dev, ctl) < 0)
430 442 goto out_err;
431 443  
  444 + if (asix_write_hwaddr_common(dev, enetaddr) < 0)
  445 + goto out_err;
  446 +
432 447 do {
433 448 link_detected = asix_mdio_read(dev, dev->phy_id, MII_BMSR) &
434 449 BMSR_LSTATUS;
... ... @@ -447,6 +462,12 @@
447 462 goto out_err;
448 463 }
449 464  
  465 + /*
  466 + * Wait some more to avoid timeout on first transfer
  467 + * (e.g. EHCI timed out on TD - token=0x8008d80)
  468 + */
  469 + mdelay(25);
  470 +
450 471 return 0;
451 472 out_err:
452 473 return -1;
... ... @@ -488,7 +509,7 @@
488 509 {
489 510 struct ueth_data *dev = (struct ueth_data *)eth->priv;
490 511  
491   - return asix_init_common(dev);
  512 + return asix_init_common(dev, eth->enetaddr);
492 513 }
493 514  
494 515 static int asix_send(struct eth_device *eth, void *packet, int length)
... ... @@ -550,6 +571,12 @@
550 571 return -1;
551 572 }
552 573  
  574 + if ((dev->pusb_dev->descriptor.idVendor ==
  575 + ASIX_USB_VENDOR_ID) &&
  576 + (dev->pusb_dev->descriptor.idProduct ==
  577 + AX88772B_USB_PRODUCT_ID))
  578 + buf_ptr += 2;
  579 +
553 580 /* Notify net stack */
554 581 net_process_received_packet(buf_ptr + sizeof(packet_len),
555 582 packet_len);
556 583  
... ... @@ -729,9 +756,10 @@
729 756 #ifdef CONFIG_DM_ETH
730 757 static int asix_eth_start(struct udevice *dev)
731 758 {
  759 + struct eth_pdata *pdata = dev_get_platdata(dev);
732 760 struct asix_private *priv = dev_get_priv(dev);
733 761  
734   - return asix_init_common(&priv->ueth);
  762 + return asix_init_common(&priv->ueth, pdata->enetaddr);
735 763 }
736 764  
737 765 void asix_eth_stop(struct udevice *dev)