Eric Lee / smarc-uboot

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Commit 178a415534c51e0228f3999ec52e64c019f867ee

Authored by Patrick Delaunay
Committed by Patrice Chotard
1 parent 17ac2150c3
Exists in smarc_8mq_lf_v2020.04 and in 9 other branches 8qm-imx_v2020.04_5.4.70_2.3.0, emb_lf_v2022.04, pitx_8mp_lf_v2020.04, smarc-8m-android-10.0.0_2.6.0, smarc-8m-android-11.0.0_2.0.0, smarc-8mp-android-11.0.0_2.0.0, smarc_8mm-imx_v2020.04_5.4.24_2.1.0, smarc_8mp_lf_v2020.04, smarc_8mq-imx_v2020.04_5.4.24_2.1.0

stpmic1: program pmic to keep only the debug unit on 

Depending on backup register value, we maintain the debug unit
powered-on for debugging purpose.
Only BUCK1 is required for powering the debug unit, so revert
the setting for all the other power lanes, except BUCK3 that
has to be always on.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>

Showing 3 changed files with 18 additions and 2 deletions Side-by-side Diff

arch/arm/mach-stm32mp/include/mach/stm32.h
Diff comments   View file @ 178a415
... ... @@ -94,6 +94,7 @@
94 94 #define TAMP_BOOT_DEVICE_MASK GENMASK(7, 4)
95 95 #define TAMP_BOOT_INSTANCE_MASK GENMASK(3, 0)
96 96 #define TAMP_BOOT_FORCED_MASK GENMASK(7, 0)
  97 +#define TAMP_BOOT_DEBUG_ON BIT(16)
97 98  
98 99 enum forced_boot_mode {
99 100 BOOT_NORMAL = 0x00,
board/st/stm32mp1/spl.c
Diff comments   View file @ 178a415
... ... @@ -27,6 +27,20 @@
27 27 STPMIC1_BUCKS_MRST_CR,
28 28 STPMIC1_MRST_BUCK(STPMIC1_BUCK3),
29 29 STPMIC1_MRST_BUCK(STPMIC1_BUCK3));
  30 +
  31 + /* Check if debug is enabled to program PMIC according to the bit */
  32 + if ((readl(TAMP_BOOT_CONTEXT) & TAMP_BOOT_DEBUG_ON) && !ret) {
  33 + printf("Keep debug unit ON\n");
  34 +
  35 + pmic_clrsetbits(dev, STPMIC1_BUCKS_MRST_CR,
  36 + STPMIC1_MRST_BUCK_DEBUG,
  37 + STPMIC1_MRST_BUCK_DEBUG);
  38 +
  39 + if (STPMIC1_MRST_LDO_DEBUG)
  40 + pmic_clrsetbits(dev, STPMIC1_LDOS_MRST_CR,
  41 + STPMIC1_MRST_LDO_DEBUG,
  42 + STPMIC1_MRST_LDO_DEBUG);
  43 + }
30 44 #endif
31 45 }
include/power/stpmic1.h
Diff comments   View file @ 178a415
... ... @@ -22,11 +22,12 @@
22 22  
23 23 /* BUCKS_MRST_CR */
24 24 #define STPMIC1_MRST_BUCK(buck) BIT(buck)
25   -#define STPMIC1_MRST_BUCK_ALL GENMASK(3, 0)
  25 +#define STPMIC1_MRST_BUCK_DEBUG (STPMIC1_MRST_BUCK(STPMIC1_BUCK1) | \
  26 + STPMIC1_MRST_BUCK(STPMIC1_BUCK3))
26 27  
27 28 /* LDOS_MRST_CR */
28 29 #define STPMIC1_MRST_LDO(ldo) BIT(ldo)
29   -#define STPMIC1_MRST_LDO_ALL GENMASK(6, 0)
  30 +#define STPMIC1_MRST_LDO_DEBUG 0
30 31  
31 32 /* BUCKx_MAIN_CR (x=1...4) */
32 33 #define STPMIC1_BUCK_ENA BIT(0)