Commit 186feb0b4d92b1201694f43fe605fdb305523893
Committed by
Stefano Babic
1 parent
49692c5f51
Exists in
v2017.01-smarct4x
and in
40 other branches
mx6sabreauto: Add the mx6dual-lite variant
Tested by booting a mainline kernel via TFTP. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Showing 3 changed files with 135 additions and 0 deletions Side-by-side Diff
board/freescale/mx6qsabreauto/mx6dl.cfg
1 | +/* | |
2 | + * Copyright (C) 2013 Freescale Semiconductor, Inc. | |
3 | + * Jason Liu <r64343@freescale.com> | |
4 | + * | |
5 | + * SPDX-License-Identifier: GPL-2.0+ | |
6 | + * | |
7 | + * Refer doc/README.imximage for more details about how-to configure | |
8 | + * and create imximage boot image | |
9 | + * | |
10 | + * The syntax is taken as close as possible with the kwbimage | |
11 | + */ | |
12 | +/* image version */ | |
13 | + | |
14 | +IMAGE_VERSION 2 | |
15 | + | |
16 | +/* | |
17 | + * Boot Device : one of | |
18 | + * spi, sd (the board has no nand neither onenand) | |
19 | + */ | |
20 | +BOOT_FROM sd | |
21 | + | |
22 | +/* | |
23 | + * Device Configuration Data (DCD) | |
24 | + * | |
25 | + * Each entry must have the format: | |
26 | + * Addr-type Address Value | |
27 | + * | |
28 | + * where: | |
29 | + * Addr-type register length (1,2 or 4 bytes) | |
30 | + * Address absolute address of the register | |
31 | + * value value to be stored in the register | |
32 | + */ | |
33 | +DATA 4 0x020e0774 0x000C0000 | |
34 | +DATA 4 0x020e0754 0x00000000 | |
35 | +DATA 4 0x020e04ac 0x00000030 | |
36 | +DATA 4 0x020e04b0 0x00000030 | |
37 | +DATA 4 0x020e0464 0x00000030 | |
38 | +DATA 4 0x020e0490 0x00000030 | |
39 | +DATA 4 0x020e074c 0x00000030 | |
40 | +DATA 4 0x020e0494 0x00000030 | |
41 | +DATA 4 0x020e04a0 0x00000000 | |
42 | +DATA 4 0x020e04b4 0x00000030 | |
43 | +DATA 4 0x020e04b8 0x00000030 | |
44 | +DATA 4 0x020e076c 0x00000030 | |
45 | +DATA 4 0x020e0750 0x00020000 | |
46 | +DATA 4 0x020e04bc 0x00000028 | |
47 | +DATA 4 0x020e04c0 0x00000028 | |
48 | +DATA 4 0x020e04c4 0x00000028 | |
49 | +DATA 4 0x020e04c8 0x00000028 | |
50 | +DATA 4 0x020e04cc 0x00000028 | |
51 | +DATA 4 0x020e04d0 0x00000028 | |
52 | +DATA 4 0x020e04d4 0x00000028 | |
53 | +DATA 4 0x020e04d8 0x00000028 | |
54 | +DATA 4 0x020e0760 0x00020000 | |
55 | +DATA 4 0x020e0764 0x00000028 | |
56 | +DATA 4 0x020e0770 0x00000028 | |
57 | +DATA 4 0x020e0778 0x00000028 | |
58 | +DATA 4 0x020e077c 0x00000028 | |
59 | +DATA 4 0x020e0780 0x00000028 | |
60 | +DATA 4 0x020e0784 0x00000028 | |
61 | +DATA 4 0x020e078c 0x00000028 | |
62 | +DATA 4 0x020e0748 0x00000028 | |
63 | +DATA 4 0x020e0470 0x00000028 | |
64 | +DATA 4 0x020e0474 0x00000028 | |
65 | +DATA 4 0x020e0478 0x00000028 | |
66 | +DATA 4 0x020e047c 0x00000028 | |
67 | +DATA 4 0x020e0480 0x00000028 | |
68 | +DATA 4 0x020e0484 0x00000028 | |
69 | +DATA 4 0x020e0488 0x00000028 | |
70 | +DATA 4 0x020e048c 0x00000028 | |
71 | +DATA 4 0x021b0800 0xa1390003 | |
72 | +DATA 4 0x021b080c 0x001F001F | |
73 | +DATA 4 0x021b0810 0x001F001F | |
74 | +DATA 4 0x021b480c 0x001F001F | |
75 | +DATA 4 0x021b4810 0x001F001F | |
76 | +DATA 4 0x021b083c 0x42190217 | |
77 | +DATA 4 0x021b0840 0x017B017B | |
78 | +DATA 4 0x021b483c 0x4176017B | |
79 | +DATA 4 0x021b4840 0x015F016C | |
80 | +DATA 4 0x021b0848 0x4C4C4D4C | |
81 | +DATA 4 0x021b4848 0x4A4D4C48 | |
82 | +DATA 4 0x021b0850 0x3F3F3F40 | |
83 | +DATA 4 0x021b4850 0x3538382E | |
84 | +DATA 4 0x021b081c 0x33333333 | |
85 | +DATA 4 0x021b0820 0x33333333 | |
86 | +DATA 4 0x021b0824 0x33333333 | |
87 | +DATA 4 0x021b0828 0x33333333 | |
88 | +DATA 4 0x021b481c 0x33333333 | |
89 | +DATA 4 0x021b4820 0x33333333 | |
90 | +DATA 4 0x021b4824 0x33333333 | |
91 | +DATA 4 0x021b4828 0x33333333 | |
92 | +DATA 4 0x021b08b8 0x00000800 | |
93 | +DATA 4 0x021b48b8 0x00000800 | |
94 | +DATA 4 0x021b0004 0x00020025 | |
95 | +DATA 4 0x021b0008 0x00333030 | |
96 | +DATA 4 0x021b000c 0x676B5313 | |
97 | +DATA 4 0x021b0010 0xB66E8B63 | |
98 | +DATA 4 0x021b0014 0x01FF00DB | |
99 | +DATA 4 0x021b0018 0x00001740 | |
100 | +DATA 4 0x021b001c 0x00008000 | |
101 | +DATA 4 0x021b002c 0x000026d2 | |
102 | +DATA 4 0x021b0030 0x006B1023 | |
103 | +DATA 4 0x021b0040 0x00000047 | |
104 | +DATA 4 0x021b0000 0x841A0000 | |
105 | +DATA 4 0x021b001c 0x04008032 | |
106 | +DATA 4 0x021b001c 0x00008033 | |
107 | +DATA 4 0x021b001c 0x00048031 | |
108 | +DATA 4 0x021b001c 0x05208030 | |
109 | +DATA 4 0x021b001c 0x04008040 | |
110 | +DATA 4 0x021b0020 0x00005800 | |
111 | +DATA 4 0x021b0818 0x00011117 | |
112 | +DATA 4 0x021b4818 0x00011117 | |
113 | +DATA 4 0x021b0004 0x00025565 | |
114 | +DATA 4 0x021b0404 0x00011006 | |
115 | +DATA 4 0x021b001c 0x00000000 | |
116 | + | |
117 | +/* set the default clock gate to save power */ | |
118 | +DATA 4 0x020c4068 0x00C03F3F | |
119 | +DATA 4 0x020c406c 0x0030FC03 | |
120 | +DATA 4 0x020c4070 0x0FFFC000 | |
121 | +DATA 4 0x020c4074 0x3FF00000 | |
122 | +DATA 4 0x020c4078 0xFFFFF300 | |
123 | +DATA 4 0x020c407c 0x0F0000C3 | |
124 | +DATA 4 0x020c4080 0x00000FFF | |
125 | + | |
126 | +/* enable AXI cache for VDOA/VPU/IPU */ | |
127 | +DATA 4 0x020e0010 0xF00000CF | |
128 | +/* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */ | |
129 | +DATA 4 0x020e0018 0x007F007F | |
130 | +DATA 4 0x020e001c 0x007F007F |
boards.cfg
... | ... | @@ -324,6 +324,7 @@ |
324 | 324 | Active arm armv7 mx6 embest mx6boards riotboard embestmx6boards:IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6s1g.cfg,MX6S,DDR_MB=1024,ENV_IS_IN_MMC Eric Bénard <eric@eukrea.com> |
325 | 325 | Active arm armv7 mx6 freescale mx6qarm2 mx6qarm2 mx6qarm2:IMX_CONFIG=board/freescale/mx6qarm2/imximage.cfg Jason Liu <r64343@freescale.com> |
326 | 326 | Active arm armv7 mx6 freescale mx6qsabreauto mx6qsabreauto mx6qsabreauto:IMX_CONFIG=board/freescale/mx6qsabreauto/imximage.cfg,MX6Q Fabio Estevam <fabio.estevam@freescale.com> |
327 | +Active arm armv7 mx6 freescale mx6qsabreauto mx6dlsabreauto mx6qsabreauto:IMX_CONFIG=board/freescale/mx6qsabreauto/mx6dl.cfg,MX6DL Fabio Estevam <fabio.estevam@freescale.com> | |
327 | 328 | Active arm armv7 mx6 freescale mx6sabresd mx6dlsabresd mx6sabresd:IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6dl.cfg,MX6DL Fabio Estevam <fabio.estevam@freescale.com> |
328 | 329 | Active arm armv7 mx6 freescale mx6sabresd mx6qsabresd mx6sabresd:IMX_CONFIG=board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg,MX6Q Fabio Estevam <fabio.estevam@freescale.com> |
329 | 330 | Active arm armv7 mx6 freescale mx6slevk mx6slevk mx6slevk:IMX_CONFIG=board/freescale/mx6slevk/imximage.cfg,MX6SL Fabio Estevam <fabio.estevam@freescale.com> |
include/configs/mx6qsabreauto.h
... | ... | @@ -12,7 +12,11 @@ |
12 | 12 | #define CONFIG_MACH_TYPE 3529 |
13 | 13 | #define CONFIG_MXC_UART_BASE UART4_BASE |
14 | 14 | #define CONFIG_CONSOLE_DEV "ttymxc3" |
15 | +#if defined CONFIG_MX6Q | |
15 | 16 | #define CONFIG_DEFAULT_FDT_FILE "imx6q-sabreauto.dtb" |
17 | +#elif defined CONFIG_MX6DL | |
18 | +#define CONFIG_DEFAULT_FDT_FILE "imx6dl-sabreauto.dtb" | |
19 | +#endif | |
16 | 20 | #define CONFIG_MMCROOT "/dev/mmcblk0p2" |
17 | 21 | #define PHYS_SDRAM_SIZE (2u * 1024 * 1024 * 1024) |
18 | 22 |