Eric Lee / smarc-uboot

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Commit 19268834fb208a7deb43f9a00b034e0c6abab3cd

Authored by Bin Meng
Committed by Simon Glass
1 parent d21d05f19a
Exists in v2017.01-smarct4x and in 34 other branches 8qm-imx_v2020.04_5.4.70_2.3.0, emb_lf_v2022.04, pitx_8mp_lf_v2020.04, smarc-8m-android-10.0.0_2.6.0, smarc-8m-android-11.0.0_2.0.0, smarc-8mp-android-11.0.0_2.0.0, smarc-imx6_v2018.03_4.14.98_2.0.0_ga, smarc-imx7_v2017.03_4.9.11_1.0.0_ga, smarc-imx7_v2018.03_4.14.98_2.0.0_ga, smarc-imx_v2017.03_4.9.11_1.0.0_ga, smarc-imx_v2017.03_4.9.88_2.0.0_ga, smarc-imx_v2017.03_o8.1.0_1.3.0_8m, smarc-imx_v2018.03_4.14.78_1.0.0_ga, smarc-n7.1.2_2.0.0-ga, smarc-rel_imx_4.1.15_2.0.0_ga, smarc_8m-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8m-imx_v2019.04_4.19.35_1.1.0, smarc_8m_00d0-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2019.04_4.19.35_1.1.0, smarc_8mm-imx_v2020.04_5.4.24_2.1.0, smarc_8mp_lf_v2020.04, smarc_8mq-imx_v2020.04_5.4.24_2.1.0, smarc_8mq_lf_v2020.04, ti-u-boot-2015.07, v2015.07-smarct33, v2015.07-smarct33-emmc, v2015.07-smarct4x, v2016.05-dlt, v2016.05-smarct3x, v2016.05-smarct3x-emmc, v2016.05-smarct4x, v2017.01-smarct3x, v2017.01-smarct3x-emmc

x86: Set serial port IRQ for SMSC LPC47M 

For starting a Linux console on the superio serial port under
interrupt mode, the IRQ number must be configured.

Signed-off-by: Jian Luo <jian.luo4@boschrexroth.de>
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>

Showing 5 changed files with 9 additions and 4 deletions Side-by-side Diff

arch/x86/include/asm/ibmpc.h
Diff comments   View file @ 1926883
... ... @@ -21,5 +21,8 @@
21 21 #define UART0_BASE 0x3f8
22 22 #define UART1_BASE 0x2f8
23 23  
  24 +#define UART0_IRQ 4
  25 +#define UART1_IRQ 3
  26 +
24 27 #endif
board/intel/crownbay/crownbay.c
Diff comments   View file @ 1926883
... ... @@ -16,7 +16,7 @@
16 16  
17 17 int board_early_init_f(void)
18 18 {
19   - lpc47m_enable_serial(SERIAL_DEV, UART0_BASE);
  19 + lpc47m_enable_serial(SERIAL_DEV, UART0_BASE, UART0_IRQ);
20 20  
21 21 return 0;
22 22 }
board/intel/minnowmax/minnowmax.c
Diff comments   View file @ 1926883
... ... @@ -16,7 +16,7 @@
16 16  
17 17 int board_early_init_f(void)
18 18 {
19   - lpc47m_enable_serial(SERIAL_DEV, UART0_BASE);
  19 + lpc47m_enable_serial(SERIAL_DEV, UART0_BASE, UART0_IRQ);
20 20  
21 21 return 0;
22 22 }
drivers/misc/smsc_lpc47m.c
Diff comments   View file @ 1926883
... ... @@ -22,12 +22,13 @@
22 22 outb(0xaa, port);
23 23 }
24 24  
25   -void lpc47m_enable_serial(u16 dev, u16 iobase)
  25 +void lpc47m_enable_serial(u16 dev, u16 iobase, u8 irq)
26 26 {
27 27 pnp_enter_conf_state(dev);
28 28 pnp_set_logical_device(dev);
29 29 pnp_set_enable(dev, 0);
30 30 pnp_set_iobase(dev, PNP_IDX_IO0, iobase);
  31 + pnp_set_irq(dev, PNP_IDX_IRQ0, irq);
31 32 pnp_set_enable(dev, 1);
32 33 pnp_exit_conf_state(dev);
33 34 }
include/smsc_lpc47m.h
Diff comments   View file @ 1926883
... ... @@ -13,8 +13,9 @@
13 13 *
14 14 * @dev: High 8 bits = Super I/O port, low 8 bits = logical device number.
15 15 * @iobase: Processor I/O port address to assign to this serial device.
  16 + * @irq: Processor IRQ number to assign to this serial device.
16 17 */
17   -void lpc47m_enable_serial(u16 dev, u16 iobase);
  18 +void lpc47m_enable_serial(u16 dev, u16 iobase, u8 irq);
18 19  
19 20 #endif /* _SMSC_LPC47M_H_ */