Commit 1a0d0b78412e8bfcb0e4f7ceb883881d79f29303

Authored by Tien Fong Chee
Committed by Marek Vasut
1 parent 1085bb3cba

ARM: socfpga: Synchronize the configuration for A10 SoCDK

Update the default configuration file to enable the necessary functionality
the get the kit working.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>

Showing 1 changed file with 9 additions and 5 deletions Side-by-side Diff

configs/socfpga_arria10_defconfig
... ... @@ -6,12 +6,15 @@
6 6 CONFIG_USE_BOOTARGS=y
7 7 CONFIG_BOOTARGS="console=ttyS0,115200"
8 8 # CONFIG_USE_BOOTCOMMAND is not set
  9 +CONFIG_SYS_CONSOLE_IS_IN_ENV=y
  10 +CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
  11 +CONFIG_SYS_CONSOLE_ENV_OVERWRITE=y
9 12 CONFIG_DEFAULT_FDT_FILE="socfpga_arria10_socdk_sdmmc.dtb"
  13 +CONFIG_VERSION_VARIABLE=y
10 14 CONFIG_DISPLAY_BOARDINFO_LATE=y
11 15 CONFIG_BOUNCE_BUFFER=y
12 16 CONFIG_SPL_TEXT_BASE=0xFFE00000
13 17 CONFIG_SPL_FPGA_SUPPORT=y
14   -CONFIG_SPL_SPI_LOAD=y
15 18 CONFIG_CMD_ASKENV=y
16 19 CONFIG_CMD_GREPENV=y
17 20 # CONFIG_CMD_FLASH is not set
... ... @@ -20,9 +23,7 @@
20 23 CONFIG_CMD_CACHE=y
21 24 CONFIG_CMD_EXT4_WRITE=y
22 25 CONFIG_MTDIDS_DEFAULT="nor0=ff705000.spi.0"
23   -# CONFIG_SPL_DOS_PARTITION is not set
24   -# CONFIG_ISO_PARTITION is not set
25   -# CONFIG_EFI_PARTITION is not set
  26 +CONFIG_OF_SPL_REMOVE_PROPS="interrupts interrupt-parent dmas dma-names"
26 27 CONFIG_DEFAULT_DEVICE_TREE="socfpga_arria10_socdk_sdmmc"
27 28 CONFIG_ENV_IS_IN_MMC=y
28 29 CONFIG_SPL_ENV_SUPPORT=y
... ... @@ -30,7 +31,6 @@
30 31 CONFIG_SPL_DM_SEQ_ALIAS=y
31 32 CONFIG_SPL_DM_MMC=y
32 33 CONFIG_SPL_MMC_SUPPORT=y
33   -CONFIG_SPL_EXT_SUPPORT=y
34 34 CONFIG_SPL_FS_FAT=y
35 35 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
36 36 CONFIG_FS_LOADER=y
37 37  
... ... @@ -41,9 +41,13 @@
41 41 CONFIG_DWAPB_GPIO=y
42 42 CONFIG_DM_MMC=y
43 43 CONFIG_MTD_DEVICE=y
  44 +CONFIG_MMC_DW=y
  45 +CONFIG_PHY_MICREL=y
  46 +CONFIG_PHY_MICREL_KSZ90X1=y
44 47 CONFIG_DM_ETH=y
45 48 CONFIG_ETH_DESIGNWARE=y
46 49 CONFIG_MII=y
  50 +CONFIG_SYS_NS16550=y
47 51 CONFIG_SPI=y
48 52 CONFIG_TIMER=y
49 53 CONFIG_SPL_TIMER=y