Merge branch 'master' of git://git.denx.de/u-boot-sh

Tom Rini
2 parents 0eaadecb40 9675f61077
Showing 2 changed files Side-by-side Diff
drivers/mmc/sh_mmcif.c
drivers/mmc/sh_mmcif.h
@@ -103,20 +103,18 @@
  
 static void sh_mmcif_clock_control(struct sh_mmcif_host *host, unsigned int clk)
 {
-	int i;
-
 	sh_mmcif_bitclr(CLK_ENABLE, &host->regs->ce_clk_ctrl);
 	sh_mmcif_bitclr(CLK_CLEAR, &host->regs->ce_clk_ctrl);
  
 	if (!clk)
 		return;
-	if (clk == CLKDEV_EMMC_DATA) {
+
+	if (clk == CLKDEV_EMMC_DATA)
 		sh_mmcif_bitset(CLK_PCLK, &host->regs->ce_clk_ctrl);
-	} else {
-		for (i = 1; (unsigned int)host->clk / (1 << i) >= clk; i++)
-			;
-		sh_mmcif_bitset((i - 1) << 16, &host->regs->ce_clk_ctrl);
-	}
+	else
+		sh_mmcif_bitset((fls(DIV_ROUND_UP(host->clk,
+						  clk) - 1) - 1) << 16,
+				&host->regs->ce_clk_ctrl);
 	sh_mmcif_bitset(CLK_ENABLE, &host->regs->ce_clk_ctrl);
 }
  
@@ -581,8 +579,6 @@
 	.host_caps	= MMC_MODE_HS | MMC_MODE_HS_52MHz | MMC_MODE_4BIT |
 			  MMC_MODE_8BIT | MMC_MODE_HC,
 	.voltages	= MMC_VDD_32_33 | MMC_VDD_33_34,
-	.f_min		= CLKDEV_MMC_INIT,
-	.f_max		= CLKDEV_EMMC_DATA,
 	.b_max		= CONFIG_SYS_MMC_MAX_BLK_COUNT,
 };
  
@@ -598,6 +594,9 @@
  
 	host->regs = (struct sh_mmcif_regs *)CONFIG_SH_MMCIF_ADDR;
 	host->clk = CONFIG_SH_MMCIF_CLK;
+
+	sh_mmcif_cfg.f_min = MMC_CLK_DIV_MIN(host->clk);
+	sh_mmcif_cfg.f_max = MMC_CLK_DIV_MAX(host->clk);
  
 	mmc = mmc_create(&sh_mmcif_cfg, host);
 	if (mmc == NULL) {
@@ -199,7 +199,13 @@
 #define SOFT_RST_OFF		(0 << 31)
  
 #define CLKDEV_EMMC_DATA	52000000	/* 52MHz */
-#define	CLKDEV_MMC_INIT		400000		/* 100 - 400 KHz */
+#ifdef CONFIG_RMOBILE
+#define MMC_CLK_DIV_MIN(clk)	(clk / (1 << 9))
+#define MMC_CLK_DIV_MAX(clk)	(clk / (1 << 1))
+#else
+#define MMC_CLK_DIV_MIN(clk)	(clk / (1 << 8))
+#define MMC_CLK_DIV_MAX(clk)	CLKDEV_EMMC_DATA
+#endif
  
 #define MMC_BUS_WIDTH_1		0
 #define MMC_BUS_WIDTH_4		2
...	...	@@ -103,20 +103,18 @@
103	103
104	104	static void sh_mmcif_clock_control(struct sh_mmcif_host *host, unsigned int clk)
105	105	{
106		- int i;
107		-
108	106	sh_mmcif_bitclr(CLK_ENABLE, &host->regs->ce_clk_ctrl);
109	107	sh_mmcif_bitclr(CLK_CLEAR, &host->regs->ce_clk_ctrl);
110	108
111	109	if (!clk)
112	110	return;
113		- if (clk == CLKDEV_EMMC_DATA) {
	111	+
	112	+ if (clk == CLKDEV_EMMC_DATA)
114	113	sh_mmcif_bitset(CLK_PCLK, &host->regs->ce_clk_ctrl);
115		- } else {
116		- for (i = 1; (unsigned int)host->clk / (1 << i) >= clk; i++)
117		- ;
118		- sh_mmcif_bitset((i - 1) << 16, &host->regs->ce_clk_ctrl);
119		- }
	114	+ else
	115	+ sh_mmcif_bitset((fls(DIV_ROUND_UP(host->clk,
	116	+ clk) - 1) - 1) << 16,
	117	+ &host->regs->ce_clk_ctrl);
120	118	sh_mmcif_bitset(CLK_ENABLE, &host->regs->ce_clk_ctrl);
121	119	}
122	120
...	...	@@ -581,8 +579,6 @@
581	579	.host_caps = MMC_MODE_HS \| MMC_MODE_HS_52MHz \| MMC_MODE_4BIT \|
582	580	MMC_MODE_8BIT \| MMC_MODE_HC,
583	581	.voltages = MMC_VDD_32_33 \| MMC_VDD_33_34,
584		- .f_min = CLKDEV_MMC_INIT,
585		- .f_max = CLKDEV_EMMC_DATA,
586	582	.b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT,
587	583	};
588	584
...	...	@@ -598,6 +594,9 @@
598	594
599	595	host->regs = (struct sh_mmcif_regs *)CONFIG_SH_MMCIF_ADDR;
600	596	host->clk = CONFIG_SH_MMCIF_CLK;
	597	+
	598	+ sh_mmcif_cfg.f_min = MMC_CLK_DIV_MIN(host->clk);
	599	+ sh_mmcif_cfg.f_max = MMC_CLK_DIV_MAX(host->clk);
601	600
602	601	mmc = mmc_create(&sh_mmcif_cfg, host);
603	602	if (mmc == NULL) {
...	...	@@ -199,7 +199,13 @@
199	199	#define SOFT_RST_OFF (0 << 31)
200	200
201	201	#define CLKDEV_EMMC_DATA 52000000 /* 52MHz */
202		-#define CLKDEV_MMC_INIT 400000 /* 100 - 400 KHz */
	202	+#ifdef CONFIG_RMOBILE
	203	+#define MMC_CLK_DIV_MIN(clk) (clk / (1 << 9))
	204	+#define MMC_CLK_DIV_MAX(clk) (clk / (1 << 1))
	205	+#else
	206	+#define MMC_CLK_DIV_MIN(clk) (clk / (1 << 8))
	207	+#define MMC_CLK_DIV_MAX(clk) CLKDEV_EMMC_DATA
	208	+#endif
203	209
204	210	#define MMC_BUS_WIDTH_1 0
205	211	#define MMC_BUS_WIDTH_4 2