Eric Lee / smarc-uboot

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Commit 1b7dba990f60b461fb7af92464590cc0f326ae81

Authored by Prabhakar Kushwaha
Committed by York Sun
1 parent eea1cb77ce
Exists in smarc_8mq_lf_v2020.04 and in 17 other branches 8qm-imx_v2020.04_5.4.70_2.3.0, emb_lf_v2022.04, pitx_8mp_lf_v2020.04, smarc-8m-android-10.0.0_2.6.0, smarc-8m-android-11.0.0_2.0.0, smarc-8mp-android-11.0.0_2.0.0, smarc-imx6_v2018.03_4.14.98_2.0.0_ga, smarc-imx7_v2018.03_4.14.98_2.0.0_ga, smarc-imx_v2018.03_4.14.78_1.0.0_ga, smarc_8m-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8m-imx_v2019.04_4.19.35_1.1.0, smarc_8m_00d0-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2019.04_4.19.35_1.1.0, smarc_8mm-imx_v2020.04_5.4.24_2.1.0, smarc_8mp_lf_v2020.04, smarc_8mq-imx_v2020.04_5.4.24_2.1.0

arm: fsl-layerscape: Move QSGMII wriop_init to SoC file 

MAC number used per QSGMII is not fixed. It may wary from SoC to SoC.

So move QSGMII wriop_init_dpmac() to SoC file.

Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>

Showing 4 changed files with 41 additions and 23 deletions Side-by-side Diff

arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_serdes.c
Diff comments   View file @ 1b7dba9
... ... @@ -23,6 +23,11 @@
23 23 int sgmii_dpmac[SGMII16 + 1];
24 24 #endif
25 25  
  26 +__weak void wriop_init_dpmac_qsgmii(int sd, int lane_prtcl)
  27 +{
  28 + return;
  29 +}
  30 +
26 31 int is_serdes_configured(enum srds_prtcl device)
27 32 {
28 33 int ret = 0;
29 34  
30 35  
31 36  
... ... @@ -106,28 +111,10 @@
106 111 #ifdef CONFIG_FSL_MC_ENET
107 112 switch (lane_prtcl) {
108 113 case QSGMII_A:
109   - wriop_init_dpmac(sd, 5, (int)lane_prtcl);
110   - wriop_init_dpmac(sd, 6, (int)lane_prtcl);
111   - wriop_init_dpmac(sd, 7, (int)lane_prtcl);
112   - wriop_init_dpmac(sd, 8, (int)lane_prtcl);
113   - break;
114 114 case QSGMII_B:
115   - wriop_init_dpmac(sd, 1, (int)lane_prtcl);
116   - wriop_init_dpmac(sd, 2, (int)lane_prtcl);
117   - wriop_init_dpmac(sd, 3, (int)lane_prtcl);
118   - wriop_init_dpmac(sd, 4, (int)lane_prtcl);
119   - break;
120 115 case QSGMII_C:
121   - wriop_init_dpmac(sd, 13, (int)lane_prtcl);
122   - wriop_init_dpmac(sd, 14, (int)lane_prtcl);
123   - wriop_init_dpmac(sd, 15, (int)lane_prtcl);
124   - wriop_init_dpmac(sd, 16, (int)lane_prtcl);
125   - break;
126 116 case QSGMII_D:
127   - wriop_init_dpmac(sd, 9, (int)lane_prtcl);
128   - wriop_init_dpmac(sd, 10, (int)lane_prtcl);
129   - wriop_init_dpmac(sd, 11, (int)lane_prtcl);
130   - wriop_init_dpmac(sd, 12, (int)lane_prtcl);
  117 + wriop_init_dpmac_qsgmii(sd, (int)lane_prtcl);
131 118 break;
132 119 default:
133 120 if (lane_prtcl >= XFI1 && lane_prtcl <= XFI8)
arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h
Diff comments   View file @ 1b7dba9
... ... @@ -48,10 +48,10 @@
48 48 SGMII14,
49 49 SGMII15,
50 50 SGMII16,
51   - QSGMII_A, /* A indicates MACs 1-4 */
52   - QSGMII_B, /* B indicates MACs 5-8 */
53   - QSGMII_C, /* C indicates MACs 9-12 */
54   - QSGMII_D, /* D indicates MACs 12-16 */
  51 + QSGMII_A,
  52 + QSGMII_B,
  53 + QSGMII_C,
  54 + QSGMII_D,
55 55 SERDES_PRCTL_COUNT
56 56 };
57 57  
drivers/net/ldpaa_eth/ls2080a.c
Diff comments   View file @ 1b7dba9
... ... @@ -79,4 +79,34 @@
79 79  
80 80 return PHY_INTERFACE_MODE_NONE;
81 81 }
  82 +
  83 +void wriop_init_dpmac_qsgmii(int sd, int lane_prtcl)
  84 +{
  85 + switch (lane_prtcl) {
  86 + case QSGMII_A:
  87 + wriop_init_dpmac(sd, 5, (int)lane_prtcl);
  88 + wriop_init_dpmac(sd, 6, (int)lane_prtcl);
  89 + wriop_init_dpmac(sd, 7, (int)lane_prtcl);
  90 + wriop_init_dpmac(sd, 8, (int)lane_prtcl);
  91 + break;
  92 + case QSGMII_B:
  93 + wriop_init_dpmac(sd, 1, (int)lane_prtcl);
  94 + wriop_init_dpmac(sd, 2, (int)lane_prtcl);
  95 + wriop_init_dpmac(sd, 3, (int)lane_prtcl);
  96 + wriop_init_dpmac(sd, 4, (int)lane_prtcl);
  97 + break;
  98 + case QSGMII_C:
  99 + wriop_init_dpmac(sd, 13, (int)lane_prtcl);
  100 + wriop_init_dpmac(sd, 14, (int)lane_prtcl);
  101 + wriop_init_dpmac(sd, 15, (int)lane_prtcl);
  102 + wriop_init_dpmac(sd, 16, (int)lane_prtcl);
  103 + break;
  104 + case QSGMII_D:
  105 + wriop_init_dpmac(sd, 9, (int)lane_prtcl);
  106 + wriop_init_dpmac(sd, 10, (int)lane_prtcl);
  107 + wriop_init_dpmac(sd, 11, (int)lane_prtcl);
  108 + wriop_init_dpmac(sd, 12, (int)lane_prtcl);
  109 + break;
  110 + }
  111 +}
include/fsl-mc/ldpaa_wriop.h
Diff comments   View file @ 1b7dba9
... ... @@ -68,5 +68,6 @@
68 68 void wriop_dpmac_disable(int);
69 69 void wriop_dpmac_enable(int);
70 70 phy_interface_t wriop_dpmac_enet_if(int, int);
  71 +void wriop_init_dpmac_qsgmii(int, int);
71 72 #endif /* __LDPAA_WRIOP_H */