Eric Lee / smarc-uboot

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Commit 1dcd6d03811d4f30052a5e24377b378867211b05

Authored by Jagannadha Sutradharudu Teki
1 parent fc207ee4db
Exists in master and in 53 other branches 8qm-imx_v2020.04_5.4.70_2.3.0, emb_lf_v2022.04, imx_v2015.04_4.1.15_1.0.0_ga, pitx_8mp_lf_v2020.04, smarc-8m-android-10.0.0_2.6.0, smarc-8m-android-11.0.0_2.0.0, smarc-8mp-android-11.0.0_2.0.0, smarc-emmc-imx_v2014.04_3.10.53_1.1.0_ga, smarc-emmc-imx_v2014.04_3.14.28_1.0.0_ga, smarc-imx-l5.0.0_1.0.0-ga, smarc-imx6_v2018.03_4.14.98_2.0.0_ga, smarc-imx7_v2017.03_4.9.11_1.0.0_ga, smarc-imx7_v2018.03_4.14.98_2.0.0_ga, smarc-imx_v2014.04_3.14.28_1.0.0_ga, smarc-imx_v2015.04_4.1.15_1.0.0_ga, smarc-imx_v2017.03_4.9.11_1.0.0_ga, smarc-imx_v2017.03_4.9.88_2.0.0_ga, smarc-imx_v2017.03_o8.1.0_1.3.0_8m, smarc-imx_v2018.03_4.14.78_1.0.0_ga, smarc-m6.0.1_2.1.0-ga, smarc-n7.1.2_2.0.0-ga, smarc-rel_imx_4.1.15_2.0.0_ga, smarc_8m-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8m-imx_v2019.04_4.19.35_1.1.0, smarc_8m_00d0-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2019.04_4.19.35_1.1.0, smarc_8mm-imx_v2020.04_5.4.24_2.1.0, smarc_8mp_lf_v2020.04, smarc_8mq-imx_v2020.04_5.4.24_2.1.0, smarc_8mq_lf_v2020.04, ti-u-boot-2015.07, v2013.10, v2013.10-smarct33, v2013.10-smartmen, v2014.01, v2014.04, v2014.04-smarct33, v2014.04-smarct33-emmc, v2014.04-smartmen, v2014.07, v2014.07-smarct33, v2014.07-smartmen, v2015.07-smarct33, v2015.07-smarct33-emmc, v2015.07-smarct4x, v2016.05-dlt, v2016.05-smarct3x, v2016.05-smarct3x-emmc, v2016.05-smarct4x, v2017.01-smarct3x, v2017.01-smarct3x-emmc, v2017.01-smarct4x

sf: Add bank addr code in CONFIG_SPI_FLASH_BAR 

Defined bank addr code on CONFIG_SPI_FLASH_BAR macro, to reduce the
size for existing boards which has < 16Mbytes SPI flashes.

It's upto user which has provision to use the bank addr code for
flashes which has > 16Mbytes.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

Showing 4 changed files with 32 additions and 11 deletions Side-by-side Diff

... ... @@ -2509,6 +2509,11 @@
2509 2509 Define this option to include a destructive SPI flash
2510 2510 test ('sf test').
2511 2511  
  2512 + CONFIG_SPI_FLASH_BAR Ban/Extended Addr Reg
  2513 +
  2514 + Define this option to use the Bank addr/Extended addr
  2515 + support on SPI flashes which has size > 16Mbytes.
  2516 +
2512 2517 - SystemACE Support:
2513 2518 CONFIG_SYSTEMACE
2514 2519  
drivers/mtd/spi/spi_flash.c
Diff comments   View file @ 1dcd6d0
... ... @@ -74,7 +74,7 @@
74 74 unsigned long page_addr, byte_addr, page_size;
75 75 size_t chunk_len, actual;
76 76 int ret;
77   - u8 cmd[4], bank_sel;
  77 + u8 cmd[4];
78 78  
79 79 page_size = flash->page_size;
80 80  
... ... @@ -86,6 +86,9 @@
86 86  
87 87 cmd[0] = CMD_PAGE_PROGRAM;
88 88 for (actual = 0; actual < len; actual += chunk_len) {
  89 +#ifdef CONFIG_SPI_FLASH_BAR
  90 + u8 bank_sel;
  91 +
89 92 bank_sel = offset / SPI_FLASH_16MB_BOUN;
90 93  
91 94 ret = spi_flash_cmd_bankaddr_write(flash, bank_sel);
... ... @@ -93,7 +96,7 @@
93 96 debug("SF: fail to set bank%d\n", bank_sel);
94 97 return ret;
95 98 }
96   -
  99 +#endif
97 100 page_addr = offset / page_size;
98 101 byte_addr = offset % page_size;
99 102 chunk_len = min(len - actual, page_size - byte_addr);
... ... @@ -148,7 +151,7 @@
148 151 int spi_flash_cmd_read_fast(struct spi_flash *flash, u32 offset,
149 152 size_t len, void *data)
150 153 {
151   - u8 cmd[5], bank_sel;
  154 + u8 cmd[5], bank_sel = 0;
152 155 u32 remain_len, read_len;
153 156 int ret = -1;
154 157  
... ... @@ -162,6 +165,7 @@
162 165 cmd[4] = 0x00;
163 166  
164 167 while (len) {
  168 +#ifdef CONFIG_SPI_FLASH_BAR
165 169 bank_sel = offset / SPI_FLASH_16MB_BOUN;
166 170  
167 171 ret = spi_flash_cmd_bankaddr_write(flash, bank_sel);
... ... @@ -169,7 +173,7 @@
169 173 debug("SF: fail to set bank%d\n", bank_sel);
170 174 return ret;
171 175 }
172   -
  176 +#endif
173 177 remain_len = (SPI_FLASH_16MB_BOUN * (bank_sel + 1) - offset);
174 178 if (len < remain_len)
175 179 read_len = len;
... ... @@ -240,7 +244,7 @@
240 244 {
241 245 u32 erase_size;
242 246 int ret;
243   - u8 cmd[4], bank_sel;
  247 + u8 cmd[4];
244 248  
245 249 erase_size = flash->sector_size;
246 250 if (offset % erase_size || len % erase_size) {
... ... @@ -260,6 +264,9 @@
260 264 cmd[0] = CMD_ERASE_64K;
261 265  
262 266 while (len) {
  267 +#ifdef CONFIG_SPI_FLASH_BAR
  268 + u8 bank_sel;
  269 +
263 270 bank_sel = offset / SPI_FLASH_16MB_BOUN;
264 271  
265 272 ret = spi_flash_cmd_bankaddr_write(flash, bank_sel);
... ... @@ -267,7 +274,7 @@
267 274 debug("SF: fail to set bank%d\n", bank_sel);
268 275 return ret;
269 276 }
270   -
  277 +#endif
271 278 spi_flash_addr(offset, cmd);
272 279  
273 280 debug("SF: erase %2x %2x %2x %2x (%x)\n", cmd[0], cmd[1],
... ... @@ -321,6 +328,7 @@
321 328 return 0;
322 329 }
323 330  
  331 +#ifdef CONFIG_SPI_FLASH_BAR
324 332 int spi_flash_cmd_bankaddr_write(struct spi_flash *flash, u8 bank_sel)
325 333 {
326 334 u8 cmd;
... ... @@ -389,6 +397,7 @@
389 397  
390 398 return 0;
391 399 }
  400 +#endif
392 401  
393 402 #ifdef CONFIG_OF_CONTROL
394 403 int spi_flash_decode_fdt(const void *blob, struct spi_flash *flash)
395 404  
... ... @@ -534,10 +543,12 @@
534 543 goto err_manufacturer_probe;
535 544 }
536 545  
  546 +#ifdef CONFIG_SPI_FLASH_BAR
537 547 /* Configure the BAR - disover bank cmds and read current bank */
538 548 ret = spi_flash_bank_config(flash, *idp);
539 549 if (ret < 0)
540 550 goto err_manufacturer_probe;
  551 +#endif
541 552  
542 553 #ifdef CONFIG_OF_CONTROL
543 554 if (spi_flash_decode_fdt(gd->fdt_blob, flash)) {
drivers/mtd/spi/spi_flash_internal.h
Diff comments   View file @ 1dcd6d0
... ... @@ -35,11 +35,13 @@
35 35 #define SPI_FLASH_STMICRO_IDCODE0 0x20
36 36 #define SPI_FLASH_WINBOND_IDCODE0 0xef
37 37  
  38 +#ifdef CONFIG_SPI_FLASH_BAR
38 39 /* Bank addr access commands */
39   -#define CMD_BANKADDR_BRWR 0x17
40   -#define CMD_BANKADDR_BRRD 0x16
41   -#define CMD_EXTNADDR_WREAR 0xC5
42   -#define CMD_EXTNADDR_RDEAR 0xC8
  40 +# define CMD_BANKADDR_BRWR 0x17
  41 +# define CMD_BANKADDR_BRRD 0x16
  42 +# define CMD_EXTNADDR_WREAR 0xC5
  43 +# define CMD_EXTNADDR_RDEAR 0xC8
  44 +#endif
43 45  
44 46 /* Common status */
45 47 #define STATUS_WIP 0x01
46 48  
... ... @@ -90,11 +92,13 @@
90 92 /* Program the status register. */
91 93 int spi_flash_cmd_write_status(struct spi_flash *flash, u8 sr);
92 94  
  95 +#ifdef CONFIG_SPI_FLASH_BAR
93 96 /* Program the bank address register */
94 97 int spi_flash_cmd_bankaddr_write(struct spi_flash *flash, u8 bank_sel);
95 98  
96 99 /* Configure the BAR - discover the bank cmds */
97 100 int spi_flash_bank_config(struct spi_flash *flash, u8 idcode0);
  101 +#endif
98 102  
99 103 /*
100 104 * Same as spi_flash_cmd_read() except it also claims/releases the SPI
... ... @@ -38,13 +38,14 @@
38 38 u32 page_size;
39 39 /* Erase (sector) size */
40 40 u32 sector_size;
  41 +#ifdef CONFIG_SPI_FLASH_BAR
41 42 /* Bank read cmd */
42 43 u8 bank_read_cmd;
43 44 /* Bank write cmd */
44 45 u8 bank_write_cmd;
45 46 /* Current flash bank */
46 47 u8 bank_curr;
47   -
  48 +#endif
48 49 void *memory_map; /* Address of read-only SPI flash access */
49 50 int (*read)(struct spi_flash *flash, u32 offset,
50 51 size_t len, void *buf);