Commit 1e94d07faf871ebe0fdd06de0b14dc048c742913

Authored by Robert Delien
Committed by Albert ARIBAUD
1 parent c67d9c5e58
Exists in master and in 55 other branches 8qm-imx_v2020.04_5.4.70_2.3.0, emb_lf_v2022.04, emb_lf_v2023.04, imx_v2015.04_4.1.15_1.0.0_ga, pitx_8mp_lf_v2020.04, smarc-8m-android-10.0.0_2.6.0, smarc-8m-android-11.0.0_2.0.0, smarc-8mp-android-11.0.0_2.0.0, smarc-emmc-imx_v2014.04_3.10.53_1.1.0_ga, smarc-emmc-imx_v2014.04_3.14.28_1.0.0_ga, smarc-imx-l5.0.0_1.0.0-ga, smarc-imx6_v2018.03_4.14.98_2.0.0_ga, smarc-imx7_v2017.03_4.9.11_1.0.0_ga, smarc-imx7_v2018.03_4.14.98_2.0.0_ga, smarc-imx_v2014.04_3.14.28_1.0.0_ga, smarc-imx_v2015.04_4.1.15_1.0.0_ga, smarc-imx_v2017.03_4.9.11_1.0.0_ga, smarc-imx_v2017.03_4.9.88_2.0.0_ga, smarc-imx_v2017.03_o8.1.0_1.3.0_8m, smarc-imx_v2018.03_4.14.78_1.0.0_ga, smarc-m6.0.1_2.1.0-ga, smarc-n7.1.2_2.0.0-ga, smarc-rel_imx_4.1.15_2.0.0_ga, smarc_8m-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8m-imx_v2019.04_4.19.35_1.1.0, smarc_8m_00d0-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2019.04_4.19.35_1.1.0, smarc_8mm-imx_v2020.04_5.4.24_2.1.0, smarc_8mp_lf_v2020.04, smarc_8mq-imx_v2020.04_5.4.24_2.1.0, smarc_8mq_lf_v2020.04, ti-u-boot-2015.07, u-boot-2013.01.y, v2013.10, v2013.10-smarct33, v2013.10-smartmen, v2014.01, v2014.04, v2014.04-smarct33, v2014.04-smarct33-emmc, v2014.04-smartmen, v2014.07, v2014.07-smarct33, v2014.07-smartmen, v2015.07-smarct33, v2015.07-smarct33-emmc, v2015.07-smarct4x, v2016.05-dlt, v2016.05-smarct3x, v2016.05-smarct3x-emmc, v2016.05-smarct4x, v2017.01-smarct3x, v2017.01-smarct3x-emmc, v2017.01-smarct4x

i.mx28: Replaced magic numbers for scratch register addresses with register definitions

This patch replaces the use of magice numbers for scratch register
addresses with earlier defined register definitions.

Signed-off-by: Robert Delien <robert@delien.nl>

Showing 2 changed files with 8 additions and 8 deletions Side-by-side Diff

arch/arm/cpu/arm926ejs/mx28/mx28.c
... ... @@ -261,14 +261,14 @@
261 261 }
262 262 #endif
263 263  
264   -#define HW_DIGCTRL_SCRATCH0 0x8001c280
265   -#define HW_DIGCTRL_SCRATCH1 0x8001c290
266 264 int mx28_dram_init(void)
267 265 {
  266 + struct mx28_digctl_regs *digctl_regs =
  267 + (struct mx28_digctl_regs *)MXS_DIGCTL_BASE;
268 268 uint32_t sz[2];
269 269  
270   - sz[0] = readl(HW_DIGCTRL_SCRATCH0);
271   - sz[1] = readl(HW_DIGCTRL_SCRATCH1);
  270 + sz[0] = readl(&digctl_regs->hw_digctl_scratch0);
  271 + sz[1] = readl(&digctl_regs->hw_digctl_scratch1);
272 272  
273 273 if (sz[0] != sz[1]) {
274 274 printf("MX28:\n"
arch/arm/cpu/arm926ejs/mx28/spl_mem_init.c
... ... @@ -165,8 +165,6 @@
165 165 &power_regs->hw_power_vdddctrl);
166 166 }
167 167  
168   -#define HW_DIGCTRL_SCRATCH0 0x8001c280
169   -#define HW_DIGCTRL_SCRATCH1 0x8001c290
170 168 void data_abort_memdetect_handler(void) __attribute__((naked));
171 169 void data_abort_memdetect_handler(void)
172 170 {
... ... @@ -175,6 +173,8 @@
175 173  
176 174 void mx28_mem_get_size(void)
177 175 {
  176 + struct mx28_digctl_regs *digctl_regs =
  177 + (struct mx28_digctl_regs *)MXS_DIGCTL_BASE;
178 178 uint32_t sz, da;
179 179 uint32_t *vt = (uint32_t *)0x20;
180 180  
... ... @@ -183,8 +183,8 @@
183 183 vt[4] = (uint32_t)&data_abort_memdetect_handler;
184 184  
185 185 sz = get_ram_size((long *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE);
186   - writel(sz, HW_DIGCTRL_SCRATCH0);
187   - writel(sz, HW_DIGCTRL_SCRATCH1);
  186 + writel(sz, &digctl_regs->hw_digctl_scratch0);
  187 + writel(sz, &digctl_regs->hw_digctl_scratch1);
188 188  
189 189 /* Restore the old DABT handler. */
190 190 vt[4] = da;