Commit 1f5f18717254d6d0c0758580980ff096a8587b9d

Authored by Marek Vasut
1 parent 5df93c5564

arm: socfpga: sockit: Remove Micrel PHY configuration

The Micrel PHY configuration is now done from OF, so hard-coding
the configuration into the board file is no longer necessary.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>

Showing 2 changed files with 0 additions and 47 deletions Side-by-side Diff

board/terasic/sockit/socfpga.c
... ... @@ -12,10 +12,6 @@
12 12 #include <usb/dwc2_udc.h>
13 13 #include <usb_mass_storage.h>
14 14  
15   -#include <micrel.h>
16   -#include <netdev.h>
17   -#include <phy.h>
18   -
19 15 DECLARE_GLOBAL_DATA_PTR;
20 16  
21 17 void s_init(void) {}
... ... @@ -30,42 +26,6 @@
30 26  
31 27 return 0;
32 28 }
33   -
34   -/*
35   - * PHY configuration
36   - */
37   -#ifdef CONFIG_PHY_MICREL_KSZ9021
38   -int board_phy_config(struct phy_device *phydev)
39   -{
40   - int ret;
41   - /*
42   - * These skew settings for the KSZ9021 ethernet phy is required for ethernet
43   - * to work reliably on most flavors of cyclone5 boards.
44   - */
45   - ret = ksz9021_phy_extended_write(phydev,
46   - MII_KSZ9021_EXT_RGMII_RX_DATA_SKEW,
47   - 0x0);
48   - if (ret)
49   - return ret;
50   -
51   - ret = ksz9021_phy_extended_write(phydev,
52   - MII_KSZ9021_EXT_RGMII_TX_DATA_SKEW,
53   - 0x0);
54   - if (ret)
55   - return ret;
56   -
57   - ret = ksz9021_phy_extended_write(phydev,
58   - MII_KSZ9021_EXT_RGMII_CLOCK_SKEW,
59   - 0xf0f0);
60   - if (ret)
61   - return ret;
62   -
63   - if (phydev->drv->config)
64   - return phydev->drv->config(phydev);
65   -
66   - return 0;
67   -}
68   -#endif
69 29  
70 30 #ifdef CONFIG_USB_GADGET
71 31 struct dwc2_plat_otg_data socfpga_otg_data = {
include/configs/socfpga_sockit.h
... ... @@ -47,15 +47,8 @@
47 47  
48 48 /* Ethernet on SoC (EMAC) */
49 49 #if defined(CONFIG_CMD_NET)
50   -
51   -/* PHY */
52 50 #define CONFIG_PHY_MICREL
53 51 #define CONFIG_PHY_MICREL_KSZ9021
54   -#define CONFIG_KSZ9021_CLK_SKEW_ENV "micrel-ksz9021-clk-skew"
55   -#define CONFIG_KSZ9021_CLK_SKEW_VAL 0xf0f0
56   -#define CONFIG_KSZ9021_DATA_SKEW_ENV "micrel-ksz9021-data-skew"
57   -#define CONFIG_KSZ9021_DATA_SKEW_VAL 0x0
58   -
59 52 #endif
60 53  
61 54 #define CONFIG_ENV_IS_IN_MMC