Commit 208bd51396fb606dbdcf45b064e6b372d7dd3e81

Authored by Peng Fan
Committed by Albert ARIBAUD
1 parent ed64190f67

arm: armv8 correct value passed to __asm_dcache_all

>From source code comments:
"x0: 0 flush & invalidate, 1 invalidate only"

Current value 0xffff can make invalidate work, since we only judge whether
input value is 0 or not, see following code:
"
    tbz     w1, #0, 1f
    dc      isw, x9
    b       2f
1:  dc      cisw, x9      /* clean & invalidate by set/way */
2:  subs    x6, x6, #1    /* decrement the way */
"

Later we may add "2 clean only" support. So following the comments,
correct value from 0xffff to 1.

Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Cc: York Sun <yorksun@freescale.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>

Showing 1 changed file with 1 additions and 1 deletions Side-by-side Diff

arch/arm/cpu/armv8/cache.S
... ... @@ -112,7 +112,7 @@
112 112  
113 113 ENTRY(__asm_invalidate_dcache_all)
114 114 mov x16, lr
115   - mov x0, #0xffff
  115 + mov x0, #0x1
116 116 bl __asm_dcache_all
117 117 mov lr, x16
118 118 ret