Eric Lee / smarc-uboot

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Commit 210841c690546dd9b7faeee47c56851dc508f131

Authored by Stefan Roese
1 parent 899fb9e352
Exists in smarc_8mq_lf_v2020.04 and in 22 other branches 8qm-imx_v2020.04_5.4.70_2.3.0, emb_lf_v2022.04, pitx_8mp_lf_v2020.04, smarc-8m-android-10.0.0_2.6.0, smarc-8m-android-11.0.0_2.0.0, smarc-8mp-android-11.0.0_2.0.0, smarc-imx6_v2018.03_4.14.98_2.0.0_ga, smarc-imx7_v2017.03_4.9.11_1.0.0_ga, smarc-imx7_v2018.03_4.14.98_2.0.0_ga, smarc-imx_v2017.03_4.9.11_1.0.0_ga, smarc-imx_v2017.03_4.9.88_2.0.0_ga, smarc-imx_v2017.03_o8.1.0_1.3.0_8m, smarc-imx_v2018.03_4.14.78_1.0.0_ga, smarc-n7.1.2_2.0.0-ga, smarc_8m-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8m-imx_v2019.04_4.19.35_1.1.0, smarc_8m_00d0-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2019.04_4.19.35_1.1.0, smarc_8mm-imx_v2020.04_5.4.24_2.1.0, smarc_8mp_lf_v2020.04, smarc_8mq-imx_v2020.04_5.4.24_2.1.0

mmc: sdhci: Add support for optional controller specific set_ios_post() 

Some SDHCI drivers might need to do some special controller configuration
after the common clock set_ios() function has been called (speed / width
configuration). This patch adds a call to the newly created function
set_ios_port() when its configured in the host driver.

This will be used by the Xenon SDHCI controller driver used on the
Marvell Armada 3700 and 7k/8k ARM64 SoCs.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>

Showing 2 changed files with 5 additions and 0 deletions Side-by-side Diff

... ... @@ -458,6 +458,10 @@
458 458  
459 459 sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL);
460 460  
  461 + /* If available, call the driver specific "post" set_ios() function */
  462 + if (host->ops && host->ops->set_ios_post)
  463 + host->ops->set_ios_post(host);
  464 +
461 465 return 0;
462 466 }
463 467  
... ... @@ -235,6 +235,7 @@
235 235 #endif
236 236 int (*get_cd)(struct sdhci_host *host);
237 237 void (*set_control_reg)(struct sdhci_host *host);
  238 + void (*set_ios_post)(struct sdhci_host *host);
238 239 void (*set_clock)(struct sdhci_host *host, u32 div);
239 240 };
240 241