Eric Lee / smarc-uboot

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Commit 21a9f435f340b0936aa0bfc29fdd3efa1d329ea2

Authored by Lukasz Majewski
Committed by Marek Vasut
1 parent a6fbf94550
Exists in smarc_8mq_lf_v2020.04 and in 17 other branches 8qm-imx_v2020.04_5.4.70_2.3.0, emb_lf_v2022.04, pitx_8mp_lf_v2020.04, smarc-8m-android-10.0.0_2.6.0, smarc-8m-android-11.0.0_2.0.0, smarc-8mp-android-11.0.0_2.0.0, smarc-imx6_v2018.03_4.14.98_2.0.0_ga, smarc-imx7_v2018.03_4.14.98_2.0.0_ga, smarc-imx_v2018.03_4.14.78_1.0.0_ga, smarc_8m-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8m-imx_v2019.04_4.19.35_1.1.0, smarc_8m_00d0-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2019.04_4.19.35_1.1.0, smarc_8mm-imx_v2020.04_5.4.24_2.1.0, smarc_8mp_lf_v2020.04, smarc_8mq-imx_v2020.04_5.4.24_2.1.0

Convert socfpga: select CONFIG_HW_WATCHDOG support for ARCH_SOCFPGA 

All Socfpga boards from ./include/configs/socfpga_* define
CONFIG_HW_WATCHDOG.
To ease CONFIG_HW_WATCHDOG conversion to Kconfig select it in
config ARCH_SOCFPGA (arch/arm/Kconfig) section.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
Signed-off-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>

Showing 13 changed files with 1 additions and 24 deletions Side-by-side Diff

... ... @@ -701,6 +701,7 @@
701 701 select DM_SPI_FLASH
702 702 select DM_SPI
703 703 select ENABLE_ARM_SOC_BOOT0_HOOK
  704 + select HW_WATCHDOG
704 705 select ARCH_EARLY_INIT_R
705 706 select ARCH_MISC_INIT
706 707 select SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
include/configs/socfpga_arria10_socdk.h
Diff comments   View file @ 21a9f43
... ... @@ -9,8 +9,6 @@
9 9  
10 10 #include <asm/arch/base_addr_a10.h>
11 11  
12   -#define CONFIG_HW_WATCHDOG
13   -
14 12 /* Booting Linux */
15 13 #define CONFIG_LOADADDR 0x01000000
16 14 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
include/configs/socfpga_arria5_socdk.h
Diff comments   View file @ 21a9f43
... ... @@ -8,8 +8,6 @@
8 8  
9 9 #include <asm/arch/base_addr_ac5.h>
10 10  
11   -#define CONFIG_HW_WATCHDOG
12   -
13 11 /* Memory configurations */
14 12 #define PHYS_SDRAM_1_SIZE 0x40000000 /* 1GiB on SoCDK */
15 13  
include/configs/socfpga_cyclone5_socdk.h
Diff comments   View file @ 21a9f43
... ... @@ -8,8 +8,6 @@
8 8  
9 9 #include <asm/arch/base_addr_ac5.h>
10 10  
11   -#define CONFIG_HW_WATCHDOG
12   -
13 11 /* Memory configurations */
14 12 #define PHYS_SDRAM_1_SIZE 0x40000000 /* 1GiB on SoCDK */
15 13  
include/configs/socfpga_de0_nano_soc.h
Diff comments   View file @ 21a9f43
... ... @@ -8,8 +8,6 @@
8 8  
9 9 #include <asm/arch/base_addr_ac5.h>
10 10  
11   -#define CONFIG_HW_WATCHDOG
12   -
13 11 /* Memory configurations */
14 12 #define PHYS_SDRAM_1_SIZE 0x40000000 /* 1GiB */
15 13  
include/configs/socfpga_de10_nano.h
Diff comments   View file @ 21a9f43
... ... @@ -8,8 +8,6 @@
8 8  
9 9 #include <asm/arch/base_addr_ac5.h>
10 10  
11   -#define CONFIG_HW_WATCHDOG
12   -
13 11 /* Memory configurations */
14 12 #define PHYS_SDRAM_1_SIZE 0x40000000 /* 1GiB */
15 13  
include/configs/socfpga_de1_soc.h
Diff comments   View file @ 21a9f43
... ... @@ -8,8 +8,6 @@
8 8  
9 9 #include <asm/arch/base_addr_ac5.h>
10 10  
11   -#define CONFIG_HW_WATCHDOG
12   -
13 11 /* Memory configurations */
14 12 #define PHYS_SDRAM_1_SIZE 0x40000000 /* 1GiB */
15 13  
include/configs/socfpga_is1.h
Diff comments   View file @ 21a9f43
... ... @@ -9,8 +9,6 @@
9 9  
10 10 #include <asm/arch/base_addr_ac5.h>
11 11  
12   -#define CONFIG_HW_WATCHDOG
13   -
14 12 /* Memory configurations */
15 13 #define PHYS_SDRAM_1_SIZE 0x10000000
16 14  
include/configs/socfpga_mcvevk.h
Diff comments   View file @ 21a9f43
... ... @@ -8,8 +8,6 @@
8 8  
9 9 #include <asm/arch/base_addr_ac5.h>
10 10  
11   -#define CONFIG_HW_WATCHDOG
12   -
13 11 /* Memory configurations */
14 12 #define PHYS_SDRAM_1_SIZE 0x40000000 /* 1GiB on MCV */
15 13  
include/configs/socfpga_sockit.h
Diff comments   View file @ 21a9f43
... ... @@ -8,8 +8,6 @@
8 8  
9 9 #include <asm/arch/base_addr_ac5.h>
10 10  
11   -#define CONFIG_HW_WATCHDOG
12   -
13 11 /* Memory configurations */
14 12 #define PHYS_SDRAM_1_SIZE 0x40000000 /* 1GiB on SoCDK */
15 13  
include/configs/socfpga_socrates.h
Diff comments   View file @ 21a9f43
... ... @@ -8,8 +8,6 @@
8 8  
9 9 #include <asm/arch/base_addr_ac5.h>
10 10  
11   -#define CONFIG_HW_WATCHDOG
12   -
13 11 /* Memory configurations */
14 12 #define PHYS_SDRAM_1_SIZE 0x40000000 /* 1GiB on SoCrates */
15 13  
include/configs/socfpga_sr1500.h
Diff comments   View file @ 21a9f43
... ... @@ -8,8 +8,6 @@
8 8  
9 9 #include <asm/arch/base_addr_ac5.h>
10 10  
11   -#define CONFIG_HW_WATCHDOG
12   -
13 11 /* Memory configurations */
14 12 #define PHYS_SDRAM_1_SIZE 0x40000000 /* 1GiB on SR1500 */
15 13  
include/configs/socfpga_vining_fpga.h
Diff comments   View file @ 21a9f43
... ... @@ -8,8 +8,6 @@
8 8  
9 9 #include <asm/arch/base_addr_ac5.h>
10 10  
11   -#define CONFIG_HW_WATCHDOG
12   -
13 11 /* Memory configurations */
14 12 #define PHYS_SDRAM_1_SIZE 0x40000000 /* 1GiB on VINING_FPGA */
15 13