configs: k2hk_evm: config: add common EVM configuration header

This patch adds a common config header file for all the Keystone II EVM platforms. It combines a lot of general definitions in one file. The common header included in the EVM should be specific configuration header. Acked-by: Murali Karicheri <m-karicheri2@ti.com> Signed-off-by: Hao Zhang <hzhang@ti.com> Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>

configs: k2hk_evm: config: add common EVM configuration header
This patch adds a common config header file for all the Keystone II EVM platforms. It combines a lot of general definitions in one file. The common header included in the EVM should be specific configuration header. Acked-by: Murali Karicheri <m-karicheri2@ti.com> Signed-off-by: Hao Zhang <hzhang@ti.com> Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
Hao Zhang · Tom Rini
1 parent 8dfc15f56c
Showing 2 changed files with 289 additions and 244 deletions Side-by-side Diff
include/configs/k2hk_evm.h
include/configs/ks2_evm.h
@@ -14,258 +14,28 @@
 #define CONFIG_SOC_K2HK
 #define CONFIG_K2HK_EVM
  
-/* U-Boot Build Configuration */
-#define CONFIG_SKIP_LOWLEVEL_INIT       /* U-Boot is a 2nd stage loader */
-#define CONFIG_SYS_NO_FLASH             /* that is, no *NOR* flash */
-#define CONFIG_SYS_CONSOLE_INFO_QUIET
-#define CONFIG_BOARD_EARLY_INIT_F
-#define CONFIG_SYS_THUMB_BUILD
+/* U-Boot general configuration */
+#define CONFIG_SYS_PROMPT               "K2HK EVM # "
  
-/* SoC Configuration */
-#define CONFIG_ARMV7
-#define CONFIG_ARCH_CPU_INIT
-#define CONFIG_SYS_ARCH_TIMER
-#define CONFIG_SYS_HZ                   1000
-#define CONFIG_SYS_TEXT_BASE            0x0c001000
-#define CONFIG_SPL_TARGET               "u-boot-spi.gph"
-#define CONFIG_SYS_DCACHE_OFF
+#define KS2_ARGS_UBI   "args_ubi=setenv bootargs ${bootargs} rootfstype=ubifs "\
+		       "root=ubi0:rootfs rootflags=sync rw ubi.mtd=2,2048\0"
  
-/* Memory Configuration */
-#define CONFIG_NR_DRAM_BANKS            2
-#define CONFIG_SYS_SDRAM_BASE           0x80000000
-#define CONFIG_SYS_LPAE_SDRAM_BASE      0x800000000
-#define CONFIG_MAX_RAM_BANK_SIZE        (2 << 30)       /* 2GB */
-#define CONFIG_STACKSIZE                (512 << 10)     /* 512 KiB */
-#define CONFIG_SYS_MALLOC_LEN           (4 << 20)       /* 4 MiB */
-#define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_TEXT_BASE - \
-					 GENERATED_GBL_DATA_SIZE)
+#define KS2_FDT_NAME   "name_fdt=k2hk-evm.dtb\0"
+#define KS2_ADDR_MON   "addr_mon=0x0c5f0000\0"
+#define KS2_NAME_MON   "name_mon=skern-k2hk-evm.bin\0"
+#define NAME_UBOOT     "name_uboot=u-boot-spi-k2hk-evm.gph\0"
+#define NAME_UBI       "name_ubi=k2hk-evm-ubifs.ubi\0"
  
+#include <configs/ks2_evm.h>
+
 /* SPL SPI Loader Configuration */
-#define CONFIG_SPL_TEXT_BASE            0x0c200000
-#define CONFIG_SPL_PAD_TO               65536
-#define CONFIG_SPL_MAX_SIZE             (CONFIG_SPL_PAD_TO - 8)
-#define CONFIG_SPL_BSS_START_ADDR       (CONFIG_SPL_TEXT_BASE + \
-					 CONFIG_SPL_MAX_SIZE)
-#define CONFIG_SPL_BSS_MAX_SIZE         (32 * 1024)
-#define CONFIG_SYS_SPL_MALLOC_START     (CONFIG_SPL_BSS_START_ADDR + \
-					 CONFIG_SPL_BSS_MAX_SIZE)
-#define CONFIG_SYS_SPL_MALLOC_SIZE      (32 * 1024)
-#define CONFIG_SPL_STACK_SIZE           (8 * 1024)
-#define CONFIG_SPL_STACK                (CONFIG_SYS_SPL_MALLOC_START + \
-					 CONFIG_SYS_SPL_MALLOC_SIZE + \
-					 CONFIG_SPL_STACK_SIZE - 4)
-#define CONFIG_SPL_LIBCOMMON_SUPPORT
-#define CONFIG_SPL_LIBGENERIC_SUPPORT
-#define CONFIG_SPL_SERIAL_SUPPORT
-#define CONFIG_SPL_SPI_FLASH_SUPPORT
-#define CONFIG_SPL_SPI_SUPPORT
-#define CONFIG_SPL_BOARD_INIT
-#define CONFIG_SPL_SPI_LOAD
-#define CONFIG_SPL_SPI_BUS              0
-#define CONFIG_SPL_SPI_CS               0
-#define CONFIG_SYS_SPI_U_BOOT_OFFS      CONFIG_SPL_PAD_TO
-#define CONFIG_SPL_FRAMEWORK
+#define CONFIG_SPL_TEXT_BASE		0x0c200000
  
-/* UART Configuration */
-#define CONFIG_SYS_NS16550
-#define CONFIG_SYS_NS16550_SERIAL
-#define CONFIG_SYS_NS16550_MEM32
-#define CONFIG_SYS_NS16550_REG_SIZE     -4
-#define CONFIG_SYS_NS16550_COM1         KS2_UART0_BASE
-#define CONFIG_SYS_NS16550_COM2         KS2_UART1_BASE
-#define CONFIG_SYS_NS16550_CLK          clk_get_rate(KS2_CLK1_6)
-#define CONFIG_CONS_INDEX               1
-#define CONFIG_BAUDRATE                 115200
-
-/* SPI Configuration */
-#define CONFIG_SPI
-#define CONFIG_SPI_FLASH
-#define CONFIG_SPI_FLASH_STMICRO
-#define CONFIG_DAVINCI_SPI
-#define CONFIG_SYS_SPI0
-#define CONFIG_SYS_SPI_BASE             KS2_SPI_BASE
-#define CONFIG_SYS_SPI0_NUM_CS          4
-#define CONFIG_SYS_SPI1
-#define CONFIG_SYS_SPI1_BASE            KS2_SPI1_BASE
-#define CONFIG_SYS_SPI1_NUM_CS          4
-#define CONFIG_SYS_SPI2
-#define CONFIG_SYS_SPI2_NUM_CS          4
-#define CONFIG_SYS_SPI2_BASE            KS2_SPI2_BASE
-#define CONFIG_CMD_SPI
-#define CONFIG_SYS_SPI_CLK              clk_get_rate(KS2_LPSC_EMIF25_SPI)
-#define CONFIG_SF_DEFAULT_SPEED         30000000
-#define CONFIG_ENV_SPI_MAX_HZ           CONFIG_SF_DEFAULT_SPEED
-
-/* I2C Configuration */
-#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_DAVINCI
-#define CONFIG_SYS_DAVINCI_I2C_SPEED    100000
-#define CONFIG_SYS_DAVINCI_I2C_SLAVE    0x10 /* SMBus host address */
-#define CONFIG_SYS_DAVINCI_I2C_SPEED1   100000
-#define CONFIG_SYS_DAVINCI_I2C_SLAVE1   0x10 /* SMBus host address */
-#define CONFIG_SYS_DAVINCI_I2C_SPEED2   100000
-#define CONFIG_SYS_DAVINCI_I2C_SLAVE2   0x10 /* SMBus host address */
-#define I2C_BUS_MAX                     3
-
-/* EEPROM definitions */
-#define CONFIG_SYS_I2C_MULTI_EEPROMS
-#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN         2
-#define CONFIG_SYS_I2C_EEPROM_ADDR             0x50
-#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS      6
-#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS  20
-#define CONFIG_ENV_EEPROM_IS_ON_I2C
-
-/* Network Configuration */
-#define CONFIG_DRIVER_TI_KEYSTONE_NET
-#define CONFIG_MII
-#define CONFIG_BOOTP_DEFAULT
-#define CONFIG_BOOTP_DNS
-#define CONFIG_BOOTP_DNS2
-#define CONFIG_BOOTP_SEND_HOSTNAME
-#define CONFIG_NET_RETRY_COUNT                 32
-#define CONFIG_NET_MULTI
-#define CONFIG_GET_LINK_STATUS_ATTEMPTS        5
-#define CONFIG_SYS_SGMII_REFCLK_MHZ            312
-#define CONFIG_SYS_SGMII_LINERATE_MHZ          1250
-#define CONFIG_SYS_SGMII_RATESCALE             2
-
-/* AEMIF */
-#define CONFIG_TI_AEMIF
-#define CONFIG_AEMIF_CNTRL_BASE		       KS2_AEMIF_CNTRL_BASE
-
 /* NAND Configuration */
-#define CONFIG_NAND_DAVINCI
-#define CONFIG_KEYSTONE_RBL_NAND
-#define CONFIG_KEYSTONE_NAND_MAX_RBL_SIZE	CONFIG_ENV_OFFSET
-#define CONFIG_SYS_NAND_CS                     2
-#define CONFIG_SYS_NAND_USE_FLASH_BBT
-#define CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST
 #define CONFIG_SYS_NAND_PAGE_2K
-#define CONFIG_SYS_NAND_MASK_CLE		0x4000
-#define CONFIG_SYS_NAND_MASK_ALE		0x2000
  
-#define CONFIG_SYS_NAND_LARGEPAGE
-#define CONFIG_SYS_NAND_BASE_LIST       { 0x30000000, }
-#define CONFIG_SYS_MAX_NAND_DEVICE      1
-#define CONFIG_SYS_NAND_MAX_CHIPS       1
-#define CONFIG_SYS_NAND_NO_SUBPAGE_WRITE
-#define CONFIG_ENV_SIZE                 (256 << 10)  /* 256 KiB */
-#define CONFIG_ENV_IS_IN_NAND
-#define CONFIG_ENV_OFFSET               0x100000
-#define CONFIG_MTD_PARTITIONS
-#define CONFIG_MTD_DEVICE
-#define CONFIG_RBTREE
-#define CONFIG_LZO
-#define MTDIDS_DEFAULT			"nand0=davinci_nand.0"
-#define MTDPARTS_DEFAULT                "mtdparts=davinci_nand.0:" \
-					"1024k(bootloader)ro,512k(params)ro," \
-					"-(ubifs)"
-/* U-Boot command configuration */
-#include <config_cmd_default.h>
-#define CONFIG_CMD_ASKENV
-#define CONFIG_CMD_DHCP
-#define CONFIG_CMD_I2C
-#define CONFIG_CMD_PING
-#define CONFIG_CMD_SAVES
-#define CONFIG_CMD_MTDPARTS
-#define CONFIG_CMD_NAND
-#define CONFIG_CMD_UBI
-#define CONFIG_CMD_UBIFS
-#define CONFIG_CMD_SF
-#define CONFIG_CMD_EEPROM
-
-/* U-Boot general configuration */
-#define CONFIG_SYS_GENERIC_BOARD
-#define CONFIG_SYS_PROMPT               "K2HK EVM # "
-#define CONFIG_SYS_CBSIZE               1024
-#define CONFIG_SYS_PBSIZE		2048
-#define CONFIG_SYS_MAXARGS              16
-#define CONFIG_SYS_HUSH_PARSER
-#define CONFIG_SYS_LONGHELP
-#define CONFIG_CRC32_VERIFY
-#define CONFIG_MX_CYCLIC
-#define CONFIG_CMDLINE_EDITING
-#define CONFIG_VERSION_VARIABLE
-#define CONFIG_TIMESTAMP
-
-#define CONFIG_BOOTDELAY                3
-#define CONFIG_BOOTFILE                 "uImage"
-#define CONFIG_EXTRA_ENV_SETTINGS					\
-	"boot=ramfs\0"							\
-	"tftp_root=/\0"							\
-	"nfs_root=/export\0"						\
-	"mem_lpae=1\0"							\
-	"mem_reserve=512M\0"						\
-	"addr_fdt=0x87000000\0"						\
-	"addr_kern=0x88000000\0"					\
-	"addr_mon=0x0c5f0000\0"						\
-	"addr_uboot=0x87000000\0"					\
-	"addr_fs=0x82000000\0"						\
-	"addr_ubi=0x82000000\0"						\
-	"fdt_high=0xffffffff\0"						\
-	"name_fdt=uImage-k2hk-evm.dtb\0"				\
-	"name_fs=arago-console-image.cpio.gz\0"				\
-	"name_kern=uImage-keystone-evm.bin\0"				\
-	"name_mon=skern-keystone-evm.bin\0"				\
-	"name_uboot=u-boot-spi-keystone-evm.gph\0"			\
-	"name_ubi=keystone-evm-ubifs.ubi\0"				\
-	"run_mon=mon_install ${addr_mon}\0"				\
-	"run_kern=bootm ${addr_kern} - ${addr_fdt}\0"			\
-	"init_net=run args_all args_net\0"				\
-	"init_ubi=run args_all args_ubi; "				\
-		"ubi part ubifs; ubifsmount boot\0"			\
-	"get_fdt_net=dhcp ${addr_fdt} ${tftp_root}/${name_fdt}\0"	\
-	"get_fdt_ubi=ubifsload ${addr_fdt} ${name_fdt}\0"		\
-	"get_kern_net=dhcp ${addr_kern} ${tftp_root}/${name_kern}\0"	\
-	"get_kern_ubi=ubifsload ${addr_kern} ${name_kern}\0"		\
-	"get_mon_net=dhcp ${addr_mon} ${tftp_root}/${name_mon}\0"	\
-	"get_mon_ubi=ubifsload ${addr_mon} ${name_mon}\0"		\
-	"get_uboot_net=dhcp ${addr_uboot} ${tftp_root}/${name_uboot}\0"	\
-	"burn_uboot_spi=sf probe; sf erase 0 0x100000; "		\
-		"sf write ${addr_uboot} 0 ${filesize}\0"		\
-	"burn_uboot_nand=nand erase 0 0x100000; "			\
-		"nand write ${addr_uboot} 0 ${filesize}\0"		\
-	"args_all=setenv bootargs console=ttyS0,115200n8 rootwait=1\0"	\
-	"args_ubi=setenv bootargs ${bootargs} rootfstype=ubifs "	\
-		"root=ubi0:rootfs rootflags=sync rw ubi.mtd=2,2048\0"	\
-	"args_net=setenv bootargs ${bootargs} rootfstype=nfs "		\
-		"root=/dev/nfs rw nfsroot=${serverip}:${nfs_root},"	\
-		"${nfs_options} ip=dhcp\0"				\
-	"nfs_options=v3,tcp,rsize=4096,wsize=4096\0"			\
-	"get_fdt_ramfs=dhcp ${addr_fdt} ${tftp_root}/${name_fdt}\0"	\
-	"get_kern_ramfs=dhcp ${addr_kern} ${tftp_root}/${name_kern}\0"	\
-	"get_mon_ramfs=dhcp ${addr_mon} ${tftp_root}/${name_mon}\0"	\
-	"get_fs_ramfs=dhcp ${addr_fs} ${tftp_root}/${name_fs}\0"	\
-	"get_ubi_net=dhcp ${addr_ubi} ${tftp_root}/${name_ubi}\0"	\
-	"burn_ubi=nand erase.part ubifs; "				\
-		"nand write ${addr_ubi} ubifs ${filesize}\0"		\
-	"init_ramfs=run args_all args_ramfs get_fs_ramfs\0"		\
-	"args_ramfs=setenv bootargs ${bootargs} earlyprintk "		\
-		"rdinit=/sbin/init rw root=/dev/ram0 "			\
-		"initrd=0x802000000,9M\0"				\
-	"no_post=1\0"							\
-	"mtdparts=mtdparts=davinci_nand.0:"				\
-		"1024k(bootloader)ro,512k(params)ro,522752k(ubifs)\0"
-#define CONFIG_BOOTCOMMAND						\
-	"run init_${boot} get_fdt_${boot} get_mon_${boot} "		\
-		"get_kern_${boot} run_mon run_kern"
-#define CONFIG_BOOTARGS							\
-
-/* Linux interfacing */
-#define CONFIG_CMDLINE_TAG
-#define CONFIG_SETUP_MEMORY_TAGS
-#define CONFIG_OF_LIBFDT                1
-#define CONFIG_OF_BOARD_SETUP
-#define CONFIG_SYS_BARGSIZE             1024
-#define CONFIG_SYS_LOAD_ADDR            (CONFIG_SYS_SDRAM_BASE + 0x08000000)
-#define CONFIG_LINUX_BOOT_PARAM_ADDR	(CONFIG_SYS_SDRAM_BASE + 0x100)
-
-#define CONFIG_SUPPORT_RAW_INITRD
-
-/* we may include files below only after all above definitions */
-#include <asm/arch/hardware.h>
-#include <asm/arch/clock.h>
-#define CONFIG_SYS_HZ_CLOCK             clk_get_rate(KS2_CLK1_6)
+/* Network */
+#define CONFIG_DRIVER_TI_KEYSTONE_NET
  
 #endif /* __CONFIG_K2HK_EVM_H */
+/*
+ * Common configuration header file for all Keystone II EVM platforms
+ *
+ * (C) Copyright 2012-2014
+ *     Texas Instruments Incorporated, <www.ti.com>
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#ifndef __CONFIG_KS2_EVM_H
+#define __CONFIG_KS2_EVM_H
+
+#define CONFIG_SOC_KEYSTONE
+
+/* U-Boot Build Configuration */
+#define CONFIG_SKIP_LOWLEVEL_INIT	/* U-Boot is a 2nd stage loader */
+#define CONFIG_SYS_NO_FLASH		/* that is, no *NOR* flash */
+#define CONFIG_SYS_CONSOLE_INFO_QUIET
+#define CONFIG_BOARD_EARLY_INIT_F
+#define CONFIG_SYS_THUMB_BUILD
+
+/* SoC Configuration */
+#define CONFIG_ARMV7
+#define CONFIG_ARCH_CPU_INIT
+#define CONFIG_SYS_ARCH_TIMER
+#define CONFIG_SYS_HZ			1000
+#define CONFIG_SYS_TEXT_BASE		0x0c001000
+#define CONFIG_SPL_TARGET		"u-boot-spi.gph"
+#define CONFIG_SYS_DCACHE_OFF
+
+/* Memory Configuration */
+#define CONFIG_NR_DRAM_BANKS		2
+#define CONFIG_SYS_SDRAM_BASE		0x80000000
+#define CONFIG_SYS_LPAE_SDRAM_BASE	0x800000000
+#define CONFIG_MAX_RAM_BANK_SIZE	(2 << 30)       /* 2GB */
+#define CONFIG_STACKSIZE		(512 << 10)     /* 512 KiB */
+#define CONFIG_SYS_MALLOC_LEN		(4 << 20)       /* 4 MiB */
+#define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_TEXT_BASE - \
+					GENERATED_GBL_DATA_SIZE)
+
+/* SPL SPI Loader Configuration */
+#define CONFIG_SPL_PAD_TO		65536
+#define CONFIG_SPL_MAX_SIZE		(CONFIG_SPL_PAD_TO - 8)
+#define CONFIG_SPL_BSS_START_ADDR	(CONFIG_SPL_TEXT_BASE + \
+					CONFIG_SPL_MAX_SIZE)
+#define CONFIG_SPL_BSS_MAX_SIZE		(32 * 1024)
+#define CONFIG_SYS_SPL_MALLOC_START	(CONFIG_SPL_BSS_START_ADDR + \
+					CONFIG_SPL_BSS_MAX_SIZE)
+#define CONFIG_SYS_SPL_MALLOC_SIZE	(32 * 1024)
+#define CONFIG_SPL_STACK_SIZE		(8 * 1024)
+#define CONFIG_SPL_STACK		(CONFIG_SYS_SPL_MALLOC_START + \
+					CONFIG_SYS_SPL_MALLOC_SIZE + \
+					CONFIG_SPL_STACK_SIZE - 4)
+#define CONFIG_SPL_LIBCOMMON_SUPPORT
+#define CONFIG_SPL_LIBGENERIC_SUPPORT
+#define CONFIG_SPL_SERIAL_SUPPORT
+#define CONFIG_SPL_SPI_FLASH_SUPPORT
+#define CONFIG_SPL_SPI_SUPPORT
+#define CONFIG_SPL_BOARD_INIT
+#define CONFIG_SPL_SPI_LOAD
+#define CONFIG_SPL_SPI_BUS		0
+#define CONFIG_SPL_SPI_CS		0
+#define CONFIG_SYS_SPI_U_BOOT_OFFS	CONFIG_SPL_PAD_TO
+#define CONFIG_SPL_FRAMEWORK
+
+/* UART Configuration */
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_MEM32
+#define CONFIG_SYS_NS16550_REG_SIZE	-4
+#define CONFIG_SYS_NS16550_COM1		KS2_UART0_BASE
+#define CONFIG_SYS_NS16550_COM2		KS2_UART1_BASE
+#define CONFIG_SYS_NS16550_CLK		clk_get_rate(KS2_CLK1_6)
+#define CONFIG_CONS_INDEX		1
+#define CONFIG_BAUDRATE			115200
+
+/* SPI Configuration */
+#define CONFIG_SPI
+#define CONFIG_SPI_FLASH
+#define CONFIG_SPI_FLASH_STMICRO
+#define CONFIG_DAVINCI_SPI
+#define CONFIG_CMD_SPI
+#define CONFIG_SYS_SPI_CLK		clk_get_rate(KS2_LPSC_EMIF25_SPI)
+#define CONFIG_SF_DEFAULT_SPEED		30000000
+#define CONFIG_ENV_SPI_MAX_HZ		CONFIG_SF_DEFAULT_SPEED
+#define CONFIG_SYS_SPI0
+#define CONFIG_SYS_SPI_BASE		KS2_SPI0_BASE
+#define CONFIG_SYS_SPI0_NUM_CS		4
+#define CONFIG_SYS_SPI1
+#define CONFIG_SYS_SPI1_BASE		KS2_SPI1_BASE
+#define CONFIG_SYS_SPI1_NUM_CS		4
+#define CONFIG_SYS_SPI2
+#define CONFIG_SYS_SPI2_BASE		KS2_SPI2_BASE
+#define CONFIG_SYS_SPI2_NUM_CS		4
+
+/* Network Configuration */
+#define CONFIG_MII
+#define CONFIG_BOOTP_DEFAULT
+#define CONFIG_BOOTP_DNS
+#define CONFIG_BOOTP_DNS2
+#define CONFIG_BOOTP_SEND_HOSTNAME
+#define CONFIG_NET_RETRY_COUNT		32
+#define CONFIG_NET_MULTI
+#define CONFIG_GET_LINK_STATUS_ATTEMPTS	5
+#define CONFIG_SYS_SGMII_REFCLK_MHZ	312
+#define CONFIG_SYS_SGMII_LINERATE_MHZ	1250
+#define CONFIG_SYS_SGMII_RATESCALE	2
+
+/* AEMIF */
+#define CONFIG_TI_AEMIF
+#define CONFIG_AEMIF_CNTRL_BASE		KS2_AEMIF_CNTRL_BASE
+
+/* I2C Configuration */
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_DAVINCI
+#define CONFIG_SYS_DAVINCI_I2C_SPEED	100000
+#define CONFIG_SYS_DAVINCI_I2C_SLAVE	0x10 /* SMBus host address */
+#define CONFIG_SYS_DAVINCI_I2C_SPEED1	100000
+#define CONFIG_SYS_DAVINCI_I2C_SLAVE1	0x10 /* SMBus host address */
+#define CONFIG_SYS_DAVINCI_I2C_SPEED2	100000
+#define CONFIG_SYS_DAVINCI_I2C_SLAVE2	0x10 /* SMBus host address */
+#define I2C_BUS_MAX			3
+
+/* EEPROM definitions */
+#define CONFIG_SYS_I2C_MULTI_EEPROMS
+#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN		2
+#define CONFIG_SYS_I2C_EEPROM_ADDR		0x50
+#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	6
+#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	20
+#define CONFIG_ENV_EEPROM_IS_ON_I2C
+
+/* NAND Configuration */
+#define CONFIG_NAND_DAVINCI
+#define CONFIG_KEYSTONE_RBL_NAND
+#define CONFIG_KEYSTONE_NAND_MAX_RBL_SIZE	CONFIG_ENV_OFFSET
+#define CONFIG_SYS_NAND_MASK_CLE		0x4000
+#define CONFIG_SYS_NAND_MASK_ALE		0x2000
+#define CONFIG_SYS_NAND_CS			2
+#define CONFIG_SYS_NAND_USE_FLASH_BBT
+#define CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST
+
+#define CONFIG_SYS_NAND_LARGEPAGE
+#define CONFIG_SYS_NAND_BASE_LIST		{ 0x30000000, }
+#define CONFIG_SYS_MAX_NAND_DEVICE		1
+#define CONFIG_SYS_NAND_MAX_CHIPS		1
+#define CONFIG_SYS_NAND_NO_SUBPAGE_WRITE
+#define CONFIG_ENV_SIZE				(256 << 10)  /* 256 KiB */
+#define CONFIG_ENV_IS_IN_NAND
+#define CONFIG_ENV_OFFSET			0x100000
+#define CONFIG_MTD_PARTITIONS
+#define CONFIG_MTD_DEVICE
+#define CONFIG_RBTREE
+#define CONFIG_LZO
+#define MTDIDS_DEFAULT			"nand0=davinci_nand.0"
+#define MTDPARTS_DEFAULT		"mtdparts=davinci_nand.0:" \
+					"1024k(bootloader)ro,512k(params)ro," \
+					"-(ubifs)"
+
+/* U-Boot command configuration */
+#include <config_cmd_default.h>
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_SAVES
+#define CONFIG_CMD_MTDPARTS
+#define CONFIG_CMD_NAND
+#define CONFIG_CMD_UBI
+#define CONFIG_CMD_UBIFS
+#define CONFIG_CMD_SF
+#define CONFIG_CMD_EEPROM
+
+/* U-Boot general configuration */
+#define CONFIG_SYS_GENERIC_BOARD
+#define CONFIG_SYS_CBSIZE		1024
+#define CONFIG_SYS_PBSIZE		2048
+#define CONFIG_SYS_MAXARGS		16
+#define CONFIG_SYS_HUSH_PARSER
+#define CONFIG_SYS_LONGHELP
+#define CONFIG_CRC32_VERIFY
+#define CONFIG_MX_CYCLIC
+#define CONFIG_CMDLINE_EDITING
+#define CONFIG_VERSION_VARIABLE
+#define CONFIG_TIMESTAMP
+
+/* EDMA3 */
+#define CONFIG_TI_EDMA3
+
+#define CONFIG_BOOTDELAY		3
+#define CONFIG_BOOTFILE			"uImage"
+#define CONFIG_EXTRA_ENV_SETTINGS					\
+	"boot=ramfs\0"							\
+	"tftp_root=/\0"							\
+	"nfs_root=/export\0"						\
+	"mem_lpae=1\0"							\
+	"mem_reserve=512M\0"						\
+	"addr_fdt=0x87000000\0"						\
+	"addr_kern=0x88000000\0"					\
+	KS2_ADDR_MON							\
+	"addr_uboot=0x87000000\0"					\
+	"addr_fs=0x82000000\0"						\
+	"addr_ubi=0x82000000\0"						\
+	"addr_secdb_key=0xc000000\0"					\
+	"fdt_high=0xffffffff\0"						\
+	KS2_FDT_NAME							\
+	"name_fs=arago-console-image.cpio.gz\0"				\
+	"name_kern=uImage\0"						\
+	KS2_NAME_MON							\
+	NAME_UBOOT							\
+	NAME_UBI							\
+	"run_mon=mon_install ${addr_mon}\0"				\
+	"run_kern=bootm ${addr_kern} - ${addr_fdt}\0"			\
+	"init_net=run args_all args_net\0"				\
+	"init_ubi=run args_all args_ubi; "				\
+		"ubi part ubifs; ubifsmount boot;"			\
+		"ubifsload ${addr_secdb_key} securedb.key.bin;\0"       \
+	"get_fdt_net=dhcp ${addr_fdt} ${tftp_root}/${name_fdt}\0"	\
+	"get_fdt_ubi=ubifsload ${addr_fdt} ${name_fdt}\0"		\
+	"get_kern_net=dhcp ${addr_kern} ${tftp_root}/${name_kern}\0"	\
+	"get_kern_ubi=ubifsload ${addr_kern} ${name_kern}\0"		\
+	"get_mon_net=dhcp ${addr_mon} ${tftp_root}/${name_mon}\0"	\
+	"get_mon_ubi=ubifsload ${addr_mon} ${name_mon}\0"		\
+	"get_uboot_net=dhcp ${addr_uboot} ${tftp_root}/${name_uboot}\0"	\
+	"burn_uboot_spi=sf probe; sf erase 0 0x100000; "		\
+		"sf write ${addr_uboot} 0 ${filesize}\0"		\
+	"burn_uboot_nand=nand erase 0 0x100000; "			\
+		"nand write ${addr_uboot} 0 ${filesize}\0"		\
+	"args_all=setenv bootargs console=ttyS0,115200n8 rootwait=1\0"	\
+	KS2_ARGS_UBI							\
+	"args_net=setenv bootargs ${bootargs} rootfstype=nfs "		\
+		"root=/dev/nfs rw nfsroot=${serverip}:${nfs_root},"	\
+		"${nfs_options} ip=dhcp\0"				\
+	"nfs_options=v3,tcp,rsize=4096,wsize=4096\0"			\
+	"get_fdt_ramfs=dhcp ${addr_fdt} ${tftp_root}/${name_fdt}\0"	\
+	"get_kern_ramfs=dhcp ${addr_kern} ${tftp_root}/${name_kern}\0"	\
+	"get_mon_ramfs=dhcp ${addr_mon} ${tftp_root}/${name_mon}\0"	\
+	"get_fs_ramfs=dhcp ${addr_fs} ${tftp_root}/${name_fs}\0"	\
+	"get_ubi_net=dhcp ${addr_ubi} ${tftp_root}/${name_ubi}\0"	\
+	"burn_ubi=nand erase.part ubifs; "				\
+		"nand write ${addr_ubi} ubifs ${filesize}\0"		\
+	"init_ramfs=run args_all args_ramfs get_fs_ramfs\0"		\
+	"args_ramfs=setenv bootargs ${bootargs} "			\
+		"rdinit=/sbin/init rw root=/dev/ram0 "			\
+		"initrd=0x802000000,9M\0"				\
+	"no_post=1\0"							\
+	"mtdparts=mtdparts=davinci_nand.0:"				\
+		"1024k(bootloader)ro,512k(params)ro,-(ubifs)\0"
+
+#define CONFIG_BOOTCOMMAND						\
+	"run init_${boot} get_fdt_${boot} get_mon_${boot} "		\
+		"get_kern_${boot} run_mon run_kern"
+
+#define CONFIG_BOOTARGS							\
+
+/* Linux interfacing */
+#define CONFIG_CMDLINE_TAG
+#define CONFIG_SETUP_MEMORY_TAGS
+#define CONFIG_OF_LIBFDT		1
+#define CONFIG_OF_BOARD_SETUP
+#define CONFIG_SYS_BARGSIZE		1024
+#define CONFIG_SYS_LOAD_ADDR		(CONFIG_SYS_SDRAM_BASE + 0x08000000)
+#define CONFIG_LINUX_BOOT_PARAM_ADDR	(CONFIG_SYS_SDRAM_BASE + 0x100)
+
+#define CONFIG_SUPPORT_RAW_INITRD
+
+/* we may include files below only after all above definitions */
+#include <asm/arch/hardware.h>
+#include <asm/arch/clock.h>
+#define CONFIG_SYS_HZ_CLOCK		clk_get_rate(KS2_CLK1_6)
+
+/* Maximum memory size for relocated U-boot at the end of the DDR3 memory
+   which is NOT applicable for DDR ECC test */
+#define CONFIG_MAX_UBOOT_MEM_SIZE	(4 << 20)	/* 4 MiB */
+
+#endif /* __CONFIG_KS2_EVM_H */
...	...	@@ -14,258 +14,28 @@
14	14	#define CONFIG_SOC_K2HK
15	15	#define CONFIG_K2HK_EVM
16	16
17		-/* U-Boot Build Configuration */
18		-#define CONFIG_SKIP_LOWLEVEL_INIT /* U-Boot is a 2nd stage loader */
19		-#define CONFIG_SYS_NO_FLASH /* that is, no NOR flash */
20		-#define CONFIG_SYS_CONSOLE_INFO_QUIET
21		-#define CONFIG_BOARD_EARLY_INIT_F
22		-#define CONFIG_SYS_THUMB_BUILD
	17	+/* U-Boot general configuration */
	18	+#define CONFIG_SYS_PROMPT "K2HK EVM # "
23	19
24		-/* SoC Configuration */
25		-#define CONFIG_ARMV7
26		-#define CONFIG_ARCH_CPU_INIT
27		-#define CONFIG_SYS_ARCH_TIMER
28		-#define CONFIG_SYS_HZ 1000
29		-#define CONFIG_SYS_TEXT_BASE 0x0c001000
30		-#define CONFIG_SPL_TARGET "u-boot-spi.gph"
31		-#define CONFIG_SYS_DCACHE_OFF
	20	+#define KS2_ARGS_UBI "args_ubi=setenv bootargs ${bootargs} rootfstype=ubifs "\
	21	+ "root=ubi0:rootfs rootflags=sync rw ubi.mtd=2,2048\0"
32	22
33		-/* Memory Configuration */
34		-#define CONFIG_NR_DRAM_BANKS 2
35		-#define CONFIG_SYS_SDRAM_BASE 0x80000000
36		-#define CONFIG_SYS_LPAE_SDRAM_BASE 0x800000000
37		-#define CONFIG_MAX_RAM_BANK_SIZE (2 << 30) /* 2GB */
38		-#define CONFIG_STACKSIZE (512 << 10) /* 512 KiB */
39		-#define CONFIG_SYS_MALLOC_LEN (4 << 20) /* 4 MiB */
40		-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE - \
41		- GENERATED_GBL_DATA_SIZE)
	23	+#define KS2_FDT_NAME "name_fdt=k2hk-evm.dtb\0"
	24	+#define KS2_ADDR_MON "addr_mon=0x0c5f0000\0"
	25	+#define KS2_NAME_MON "name_mon=skern-k2hk-evm.bin\0"
	26	+#define NAME_UBOOT "name_uboot=u-boot-spi-k2hk-evm.gph\0"
	27	+#define NAME_UBI "name_ubi=k2hk-evm-ubifs.ubi\0"
42	28
	29	+#include <configs/ks2_evm.h>
	30	+
43	31	/* SPL SPI Loader Configuration */
44		-#define CONFIG_SPL_TEXT_BASE 0x0c200000
45		-#define CONFIG_SPL_PAD_TO 65536
46		-#define CONFIG_SPL_MAX_SIZE (CONFIG_SPL_PAD_TO - 8)
47		-#define CONFIG_SPL_BSS_START_ADDR (CONFIG_SPL_TEXT_BASE + \
48		- CONFIG_SPL_MAX_SIZE)
49		-#define CONFIG_SPL_BSS_MAX_SIZE (32 * 1024)
50		-#define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_BSS_START_ADDR + \
51		- CONFIG_SPL_BSS_MAX_SIZE)
52		-#define CONFIG_SYS_SPL_MALLOC_SIZE (32 * 1024)
53		-#define CONFIG_SPL_STACK_SIZE (8 * 1024)
54		-#define CONFIG_SPL_STACK (CONFIG_SYS_SPL_MALLOC_START + \
55		- CONFIG_SYS_SPL_MALLOC_SIZE + \
56		- CONFIG_SPL_STACK_SIZE - 4)
57		-#define CONFIG_SPL_LIBCOMMON_SUPPORT
58		-#define CONFIG_SPL_LIBGENERIC_SUPPORT
59		-#define CONFIG_SPL_SERIAL_SUPPORT
60		-#define CONFIG_SPL_SPI_FLASH_SUPPORT
61		-#define CONFIG_SPL_SPI_SUPPORT
62		-#define CONFIG_SPL_BOARD_INIT
63		-#define CONFIG_SPL_SPI_LOAD
64		-#define CONFIG_SPL_SPI_BUS 0
65		-#define CONFIG_SPL_SPI_CS 0
66		-#define CONFIG_SYS_SPI_U_BOOT_OFFS CONFIG_SPL_PAD_TO
67		-#define CONFIG_SPL_FRAMEWORK
	32	+#define CONFIG_SPL_TEXT_BASE 0x0c200000
68	33
69		-/* UART Configuration */
70		-#define CONFIG_SYS_NS16550
71		-#define CONFIG_SYS_NS16550_SERIAL
72		-#define CONFIG_SYS_NS16550_MEM32
73		-#define CONFIG_SYS_NS16550_REG_SIZE -4
74		-#define CONFIG_SYS_NS16550_COM1 KS2_UART0_BASE
75		-#define CONFIG_SYS_NS16550_COM2 KS2_UART1_BASE
76		-#define CONFIG_SYS_NS16550_CLK clk_get_rate(KS2_CLK1_6)
77		-#define CONFIG_CONS_INDEX 1
78		-#define CONFIG_BAUDRATE 115200
79		-
80		-/* SPI Configuration */
81		-#define CONFIG_SPI
82		-#define CONFIG_SPI_FLASH
83		-#define CONFIG_SPI_FLASH_STMICRO
84		-#define CONFIG_DAVINCI_SPI
85		-#define CONFIG_SYS_SPI0
86		-#define CONFIG_SYS_SPI_BASE KS2_SPI_BASE
87		-#define CONFIG_SYS_SPI0_NUM_CS 4
88		-#define CONFIG_SYS_SPI1
89		-#define CONFIG_SYS_SPI1_BASE KS2_SPI1_BASE
90		-#define CONFIG_SYS_SPI1_NUM_CS 4
91		-#define CONFIG_SYS_SPI2
92		-#define CONFIG_SYS_SPI2_NUM_CS 4
93		-#define CONFIG_SYS_SPI2_BASE KS2_SPI2_BASE
94		-#define CONFIG_CMD_SPI
95		-#define CONFIG_SYS_SPI_CLK clk_get_rate(KS2_LPSC_EMIF25_SPI)
96		-#define CONFIG_SF_DEFAULT_SPEED 30000000
97		-#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
98		-
99		-/* I2C Configuration */
100		-#define CONFIG_SYS_I2C
101		-#define CONFIG_SYS_I2C_DAVINCI
102		-#define CONFIG_SYS_DAVINCI_I2C_SPEED 100000
103		-#define CONFIG_SYS_DAVINCI_I2C_SLAVE 0x10 /* SMBus host address */
104		-#define CONFIG_SYS_DAVINCI_I2C_SPEED1 100000
105		-#define CONFIG_SYS_DAVINCI_I2C_SLAVE1 0x10 /* SMBus host address */
106		-#define CONFIG_SYS_DAVINCI_I2C_SPEED2 100000
107		-#define CONFIG_SYS_DAVINCI_I2C_SLAVE2 0x10 /* SMBus host address */
108		-#define I2C_BUS_MAX 3
109		-
110		-/* EEPROM definitions */
111		-#define CONFIG_SYS_I2C_MULTI_EEPROMS
112		-#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
113		-#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
114		-#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 6
115		-#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 20
116		-#define CONFIG_ENV_EEPROM_IS_ON_I2C
117		-
118		-/* Network Configuration */
119		-#define CONFIG_DRIVER_TI_KEYSTONE_NET
120		-#define CONFIG_MII
121		-#define CONFIG_BOOTP_DEFAULT
122		-#define CONFIG_BOOTP_DNS
123		-#define CONFIG_BOOTP_DNS2
124		-#define CONFIG_BOOTP_SEND_HOSTNAME
125		-#define CONFIG_NET_RETRY_COUNT 32
126		-#define CONFIG_NET_MULTI
127		-#define CONFIG_GET_LINK_STATUS_ATTEMPTS 5
128		-#define CONFIG_SYS_SGMII_REFCLK_MHZ 312
129		-#define CONFIG_SYS_SGMII_LINERATE_MHZ 1250
130		-#define CONFIG_SYS_SGMII_RATESCALE 2
131		-
132		-/* AEMIF */
133		-#define CONFIG_TI_AEMIF
134		-#define CONFIG_AEMIF_CNTRL_BASE KS2_AEMIF_CNTRL_BASE
135		-
136	34	/* NAND Configuration */
137		-#define CONFIG_NAND_DAVINCI
138		-#define CONFIG_KEYSTONE_RBL_NAND
139		-#define CONFIG_KEYSTONE_NAND_MAX_RBL_SIZE CONFIG_ENV_OFFSET
140		-#define CONFIG_SYS_NAND_CS 2
141		-#define CONFIG_SYS_NAND_USE_FLASH_BBT
142		-#define CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST
143	35	#define CONFIG_SYS_NAND_PAGE_2K
144		-#define CONFIG_SYS_NAND_MASK_CLE 0x4000
145		-#define CONFIG_SYS_NAND_MASK_ALE 0x2000
146	36
147		-#define CONFIG_SYS_NAND_LARGEPAGE
148		-#define CONFIG_SYS_NAND_BASE_LIST { 0x30000000, }
149		-#define CONFIG_SYS_MAX_NAND_DEVICE 1
150		-#define CONFIG_SYS_NAND_MAX_CHIPS 1
151		-#define CONFIG_SYS_NAND_NO_SUBPAGE_WRITE
152		-#define CONFIG_ENV_SIZE (256 << 10) /* 256 KiB */
153		-#define CONFIG_ENV_IS_IN_NAND
154		-#define CONFIG_ENV_OFFSET 0x100000
155		-#define CONFIG_MTD_PARTITIONS
156		-#define CONFIG_MTD_DEVICE
157		-#define CONFIG_RBTREE
158		-#define CONFIG_LZO
159		-#define MTDIDS_DEFAULT "nand0=davinci_nand.0"
160		-#define MTDPARTS_DEFAULT "mtdparts=davinci_nand.0:" \
161		- "1024k(bootloader)ro,512k(params)ro," \
162		- "-(ubifs)"
163		-/* U-Boot command configuration */
164		-#include <config_cmd_default.h>
165		-#define CONFIG_CMD_ASKENV
166		-#define CONFIG_CMD_DHCP
167		-#define CONFIG_CMD_I2C
168		-#define CONFIG_CMD_PING
169		-#define CONFIG_CMD_SAVES
170		-#define CONFIG_CMD_MTDPARTS
171		-#define CONFIG_CMD_NAND
172		-#define CONFIG_CMD_UBI
173		-#define CONFIG_CMD_UBIFS
174		-#define CONFIG_CMD_SF
175		-#define CONFIG_CMD_EEPROM
176		-
177		-/* U-Boot general configuration */
178		-#define CONFIG_SYS_GENERIC_BOARD
179		-#define CONFIG_SYS_PROMPT "K2HK EVM # "
180		-#define CONFIG_SYS_CBSIZE 1024
181		-#define CONFIG_SYS_PBSIZE 2048
182		-#define CONFIG_SYS_MAXARGS 16
183		-#define CONFIG_SYS_HUSH_PARSER
184		-#define CONFIG_SYS_LONGHELP
185		-#define CONFIG_CRC32_VERIFY
186		-#define CONFIG_MX_CYCLIC
187		-#define CONFIG_CMDLINE_EDITING
188		-#define CONFIG_VERSION_VARIABLE
189		-#define CONFIG_TIMESTAMP
190		-
191		-#define CONFIG_BOOTDELAY 3
192		-#define CONFIG_BOOTFILE "uImage"
193		-#define CONFIG_EXTRA_ENV_SETTINGS \
194		- "boot=ramfs\0" \
195		- "tftp_root=/\0" \
196		- "nfs_root=/export\0" \
197		- "mem_lpae=1\0" \
198		- "mem_reserve=512M\0" \
199		- "addr_fdt=0x87000000\0" \
200		- "addr_kern=0x88000000\0" \
201		- "addr_mon=0x0c5f0000\0" \
202		- "addr_uboot=0x87000000\0" \
203		- "addr_fs=0x82000000\0" \
204		- "addr_ubi=0x82000000\0" \
205		- "fdt_high=0xffffffff\0" \
206		- "name_fdt=uImage-k2hk-evm.dtb\0" \
207		- "name_fs=arago-console-image.cpio.gz\0" \
208		- "name_kern=uImage-keystone-evm.bin\0" \
209		- "name_mon=skern-keystone-evm.bin\0" \
210		- "name_uboot=u-boot-spi-keystone-evm.gph\0" \
211		- "name_ubi=keystone-evm-ubifs.ubi\0" \
212		- "run_mon=mon_install ${addr_mon}\0" \
213		- "run_kern=bootm ${addr_kern} - ${addr_fdt}\0" \
214		- "init_net=run args_all args_net\0" \
215		- "init_ubi=run args_all args_ubi; " \
216		- "ubi part ubifs; ubifsmount boot\0" \
217		- "get_fdt_net=dhcp ${addr_fdt} ${tftp_root}/${name_fdt}\0" \
218		- "get_fdt_ubi=ubifsload ${addr_fdt} ${name_fdt}\0" \
219		- "get_kern_net=dhcp ${addr_kern} ${tftp_root}/${name_kern}\0" \
220		- "get_kern_ubi=ubifsload ${addr_kern} ${name_kern}\0" \
221		- "get_mon_net=dhcp ${addr_mon} ${tftp_root}/${name_mon}\0" \
222		- "get_mon_ubi=ubifsload ${addr_mon} ${name_mon}\0" \
223		- "get_uboot_net=dhcp ${addr_uboot} ${tftp_root}/${name_uboot}\0" \
224		- "burn_uboot_spi=sf probe; sf erase 0 0x100000; " \
225		- "sf write ${addr_uboot} 0 ${filesize}\0" \
226		- "burn_uboot_nand=nand erase 0 0x100000; " \
227		- "nand write ${addr_uboot} 0 ${filesize}\0" \
228		- "args_all=setenv bootargs console=ttyS0,115200n8 rootwait=1\0" \
229		- "args_ubi=setenv bootargs ${bootargs} rootfstype=ubifs " \
230		- "root=ubi0:rootfs rootflags=sync rw ubi.mtd=2,2048\0" \
231		- "args_net=setenv bootargs ${bootargs} rootfstype=nfs " \
232		- "root=/dev/nfs rw nfsroot=${serverip}:${nfs_root}," \
233		- "${nfs_options} ip=dhcp\0" \
234		- "nfs_options=v3,tcp,rsize=4096,wsize=4096\0" \
235		- "get_fdt_ramfs=dhcp ${addr_fdt} ${tftp_root}/${name_fdt}\0" \
236		- "get_kern_ramfs=dhcp ${addr_kern} ${tftp_root}/${name_kern}\0" \
237		- "get_mon_ramfs=dhcp ${addr_mon} ${tftp_root}/${name_mon}\0" \
238		- "get_fs_ramfs=dhcp ${addr_fs} ${tftp_root}/${name_fs}\0" \
239		- "get_ubi_net=dhcp ${addr_ubi} ${tftp_root}/${name_ubi}\0" \
240		- "burn_ubi=nand erase.part ubifs; " \
241		- "nand write ${addr_ubi} ubifs ${filesize}\0" \
242		- "init_ramfs=run args_all args_ramfs get_fs_ramfs\0" \
243		- "args_ramfs=setenv bootargs ${bootargs} earlyprintk " \
244		- "rdinit=/sbin/init rw root=/dev/ram0 " \
245		- "initrd=0x802000000,9M\0" \
246		- "no_post=1\0" \
247		- "mtdparts=mtdparts=davinci_nand.0:" \
248		- "1024k(bootloader)ro,512k(params)ro,522752k(ubifs)\0"
249		-#define CONFIG_BOOTCOMMAND \
250		- "run init_${boot} get_fdt_${boot} get_mon_${boot} " \
251		- "get_kern_${boot} run_mon run_kern"
252		-#define CONFIG_BOOTARGS \
253		-
254		-/* Linux interfacing */
255		-#define CONFIG_CMDLINE_TAG
256		-#define CONFIG_SETUP_MEMORY_TAGS
257		-#define CONFIG_OF_LIBFDT 1
258		-#define CONFIG_OF_BOARD_SETUP
259		-#define CONFIG_SYS_BARGSIZE 1024
260		-#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x08000000)
261		-#define CONFIG_LINUX_BOOT_PARAM_ADDR (CONFIG_SYS_SDRAM_BASE + 0x100)
262		-
263		-#define CONFIG_SUPPORT_RAW_INITRD
264		-
265		-/* we may include files below only after all above definitions */
266		-#include <asm/arch/hardware.h>
267		-#include <asm/arch/clock.h>
268		-#define CONFIG_SYS_HZ_CLOCK clk_get_rate(KS2_CLK1_6)
	37	+/* Network */
	38	+#define CONFIG_DRIVER_TI_KEYSTONE_NET
269	39
270	40	#endif /* __CONFIG_K2HK_EVM_H */
	1	+/*
	2	+ * Common configuration header file for all Keystone II EVM platforms
	3	+ *
	4	+ * (C) Copyright 2012-2014
	5	+ * Texas Instruments Incorporated, <www.ti.com>
	6	+ *
	7	+ * SPDX-License-Identifier: GPL-2.0+
	8	+ */
	9	+
	10	+#ifndef __CONFIG_KS2_EVM_H
	11	+#define __CONFIG_KS2_EVM_H
	12	+
	13	+#define CONFIG_SOC_KEYSTONE
	14	+
	15	+/* U-Boot Build Configuration */
	16	+#define CONFIG_SKIP_LOWLEVEL_INIT /* U-Boot is a 2nd stage loader */
	17	+#define CONFIG_SYS_NO_FLASH /* that is, no NOR flash */
	18	+#define CONFIG_SYS_CONSOLE_INFO_QUIET
	19	+#define CONFIG_BOARD_EARLY_INIT_F
	20	+#define CONFIG_SYS_THUMB_BUILD
	21	+
	22	+/* SoC Configuration */
	23	+#define CONFIG_ARMV7
	24	+#define CONFIG_ARCH_CPU_INIT
	25	+#define CONFIG_SYS_ARCH_TIMER
	26	+#define CONFIG_SYS_HZ 1000
	27	+#define CONFIG_SYS_TEXT_BASE 0x0c001000
	28	+#define CONFIG_SPL_TARGET "u-boot-spi.gph"
	29	+#define CONFIG_SYS_DCACHE_OFF
	30	+
	31	+/* Memory Configuration */
	32	+#define CONFIG_NR_DRAM_BANKS 2
	33	+#define CONFIG_SYS_SDRAM_BASE 0x80000000
	34	+#define CONFIG_SYS_LPAE_SDRAM_BASE 0x800000000
	35	+#define CONFIG_MAX_RAM_BANK_SIZE (2 << 30) /* 2GB */
	36	+#define CONFIG_STACKSIZE (512 << 10) /* 512 KiB */
	37	+#define CONFIG_SYS_MALLOC_LEN (4 << 20) /* 4 MiB */
	38	+#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE - \
	39	+ GENERATED_GBL_DATA_SIZE)
	40	+
	41	+/* SPL SPI Loader Configuration */
	42	+#define CONFIG_SPL_PAD_TO 65536
	43	+#define CONFIG_SPL_MAX_SIZE (CONFIG_SPL_PAD_TO - 8)
	44	+#define CONFIG_SPL_BSS_START_ADDR (CONFIG_SPL_TEXT_BASE + \
	45	+ CONFIG_SPL_MAX_SIZE)
	46	+#define CONFIG_SPL_BSS_MAX_SIZE (32 * 1024)
	47	+#define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_BSS_START_ADDR + \
	48	+ CONFIG_SPL_BSS_MAX_SIZE)
	49	+#define CONFIG_SYS_SPL_MALLOC_SIZE (32 * 1024)
	50	+#define CONFIG_SPL_STACK_SIZE (8 * 1024)
	51	+#define CONFIG_SPL_STACK (CONFIG_SYS_SPL_MALLOC_START + \
	52	+ CONFIG_SYS_SPL_MALLOC_SIZE + \
	53	+ CONFIG_SPL_STACK_SIZE - 4)
	54	+#define CONFIG_SPL_LIBCOMMON_SUPPORT
	55	+#define CONFIG_SPL_LIBGENERIC_SUPPORT
	56	+#define CONFIG_SPL_SERIAL_SUPPORT
	57	+#define CONFIG_SPL_SPI_FLASH_SUPPORT
	58	+#define CONFIG_SPL_SPI_SUPPORT
	59	+#define CONFIG_SPL_BOARD_INIT
	60	+#define CONFIG_SPL_SPI_LOAD
	61	+#define CONFIG_SPL_SPI_BUS 0
	62	+#define CONFIG_SPL_SPI_CS 0
	63	+#define CONFIG_SYS_SPI_U_BOOT_OFFS CONFIG_SPL_PAD_TO
	64	+#define CONFIG_SPL_FRAMEWORK
	65	+
	66	+/* UART Configuration */
	67	+#define CONFIG_SYS_NS16550
	68	+#define CONFIG_SYS_NS16550_SERIAL
	69	+#define CONFIG_SYS_NS16550_MEM32
	70	+#define CONFIG_SYS_NS16550_REG_SIZE -4
	71	+#define CONFIG_SYS_NS16550_COM1 KS2_UART0_BASE
	72	+#define CONFIG_SYS_NS16550_COM2 KS2_UART1_BASE
	73	+#define CONFIG_SYS_NS16550_CLK clk_get_rate(KS2_CLK1_6)
	74	+#define CONFIG_CONS_INDEX 1
	75	+#define CONFIG_BAUDRATE 115200
	76	+
	77	+/* SPI Configuration */
	78	+#define CONFIG_SPI
	79	+#define CONFIG_SPI_FLASH
	80	+#define CONFIG_SPI_FLASH_STMICRO
	81	+#define CONFIG_DAVINCI_SPI
	82	+#define CONFIG_CMD_SPI
	83	+#define CONFIG_SYS_SPI_CLK clk_get_rate(KS2_LPSC_EMIF25_SPI)
	84	+#define CONFIG_SF_DEFAULT_SPEED 30000000
	85	+#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
	86	+#define CONFIG_SYS_SPI0
	87	+#define CONFIG_SYS_SPI_BASE KS2_SPI0_BASE
	88	+#define CONFIG_SYS_SPI0_NUM_CS 4
	89	+#define CONFIG_SYS_SPI1
	90	+#define CONFIG_SYS_SPI1_BASE KS2_SPI1_BASE
	91	+#define CONFIG_SYS_SPI1_NUM_CS 4
	92	+#define CONFIG_SYS_SPI2
	93	+#define CONFIG_SYS_SPI2_BASE KS2_SPI2_BASE
	94	+#define CONFIG_SYS_SPI2_NUM_CS 4
	95	+
	96	+/* Network Configuration */
	97	+#define CONFIG_MII
	98	+#define CONFIG_BOOTP_DEFAULT
	99	+#define CONFIG_BOOTP_DNS
	100	+#define CONFIG_BOOTP_DNS2
	101	+#define CONFIG_BOOTP_SEND_HOSTNAME
	102	+#define CONFIG_NET_RETRY_COUNT 32
	103	+#define CONFIG_NET_MULTI
	104	+#define CONFIG_GET_LINK_STATUS_ATTEMPTS 5
	105	+#define CONFIG_SYS_SGMII_REFCLK_MHZ 312
	106	+#define CONFIG_SYS_SGMII_LINERATE_MHZ 1250
	107	+#define CONFIG_SYS_SGMII_RATESCALE 2
	108	+
	109	+/* AEMIF */
	110	+#define CONFIG_TI_AEMIF
	111	+#define CONFIG_AEMIF_CNTRL_BASE KS2_AEMIF_CNTRL_BASE
	112	+
	113	+/* I2C Configuration */
	114	+#define CONFIG_SYS_I2C
	115	+#define CONFIG_SYS_I2C_DAVINCI
	116	+#define CONFIG_SYS_DAVINCI_I2C_SPEED 100000
	117	+#define CONFIG_SYS_DAVINCI_I2C_SLAVE 0x10 /* SMBus host address */
	118	+#define CONFIG_SYS_DAVINCI_I2C_SPEED1 100000
	119	+#define CONFIG_SYS_DAVINCI_I2C_SLAVE1 0x10 /* SMBus host address */
	120	+#define CONFIG_SYS_DAVINCI_I2C_SPEED2 100000
	121	+#define CONFIG_SYS_DAVINCI_I2C_SLAVE2 0x10 /* SMBus host address */
	122	+#define I2C_BUS_MAX 3
	123	+
	124	+/* EEPROM definitions */
	125	+#define CONFIG_SYS_I2C_MULTI_EEPROMS
	126	+#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
	127	+#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
	128	+#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 6
	129	+#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 20
	130	+#define CONFIG_ENV_EEPROM_IS_ON_I2C
	131	+
	132	+/* NAND Configuration */
	133	+#define CONFIG_NAND_DAVINCI
	134	+#define CONFIG_KEYSTONE_RBL_NAND
	135	+#define CONFIG_KEYSTONE_NAND_MAX_RBL_SIZE CONFIG_ENV_OFFSET
	136	+#define CONFIG_SYS_NAND_MASK_CLE 0x4000
	137	+#define CONFIG_SYS_NAND_MASK_ALE 0x2000
	138	+#define CONFIG_SYS_NAND_CS 2
	139	+#define CONFIG_SYS_NAND_USE_FLASH_BBT
	140	+#define CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST
	141	+
	142	+#define CONFIG_SYS_NAND_LARGEPAGE
	143	+#define CONFIG_SYS_NAND_BASE_LIST { 0x30000000, }
	144	+#define CONFIG_SYS_MAX_NAND_DEVICE 1
	145	+#define CONFIG_SYS_NAND_MAX_CHIPS 1
	146	+#define CONFIG_SYS_NAND_NO_SUBPAGE_WRITE
	147	+#define CONFIG_ENV_SIZE (256 << 10) /* 256 KiB */
	148	+#define CONFIG_ENV_IS_IN_NAND
	149	+#define CONFIG_ENV_OFFSET 0x100000
	150	+#define CONFIG_MTD_PARTITIONS
	151	+#define CONFIG_MTD_DEVICE
	152	+#define CONFIG_RBTREE
	153	+#define CONFIG_LZO
	154	+#define MTDIDS_DEFAULT "nand0=davinci_nand.0"
	155	+#define MTDPARTS_DEFAULT "mtdparts=davinci_nand.0:" \
	156	+ "1024k(bootloader)ro,512k(params)ro," \
	157	+ "-(ubifs)"
	158	+
	159	+/* U-Boot command configuration */
	160	+#include <config_cmd_default.h>
	161	+#define CONFIG_CMD_ASKENV
	162	+#define CONFIG_CMD_DHCP
	163	+#define CONFIG_CMD_I2C
	164	+#define CONFIG_CMD_PING
	165	+#define CONFIG_CMD_SAVES
	166	+#define CONFIG_CMD_MTDPARTS
	167	+#define CONFIG_CMD_NAND
	168	+#define CONFIG_CMD_UBI
	169	+#define CONFIG_CMD_UBIFS
	170	+#define CONFIG_CMD_SF
	171	+#define CONFIG_CMD_EEPROM
	172	+
	173	+/* U-Boot general configuration */
	174	+#define CONFIG_SYS_GENERIC_BOARD
	175	+#define CONFIG_SYS_CBSIZE 1024
	176	+#define CONFIG_SYS_PBSIZE 2048
	177	+#define CONFIG_SYS_MAXARGS 16
	178	+#define CONFIG_SYS_HUSH_PARSER
	179	+#define CONFIG_SYS_LONGHELP
	180	+#define CONFIG_CRC32_VERIFY
	181	+#define CONFIG_MX_CYCLIC
	182	+#define CONFIG_CMDLINE_EDITING
	183	+#define CONFIG_VERSION_VARIABLE
	184	+#define CONFIG_TIMESTAMP
	185	+
	186	+/* EDMA3 */
	187	+#define CONFIG_TI_EDMA3
	188	+
	189	+#define CONFIG_BOOTDELAY 3
	190	+#define CONFIG_BOOTFILE "uImage"
	191	+#define CONFIG_EXTRA_ENV_SETTINGS \
	192	+ "boot=ramfs\0" \
	193	+ "tftp_root=/\0" \
	194	+ "nfs_root=/export\0" \
	195	+ "mem_lpae=1\0" \
	196	+ "mem_reserve=512M\0" \
	197	+ "addr_fdt=0x87000000\0" \
	198	+ "addr_kern=0x88000000\0" \
	199	+ KS2_ADDR_MON \
	200	+ "addr_uboot=0x87000000\0" \
	201	+ "addr_fs=0x82000000\0" \
	202	+ "addr_ubi=0x82000000\0" \
	203	+ "addr_secdb_key=0xc000000\0" \
	204	+ "fdt_high=0xffffffff\0" \
	205	+ KS2_FDT_NAME \
	206	+ "name_fs=arago-console-image.cpio.gz\0" \
	207	+ "name_kern=uImage\0" \
	208	+ KS2_NAME_MON \
	209	+ NAME_UBOOT \
	210	+ NAME_UBI \
	211	+ "run_mon=mon_install ${addr_mon}\0" \
	212	+ "run_kern=bootm ${addr_kern} - ${addr_fdt}\0" \
	213	+ "init_net=run args_all args_net\0" \
	214	+ "init_ubi=run args_all args_ubi; " \
	215	+ "ubi part ubifs; ubifsmount boot;" \
	216	+ "ubifsload ${addr_secdb_key} securedb.key.bin;\0" \
	217	+ "get_fdt_net=dhcp ${addr_fdt} ${tftp_root}/${name_fdt}\0" \
	218	+ "get_fdt_ubi=ubifsload ${addr_fdt} ${name_fdt}\0" \
	219	+ "get_kern_net=dhcp ${addr_kern} ${tftp_root}/${name_kern}\0" \
	220	+ "get_kern_ubi=ubifsload ${addr_kern} ${name_kern}\0" \
	221	+ "get_mon_net=dhcp ${addr_mon} ${tftp_root}/${name_mon}\0" \
	222	+ "get_mon_ubi=ubifsload ${addr_mon} ${name_mon}\0" \
	223	+ "get_uboot_net=dhcp ${addr_uboot} ${tftp_root}/${name_uboot}\0" \
	224	+ "burn_uboot_spi=sf probe; sf erase 0 0x100000; " \
	225	+ "sf write ${addr_uboot} 0 ${filesize}\0" \
	226	+ "burn_uboot_nand=nand erase 0 0x100000; " \
	227	+ "nand write ${addr_uboot} 0 ${filesize}\0" \
	228	+ "args_all=setenv bootargs console=ttyS0,115200n8 rootwait=1\0" \
	229	+ KS2_ARGS_UBI \
	230	+ "args_net=setenv bootargs ${bootargs} rootfstype=nfs " \
	231	+ "root=/dev/nfs rw nfsroot=${serverip}:${nfs_root}," \
	232	+ "${nfs_options} ip=dhcp\0" \
	233	+ "nfs_options=v3,tcp,rsize=4096,wsize=4096\0" \
	234	+ "get_fdt_ramfs=dhcp ${addr_fdt} ${tftp_root}/${name_fdt}\0" \
	235	+ "get_kern_ramfs=dhcp ${addr_kern} ${tftp_root}/${name_kern}\0" \
	236	+ "get_mon_ramfs=dhcp ${addr_mon} ${tftp_root}/${name_mon}\0" \
	237	+ "get_fs_ramfs=dhcp ${addr_fs} ${tftp_root}/${name_fs}\0" \
	238	+ "get_ubi_net=dhcp ${addr_ubi} ${tftp_root}/${name_ubi}\0" \
	239	+ "burn_ubi=nand erase.part ubifs; " \
	240	+ "nand write ${addr_ubi} ubifs ${filesize}\0" \
	241	+ "init_ramfs=run args_all args_ramfs get_fs_ramfs\0" \
	242	+ "args_ramfs=setenv bootargs ${bootargs} " \
	243	+ "rdinit=/sbin/init rw root=/dev/ram0 " \
	244	+ "initrd=0x802000000,9M\0" \
	245	+ "no_post=1\0" \
	246	+ "mtdparts=mtdparts=davinci_nand.0:" \
	247	+ "1024k(bootloader)ro,512k(params)ro,-(ubifs)\0"
	248	+
	249	+#define CONFIG_BOOTCOMMAND \
	250	+ "run init_${boot} get_fdt_${boot} get_mon_${boot} " \
	251	+ "get_kern_${boot} run_mon run_kern"
	252	+
	253	+#define CONFIG_BOOTARGS \
	254	+
	255	+/* Linux interfacing */
	256	+#define CONFIG_CMDLINE_TAG
	257	+#define CONFIG_SETUP_MEMORY_TAGS
	258	+#define CONFIG_OF_LIBFDT 1
	259	+#define CONFIG_OF_BOARD_SETUP
	260	+#define CONFIG_SYS_BARGSIZE 1024
	261	+#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x08000000)
	262	+#define CONFIG_LINUX_BOOT_PARAM_ADDR (CONFIG_SYS_SDRAM_BASE + 0x100)
	263	+
	264	+#define CONFIG_SUPPORT_RAW_INITRD
	265	+
	266	+/* we may include files below only after all above definitions */
	267	+#include <asm/arch/hardware.h>
	268	+#include <asm/arch/clock.h>
	269	+#define CONFIG_SYS_HZ_CLOCK clk_get_rate(KS2_CLK1_6)
	270	+
	271	+/* Maximum memory size for relocated U-boot at the end of the DDR3 memory
	272	+ which is NOT applicable for DDR ECC test */
	273	+#define CONFIG_MAX_UBOOT_MEM_SIZE (4 << 20) /* 4 MiB */
	274	+
	275	+#endif /* __CONFIG_KS2_EVM_H */