ARM: UniPhier: add device tree sources for PH1-sLD3

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>

ARM: UniPhier: add device tree sources for PH1-sLD3
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Masahiro Yamada
1 parent f5fd7afcd5
Showing 3 changed files with 186 additions and 0 deletions Side-by-side Diff
arch/arm/dts/Makefile
arch/arm/dts/uniphier-ph1-sld3-ref.dts
arch/arm/dts/uniphier-ph1-sld3.dtsi
@@ -33,6 +33,7 @@
 	tegra124-jetson-tk1.dtb \
 	tegra124-venice2.dtb
 dtb-$(CONFIG_ARCH_UNIPHIER) += \
+	uniphier-ph1-sld3-ref.dtb \
 	uniphier-ph1-pro4-ref.dtb \
 	uniphier-ph1-ld4-ref.dtb \
 	uniphier-ph1-sld8-ref.dtb
+/*
+ * Device Tree Source for UniPhier PH1-sLD3 Reference Board
+ *
+ * Copyright (C) 2014 Panasonic Corporation
+ *   Author: Masahiro Yamada <yamada.m@jp.panasonic.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+/dts-v1/;
+/include/ "uniphier-ph1-sld3.dtsi"
+
+/ {
+	model = "Panasonic UniPhier PH1-sLD3 Reference Board";
+	compatible = "panasonic,ph1-sld3-ref", "panasonic,ph1-sld3";
+
+	memory {
+		device_type = "memory";
+		reg = <0x80000000 0x40000000>;
+	};
+
+	chosen {
+		bootargs = "console=ttyPS0,115200 earlyprintk";
+		stdout-path = &uart0;
+	};
+
+	aliases {
+		uart0 = &uart0;
+		uart1 = &uart1;
+		uart2 = &uart2;
+		i2c0 = &i2c0;
+		i2c1 = &i2c1;
+		i2c2 = &i2c2;
+		i2c3 = &i2c3;
+	};
+};
+
+&uart0 {
+	status = "okay";
+};
+
+&uart1 {
+	status = "okay";
+};
+
+&i2c0 {
+	status = "okay";
+	eeprom {
+		compatible = "i2c-eeprom";
+		reg = <0x50>;
+	};
+};
+
+&usb0 {
+	status = "okay";
+};
+
+&usb1 {
+	status = "okay";
+};
+/*
+ * Device Tree Source for UniPhier PH1-sLD3 SoC
+ *
+ * Copyright (C) 2014 Panasonic Corporation
+ *   Author: Masahiro Yamada <yamada.m@jp.panasonic.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+/include/ "skeleton.dtsi"
+
+/ {
+	compatible = "panasonic,ph1-sld3";
+
+	cpus {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		cpu@0 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a9";
+			reg = <0>;
+		};
+
+		cpu@1 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a9";
+			reg = <1>;
+		};
+	};
+
+	soc {
+		compatible = "simple-bus";
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges;
+
+		uart0: serial@54006800 {
+			compatible = "panasonic,uniphier-uart";
+			status = "disabled";
+			reg = <0x54006800 0x20>;
+			clock-frequency = <36864000>;
+		};
+
+		uart1: serial@54006900 {
+			compatible = "panasonic,uniphier-uart";
+			status = "disabled";
+			reg = <0x54006900 0x20>;
+			clock-frequency = <36864000>;
+		};
+
+		uart2: serial@54006a00 {
+			compatible = "panasonic,uniphier-uart";
+			status = "disabled";
+			reg = <0x54006a00 0x20>;
+			clock-frequency = <36864000>;
+		};
+
+		i2c0: i2c@58400000 {
+			compatible = "panasonic,uniphier-i2c";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0x58400000 0x40>;
+			clock-frequency = <100000>;
+			status = "disabled";
+		};
+
+		i2c1: i2c@58480000 {
+			compatible = "panasonic,uniphier-i2c";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0x58480000 0x40>;
+			clock-frequency = <100000>;
+			status = "disabled";
+		};
+
+		i2c2: i2c@58500000 {
+			compatible = "panasonic,uniphier-i2c";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0x58500000 0x40>;
+			clock-frequency = <100000>;
+			status = "disabled";
+		};
+
+		i2c3: i2c@58580000 {
+			compatible = "panasonic,uniphier-i2c";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0x58580000 0x40>;
+			clock-frequency = <100000>;
+			status = "disabled";
+		};
+
+		usb0: usb@5a800100 {
+			compatible = "panasonic,uniphier-ehci", "usb-ehci";
+			status = "disabled";
+			reg = <0x5a800100 0x100>;
+		};
+
+		usb1: usb@5a810100 {
+			compatible = "panasonic,uniphier-ehci", "usb-ehci";
+			status = "disabled";
+			reg = <0x5a810100 0x100>;
+		};
+
+		usb2: usb@5a820100 {
+			compatible = "panasonic,uniphier-ehci", "usb-ehci";
+			status = "disabled";
+			reg = <0x5a820100 0x100>;
+		};
+
+		usb3: usb@5a830100 {
+			compatible = "panasonic,uniphier-ehci", "usb-ehci";
+			status = "disabled";
+			reg = <0x5a830100 0x100>;
+		};
+
+		nand: nand@f8000000 {
+			compatible = "denali,denali-nand-dt";
+			reg = <0xf8000000 0x20>, <0xf8100000 0x1000>;
+			reg-names = "nand_data", "denali_reg";
+		};
+	};
+};
...	...	@@ -33,6 +33,7 @@
33	33	tegra124-jetson-tk1.dtb \
34	34	tegra124-venice2.dtb
35	35	dtb-$(CONFIG_ARCH_UNIPHIER) += \
	36	+ uniphier-ph1-sld3-ref.dtb \
36	37	uniphier-ph1-pro4-ref.dtb \
37	38	uniphier-ph1-ld4-ref.dtb \
38	39	uniphier-ph1-sld8-ref.dtb
	1	+/*
	2	+ * Device Tree Source for UniPhier PH1-sLD3 Reference Board
	3	+ *
	4	+ * Copyright (C) 2014 Panasonic Corporation
	5	+ * Author: Masahiro Yamada <yamada.m@jp.panasonic.com>
	6	+ *
	7	+ * SPDX-License-Identifier: GPL-2.0+
	8	+ */
	9	+
	10	+/dts-v1/;
	11	+/include/ "uniphier-ph1-sld3.dtsi"
	12	+
	13	+/ {
	14	+ model = "Panasonic UniPhier PH1-sLD3 Reference Board";
	15	+ compatible = "panasonic,ph1-sld3-ref", "panasonic,ph1-sld3";
	16	+
	17	+ memory {
	18	+ device_type = "memory";
	19	+ reg = <0x80000000 0x40000000>;
	20	+ };
	21	+
	22	+ chosen {
	23	+ bootargs = "console=ttyPS0,115200 earlyprintk";
	24	+ stdout-path = &uart0;
	25	+ };
	26	+
	27	+ aliases {
	28	+ uart0 = &uart0;
	29	+ uart1 = &uart1;
	30	+ uart2 = &uart2;
	31	+ i2c0 = &i2c0;
	32	+ i2c1 = &i2c1;
	33	+ i2c2 = &i2c2;
	34	+ i2c3 = &i2c3;
	35	+ };
	36	+};
	37	+
	38	+&uart0 {
	39	+ status = "okay";
	40	+};
	41	+
	42	+&uart1 {
	43	+ status = "okay";
	44	+};
	45	+
	46	+&i2c0 {
	47	+ status = "okay";
	48	+ eeprom {
	49	+ compatible = "i2c-eeprom";
	50	+ reg = <0x50>;
	51	+ };
	52	+};
	53	+
	54	+&usb0 {
	55	+ status = "okay";
	56	+};
	57	+
	58	+&usb1 {
	59	+ status = "okay";
	60	+};