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Commit 23975db5e9979f39f997c5acbce88342e6829f71

Authored by Hou Zhiqiang
Committed by Prabhakar Kushwaha
1 parent bebc0727fe
Exists in smarc_8mq_lf_v2020.04 and in 9 other branches 8qm-imx_v2020.04_5.4.70_2.3.0, emb_lf_v2022.04, pitx_8mp_lf_v2020.04, smarc-8m-android-10.0.0_2.6.0, smarc-8m-android-11.0.0_2.0.0, smarc-8mp-android-11.0.0_2.0.0, smarc_8mm-imx_v2020.04_5.4.24_2.1.0, smarc_8mp_lf_v2020.04, smarc_8mq-imx_v2020.04_5.4.24_2.1.0

powerpc: Enable device tree support for P4080DS 

Add device tree for P4080DS board and enable CONFIG_OF_CONTROL
so that device tree can be compiled.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>

Showing 6 changed files with 111 additions and 3 deletions Side-by-side Diff

arch/powerpc/dts/Makefile
Diff comments   View file @ 23975db
... ... @@ -5,6 +5,7 @@
5 5 dtb-$(CONFIG_TARGET_P2020RDB) += p2020rdb-pc.dtb p2020rdb-pc_36b.dtb
6 6 dtb-$(CONFIG_TARGET_P2041RDB) += p2041rdb.dtb
7 7 dtb-$(CONFIG_TARGET_P3041DS) += p3041ds.dtb
  8 +dtb-$(CONFIG_TARGET_P4080DS) += p4080ds.dtb
8 9 dtb-$(CONFIG_TARGET_T1024RDB) += t1024rdb.dtb
9 10 dtb-$(CONFIG_TARGET_T1042D4RDB) += t1042d4rdb.dtb
10 11 dtb-$(CONFIG_TARGET_T2080QDS) += t2080qds.dtb
arch/powerpc/dts/p4080.dtsi
Diff comments   View file @ 23975db
  1 +// SPDX-License-Identifier: GPL-2.0+ OR X11
  2 +/*
  3 + * P4080/P4040 Silicon/SoC Device Tree Source (pre include)
  4 + *
  5 + * Copyright 2011 - 2015 Freescale Semiconductor Inc.
  6 + * Copyright 2019 NXP
  7 + */
  8 +
  9 +/dts-v1/;
  10 +
  11 +/include/ "e500mc_power_isa.dtsi"
  12 +
  13 +/ {
  14 + compatible = "fsl,P4080";
  15 + #address-cells = <2>;
  16 + #size-cells = <2>;
  17 + interrupt-parent = <&mpic>;
  18 +
  19 + cpus {
  20 + #address-cells = <1>;
  21 + #size-cells = <0>;
  22 +
  23 + cpu0: PowerPC,e500mc@0 {
  24 + device_type = "cpu";
  25 + reg = <0>;
  26 + fsl,portid-mapping = <0x80000000>;
  27 + };
  28 + cpu1: PowerPC,e500mc@1 {
  29 + device_type = "cpu";
  30 + reg = <1>;
  31 + fsl,portid-mapping = <0x40000000>;
  32 + };
  33 + cpu2: PowerPC,e500mc@2 {
  34 + device_type = "cpu";
  35 + reg = <2>;
  36 + fsl,portid-mapping = <0x20000000>;
  37 + };
  38 + cpu3: PowerPC,e500mc@3 {
  39 + device_type = "cpu";
  40 + reg = <3>;
  41 + fsl,portid-mapping = <0x10000000>;
  42 + };
  43 + cpu4: PowerPC,e500mc@4 {
  44 + device_type = "cpu";
  45 + reg = <4>;
  46 + fsl,portid-mapping = <0x08000000>;
  47 + };
  48 + cpu5: PowerPC,e500mc@5 {
  49 + device_type = "cpu";
  50 + reg = <5>;
  51 + fsl,portid-mapping = <0x04000000>;
  52 + };
  53 + cpu6: PowerPC,e500mc@6 {
  54 + device_type = "cpu";
  55 + reg = <6>;
  56 + fsl,portid-mapping = <0x02000000>;
  57 + };
  58 + cpu7: PowerPC,e500mc@7 {
  59 + device_type = "cpu";
  60 + reg = <7>;
  61 + fsl,portid-mapping = <0x01000000>;
  62 + };
  63 + };
  64 +
  65 + soc: soc@ffe000000 {
  66 + ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
  67 + reg = <0xf 0xfe000000 0 0x00001000>;
  68 + #address-cells = <1>;
  69 + #size-cells = <1>;
  70 + device_type = "soc";
  71 + compatible = "simple-bus";
  72 +
  73 + mpic: pic@40000 {
  74 + interrupt-controller;
  75 + #address-cells = <0>;
  76 + #interrupt-cells = <4>;
  77 + reg = <0x40000 0x40000>;
  78 + compatible = "fsl,mpic", "chrp,open-pic";
  79 + device_type = "open-pic";
  80 + clock-frequency = <0x0>;
  81 + };
  82 + };
  83 +};
arch/powerpc/dts/p4080ds.dts
Diff comments   View file @ 23975db
  1 +// SPDX-License-Identifier: GPL-2.0+ OR X11
  2 +/*
  3 + * P4080DS Device Tree Source
  4 + *
  5 + * Copyright 2011 - 2015 Freescale Semiconductor Inc.
  6 + * Copyright 2019 NXP
  7 + */
  8 +
  9 +/include/ "p4080.dtsi"
  10 +
  11 +/ {
  12 + model = "fsl,P4080DS";
  13 + compatible = "fsl,P4080DS";
  14 + #address-cells = <2>;
  15 + #size-cells = <2>;
  16 + interrupt-parent = <&mpic>;
  17 +
  18 +};
configs/P4080DS_SDCARD_defconfig
Diff comments   View file @ 23975db
... ... @@ -2,6 +2,7 @@
2 2 CONFIG_SYS_TEXT_BASE=0xFFF40000
3 3 CONFIG_MPC85xx=y
4 4 CONFIG_TARGET_P4080DS=y
  5 +CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
5 6 CONFIG_FIT=y
6 7 CONFIG_FIT_VERBOSE=y
7 8 CONFIG_OF_BOARD_SETUP=y
... ... @@ -23,6 +24,8 @@
23 24 CONFIG_MP=y
24 25 CONFIG_CMD_EXT2=y
25 26 CONFIG_CMD_FAT=y
  27 +CONFIG_OF_CONTROL=y
  28 +CONFIG_DEFAULT_DEVICE_TREE="p4080ds"
26 29 CONFIG_ENV_IS_IN_MMC=y
27 30 CONFIG_FSL_CAAM=y
28 31 CONFIG_FSL_ESDHC=y
... ... @@ -45,5 +48,4 @@
45 48 CONFIG_FSL_ESPI=y
46 49 CONFIG_USB=y
47 50 CONFIG_USB_STORAGE=y
48   -CONFIG_OF_LIBFDT=y
configs/P4080DS_SPIFLASH_defconfig
Diff comments   View file @ 23975db
... ... @@ -2,6 +2,7 @@
2 2 CONFIG_SYS_TEXT_BASE=0xFFF40000
3 3 CONFIG_MPC85xx=y
4 4 CONFIG_TARGET_P4080DS=y
  5 +CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
5 6 CONFIG_FIT=y
6 7 CONFIG_FIT_VERBOSE=y
7 8 CONFIG_OF_BOARD_SETUP=y
... ... @@ -23,6 +24,8 @@
23 24 CONFIG_MP=y
24 25 CONFIG_CMD_EXT2=y
25 26 CONFIG_CMD_FAT=y
  27 +CONFIG_OF_CONTROL=y
  28 +CONFIG_DEFAULT_DEVICE_TREE="p4080ds"
26 29 CONFIG_ENV_IS_IN_SPI_FLASH=y
27 30 CONFIG_FSL_CAAM=y
28 31 CONFIG_FSL_ESDHC=y
... ... @@ -45,5 +48,4 @@
45 48 CONFIG_FSL_ESPI=y
46 49 CONFIG_USB=y
47 50 CONFIG_USB_STORAGE=y
48   -CONFIG_OF_LIBFDT=y
configs/P4080DS_defconfig
Diff comments   View file @ 23975db
... ... @@ -2,6 +2,7 @@
2 2 CONFIG_SYS_TEXT_BASE=0xEFF40000
3 3 CONFIG_MPC85xx=y
4 4 CONFIG_TARGET_P4080DS=y
  5 +CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
5 6 CONFIG_FIT=y
6 7 CONFIG_FIT_VERBOSE=y
7 8 CONFIG_OF_BOARD_SETUP=y
... ... @@ -22,6 +23,8 @@
22 23 CONFIG_MP=y
23 24 CONFIG_CMD_EXT2=y
24 25 CONFIG_CMD_FAT=y
  26 +CONFIG_OF_CONTROL=y
  27 +CONFIG_DEFAULT_DEVICE_TREE="p4080ds"
25 28 CONFIG_ENV_IS_IN_FLASH=y
26 29 CONFIG_FSL_CAAM=y
27 30 CONFIG_FSL_ESDHC=y
... ... @@ -44,5 +47,4 @@
44 47 CONFIG_FSL_ESPI=y
45 48 CONFIG_USB=y
46 49 CONFIG_USB_STORAGE=y
47   -CONFIG_OF_LIBFDT=y