pmic: pmic_hi6553: Add a driver for the hi6553 pmic found on hikey board.

This adds a simple pmic driver for the hi6553 pmic which is used in conjunction with the hi6220 SoC on the hikey board. Eventually this driver will be updated to be a proper UCLASS PMIC driver which can parse the voltages direct from device tree. Signed-off-by: Peter Griffin <peter.griffin@linaro.org>

pmic: pmic_hi6553: Add a driver for the hi6553 pmic found on hikey board.
This adds a simple pmic driver for the hi6553 pmic which is used in conjunction with the hi6220 SoC on the hikey board. Eventually this driver will be updated to be a proper UCLASS PMIC driver which can parse the voltages direct from device tree. Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Peter Griffin · Tom Rini
1 parent 8a954eb695
Showing 3 changed files with 213 additions and 0 deletions Side-by-side Diff
drivers/power/pmic/Makefile
drivers/power/pmic/pmic_hi6553.c
include/power/hi6553_pmic.h
@@ -23,4 +23,5 @@
 obj-$(CONFIG_POWER_TPS65218) += pmic_tps62362.o
 obj-$(CONFIG_POWER_TPS65218) += pmic_tps65218.o
 obj-$(CONFIG_POWER_TPS65910) += pmic_tps65910.o
+obj-$(CONFIG_POWER_HI6553) += pmic_hi6553.o
+/*
+ *  Copyright (C) 2015 Linaro
+ *  Peter Griffin <peter.griffin@linaro.org>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+#include <asm/io.h>
+#include <common.h>
+#include <power/pmic.h>
+#include <power/max8997_muic.h>
+#include <power/hi6553_pmic.h>
+#include <errno.h>
+
+u8 *pmussi_base;
+
+uint8_t hi6553_readb(u32 offset)
+{
+	return readb(pmussi_base + (offset << 2));
+}
+
+void hi6553_writeb(u32 offset, uint8_t value)
+{
+	writeb(value, pmussi_base + (offset << 2));
+}
+
+int pmic_reg_write(struct pmic *p, u32 reg, u32 val)
+{
+	if (check_reg(p, reg))
+		return -1;
+
+	hi6553_writeb(reg, (uint8_t)val);
+
+	return 0;
+}
+
+int pmic_reg_read(struct pmic *p, u32 reg, u32 *val)
+{
+	if (check_reg(p, reg))
+		return -1;
+
+	*val = (u32)hi6553_readb(reg);
+
+	return 0;
+}
+
+static void hi6553_init(void)
+{
+	int data;
+
+	hi6553_writeb(HI6553_PERI_EN_MARK, 0x1e);
+	hi6553_writeb(HI6553_NP_REG_ADJ1, 0);
+	data = HI6553_DISABLE6_XO_CLK_CONN | HI6553_DISABLE6_XO_CLK_NFC |
+		HI6553_DISABLE6_XO_CLK_RF1 | HI6553_DISABLE6_XO_CLK_RF2;
+	hi6553_writeb(HI6553_DISABLE6_XO_CLK, data);
+
+	/* configure BUCK0 & BUCK1 */
+	hi6553_writeb(HI6553_BUCK01_CTRL2, 0x5e);
+	hi6553_writeb(HI6553_BUCK0_CTRL7, 0x10);
+	hi6553_writeb(HI6553_BUCK1_CTRL7, 0x10);
+	hi6553_writeb(HI6553_BUCK0_CTRL5, 0x1e);
+	hi6553_writeb(HI6553_BUCK1_CTRL5, 0x1e);
+	hi6553_writeb(HI6553_BUCK0_CTRL1, 0xfc);
+	hi6553_writeb(HI6553_BUCK1_CTRL1, 0xfc);
+
+	/* configure BUCK2 */
+	hi6553_writeb(HI6553_BUCK2_REG1, 0x4f);
+	hi6553_writeb(HI6553_BUCK2_REG5, 0x99);
+	hi6553_writeb(HI6553_BUCK2_REG6, 0x45);
+	mdelay(1);
+	hi6553_writeb(HI6553_VSET_BUCK2_ADJ, 0x22);
+	mdelay(1);
+
+	/* configure BUCK3 */
+	hi6553_writeb(HI6553_BUCK3_REG3, 0x02);
+	hi6553_writeb(HI6553_BUCK3_REG5, 0x99);
+	hi6553_writeb(HI6553_BUCK3_REG6, 0x41);
+	hi6553_writeb(HI6553_VSET_BUCK3_ADJ, 0x02);
+	mdelay(1);
+
+	/* configure BUCK4 */
+	hi6553_writeb(HI6553_BUCK4_REG2, 0x9a);
+	hi6553_writeb(HI6553_BUCK4_REG5, 0x99);
+	hi6553_writeb(HI6553_BUCK4_REG6, 0x45);
+
+	/* configure LDO20 */
+	hi6553_writeb(HI6553_LDO20_REG_ADJ, 0x50);
+
+	hi6553_writeb(HI6553_NP_REG_CHG, 0x0f);
+	hi6553_writeb(HI6553_CLK_TOP0, 0x06);
+	hi6553_writeb(HI6553_CLK_TOP3, 0xc0);
+	hi6553_writeb(HI6553_CLK_TOP4, 0x00);
+
+	/* configure LDO7 & LDO10 for SD slot */
+	data = hi6553_readb(HI6553_LDO7_REG_ADJ);
+	data = (data & 0xf8) | 0x2;
+	hi6553_writeb(HI6553_LDO7_REG_ADJ, data);
+	mdelay(5);
+	/* enable LDO7 */
+	hi6553_writeb(HI6553_ENABLE2_LDO1_8, 1 << 6);
+	mdelay(5);
+	data = hi6553_readb(HI6553_LDO10_REG_ADJ);
+	data = (data & 0xf8) | 0x5;
+	hi6553_writeb(HI6553_LDO10_REG_ADJ, data);
+	mdelay(5);
+	/* enable LDO10 */
+	hi6553_writeb(HI6553_ENABLE3_LDO9_16, 1 << 1);
+	mdelay(5);
+
+	/* select 32.764KHz */
+	hi6553_writeb(HI6553_CLK19M2_600_586_EN, 0x01);
+}
+
+int power_hi6553_init(u8 *base)
+{
+	static const char name[] = "HI6553 PMIC";
+	struct pmic *p = pmic_alloc();
+
+	if (!p) {
+		printf("%s: POWER allocation error!\n", __func__);
+		return -ENOMEM;
+	}
+
+	p->name = name;
+	p->interface = PMIC_NONE;
+	p->number_of_regs = 44;
+	pmussi_base = base;
+
+	hi6553_init();
+
+	puts("HI6553 PMIC init\n");
+
+	return 0;
+}
+/*
+ * (C) Copyright 2015 Linaro
+ * Peter Griffin <peter.griffin@linaro.org>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef __HI6553_PMIC_H__
+#define __HI6553_PMIC_H__
+
+/* Registers */
+enum {
+	HI6553_VERSION_REG = 0x000,
+	HI6553_ENABLE2_LDO1_8 = 0x029,
+	HI6553_DISABLE2_LDO1_8,
+	HI6553_ONOFF_STATUS2_LDO1_8,
+	HI6553_ENABLE3_LDO9_16,
+	HI6553_DISABLE3_LDO9_16,
+	HI6553_ONOFF_STATUS3_LDO9_16,
+
+	HI6553_DISABLE6_XO_CLK = 0x036,
+	HI6553_PERI_EN_MARK = 0x040,
+	HI6553_BUCK2_REG1 = 0x04a,
+	HI6553_BUCK2_REG5 = 0x04e,
+	HI6553_BUCK2_REG6,
+
+	HI6553_BUCK3_REG3 = 0x054,
+	HI6553_BUCK3_REG5 = 0x056,
+	HI6553_BUCK3_REG6,
+	HI6553_BUCK4_REG2 = 0x05b,
+	HI6553_BUCK4_REG5 = 0x05e,
+	HI6553_BUCK4_REG6,
+
+	HI6553_CLK_TOP0 = 0x063,
+	HI6553_CLK_TOP3 = 0x066,
+	HI6553_CLK_TOP4,
+	HI6553_VSET_BUCK2_ADJ = 0x06d,
+	HI6553_VSET_BUCK3_ADJ,
+	HI6553_LDO7_REG_ADJ = 0x078,
+	HI6553_LDO10_REG_ADJ = 0x07b,
+	HI6553_LDO19_REG_ADJ = 0x084,
+	HI6553_LDO20_REG_ADJ,
+	HI6553_DR_LED_CTRL = 0x098,
+	HI6553_DR_OUT_CTRL,
+	HI6553_DR3_ISET,
+	HI6553_DR3_START_DEL,
+	HI6553_DR4_ISET,
+	HI6553_DR4_START_DEL,
+	HI6553_DR345_TIM_CONF0 = 0x0a0,
+	HI6553_NP_REG_ADJ1 = 0x0be,
+	HI6553_NP_REG_CHG = 0x0c0,
+	HI6553_BUCK01_CTRL2 = 0x0d9,
+	HI6553_BUCK0_CTRL1 = 0x0dd,
+	HI6553_BUCK0_CTRL5 = 0x0e1,
+	HI6553_BUCK0_CTRL7 = 0x0e3,
+	HI6553_BUCK1_CTRL1 = 0x0e8,
+	HI6553_BUCK1_CTRL5 = 0x0ec,
+	HI6553_BUCK1_CTRL7 = 0x0ef,
+	HI6553_CLK19M2_600_586_EN = 0x0fe,
+};
+
+#define HI6553_DISABLE6_XO_CLK_BB		(1 << 0)
+#define HI6553_DISABLE6_XO_CLK_CONN		(1 << 1)
+#define HI6553_DISABLE6_XO_CLK_NFC		(1 << 2)
+#define HI6553_DISABLE6_XO_CLK_RF1		(1 << 3)
+#define HI6553_DISABLE6_XO_CLK_RF2		(1 << 4)
+
+#define HI6553_LED_START_DELAY_TIME		0x00
+#define HI6553_LED_ELEC_VALUE			0x07
+#define HI6553_LED_LIGHT_TIME			0xf0
+#define HI6553_LED_GREEN_ENABLE			(1 << 1)
+#define HI6553_LED_OUT_CTRL			0x00
+
+#define HI6553_PMU_V300				0x30
+#define HI6553_PMU_V310				0x31
+
+int power_hi6553_init(u8 *base);
+
+#endif	/* __HI6553_PMIC_H__ */
...	...	@@ -23,4 +23,5 @@
23	23	obj-$(CONFIG_POWER_TPS65218) += pmic_tps62362.o
24	24	obj-$(CONFIG_POWER_TPS65218) += pmic_tps65218.o
25	25	obj-$(CONFIG_POWER_TPS65910) += pmic_tps65910.o
	26	+obj-$(CONFIG_POWER_HI6553) += pmic_hi6553.o
	1	+/*
	2	+ * Copyright (C) 2015 Linaro
	3	+ * Peter Griffin <peter.griffin@linaro.org>
	4	+ *
	5	+ * SPDX-License-Identifier: GPL-2.0+
	6	+ */
	7	+#include <asm/io.h>
	8	+#include <common.h>
	9	+#include <power/pmic.h>
	10	+#include <power/max8997_muic.h>
	11	+#include <power/hi6553_pmic.h>
	12	+#include <errno.h>
	13	+
	14	+u8 *pmussi_base;
	15	+
	16	+uint8_t hi6553_readb(u32 offset)
	17	+{
	18	+ return readb(pmussi_base + (offset << 2));
	19	+}
	20	+
	21	+void hi6553_writeb(u32 offset, uint8_t value)
	22	+{
	23	+ writeb(value, pmussi_base + (offset << 2));
	24	+}
	25	+
	26	+int pmic_reg_write(struct pmic *p, u32 reg, u32 val)
	27	+{
	28	+ if (check_reg(p, reg))
	29	+ return -1;
	30	+
	31	+ hi6553_writeb(reg, (uint8_t)val);
	32	+
	33	+ return 0;
	34	+}
	35	+
	36	+int pmic_reg_read(struct pmic p, u32 reg, u32 val)
	37	+{
	38	+ if (check_reg(p, reg))
	39	+ return -1;
	40	+
	41	+ *val = (u32)hi6553_readb(reg);
	42	+
	43	+ return 0;
	44	+}
	45	+
	46	+static void hi6553_init(void)
	47	+{
	48	+ int data;
	49	+
	50	+ hi6553_writeb(HI6553_PERI_EN_MARK, 0x1e);
	51	+ hi6553_writeb(HI6553_NP_REG_ADJ1, 0);
	52	+ data = HI6553_DISABLE6_XO_CLK_CONN \| HI6553_DISABLE6_XO_CLK_NFC \|
	53	+ HI6553_DISABLE6_XO_CLK_RF1 \| HI6553_DISABLE6_XO_CLK_RF2;
	54	+ hi6553_writeb(HI6553_DISABLE6_XO_CLK, data);
	55	+
	56	+ /* configure BUCK0 & BUCK1 */
	57	+ hi6553_writeb(HI6553_BUCK01_CTRL2, 0x5e);
	58	+ hi6553_writeb(HI6553_BUCK0_CTRL7, 0x10);
	59	+ hi6553_writeb(HI6553_BUCK1_CTRL7, 0x10);
	60	+ hi6553_writeb(HI6553_BUCK0_CTRL5, 0x1e);
	61	+ hi6553_writeb(HI6553_BUCK1_CTRL5, 0x1e);
	62	+ hi6553_writeb(HI6553_BUCK0_CTRL1, 0xfc);
	63	+ hi6553_writeb(HI6553_BUCK1_CTRL1, 0xfc);
	64	+
	65	+ /* configure BUCK2 */
	66	+ hi6553_writeb(HI6553_BUCK2_REG1, 0x4f);
	67	+ hi6553_writeb(HI6553_BUCK2_REG5, 0x99);
	68	+ hi6553_writeb(HI6553_BUCK2_REG6, 0x45);
	69	+ mdelay(1);
	70	+ hi6553_writeb(HI6553_VSET_BUCK2_ADJ, 0x22);
	71	+ mdelay(1);
	72	+
	73	+ /* configure BUCK3 */
	74	+ hi6553_writeb(HI6553_BUCK3_REG3, 0x02);
	75	+ hi6553_writeb(HI6553_BUCK3_REG5, 0x99);
	76	+ hi6553_writeb(HI6553_BUCK3_REG6, 0x41);
	77	+ hi6553_writeb(HI6553_VSET_BUCK3_ADJ, 0x02);
	78	+ mdelay(1);
	79	+
	80	+ /* configure BUCK4 */
	81	+ hi6553_writeb(HI6553_BUCK4_REG2, 0x9a);
	82	+ hi6553_writeb(HI6553_BUCK4_REG5, 0x99);
	83	+ hi6553_writeb(HI6553_BUCK4_REG6, 0x45);
	84	+
	85	+ /* configure LDO20 */
	86	+ hi6553_writeb(HI6553_LDO20_REG_ADJ, 0x50);
	87	+
	88	+ hi6553_writeb(HI6553_NP_REG_CHG, 0x0f);
	89	+ hi6553_writeb(HI6553_CLK_TOP0, 0x06);
	90	+ hi6553_writeb(HI6553_CLK_TOP3, 0xc0);
	91	+ hi6553_writeb(HI6553_CLK_TOP4, 0x00);
	92	+
	93	+ /* configure LDO7 & LDO10 for SD slot */
	94	+ data = hi6553_readb(HI6553_LDO7_REG_ADJ);
	95	+ data = (data & 0xf8) \| 0x2;
	96	+ hi6553_writeb(HI6553_LDO7_REG_ADJ, data);
	97	+ mdelay(5);
	98	+ /* enable LDO7 */
	99	+ hi6553_writeb(HI6553_ENABLE2_LDO1_8, 1 << 6);
	100	+ mdelay(5);
	101	+ data = hi6553_readb(HI6553_LDO10_REG_ADJ);
	102	+ data = (data & 0xf8) \| 0x5;
	103	+ hi6553_writeb(HI6553_LDO10_REG_ADJ, data);
	104	+ mdelay(5);
	105	+ /* enable LDO10 */
	106	+ hi6553_writeb(HI6553_ENABLE3_LDO9_16, 1 << 1);
	107	+ mdelay(5);
	108	+
	109	+ /* select 32.764KHz */
	110	+ hi6553_writeb(HI6553_CLK19M2_600_586_EN, 0x01);
	111	+}
	112	+
	113	+int power_hi6553_init(u8 *base)
	114	+{
	115	+ static const char name[] = "HI6553 PMIC";
	116	+ struct pmic *p = pmic_alloc();
	117	+
	118	+ if (!p) {
	119	+ printf("%s: POWER allocation error!\n", __func__);
	120	+ return -ENOMEM;
	121	+ }
	122	+
	123	+ p->name = name;
	124	+ p->interface = PMIC_NONE;
	125	+ p->number_of_regs = 44;
	126	+ pmussi_base = base;
	127	+
	128	+ hi6553_init();
	129	+
	130	+ puts("HI6553 PMIC init\n");
	131	+
	132	+ return 0;
	133	+}
	1	+/*
	2	+ * (C) Copyright 2015 Linaro
	3	+ * Peter Griffin <peter.griffin@linaro.org>
	4	+ *
	5	+ * SPDX-License-Identifier: GPL-2.0+
	6	+ */
	7	+
	8	+#ifndef __HI6553_PMIC_H__
	9	+#define __HI6553_PMIC_H__
	10	+
	11	+/* Registers */
	12	+enum {
	13	+ HI6553_VERSION_REG = 0x000,
	14	+ HI6553_ENABLE2_LDO1_8 = 0x029,
	15	+ HI6553_DISABLE2_LDO1_8,
	16	+ HI6553_ONOFF_STATUS2_LDO1_8,
	17	+ HI6553_ENABLE3_LDO9_16,
	18	+ HI6553_DISABLE3_LDO9_16,
	19	+ HI6553_ONOFF_STATUS3_LDO9_16,
	20	+
	21	+ HI6553_DISABLE6_XO_CLK = 0x036,
	22	+ HI6553_PERI_EN_MARK = 0x040,
	23	+ HI6553_BUCK2_REG1 = 0x04a,
	24	+ HI6553_BUCK2_REG5 = 0x04e,
	25	+ HI6553_BUCK2_REG6,
	26	+
	27	+ HI6553_BUCK3_REG3 = 0x054,
	28	+ HI6553_BUCK3_REG5 = 0x056,
	29	+ HI6553_BUCK3_REG6,
	30	+ HI6553_BUCK4_REG2 = 0x05b,
	31	+ HI6553_BUCK4_REG5 = 0x05e,
	32	+ HI6553_BUCK4_REG6,
	33	+
	34	+ HI6553_CLK_TOP0 = 0x063,
	35	+ HI6553_CLK_TOP3 = 0x066,
	36	+ HI6553_CLK_TOP4,
	37	+ HI6553_VSET_BUCK2_ADJ = 0x06d,
	38	+ HI6553_VSET_BUCK3_ADJ,
	39	+ HI6553_LDO7_REG_ADJ = 0x078,
	40	+ HI6553_LDO10_REG_ADJ = 0x07b,
	41	+ HI6553_LDO19_REG_ADJ = 0x084,
	42	+ HI6553_LDO20_REG_ADJ,
	43	+ HI6553_DR_LED_CTRL = 0x098,
	44	+ HI6553_DR_OUT_CTRL,
	45	+ HI6553_DR3_ISET,
	46	+ HI6553_DR3_START_DEL,
	47	+ HI6553_DR4_ISET,
	48	+ HI6553_DR4_START_DEL,
	49	+ HI6553_DR345_TIM_CONF0 = 0x0a0,
	50	+ HI6553_NP_REG_ADJ1 = 0x0be,
	51	+ HI6553_NP_REG_CHG = 0x0c0,
	52	+ HI6553_BUCK01_CTRL2 = 0x0d9,
	53	+ HI6553_BUCK0_CTRL1 = 0x0dd,
	54	+ HI6553_BUCK0_CTRL5 = 0x0e1,
	55	+ HI6553_BUCK0_CTRL7 = 0x0e3,
	56	+ HI6553_BUCK1_CTRL1 = 0x0e8,
	57	+ HI6553_BUCK1_CTRL5 = 0x0ec,
	58	+ HI6553_BUCK1_CTRL7 = 0x0ef,
	59	+ HI6553_CLK19M2_600_586_EN = 0x0fe,
	60	+};
	61	+
	62	+#define HI6553_DISABLE6_XO_CLK_BB (1 << 0)
	63	+#define HI6553_DISABLE6_XO_CLK_CONN (1 << 1)
	64	+#define HI6553_DISABLE6_XO_CLK_NFC (1 << 2)
	65	+#define HI6553_DISABLE6_XO_CLK_RF1 (1 << 3)
	66	+#define HI6553_DISABLE6_XO_CLK_RF2 (1 << 4)
	67	+
	68	+#define HI6553_LED_START_DELAY_TIME 0x00
	69	+#define HI6553_LED_ELEC_VALUE 0x07
	70	+#define HI6553_LED_LIGHT_TIME 0xf0
	71	+#define HI6553_LED_GREEN_ENABLE (1 << 1)
	72	+#define HI6553_LED_OUT_CTRL 0x00
	73	+
	74	+#define HI6553_PMU_V300 0x30
	75	+#define HI6553_PMU_V310 0x31
	76	+
	77	+int power_hi6553_init(u8 *base);
	78	+
	79	+#endif /* __HI6553_PMIC_H__ */