Commit 247cdf041351329cce2e24ab1080a83db4f3d254
Committed by
Jagannadha Sutradharudu Teki
1 parent
1d0933eaf9
Exists in
master
and in
53 other branches
dra7xx_evm: add SPL API, QSPI, and serial flash support
Enables support for SPI SPL, QSPI and Spansion serial flash device on the EVM. Configures pin muxes for QSPI mode. Signed-off-by: Matt Porter <matt.porter@linaro.org> Signed-off-by: Sourav Poddar <sourav.poddar@ti.com> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Showing 2 changed files with 29 additions and 0 deletions Side-by-side Diff
board/ti/dra7xx/mux_data.h
... | ... | @@ -51,6 +51,16 @@ |
51 | 51 | {RGMII0_RXD2, (IEN | M0) }, |
52 | 52 | {RGMII0_RXD1, (IEN | M0) }, |
53 | 53 | {RGMII0_RXD0, (IEN | M0) }, |
54 | + {GPMC_A13, (IEN | PDIS | M1)}, /* QSPI1_RTCLK */ | |
55 | + {GPMC_A14, (IEN | PDIS | M1)}, /* QSPI1_D[3] */ | |
56 | + {GPMC_A15, (IEN | PDIS | M1)}, /* QSPI1_D[2] */ | |
57 | + {GPMC_A16, (IEN | PDIS | M1)}, /* QSPI1_D[1] */ | |
58 | + {GPMC_A17, (IEN | PDIS | M1)}, /* QSPI1_D[0] */ | |
59 | + {GPMC_A18, (M1)}, /* QSPI1_SCLK */ | |
60 | + {GPMC_A3, (IEN | PDIS | M1)}, /* QSPI1_CS2 */ | |
61 | + {GPMC_A4, (IEN | PDIS | M1)}, /* QSPI1_CS3 */ | |
62 | + {GPMC_CS2, (IEN | PTU | PDIS | M1)}, /* QSPI1_CS0 */ | |
63 | + {GPMC_CS3, (IEN | PTU | PDIS | M1)}, /* QSPI1_CS1*/ | |
54 | 64 | }; |
55 | 65 | #endif /* _MUX_DATA_DRA7XX_H_ */ |
include/configs/dra7xx_evm.h
... | ... | @@ -48,5 +48,24 @@ |
48 | 48 | #define CONFIG_PHYLIB |
49 | 49 | #define CONFIG_PHY_ADDR 2 |
50 | 50 | |
51 | +/* SPI */ | |
52 | +#undef CONFIG_OMAP3_SPI | |
53 | +#define CONFIG_TI_QSPI | |
54 | +#define CONFIG_SPI_FLASH | |
55 | +#define CONFIG_SPI_FLASH_SPANSION | |
56 | +#define CONFIG_CMD_SF | |
57 | +#define CONFIG_CMD_SPI | |
58 | +#define CONFIG_TI_SPI_MMAP | |
59 | +#define CONFIG_SF_DEFAULT_SPEED 48000000 | |
60 | +#define CONFIG_DEFAULT_SPI_MODE SPI_MODE_3 | |
61 | + | |
62 | +/* SPI SPL */ | |
63 | +#define CONFIG_SPL_SPI_SUPPORT | |
64 | +#define CONFIG_SPL_SPI_LOAD | |
65 | +#define CONFIG_SPL_SPI_FLASH_SUPPORT | |
66 | +#define CONFIG_SPL_SPI_BUS 0 | |
67 | +#define CONFIG_SPL_SPI_CS 0 | |
68 | +#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000 | |
69 | + | |
51 | 70 | #endif /* __CONFIG_DRA7XX_EVM_H */ |