Commit 24f85482c90227d6ba4cc3739874bae7e8969a62
Committed by
Daniel Schwierzeck
1 parent
6b7185f3ee
Exists in
smarc_8mq_lf_v2020.04
and in
17 other branches
dm: serial: bcm6345: fix baud rate clock calculation
It's currently bugged and doesn't work for even cases. Right shift bits instead of dividing and fix even cases. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Showing 1 changed file with 4 additions and 4 deletions Side-by-side Diff
drivers/serial/serial_bcm6345.c
... | ... | @@ -157,11 +157,11 @@ |
157 | 157 | UART_FIFO_CFG_TX_4); |
158 | 158 | |
159 | 159 | /* set baud rate */ |
160 | - val = (clk / baudrate) / 16; | |
160 | + val = ((clk / baudrate) >> 4); | |
161 | 161 | if (val & 0x1) |
162 | - val = val; | |
162 | + val = (val >> 1); | |
163 | 163 | else |
164 | - val = val / 2 - 1; | |
164 | + val = (val >> 1) - 1; | |
165 | 165 | writel_be(val, base + UART_BAUD_REG); |
166 | 166 | |
167 | 167 | /* clear interrupts */ |
... | ... | @@ -243,7 +243,7 @@ |
243 | 243 | ret = clk_get_by_index(dev, 0, &clk); |
244 | 244 | if (ret < 0) |
245 | 245 | return ret; |
246 | - priv->uartclk = clk_get_rate(&clk) / 2; | |
246 | + priv->uartclk = clk_get_rate(&clk); | |
247 | 247 | clk_free(&clk); |
248 | 248 | |
249 | 249 | /* initialize serial */ |