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Commit 26e670ea434838d1939dc3adf7b7cc79189b2171

Authored by Wolfgang Denk
1 parent c8f63b415f
Exists in master and in 54 other branches 8qm-imx_v2020.04_5.4.70_2.3.0, emb_lf_v2022.04, imx_v2015.04_4.1.15_1.0.0_ga, pitx_8mp_lf_v2020.04, smarc-8m-android-10.0.0_2.6.0, smarc-8m-android-11.0.0_2.0.0, smarc-8mp-android-11.0.0_2.0.0, smarc-emmc-imx_v2014.04_3.10.53_1.1.0_ga, smarc-emmc-imx_v2014.04_3.14.28_1.0.0_ga, smarc-imx-l5.0.0_1.0.0-ga, smarc-imx6_v2018.03_4.14.98_2.0.0_ga, smarc-imx7_v2017.03_4.9.11_1.0.0_ga, smarc-imx7_v2018.03_4.14.98_2.0.0_ga, smarc-imx_v2014.04_3.14.28_1.0.0_ga, smarc-imx_v2015.04_4.1.15_1.0.0_ga, smarc-imx_v2017.03_4.9.11_1.0.0_ga, smarc-imx_v2017.03_4.9.88_2.0.0_ga, smarc-imx_v2017.03_o8.1.0_1.3.0_8m, smarc-imx_v2018.03_4.14.78_1.0.0_ga, smarc-m6.0.1_2.1.0-ga, smarc-n7.1.2_2.0.0-ga, smarc-rel_imx_4.1.15_2.0.0_ga, smarc_8m-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8m-imx_v2019.04_4.19.35_1.1.0, smarc_8m_00d0-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2019.04_4.19.35_1.1.0, smarc_8mm-imx_v2020.04_5.4.24_2.1.0, smarc_8mp_lf_v2020.04, smarc_8mq-imx_v2020.04_5.4.24_2.1.0, smarc_8mq_lf_v2020.04, ti-u-boot-2015.07, u-boot-2013.01.y, v2013.10, v2013.10-smarct33, v2013.10-smartmen, v2014.01, v2014.04, v2014.04-smarct33, v2014.04-smarct33-emmc, v2014.04-smartmen, v2014.07, v2014.07-smarct33, v2014.07-smartmen, v2015.07-smarct33, v2015.07-smarct33-emmc, v2015.07-smarct4x, v2016.05-dlt, v2016.05-smarct3x, v2016.05-smarct3x-emmc, v2016.05-smarct4x, v2017.01-smarct3x, v2017.01-smarct3x-emmc, v2017.01-smarct4x

ARM: remove broken "evb4510" board. 

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: Curt Brune <curt@cucy.com>

Showing 11 changed files with 1 additions and 1032 deletions Side-by-side Diff

... ... @@ -82,7 +82,6 @@
82 82 N: Curt Brune
83 83 E: curt@cucy.com
84 84 D: Added support for Samsung S3C4510B CPU (ARM7tdmi based SoC)
85   -D: Added support for ESPD-Inc. EVB4510 Board
86 85 W: http://www.cucy.com
87 86  
88 87 N: Jonathan De Bruyne
... ... @@ -301,7 +301,6 @@
301 301 #########################################################################
302 302  
303 303 LIST_ARM7=" \
304   - evb4510 \
305 304 impa7 \
306 305 lpc2292sodimm \
307 306 modnet50 \
board/evb4510/Makefile
View file @ 26e670e
1   -#
2   -# (C) Copyright 2000-2006
3   -# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4   -#
5   -# See file CREDITS for list of people who contributed to this
6   -# project.
7   -#
8   -# This program is free software; you can redistribute it and/or
9   -# modify it under the terms of the GNU General Public License as
10   -# published by the Free Software Foundation; either version 2 of
11   -# the License, or (at your option) any later version.
12   -#
13   -# This program is distributed in the hope that it will be useful,
14   -# but WITHOUT ANY WARRANTY; without even the implied warranty of
15   -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16   -# GNU General Public License for more details.
17   -#
18   -# You should have received a copy of the GNU General Public License
19   -# along with this program; if not, write to the Free Software
20   -# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21   -# MA 02111-1307 USA
22   -#
23   -
24   -include $(TOPDIR)/config.mk
25   -
26   -LIB = $(obj)lib$(BOARD).o
27   -
28   -COBJS := evb4510.o flash.o
29   -SOBJS := lowlevel_init.o
30   -
31   -SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
32   -OBJS := $(addprefix $(obj),$(COBJS))
33   -SOBJS := $(addprefix $(obj),$(SOBJS))
34   -
35   -$(LIB): $(obj).depend $(OBJS) $(SOBJS)
36   - $(call cmd_link_o_target, $(OBJS) $(SOBJS))
37   -
38   -clean:
39   - rm -f $(SOBJS) $(OBJS)
40   -
41   -distclean: clean
42   - rm -f $(LIB) core *.bak $(obj).depend
43   -
44   -#########################################################################
45   -
46   -# defines $(obj).depend target
47   -include $(SRCTREE)/rules.mk
48   -
49   -sinclude $(obj).depend
50   -
51   -#########################################################################
board/evb4510/config.mk
View file @ 26e670e
1   -#
2   -# Copyright (c) 2004 Cucy Systems (http://www.cucy.com)
3   -# Curt Brune <curt@cucy.com>
4   -#
5   -# (C) Copyright 2000-2004
6   -# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
7   -#
8   -# See file CREDITS for list of people who contributed to this
9   -# project.
10   -#
11   -# This program is free software; you can redistribute it and/or
12   -# modify it under the terms of the GNU General Public License as
13   -# published by the Free Software Foundation; either version 2 of
14   -# the License, or (at your option) any later version.
15   -#
16   -# This program is distributed in the hope that it will be useful,
17   -# but WITHOUT ANY WARRANTY; without even the implied warranty of
18   -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19   -# GNU General Public License for more details.
20   -#
21   -# You should have received a copy of the GNU General Public License
22   -# along with this program; if not, write to the Free Software
23   -# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
24   -# MA 02111-1307 USA
25   -#
26   -
27   -CONFIG_SYS_TEXT_BASE = 0x007d0000
board/evb4510/evb4510.c
View file @ 26e670e
1   -/*
2   - * Copyright (c) 2004 Cucy Systems (http://www.cucy.com)
3   - * Curt Brune <curt@cucy.com>
4   - *
5   - * See file CREDITS for list of people who contributed to this
6   - * project.
7   - *
8   - * This program is free software; you can redistribute it and/or
9   - * modify it under the terms of the GNU General Public License as
10   - * published by the Free Software Foundation; either version 2 of
11   - * the License, or (at your option) any later version.
12   - *
13   - * This program is distributed in the hope that it will be useful,
14   - * but WITHOUT ANY WARRANTY; without even the implied warranty of
15   - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16   - * GNU General Public License for more details.
17   - *
18   - * You should have received a copy of the GNU General Public License
19   - * along with this program; if not, write to the Free Software
20   - * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21   - * MA 02111-1307 USA
22   - */
23   -
24   -#include <common.h>
25   -#include <asm/hardware.h>
26   -#include <command.h>
27   -
28   -DECLARE_GLOBAL_DATA_PTR;
29   -
30   -#ifdef CONFIG_EVB4510
31   -
32   -/* ------------------------------------------------------------------------- */
33   -
34   -/*
35   - * Miscelaneous platform dependent initialisations
36   - */
37   -
38   -int board_init (void)
39   -{
40   - icache_enable();
41   -
42   - /* address for the kernel command line */
43   - gd->bd->bi_boot_params = 0x800;
44   -
45   - /* enable board LEDs for output */
46   - PUT_REG( REG_IOPDATA, 0x0);
47   - PUT_REG( REG_IOPMODE, 0xFFFF);
48   - PUT_REG( REG_IOPDATA, 0xFF);
49   -
50   - return 0;
51   -}
52   -
53   -int dram_init (void)
54   -{
55   - gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
56   - gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
57   -#if CONFIG_NR_DRAM_BANKS == 2
58   - gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
59   - gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE;
60   -#endif
61   - return 0;
62   -}
63   -
64   -#endif
board/evb4510/flash.c
View file @ 26e670e
1   -/*
2   - *
3   - * Copyright (c) 2004 Cucy Systems (http://www.cucy.com)
4   - * Curt Brune <curt@cucy.com>
5   - *
6   - * See file CREDITS for list of people who contributed to this
7   - * project.
8   - *
9   - * This program is free software; you can redistribute it and/or
10   - * modify it under the terms of the GNU General Public License as
11   - * published by the Free Software Foundation; either version 2 of
12   - * the License, or (at your option) any later version.
13   - *
14   - * This program is distributed in the hope that it will be useful,
15   - * but WITHOUT ANY WARRANTY; without even the implied warranty of
16   - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17   - * GNU General Public License for more details.
18   - *
19   - * You should have received a copy of the GNU General Public License
20   - * along with this program; if not, write to the Free Software
21   - * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
22   - * MA 02111-1307 USA
23   - */
24   -
25   -#include <common.h>
26   -#include <asm/hardware.h>
27   -#include <flash.h>
28   -
29   -flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS];
30   -
31   -typedef enum {
32   - FLASH_DEV_U9_512KB = 0,
33   - FLASH_DEV_U7_2MB = 1
34   -} FLASH_DEV;
35   -
36   -#define FLASH_DQ7 (0x80)
37   -#define FLASH_DQ5 (0x20)
38   -
39   -#define PROG_ADDR (0xAAA)
40   -#define SETUP_ADDR (0xAAA)
41   -#define ID_ADDR (0xAAA)
42   -#define UNLOCK_ADDR1 (0xAAA)
43   -#define UNLOCK_ADDR2 (0x555)
44   -
45   -#define UNLOCK_CMD1 (0xAA)
46   -#define UNLOCK_CMD2 (0x55)
47   -#define ERASE_SUSPEND_CMD (0xB0)
48   -#define ERASE_RESUME_CMD (0x30)
49   -#define RESET_CMD (0xF0)
50   -#define ID_CMD (0x90)
51   -#define SELECT_CMD (0x90)
52   -#define CHIPERASE_CMD (0x10)
53   -#define BYPASS_CMD (0x20)
54   -#define SECERASE_CMD (0x30)
55   -#define PROG_CMD (0xa0)
56   -#define SETUP_CMD (0x80)
57   -
58   -#if 0
59   -#define WRITE_UNLOCK(addr) { \
60   - PUT__U8( addr + UNLOCK_ADDR1, UNLOCK_CMD1); \
61   - PUT__U8( addr + UNLOCK_ADDR2, UNLOCK_CMD2); \
62   -}
63   -
64   -/* auto select command */
65   -#define CMD_ID(addr) WRITE_UNLOCK(addr); { \
66   - PUT__U8( addr + ID_ADDR, ID_CMD); \
67   -}
68   -
69   -#define CMD_RESET(addr) WRITE_UNLOCK(addr); { \
70   - PUT__U8( addr + ID_ADDR, RESET_CMD); \
71   -}
72   -
73   -#define CMD_ERASE_SEC(base, addr) WRITE_UNLOCK(base); \
74   - PUT__U8( base + SETUP_ADDR, SETUP_CMD); \
75   - WRITE_UNLOCK(base); \
76   - PUT__U8( addr, SECERASE_CMD);
77   -
78   -#define CMD_ERASE_CHIP(base) WRITE_UNLOCK(base); \
79   - PUT__U8( base + SETUP_ADDR, SETUP_CMD); \
80   - WRITE_UNLOCK(base); \
81   - PUT__U8( base + SETUP_ADDR, CHIPERASE_CMD);
82   -
83   -/* prepare for bypass programming */
84   -#define CMD_UNLOCK_BYPASS(addr) WRITE_UNLOCK(addr); { \
85   - PUT__U8( addr + ID_ADDR, 0x20); \
86   -}
87   -
88   -/* terminate bypass programming */
89   -#define CMD_BYPASS_RESET(addr) { \
90   - PUT__U8(addr, 0x90); \
91   - PUT__U8(addr, 0x00); \
92   -}
93   -#endif
94   -
95   -inline static void FLASH_CMD_UNLOCK (FLASH_DEV dev, u32 base)
96   -{
97   - switch (dev) {
98   - case FLASH_DEV_U7_2MB:
99   - PUT__U8 (base + 0xAAA, 0xAA);
100   - PUT__U8 (base + 0x555, 0x55);
101   - break;
102   - case FLASH_DEV_U9_512KB:
103   - PUT__U8 (base + 0x555, 0xAA);
104   - PUT__U8 (base + 0x2AA, 0x55);
105   - break;
106   - }
107   -}
108   -
109   -inline static void FLASH_CMD_SELECT (FLASH_DEV dev, u32 base)
110   -{
111   - switch (dev) {
112   - case FLASH_DEV_U7_2MB:
113   - FLASH_CMD_UNLOCK (dev, base);
114   - PUT__U8 (base + 0xAAA, SELECT_CMD);
115   - break;
116   - case FLASH_DEV_U9_512KB:
117   - FLASH_CMD_UNLOCK (dev, base);
118   - PUT__U8 (base + 0x555, SELECT_CMD);
119   - break;
120   - }
121   -}
122   -
123   -inline static void FLASH_CMD_RESET (FLASH_DEV dev, u32 base)
124   -{
125   - switch (dev) {
126   - case FLASH_DEV_U7_2MB:
127   - FLASH_CMD_UNLOCK (dev, base);
128   - PUT__U8 (base + 0xAAA, RESET_CMD);
129   - break;
130   - case FLASH_DEV_U9_512KB:
131   - FLASH_CMD_UNLOCK (dev, base);
132   - PUT__U8 (base + 0x555, RESET_CMD);
133   - break;
134   - }
135   -}
136   -
137   -inline static void FLASH_CMD_ERASE_SEC (FLASH_DEV dev, u32 base, u32 addr)
138   -{
139   - switch (dev) {
140   - case FLASH_DEV_U7_2MB:
141   - FLASH_CMD_UNLOCK (dev, base);
142   - PUT__U8 (base + 0xAAA, SETUP_CMD);
143   - FLASH_CMD_UNLOCK (dev, base);
144   - PUT__U8 (addr, SECERASE_CMD);
145   - break;
146   - case FLASH_DEV_U9_512KB:
147   - FLASH_CMD_UNLOCK (dev, base);
148   - PUT__U8 (base + 0x555, SETUP_CMD);
149   - FLASH_CMD_UNLOCK (dev, base);
150   - PUT__U8 (addr, SECERASE_CMD);
151   - break;
152   - }
153   -}
154   -
155   -inline static void FLASH_CMD_ERASE_CHIP (FLASH_DEV dev, u32 base)
156   -{
157   - switch (dev) {
158   - case FLASH_DEV_U7_2MB:
159   - FLASH_CMD_UNLOCK (dev, base);
160   - PUT__U8 (base + 0xAAA, SETUP_CMD);
161   - FLASH_CMD_UNLOCK (dev, base);
162   - PUT__U8 (base, CHIPERASE_CMD);
163   - break;
164   - case FLASH_DEV_U9_512KB:
165   - FLASH_CMD_UNLOCK (dev, base);
166   - PUT__U8 (base + 0x555, SETUP_CMD);
167   - FLASH_CMD_UNLOCK (dev, base);
168   - PUT__U8 (base, CHIPERASE_CMD);
169   - break;
170   - }
171   -}
172   -
173   -inline static void FLASH_CMD_UNLOCK_BYPASS (FLASH_DEV dev, u32 base)
174   -{
175   - switch (dev) {
176   - case FLASH_DEV_U7_2MB:
177   - FLASH_CMD_UNLOCK (dev, base);
178   - PUT__U8 (base + 0xAAA, BYPASS_CMD);
179   - break;
180   - case FLASH_DEV_U9_512KB:
181   - FLASH_CMD_UNLOCK (dev, base);
182   - PUT__U8 (base + 0x555, BYPASS_CMD);
183   - break;
184   - }
185   -}
186   -
187   -inline static void FLASH_CMD_BYPASS_RESET (FLASH_DEV dev, u32 base)
188   -{
189   - PUT__U8 (base, SELECT_CMD);
190   - PUT__U8 (base, 0x0);
191   -}
192   -
193   -/* poll for flash command completion */
194   -static u16 _flash_poll (FLASH_DEV dev, u32 addr, u16 data, ulong timeOut)
195   -{
196   - u32 done = 0;
197   - ulong t0;
198   -
199   - u16 error = 0;
200   - volatile u16 flashData;
201   -
202   - data = data & 0xFF;
203   - t0 = get_timer (0);
204   - while (get_timer (t0) < timeOut) {
205   - /* for( i = 0; i < POLL_LOOPS; i++) { */
206   - /* Read the Data */
207   - flashData = GET__U8 (addr);
208   -
209   - /* FLASH_DQ7 = Data? */
210   - if ((flashData & FLASH_DQ7) == (data & FLASH_DQ7)) {
211   - done = 1;
212   - break;
213   - }
214   -
215   - /* Check Timeout (FLASH_DQ5==1) */
216   - if (flashData & FLASH_DQ5) {
217   - /* Read the Data */
218   - flashData = GET__U8 (addr);
219   -
220   - /* FLASH_DQ7 = Data? */
221   - if (!((flashData & FLASH_DQ7) == (data & FLASH_DQ7))) {
222   - printf ("_flash_poll(): FLASH_DQ7 & flashData not equal to write value\n");
223   - error = ERR_PROG_ERROR;
224   - }
225   - FLASH_CMD_RESET (dev, addr);
226   - done = 1;
227   - break;
228   - }
229   - /* spin delay */
230   - udelay (10);
231   - }
232   -
233   -
234   - /* error update */
235   - if (!done) {
236   - printf ("_flash_poll(): Timeout\n");
237   - error = ERR_TIMOUT;
238   - }
239   -
240   - /* Check the data */
241   - if (!error) {
242   - /* Read the Data */
243   - flashData = GET__U8 (addr);
244   - if (flashData != data) {
245   - error = ERR_PROG_ERROR;
246   - printf ("_flash_poll(): flashData(0x%04x) not equal to data(0x%04x)\n",
247   - flashData, data);
248   - }
249   - }
250   -
251   - return error;
252   -}
253   -
254   -/*-----------------------------------------------------------------------
255   - */
256   -static int _flash_check_protection (flash_info_t * info, int s_first, int s_last)
257   -{
258   - int sect, prot = 0;
259   -
260   - for (sect = s_first; sect <= s_last; sect++)
261   - if (info->protect[sect]) {
262   - printf (" Flash sector %d protected.\n", sect);
263   - prot++;
264   - }
265   - return prot;
266   -}
267   -
268   -static int _detectFlash (FLASH_DEV dev, u32 base, u8 venId, u8 devId)
269   -{
270   -
271   - u32 baseAddr = base | CACHE_DISABLE_MASK;
272   - u8 vendorId, deviceId;
273   -
274   - /* printf(__FUNCTION__"(): detecting flash @ 0x%08x\n", base); */
275   -
276   - /* Send auto select command and read manufacturer info */
277   - FLASH_CMD_SELECT (dev, baseAddr);
278   - vendorId = GET__U8 (baseAddr);
279   - FLASH_CMD_RESET (dev, baseAddr);
280   -
281   - /* Send auto select command and read device info */
282   - FLASH_CMD_SELECT (dev, baseAddr);
283   -
284   - if (dev == FLASH_DEV_U7_2MB) {
285   - deviceId = GET__U8 (baseAddr + 2);
286   - } else if (dev == FLASH_DEV_U9_512KB) {
287   - deviceId = GET__U8 (baseAddr + 1);
288   - } else {
289   - return 0;
290   - }
291   -
292   - FLASH_CMD_RESET (dev, baseAddr);
293   -
294   - /* printf (__FUNCTION__"(): found vendorId 0x%04x, deviceId 0x%04x\n",
295   - vendorId, deviceId);
296   - */
297   -
298   - return (vendorId == venId) && (deviceId == devId);
299   -
300   -}
301   -
302   -/******************************************************************************
303   - *
304   - * Public u-boot interface functions below
305   - *
306   - *****************************************************************************/
307   -
308   -/***************************************************************************
309   - *
310   - * Flash initialization
311   - *
312   - * This board has two banks of flash, but the base addresses depend on
313   - * how the board is jumpered.
314   - *
315   - * The two flash types are:
316   - *
317   - * AMD Am29LV160DB (2MB) sectors layout 16KB, 2x8KB, 32KB, 31x64KB
318   - *
319   - * AMD Am29LV040B (512KB) sectors: 8x64KB
320   - *****************************************************************************/
321   -
322   -unsigned long flash_init (void)
323   -{
324   - flash_info_t *info;
325   - u16 i;
326   - u32 flashtest;
327   - s16 amd160 = -1;
328   - u32 amd160base = 0;
329   -
330   -#if CONFIG_SYS_MAX_FLASH_BANKS == 2
331   - s16 amd040 = -1;
332   - u32 amd040base = 0;
333   -#endif
334   -
335   - /* configure PHYS_FLASH_1 */
336   - if (_detectFlash (FLASH_DEV_U7_2MB, PHYS_FLASH_1, 0x1, 0x49)) {
337   - amd160 = 0;
338   - amd160base = PHYS_FLASH_1;
339   -#if CONFIG_SYS_MAX_FLASH_BANKS == 1
340   - }
341   -#else
342   - if (_detectFlash
343   - (FLASH_DEV_U9_512KB, PHYS_FLASH_2, 0x1, 0x4F)) {
344   - amd040 = 1;
345   - amd040base = PHYS_FLASH_2;
346   - } else {
347   - printf (__FUNCTION__
348   - "(): Unable to detect PHYS_FLASH_2: 0x%08x\n",
349   - PHYS_FLASH_2);
350   - }
351   - } else if (_detectFlash (FLASH_DEV_U9_512KB, PHYS_FLASH_1, 0x1, 0x4F)) {
352   - amd040 = 0;
353   - amd040base = PHYS_FLASH_1;
354   - if (_detectFlash (FLASH_DEV_U7_2MB, PHYS_FLASH_2, 0x1, 0x49)) {
355   - amd160 = 1;
356   - amd160base = PHYS_FLASH_2;
357   - } else {
358   - printf (__FUNCTION__
359   - "(): Unable to detect PHYS_FLASH_2: 0x%08x\n",
360   - PHYS_FLASH_2);
361   - }
362   - }
363   -#endif
364   - else {
365   - printf ("flash_init(): Unable to detect PHYS_FLASH_1: 0x%08x\n",
366   - PHYS_FLASH_1);
367   - }
368   -
369   - /* Configure AMD Am29LV160DB (2MB) */
370   - info = &flash_info[amd160];
371   - info->flash_id = FLASH_DEV_U7_2MB;
372   - info->sector_count = 35;
373   - info->size = 2 * 1024 * 1024; /* 2MB */
374   - /* 1*16K Boot Block
375   - 2*8K Parameter Block
376   - 1*32K Small Main Block */
377   - info->start[0] = amd160base;
378   - info->start[1] = amd160base + 0x4000;
379   - info->start[2] = amd160base + 0x6000;
380   - info->start[3] = amd160base + 0x8000;
381   - for (i = 1; i < info->sector_count; i++)
382   - info->start[3 + i] = amd160base + i * (64 * 1024);
383   -
384   - for (i = 0; i < info->sector_count; i++) {
385   - /* Write auto select command sequence and query sector protection */
386   - FLASH_CMD_SELECT (info->flash_id,
387   - info->start[i] | CACHE_DISABLE_MASK);
388   - flashtest =
389   - GET__U8 (((info->start[i] + 4) | CACHE_DISABLE_MASK));
390   - FLASH_CMD_RESET (info->flash_id,
391   - amd160base | CACHE_DISABLE_MASK);
392   - info->protect[i] = (flashtest & 0x0001);
393   - }
394   -
395   - /*
396   - * protect monitor and environment sectors in 2MB flash
397   - */
398   - flash_protect (FLAG_PROTECT_SET,
399   - amd160base, amd160base + monitor_flash_len - 1, info);
400   -
401   - flash_protect (FLAG_PROTECT_SET,
402   - CONFIG_ENV_ADDR, CONFIG_ENV_ADDR + CONFIG_ENV_SIZE - 1, info);
403   -
404   -#if CONFIG_SYS_MAX_FLASH_BANKS == 2
405   - /* Configure AMD Am29LV040B (512KB) */
406   - info = &flash_info[amd040];
407   - info->flash_id = FLASH_DEV_U9_512KB;
408   - info->sector_count = 8;
409   - info->size = 512 * 1024; /* 512KB, 8 x 64KB */
410   - for (i = 0; i < info->sector_count; i++) {
411   - info->start[i] = amd040base + i * (64 * 1024);
412   - /* Write auto select command sequence and query sector protection */
413   - FLASH_CMD_SELECT (info->flash_id,
414   - info->start[i] | CACHE_DISABLE_MASK);
415   - flashtest =
416   - GET__U8 (((info->start[i] + 2) | CACHE_DISABLE_MASK));
417   - FLASH_CMD_RESET (info->flash_id,
418   - amd040base | CACHE_DISABLE_MASK);
419   - info->protect[i] = (flashtest & 0x0001);
420   - }
421   -#endif
422   -
423   - return flash_info[0].size
424   -#if CONFIG_SYS_MAX_FLASH_BANKS == 2
425   - + flash_info[1].size
426   -#endif
427   - ;
428   -}
429   -
430   -void flash_print_info (flash_info_t * info)
431   -{
432   - int i;
433   -
434   - if (info->flash_id == FLASH_DEV_U7_2MB) {
435   - printf ("AMD Am29LV160DB (2MB) 16KB,2x8KB,32KB,31x64KB\n");
436   - } else if (info->flash_id == FLASH_DEV_U9_512KB) {
437   - printf ("AMD Am29LV040B (512KB) 8x64KB\n");
438   - } else {
439   - printf ("Unknown flash_id ...\n");
440   - return;
441   - }
442   -
443   - printf (" Size: %ld KB in %d Sectors\n",
444   - info->size >> 10, info->sector_count);
445   - printf (" Sector Start Addresses:");
446   - for (i = 0; i < info->sector_count; i++) {
447   - if ((i % 4) == 0)
448   - printf ("\n ");
449   - printf (" S%02d @ 0x%08lX%s", i,
450   - info->start[i], info->protect[i] ? " !" : " ");
451   - }
452   - printf ("\n");
453   -}
454   -
455   -int flash_erase (flash_info_t * info, int s_first, int s_last)
456   -{
457   - u16 i, error = 0;
458   -
459   - printf ("\n");
460   -
461   - /* check flash protection bits */
462   - if (_flash_check_protection (info, s_first, s_last)) {
463   - printf (" Flash erase aborted due to protected sectors\n");
464   - return ERR_PROTECTED;
465   - }
466   -
467   - if ((s_first < info->sector_count) && (s_first <= s_last)) {
468   - for (i = s_first; i <= s_last && !error; i++) {
469   - printf (" Erasing Sector %d @ 0x%08lx ... ", i,
470   - info->start[i]);
471   - /* bypass the cache to access the flash memory */
472   - FLASH_CMD_ERASE_SEC (info->flash_id,
473   - (info->
474   - start[0] | CACHE_DISABLE_MASK),
475   - (info->
476   - start[i] | CACHE_DISABLE_MASK));
477   - /* look for sector to become 0xFF after erase */
478   - error = _flash_poll (info->flash_id,
479   - info->
480   - start[i] | CACHE_DISABLE_MASK,
481   - 0xFF, CONFIG_SYS_FLASH_ERASE_TOUT);
482   - FLASH_CMD_RESET (info->flash_id,
483   - (info->
484   - start[0] | CACHE_DISABLE_MASK));
485   - printf ("done\n");
486   - if (error) {
487   - break;
488   - }
489   - }
490   - } else
491   - error = ERR_INVAL;
492   -
493   - return error;
494   -}
495   -
496   -int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
497   -{
498   - u16 error = 0, i;
499   - u32 n;
500   - u8 *bp, *bps;
501   -
502   - /* Write Setup */
503   - /* bypass the cache to access the flash memory */
504   - FLASH_CMD_UNLOCK_BYPASS (info->flash_id,
505   - (info->start[0] | CACHE_DISABLE_MASK));
506   -
507   - /* Write the Data to Flash */
508   -
509   - bp = (u8 *) (addr | CACHE_DISABLE_MASK);
510   - bps = (u8 *) src;
511   -
512   - for (n = 0; n < cnt && !error; n++, bp++, bps++) {
513   -
514   - if (!(n % (cnt / 15))) {
515   - printf (".");
516   - }
517   -
518   - /* write the flash command for flash memory */
519   - *bp = 0xA0;
520   -
521   - /* Write the data */
522   - *bp = *bps;
523   -
524   - /* Check if the write is done */
525   - for (i = 0; i < 0xff; i++);
526   - error = _flash_poll (info->flash_id, (u32) bp, *bps,
527   - CONFIG_SYS_FLASH_WRITE_TOUT);
528   - if (error) {
529   - return error;
530   - }
531   - }
532   -
533   - /* Reset the Flash Mode to read */
534   - FLASH_CMD_BYPASS_RESET (info->flash_id, info->start[0]);
535   -
536   - printf (" ");
537   -
538   - return error;
539   -}
board/evb4510/lowlevel_init.S
View file @ 26e670e
1   -/*
2   - * Copyright (c) 2004 Cucy Systems (http://www.cucy.com)
3   - * Curt Brune <curt@cucy.com>
4   - *
5   - * See file CREDITS for list of people who contributed to this
6   - * project.
7   - *
8   - * This program is free software; you can redistribute it and/or
9   - * modify it under the terms of the GNU General Public License as
10   - * published by the Free Software Foundation; either version 2 of
11   - * the License, or (at your option) any later version.
12   - *
13   - * This program is distributed in the hope that it will be useful,
14   - * but WITHOUT ANY WARRANTY; without even the implied warranty of
15   - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16   - * GNU General Public License for more details.
17   - *
18   - * You should have received a copy of the GNU General Public License
19   - * along with this program; if not, write to the Free Software
20   - * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21   - * MA 02111-1307 USA
22   - */
23   -
24   -
25   -#include <config.h>
26   -#include <version.h>
27   -#include <asm/hardware.h>
28   -
29   -/***********************************************************************
30   - * Configure Memory Map
31   - *
32   - * This memory map allows us to relocate from FLASH to SRAM. After
33   - * power-on reset the CPU only knows about the FLASH memory at address
34   - * 0x00000000. After lowlevel_init completes the memory map will be:
35   - *
36   - * Memory Addr
37   - * 0x00000000
38   - * to 8MB SRAM (U5) -- 8MB Map
39   - * 0x00800000
40   - *
41   - * 0x01000000
42   - * to 2MB Flash @ 0x00000000 (U7) -- 2MB Map
43   - * 0x01200000
44   - *
45   - * 0x02000000
46   - * to 512KB Flash @ 0x02000000 (U9) -- 2MB Map
47   - * 0x02080000
48   - *
49   - * Load all 12 memory registers with the STMIA instruction since
50   - * memory access is disabled once these registers are written. The
51   - * last register written re-enables memory access. For more info see
52   - * the user's manual for the S3C4510B, available from Samsung's web
53   - * site. Search for part number "S3C4510B".
54   - *
55   - ***********************************************************************/
56   -
57   -.globl lowlevel_init
58   -lowlevel_init:
59   -
60   - /* preserve the temp register (r12 AKA ip) and remap it. */
61   - ldr r1, =SRAM_BASE+0xC
62   - add r0, r12, #0x01000000
63   - str r0, [r1]
64   -
65   - /* remap the link register for when we return */
66   - add lr, lr, #0x01000000
67   -
68   - /* store a short program in the on chip SRAM, which is
69   - * unaffected when remapping memory. Note the cache must be
70   - * disabled for the on chip SRAM to be available.
71   - */
72   - ldr r1, =SRAM_BASE
73   - ldr r0, =0xe8801ffe /* stmia r0, {r1-r12} */
74   - str r0, [r1]
75   - add r1, r1, #4
76   - ldr r0, =0xe59fc000 /* ldr r12, [pc, #0] */
77   - str r0, [r1]
78   - add r1, r1, #4
79   - ldr r0, =0xe1a0f00e /* mov pc, lr */
80   - str r0, [r1]
81   -
82   - adr r0, memory_map_data
83   - ldmia r0, {r1-r12}
84   - ldr r0, =REG_EXTDBWTH
85   -
86   - ldr pc, =SRAM_BASE
87   -
88   -.globl reset_cpu
89   -reset_cpu:
90   - /*
91   - * reset the cpu by re-mapping FLASH 0 to 0x0 and jumping to
92   - * address 0x0. We accomplish this by storing a few
93   - * instructions into the on chip SRAM (8KB) and run from
94   - * there. Note the cache must be disabled for the on chip
95   - * SRAM to be available.
96   - *
97   - * load r2 with REG_ROMCON0
98   - * load r3 with 0x12040060 configure FLASH bank 0 @ 0x00000000
99   - * load r4 with REG_DRAMCON0
100   - * load r5 with 0x08000380 configure RAM bank 0 @ 0x01000000
101   - * load r6 with REG_REFEXTCON
102   - * load r7 with 0x9c218360
103   - * load r8 with 0x0
104   - * store str r3,[r2] @ SRAM_BASE
105   - * store str r5,[r4] @ SRAM_BASE + 0x4
106   - * store str r7,[r6] @ SRAM_BASE + 0x8
107   - * store mov pc,r8 @ SRAM_BASE + 0xC
108   - * mov pc, SRAM_BASE
109   - *
110   - */
111   -
112   - /* disable cache */
113   - ldr r0, =REG_SYSCFG
114   - ldr r1, =0x83ffffa0 /* cache-disabled */
115   - str r1, [r0]
116   -
117   - ldr r2, =REG_ROMCON0
118   - ldr r3, =0x02000060 /* Bank0 2MB FLASH @ 0x00000000 */
119   - ldr r4, =REG_DRAMCON0
120   - ldr r5, =0x18040380 /* DRAM0 8MB SRAM @ 0x01000000 */
121   - ldr r6, =REG_REFEXTCON
122   - ldr r7, =0xce278360
123   - ldr r8, =0x00000000
124   - ldr r1, =SRAM_BASE
125   - ldr r0, =0xe5823000 /* str r3, [r2] */
126   - str r0, [r1]
127   - ldr r1, =SRAM_BASE+4
128   - ldr r0, =0xe5845000 /* str r5, [r4] */
129   - str r0, [r1]
130   - ldr r1, =SRAM_BASE+8
131   - ldr r0, =0xe5867000 /* str r7, [r6] */
132   - str r0, [r1]
133   - ldr r1, =SRAM_BASE+0xC
134   - ldr r0, =0xe1a0f008 /* mov pc, r8 */
135   - str r0, [r1]
136   - ldr r1, =SRAM_BASE
137   - mov pc, r1
138   -
139   - /* never return */
140   -
141   -/************************************************************************
142   - * Below are twelve 32-bit values for the twelve memory registers of
143   - * the system manager, starting with register REG_EXTDBWTH.
144   - ***********************************************************************/
145   -memory_map_data:
146   - .long 0x00f03005 /* memory widths */
147   - .long 0x12040060 /* Bank0 2MB FLASH @ 0x01000000 */
148   - .long 0x22080060 /* Bank1 512KB FLASH @ 0x02000000 */
149   - .long 0x00000000
150   - .long 0x00000000
151   - .long 0x00000000
152   - .long 0x00000000
153   - .long 0x08000380 /* DRAM0 8MB SRAM @ 0x00000000 */
154   - .long 0x00000000
155   - .long 0x00000000
156   - .long 0x00000000
157   - .long 0x9c218360 /* enable memory */
... ... @@ -46,7 +46,6 @@
46 46 modnet50 arm arm720t
47 47 integratorap_cm720t arm arm720t integrator armltd - integratorap
48 48 lpc2292sodimm arm arm720t - - lpc2292
49   -evb4510 arm arm720t - - s3c4510b
50 49 integratorap_cm920t arm arm920t integrator armltd - integratorap
51 50 integratorcp_cm920t arm arm920t integrator armltd - integratorcp
52 51 a320evb arm arm920t - faraday a320
... ... @@ -970,17 +970,6 @@
970 970 rd_data = rd_len = rd_load = 0;
971 971 return 1;
972 972 }
973   -
974   -#if defined(CONFIG_B2) || defined(CONFIG_EVB4510) || defined(CONFIG_ARMADILLO)
975   - /*
976   - * We need to copy the ramdisk to SRAM to let Linux boot
977   - */
978   - if (rd_data) {
979   - memmove ((void *)rd_load, (uchar *)rd_data, rd_len);
980   - rd_data = rd_load;
981   - }
982   -#endif /* CONFIG_B2 || CONFIG_EVB4510 || CONFIG_ARMADILLO */
983   -
984 973 } else if (images->legacy_hdr_valid &&
985 974 image_check_type (&images->legacy_hdr_os_copy, IH_TYPE_MULTI)) {
986 975 /*
doc/README.scrapyard
Diff comments   View file @ 26e670e
... ... @@ -11,6 +11,7 @@
11 11  
12 12 Board Arch CPU removed Commit last known maintainer/contact
13 13 =============================================================================
  14 +evb4510 arm arm720t - 2011-09-05 Curt Brune <curt@cucy.com>
14 15 ep7312 arm arm720t - 2011-09-05 Marius Grรถger <mag@sysgo.de>
15 16 dnp1110 arm sa1100 - 2011-09-05 Alex Zรผpke <azu@sysgo.de>
16 17 SMN42 arm arm720t - 2011-09-05
include/configs/evb4510.h
View file @ 26e670e
1   -/*
2   - * Copyright (c) 2004 Cucy Systems (http://www.cucy.com)
3   - * Curt Brune <curt@cucy.com>
4   - *
5   - * Configuation settings for evb4510 board.
6   - *
7   - * See file CREDITS for list of people who contributed to this
8   - * project.
9   - *
10   - * This program is free software; you can redistribute it and/or
11   - * modify it under the terms of the GNU General Public License as
12   - * published by the Free Software Foundation; either version 2 of
13   - * the License, or (at your option) any later version.
14   - *
15   - * This program is distributed in the hope that it will be useful,
16   - * but WITHOUT ANY WARRANTY; without even the implied warranty of
17   - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18   - * GNU General Public License for more details.
19   - *
20   - * You should have received a copy of the GNU General Public License
21   - * along with this program; if not, write to the Free Software
22   - * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23   - * MA 02111-1307 USA
24   - */
25   -
26   -#ifndef __CONFIG_H
27   -#define __CONFIG_H
28   -
29   -/*
30   - * If we are developing, we might want to start u-boot from ram
31   - * so we MUST NOT initialize critical regs like mem-timing ...
32   - *
33   - * Also swap the flash1 and flash2 addresses during debug.
34   - *
35   - * #define CONFIG_SKIP_LOWLEVEL_INIT
36   - */
37   -
38   -/*
39   - * High Level Configuration Options
40   - * (easy to change)
41   - */
42   -#define CONFIG_ARM7 1 /* This is a ARM7 CPU */
43   -#define CONFIG_ARM_THUMB 1 /* this is an ARM7TDMI */
44   -#define CONFIG_S3C4510B 1 /* it's a S3C4510B chip */
45   -#define CONFIG_EVB4510 1 /* on an EVB4510 Board */
46   -#define CONFIG_SYS_ICACHE_OFF
47   -#define CONFIG_SYS_DCACHE_OFF
48   -
49   -#define CONFIG_USE_IRQ
50   -#define CONFIG_STACKSIZE_IRQ (4*1024)
51   -#define CONFIG_STACKSIZE_FIQ (4*1024)
52   -
53   -/*
54   - * Size of malloc() pool
55   - */
56   -#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024)
57   -
58   -/*
59   - * Hardware drivers
60   - */
61   -#define CONFIG_DRIVER_S3C4510_ETH 1
62   -#define CONFIG_DRIVER_S3C4510_I2C 1
63   -#define CONFIG_DRIVER_S3C4510_UART 1
64   -#define CONFIG_DRIVER_S3C4510_FLASH 1
65   -
66   -/*
67   - * select serial console configuration
68   - */
69   -#define CONFIG_SERIAL1 1 /* we use Serial line 1, could also use 2 */
70   -
71   -/* allow to overwrite serial and ethaddr */
72   -#define CONFIG_ENV_OVERWRITE
73   -
74   -#define CONFIG_BAUDRATE 19200
75   -
76   -/*
77   - * BOOTP options
78   - */
79   -#define CONFIG_BOOTP_SUBNETMASK
80   -#define CONFIG_BOOTP_GATEWAY
81   -#define CONFIG_BOOTP_HOSTNAME
82   -#define CONFIG_BOOTP_BOOTPATH
83   -#define CONFIG_BOOTP_BOOTFILESIZE
84   -
85   -
86   -/*
87   - * Command line configuration.
88   - */
89   -#include <config_cmd_default.h>
90   -
91   -#define CONFIG_CMD_PING
92   -
93   -
94   -#define CONFIG_ETHADDR 00:40:95:36:35:33
95   -#define CONFIG_NETMASK 255.255.255.0
96   -#define CONFIG_IPADDR 10.0.0.11
97   -#define CONFIG_SERVERIP 10.0.0.1
98   -#define CONFIG_CMDLINE_TAG /* submit bootargs to kernel */
99   -
100   -#define CONFIG_BOOTDELAY 2
101   -#define CONFIG_BOOTCOMMAND "tftp 100000 uImage"
102   -/* #define CONFIG_BOOTARGS "console=ttyS0,19200 initrd=0x100a0040,530K root=/dev/ram keepinitrd" */
103   -
104   -#if defined(CONFIG_CMD_KGDB)
105   -#define CONFIG_KGDB_BAUDRATE 19200 /* speed to run kgdb serial port */
106   -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
107   -#endif
108   -
109   -/*
110   - * Miscellaneous configurable options
111   - */
112   -#define CONFIG_SYS_LONGHELP /* undef to save memory */
113   -#define CONFIG_SYS_PROMPT "evb4510 # " /* Monitor Command Prompt */
114   -#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
115   -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
116   -#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
117   -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
118   -
119   -#define CONFIG_CMDLINE_TAG /* allow passing of command line args to linux */
120   -#define CONFIG_SETUP_MEMORY_TAGS
121   -#define CONFIG_INITRD_TAG
122   -
123   -#define CONFIG_SYS_MEMTEST_START 0x00000000 /* memtest works on */
124   -#define CONFIG_SYS_MEMTEST_END 0x00780000 /* 4 ... 8 MB in DRAM */
125   -
126   -#define CONFIG_SYS_LOAD_ADDR 0x00000000 /* default load address */
127   -
128   -#define CONFIG_SYS_SYS_CLK_FREQ 50000000 /* CPU freq: 50 MHz */
129   -#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 KHz */
130   -
131   - /* valid baudrates */
132   -#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
133   -
134   -/*-----------------------------------------------------------------------
135   - * Stack sizes
136   - *
137   - * The stack sizes are set up in start.S using the settings below
138   -*/
139   -#define CONFIG_STACKSIZE (128*1024) /* regular stack */
140   -#ifdef CONFIG_USE_IRQ
141   -#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */
142   -#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */
143   -#endif
144   -
145   -/*-----------------------------------------------------------------------
146   - * Physical Memory Map after relocation
147   - */
148   -#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 banks of DRAM */
149   -#define PHYS_SDRAM_1 0x00000000 /* SDRAM Bank #1 */
150   -#define PHYS_SDRAM_1_SIZE 0x00800000 /* 8 MB */
151   -
152   -#define PHYS_FLASH_1 0x01000000 /* Flash Bank #1 */
153   -#define PHYS_FLASH_1_SIZE 0x00200000 /* 2 MB (one chip, 8bit access) */
154   -
155   -#define PHYS_FLASH_2 0x02000000 /* Flash Bank #2 */
156   -#define PHYS_FLASH_2_SIZE 0x00080000 /* 512KB (one chip, 8bit access) */
157   -
158   -#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
159   -#define CONFIG_SYS_FLASH_SIZE PHYS_FLASH_1_SIZE
160   -
161   -/*-----------------------------------------------------------------------
162   - * FLASH and environment organization
163   - */
164   -#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
165   -#define CONFIG_SYS_MAX_FLASH_SECT 35 /* max number of sectors on one chip */
166   -#define CONFIG_SYS_MAIN_SECT_SIZE 0x00010000 /* main size of sectors on one chip */
167   -
168   -/* timeout values are in ticks */
169   -#define CONFIG_SYS_FLASH_ERASE_TOUT (4*CONFIG_SYS_HZ) /* Timeout for Flash Erase */
170   -#define CONFIG_SYS_FLASH_WRITE_TOUT (2*CONFIG_SYS_HZ) /* Timeout for Flash Write */
171   -
172   -/* environment settings */
173   -#define CONFIG_ENV_IS_IN_FLASH
174   -#undef CONFIG_ENV_IS_NOWHERE
175   -
176   -#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x20000) /* environment start address */
177   -#define CONFIG_ENV_SECT_SIZE 0x10000 /* Total Size of Environment Sector */
178   -#define CONFIG_ENV_SIZE 0x1000 /* max size for environment */
179   -
180   -#endif /* __CONFIG_H */