Commit 2996e2dcc0454207b4bf6248d034aead4ac54591
Committed by
Albert ARIBAUD
1 parent
9057e652c3
Exists in
master
and in
54 other branches
tegra2: Add support for Compal Paz00 (Toshiba AC100)
The Toshiba AC100 (Compal code-name Paz00, aka Dynabook AZ) is a netbook derived from the NVIDIA Tegra Harmony reference board. It ships with Android, but is often repurposed to run Linux. This patch adds just enough support to get a U-Boot serial console, and the ability access built-in eMMC and the external SD slot. v2: * Rebased on latest HEAD, incorporated changes made to other board files. * Moved board files from board/nvidia to board/compal. * Switched to correct odmdata value. This required add the previous patch to fix U-Boot's interpretation of the odmdata RAM size field. * Removed nvmem= from default Linux kernel command-line; no drivers use the reserved memory yet, so there's no point reserving it. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
Showing 5 changed files with 175 additions and 0 deletions Side-by-side Diff
MAINTAINERS
board/compal/paz00/Makefile
1 | +# | |
2 | +# Copyright (c) 2010-2012, NVIDIA CORPORATION. All rights reserved. | |
3 | +# | |
4 | +# See file CREDITS for list of people who contributed to this | |
5 | +# project. | |
6 | +# | |
7 | +# This program is free software; you can redistribute it and/or modify it | |
8 | +# under the terms and conditions of the GNU General Public License, | |
9 | +# version 2, as published by the Free Software Foundation. | |
10 | +# | |
11 | +# This program is distributed in the hope it will be useful, but WITHOUT | |
12 | +# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
13 | +# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
14 | +# more details. | |
15 | +# | |
16 | + | |
17 | +include $(TOPDIR)/config.mk | |
18 | + | |
19 | +ifneq ($(OBJTREE),$(SRCTREE)) | |
20 | +$(shell mkdir -p $(obj)../../nvidia/common) | |
21 | +endif | |
22 | + | |
23 | +LIB = $(obj)lib$(BOARD).o | |
24 | + | |
25 | +COBJS := $(BOARD).o | |
26 | +COBJS += ../../nvidia/common/board.o | |
27 | + | |
28 | +SRCS := $(COBJS:.o=.c) | |
29 | +OBJS := $(addprefix $(obj),$(COBJS)) | |
30 | + | |
31 | +$(LIB): $(obj).depend $(OBJS) | |
32 | + $(call cmd_link_o_target, $(OBJS)) | |
33 | + | |
34 | +######################################################################### | |
35 | + | |
36 | +# defines $(obj).depend target | |
37 | +include $(SRCTREE)/rules.mk | |
38 | + | |
39 | +sinclude $(obj).depend | |
40 | + | |
41 | +######################################################################### |
board/compal/paz00/paz00.c
1 | +/* | |
2 | + * Copyright (c) 2010-2012, NVIDIA CORPORATION. All rights reserved. | |
3 | + * | |
4 | + * See file CREDITS for list of people who contributed to this | |
5 | + * project. | |
6 | + * | |
7 | + * This program is free software; you can redistribute it and/or modify it | |
8 | + * under the terms and conditions of the GNU General Public License, | |
9 | + * version 2, as published by the Free Software Foundation. | |
10 | + * | |
11 | + * This program is distributed in the hope it will be useful, but WITHOUT | |
12 | + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
13 | + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
14 | + * more details. | |
15 | + */ | |
16 | + | |
17 | +#include <common.h> | |
18 | +#include <asm/io.h> | |
19 | +#include <asm/arch/tegra2.h> | |
20 | +#include <asm/arch/pinmux.h> | |
21 | +#include <asm/arch/mmc.h> | |
22 | +#include <asm/gpio.h> | |
23 | +#ifdef CONFIG_TEGRA2_MMC | |
24 | +#include <mmc.h> | |
25 | +#endif | |
26 | + | |
27 | +/* | |
28 | + * Routine: gpio_config_uart | |
29 | + * Description: Does nothing on Paz00 - no conflict w/SPI. | |
30 | + */ | |
31 | +void gpio_config_uart(void) | |
32 | +{ | |
33 | +} | |
34 | + | |
35 | +#ifdef CONFIG_TEGRA2_MMC | |
36 | +/* | |
37 | + * Routine: pin_mux_mmc | |
38 | + * Description: setup the pin muxes/tristate values for the SDMMC(s) | |
39 | + */ | |
40 | +static void pin_mux_mmc(void) | |
41 | +{ | |
42 | + /* SDMMC4: config 3, x8 on 2nd set of pins */ | |
43 | + pinmux_set_func(PINGRP_ATB, PMUX_FUNC_SDIO4); | |
44 | + pinmux_set_func(PINGRP_GMA, PMUX_FUNC_SDIO4); | |
45 | + pinmux_set_func(PINGRP_GME, PMUX_FUNC_SDIO4); | |
46 | + | |
47 | + pinmux_tristate_disable(PINGRP_ATB); | |
48 | + pinmux_tristate_disable(PINGRP_GMA); | |
49 | + pinmux_tristate_disable(PINGRP_GME); | |
50 | + | |
51 | + /* SDMMC1: SDIO1_CLK, SDIO1_CMD, SDIO1_DAT[3:0] */ | |
52 | + pinmux_set_func(PINGRP_SDMMC1, PMUX_FUNC_SDIO1); | |
53 | + | |
54 | + pinmux_tristate_disable(PINGRP_SDMMC1); | |
55 | + | |
56 | + /* For power GPIO PV1 */ | |
57 | + pinmux_tristate_disable(PINGRP_UAC); | |
58 | + /* For CD GPIO PI5 */ | |
59 | + pinmux_tristate_disable(PINGRP_ATC); | |
60 | +} | |
61 | + | |
62 | +/* this is a weak define that we are overriding */ | |
63 | +int board_mmc_init(bd_t *bd) | |
64 | +{ | |
65 | + debug("board_mmc_init called\n"); | |
66 | + | |
67 | + /* Enable muxes, etc. for SDMMC controllers */ | |
68 | + pin_mux_mmc(); | |
69 | + | |
70 | + debug("board_mmc_init: init eMMC\n"); | |
71 | + /* init dev 0, eMMC chip, with 4-bit bus */ | |
72 | + /* The board has an 8-bit bus, but 8-bit doesn't work yet */ | |
73 | + tegra2_mmc_init(0, 4, -1, -1); | |
74 | + | |
75 | + debug("board_mmc_init: init SD slot\n"); | |
76 | + /* init dev 3, SD slot, with 4-bit bus */ | |
77 | + tegra2_mmc_init(3, 4, GPIO_PV1, GPIO_PI5); | |
78 | + | |
79 | + return 0; | |
80 | +} | |
81 | +#endif |
boards.cfg
... | ... | @@ -250,6 +250,7 @@ |
250 | 250 | jornada arm sa1100 |
251 | 251 | plutux arm armv7 plutux avionic-design tegra2 |
252 | 252 | medcom arm armv7 medcom avionic-design tegra2 |
253 | +paz00 arm armv7 paz00 compal tegra2 | |
253 | 254 | atngw100 avr32 at32ap - atmel at32ap700x |
254 | 255 | atstk1002 avr32 at32ap atstk1000 atmel at32ap700x |
255 | 256 | atstk1003 avr32 at32ap atstk1000 atmel at32ap700x |
include/configs/paz00.h
1 | +/* | |
2 | + * Copyright (c) 2010,2011, NVIDIA CORPORATION. All rights reserved. | |
3 | + * | |
4 | + * See file CREDITS for list of people who contributed to this | |
5 | + * project. | |
6 | + * | |
7 | + * This program is free software; you can redistribute it and/or modify it | |
8 | + * under the terms and conditions of the GNU General Public License, | |
9 | + * version 2, as published by the Free Software Foundation. | |
10 | + * | |
11 | + * This program is distributed in the hope it will be useful, but WITHOUT | |
12 | + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
13 | + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
14 | + * more details. | |
15 | + */ | |
16 | + | |
17 | +#ifndef __CONFIG_H | |
18 | +#define __CONFIG_H | |
19 | + | |
20 | +#include <asm/sizes.h> | |
21 | +#include "tegra2-common.h" | |
22 | + | |
23 | +/* High-level configuration options */ | |
24 | +#define TEGRA2_SYSMEM "mem=512M@0M" | |
25 | +#define V_PROMPT "Tegra2 (Paz00) MOD # " | |
26 | +#define CONFIG_TEGRA2_BOARD_STRING "Compal Paz00" | |
27 | + | |
28 | +/* Board-specific serial config */ | |
29 | +#define CONFIG_SERIAL_MULTI | |
30 | +#define CONFIG_TEGRA2_ENABLE_UARTA | |
31 | +#define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE | |
32 | + | |
33 | +#define CONFIG_MACH_TYPE MACH_TYPE_PAZ00 | |
34 | +#define CONFIG_SYS_BOARD_ODMDATA 0x800c0085 /* lp1, 512MB */ | |
35 | + | |
36 | +#define CONFIG_BOARD_EARLY_INIT_F | |
37 | + | |
38 | +/* SD/MMC */ | |
39 | +#define CONFIG_MMC | |
40 | +#define CONFIG_GENERIC_MMC | |
41 | +#define CONFIG_TEGRA2_MMC | |
42 | +#define CONFIG_CMD_MMC | |
43 | + | |
44 | +#define CONFIG_DOS_PARTITION | |
45 | +#define CONFIG_EFI_PARTITION | |
46 | +#define CONFIG_CMD_EXT2 | |
47 | +#define CONFIG_CMD_FAT | |
48 | + | |
49 | +/* Environment not stored */ | |
50 | +#define CONFIG_ENV_IS_NOWHERE | |
51 | +#endif /* __CONFIG_H */ |