Commit 2ad1304aec9fdfc4a4c90862aa581b207e2665cb
1 parent
519bc30d20
Exists in
smarc-rel_imx_4.1.15_2.0.0_ga
MLK-12711 imx: correct speed grading info for i.MX6UL
Correct speed grading info for i.MX6UL Signed-off-by: Peng Fan <peng.fan@nxp.com>
Showing 1 changed file with 15 additions and 0 deletions Side-by-side Diff
arch/arm/cpu/armv7/mx6/soc.c
... | ... | @@ -112,6 +112,12 @@ |
112 | 112 | #define OCOTP_CFG3_SPEED_1GHZ 2 |
113 | 113 | #define OCOTP_CFG3_SPEED_1P2GHZ 3 |
114 | 114 | |
115 | +/* | |
116 | + * For i.MX6UL | |
117 | + */ | |
118 | +#define OCOTP_CFG3_SPEED_528MHZ 1 | |
119 | +#define OCOTP_CFG3_SPEED_696MHZ 2 | |
120 | + | |
115 | 121 | u32 get_cpu_speed_grade_hz(void) |
116 | 122 | { |
117 | 123 | struct ocotp_regs *ocotp = (struct ocotp_regs *)OCOTP_BASE_ADDR; |
... | ... | @@ -123,6 +129,15 @@ |
123 | 129 | val = readl(&fuse->cfg3); |
124 | 130 | val >>= OCOTP_CFG3_SPEED_SHIFT; |
125 | 131 | val &= 0x3; |
132 | + | |
133 | + if (is_cpu_type(MXC_CPU_MX6UL)) { | |
134 | + if (val == OCOTP_CFG3_SPEED_528MHZ) | |
135 | + return 528000000; | |
136 | + else if (val == OCOTP_CFG3_SPEED_696MHZ) | |
137 | + return 69600000; | |
138 | + else | |
139 | + return 0; | |
140 | + } | |
126 | 141 | |
127 | 142 | switch (val) { |
128 | 143 | /* Valid for IMX6DQ */ |