Commit 2bc49ecb68ed71b36337f5c81f7edc8e816c1048

Authored by Hou Zhiqiang
Committed by Prabhakar Kushwaha
1 parent c1e486e81a

configs: P1020RDB: Enable PCIe driver

Enable the DM PCIe driver in P1020RDB defconfig.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>

Showing 12 changed files with 48 additions and 0 deletions Side-by-side Diff

configs/P1020RDB-PC_36BIT_NAND_defconfig
... ... @@ -58,6 +58,10 @@
58 58 CONFIG_PHY_MARVELL=y
59 59 CONFIG_PHY_GIGE=y
60 60 CONFIG_E1000=y
  61 +CONFIG_DM=y
  62 +CONFIG_DM_PCI=y
  63 +CONFIG_DM_PCI_COMPAT=y
  64 +CONFIG_PCIE_FSL=y
61 65 CONFIG_MII=y
62 66 CONFIG_TSEC_ENET=y
63 67 CONFIG_SYS_NS16550=y
configs/P1020RDB-PC_36BIT_SDCARD_defconfig
... ... @@ -53,6 +53,10 @@
53 53 CONFIG_PHY_MARVELL=y
54 54 CONFIG_PHY_GIGE=y
55 55 CONFIG_E1000=y
  56 +CONFIG_DM=y
  57 +CONFIG_DM_PCI=y
  58 +CONFIG_DM_PCI_COMPAT=y
  59 +CONFIG_PCIE_FSL=y
56 60 CONFIG_MII=y
57 61 CONFIG_TSEC_ENET=y
58 62 CONFIG_SYS_NS16550=y
configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig
... ... @@ -54,6 +54,10 @@
54 54 CONFIG_PHY_MARVELL=y
55 55 CONFIG_PHY_GIGE=y
56 56 CONFIG_E1000=y
  57 +CONFIG_DM=y
  58 +CONFIG_DM_PCI=y
  59 +CONFIG_DM_PCI_COMPAT=y
  60 +CONFIG_PCIE_FSL=y
57 61 CONFIG_MII=y
58 62 CONFIG_TSEC_ENET=y
59 63 CONFIG_SYS_NS16550=y
configs/P1020RDB-PC_36BIT_defconfig
... ... @@ -42,6 +42,10 @@
42 42 CONFIG_PHY_MARVELL=y
43 43 CONFIG_PHY_GIGE=y
44 44 CONFIG_E1000=y
  45 +CONFIG_DM=y
  46 +CONFIG_DM_PCI=y
  47 +CONFIG_DM_PCI_COMPAT=y
  48 +CONFIG_PCIE_FSL=y
45 49 CONFIG_MII=y
46 50 CONFIG_TSEC_ENET=y
47 51 CONFIG_SYS_NS16550=y
configs/P1020RDB-PC_NAND_defconfig
... ... @@ -57,6 +57,10 @@
57 57 CONFIG_PHY_MARVELL=y
58 58 CONFIG_PHY_GIGE=y
59 59 CONFIG_E1000=y
  60 +CONFIG_DM=y
  61 +CONFIG_DM_PCI=y
  62 +CONFIG_DM_PCI_COMPAT=y
  63 +CONFIG_PCIE_FSL=y
60 64 CONFIG_MII=y
61 65 CONFIG_TSEC_ENET=y
62 66 CONFIG_SYS_NS16550=y
configs/P1020RDB-PC_SDCARD_defconfig
... ... @@ -52,6 +52,10 @@
52 52 CONFIG_PHY_MARVELL=y
53 53 CONFIG_PHY_GIGE=y
54 54 CONFIG_E1000=y
  55 +CONFIG_DM=y
  56 +CONFIG_DM_PCI=y
  57 +CONFIG_DM_PCI_COMPAT=y
  58 +CONFIG_PCIE_FSL=y
55 59 CONFIG_MII=y
56 60 CONFIG_TSEC_ENET=y
57 61 CONFIG_SYS_NS16550=y
configs/P1020RDB-PC_SPIFLASH_defconfig
... ... @@ -53,6 +53,10 @@
53 53 CONFIG_PHY_MARVELL=y
54 54 CONFIG_PHY_GIGE=y
55 55 CONFIG_E1000=y
  56 +CONFIG_DM=y
  57 +CONFIG_DM_PCI=y
  58 +CONFIG_DM_PCI_COMPAT=y
  59 +CONFIG_PCIE_FSL=y
56 60 CONFIG_MII=y
57 61 CONFIG_TSEC_ENET=y
58 62 CONFIG_SYS_NS16550=y
configs/P1020RDB-PC_defconfig
... ... @@ -41,6 +41,10 @@
41 41 CONFIG_PHY_MARVELL=y
42 42 CONFIG_PHY_GIGE=y
43 43 CONFIG_E1000=y
  44 +CONFIG_DM=y
  45 +CONFIG_DM_PCI=y
  46 +CONFIG_DM_PCI_COMPAT=y
  47 +CONFIG_PCIE_FSL=y
44 48 CONFIG_MII=y
45 49 CONFIG_TSEC_ENET=y
46 50 CONFIG_SYS_NS16550=y
configs/P1020RDB-PD_NAND_defconfig
... ... @@ -61,6 +61,10 @@
61 61 CONFIG_PHY_MARVELL=y
62 62 CONFIG_PHY_GIGE=y
63 63 CONFIG_E1000=y
  64 +CONFIG_DM=y
  65 +CONFIG_DM_PCI=y
  66 +CONFIG_DM_PCI_COMPAT=y
  67 +CONFIG_PCIE_FSL=y
64 68 CONFIG_MII=y
65 69 CONFIG_TSEC_ENET=y
66 70 CONFIG_SYS_NS16550=y
configs/P1020RDB-PD_SDCARD_defconfig
... ... @@ -56,6 +56,10 @@
56 56 CONFIG_PHY_MARVELL=y
57 57 CONFIG_PHY_GIGE=y
58 58 CONFIG_E1000=y
  59 +CONFIG_DM=y
  60 +CONFIG_DM_PCI=y
  61 +CONFIG_DM_PCI_COMPAT=y
  62 +CONFIG_PCIE_FSL=y
59 63 CONFIG_MII=y
60 64 CONFIG_TSEC_ENET=y
61 65 CONFIG_SYS_NS16550=y
configs/P1020RDB-PD_SPIFLASH_defconfig
... ... @@ -57,6 +57,10 @@
57 57 CONFIG_PHY_MARVELL=y
58 58 CONFIG_PHY_GIGE=y
59 59 CONFIG_E1000=y
  60 +CONFIG_DM=y
  61 +CONFIG_DM_PCI=y
  62 +CONFIG_DM_PCI_COMPAT=y
  63 +CONFIG_PCIE_FSL=y
60 64 CONFIG_MII=y
61 65 CONFIG_TSEC_ENET=y
62 66 CONFIG_SYS_NS16550=y
configs/P1020RDB-PD_defconfig
... ... @@ -45,6 +45,10 @@
45 45 CONFIG_PHY_MARVELL=y
46 46 CONFIG_PHY_GIGE=y
47 47 CONFIG_E1000=y
  48 +CONFIG_DM=y
  49 +CONFIG_DM_PCI=y
  50 +CONFIG_DM_PCI_COMPAT=y
  51 +CONFIG_PCIE_FSL=y
48 52 CONFIG_MII=y
49 53 CONFIG_TSEC_ENET=y
50 54 CONFIG_SYS_NS16550=y